RISC-V instruction encoding and decoding.
This crate allows you to encode and decode streams of RISC-V instructions to and from Rust structs.
To get the instruction streams out of an ELF binary, which is where you'll normally find them, I recommend the goblin
crate.
Example
use ;
let bytes: = ;
let mut stream = new;
// Decodes to an `addi a0, x0, 0` instruction
assert_eq!;
// There's only one instruction in the byte array so any further calls to
// `next` return `None`.
assert_eq!;
Compatibility
This crate partially or fully supports the following RISC-V extensions:
- RV64I Base instruction set.
- "M" Integer multiplication & division (exception:
MULHSU
is not implemented) - "A" Atomic operations (exception: Load-Reserved and Store-Condition are not implemented)
- "Zicsr" Control & Status Register (partial)
- "C" Compressed instructions (exception: instruction encoding is not implemented)