use ax_memory_addr::{PhysAddr, VirtAddr};
#[ax_crate_interface::def_interface]
pub trait RiscvVplicHostIf {
fn phys_to_virt(paddr: PhysAddr) -> VirtAddr;
}
pub(crate) fn phys_to_virt(paddr: PhysAddr) -> VirtAddr {
ax_crate_interface::call_interface!(RiscvVplicHostIf::phys_to_virt(paddr))
}