riscv 0.16.1

# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
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# See Cargo.toml.orig for the original contents.

[package]
edition = "2021"
rust-version = "1.81"
name = "riscv"
version = "0.16.1"
authors = ["The RISC-V Team <risc-v@teams.rust-embedded.org>"]
build = false
autolib = false
autobins = false
autoexamples = false
autotests = false
autobenches = false
description = "Low level access to RISC-V processors"
documentation = "https://docs.rs/riscv"
readme = "README.md"
keywords = [
    "riscv",
    "register",
    "peripheral",
]
categories = [
    "embedded",
    "hardware-support",
    "no-std",
]
license = "MIT OR Apache-2.0"
repository = "https://github.com/rust-embedded/riscv"

[package.metadata.docs.rs]
all-features = true
default-target = "riscv64imac-unknown-none-elf"
targets = [
    "riscv32i-unknown-none-elf",
    "riscv32imc-unknown-none-elf",
    "riscv32imac-unknown-none-elf",
    "riscv64imac-unknown-none-elf",
    "riscv64gc-unknown-none-elf",
]

[features]
critical-section-single-hart = ["critical-section/restore-state-bool"]
default = ["riscv-macros"]
rt = ["riscv-macros/rt"]
rt-v-trap = [
    "rt",
    "riscv-macros/rt-v-trap",
]
s-mode = []

[lib]
name = "riscv"
path = "src/lib.rs"

[dependencies.critical-section]
version = "1.2.0"

[dependencies.embedded-hal]
version = "1.0.0"

[dependencies.pastey]
version = "0.2.2"

[dependencies.riscv-macros]
version = "0.4.1"
optional = true

[dependencies.riscv-types]
version = "0.1.0"