rigless 0.1.0

// Copyright (c) 2026 Rigless Labs.
// SPDX-License-Identifier: MIT OR Apache-2.0
//! The bit fields of the core's own registers, of the system registers the family answers, and of
//! `EXC_RETURN`, by hand from ARM DDI 0403E.b and, where a bit is the Cortex-M4's own, 100166.
//!
//! A part's SVD doesn't describe the core, so nothing generates these. Each table carries a field's
//! position, width and the access the manual gives it, and the code that answers the register does
//! the rest. A field is named as the manual spells it, and where the manual numbers a bit without
//! naming it, the name is the manual's notation and the constant says what the bit means.
//!
//! The core works in 32-bit words, so [`mask`], [`get`], [`set`] and [`is_set`] answer in `u32`.

use crate::soc::{Access, FieldSpec, ReadAction, WriteModify};

const fn field(name: &'static str, bit: u8, width: u8, access: Access) -> FieldSpec {
    FieldSpec {
        name,
        bit,
        width,
        access,
        read: ReadAction::None,
        write: WriteModify::None,
    }
}

#[expect(
    clippy::cast_possible_truncation,
    reason = "every field here is of a 32-bit register, and a const fn has no try_from"
)]
const fn word(value: u64) -> u32 {
    value as u32
}

/// The bits `field` occupies.
pub(crate) const fn mask(field: &FieldSpec) -> u32 {
    word(field.mask())
}

/// `field`'s value within `value`.
pub(crate) const fn get(field: &FieldSpec, value: u32) -> u32 {
    word(field.get(value as u64))
}

/// `value` with `field` replaced by `to`.
pub(crate) const fn set(field: &FieldSpec, value: u32, to: u32) -> u32 {
    word(field.set(value as u64, to as u64))
}

/// Whether any bit of `field` is set in `value`.
pub(crate) const fn is_set(field: &FieldSpec, value: u32) -> bool {
    field.is_set(value as u64)
}

/// `xPSR`'s fields, B1.4.2: the `APSR`'s flags, the `EPSR`'s `T` and `ICI/IT`, which Table B1-2
/// places at bits 26:25 and 15:10, and the `IPSR`'s exception number.
pub(crate) mod xpsr {
    use super::{Access, FieldSpec, field};
    pub(crate) const N: &FieldSpec = &field("N", 31, 1, Access::ReadWrite);
    pub(crate) const Z: &FieldSpec = &field("Z", 30, 1, Access::ReadWrite);
    pub(crate) const C: &FieldSpec = &field("C", 29, 1, Access::ReadWrite);
    pub(crate) const V: &FieldSpec = &field("V", 28, 1, Access::ReadWrite);
    pub(crate) const Q: &FieldSpec = &field("Q", 27, 1, Access::ReadWrite);
    pub(crate) const IT_1_0: &FieldSpec = &field("IT[1:0]", 25, 2, Access::ReadOnly);
    pub(crate) const T: &FieldSpec = &field("T", 24, 1, Access::ReadOnly);
    pub(crate) const GE: &FieldSpec = &field("GE[3:0]", 16, 4, Access::ReadWrite);
    pub(crate) const IT_7_2: &FieldSpec = &field("IT[7:2]", 10, 6, Access::ReadOnly);
    /// Bit 9 of a stacked `xPSR`, set when exception entry realigned the stack, B1.5.7.
    pub(crate) const REALIGNED: &FieldSpec = &field("psr<9>", 9, 1, Access::ReadOnly);
    pub(crate) const EXCEPTION_NUMBER: &FieldSpec =
        &field("Exception Number", 0, 9, Access::ReadOnly);
}

/// The mask registers' fields, B1.4.3 and Figure B1-2: `PRIMASK` and `FAULTMASK` are a bit each,
/// and `BASEPRI` a priority field's eight.
pub(crate) mod masks {
    use super::{Access, FieldSpec, field};
    pub(crate) const PM: &FieldSpec = &field("PM", 0, 1, Access::ReadWrite);
    pub(crate) const FM: &FieldSpec = &field("FM", 0, 1, Access::ReadWrite);
    pub(crate) const BASEPRI: &FieldSpec = &field("BASEPRI", 0, 8, Access::ReadWrite);
}

/// `CONTROL`'s fields, B1.4.4.
pub(crate) mod control {
    use super::{Access, FieldSpec, field};
    pub(crate) const NPRIV: &FieldSpec = &field("nPRIV", 0, 1, Access::ReadWrite);
    pub(crate) const SPSEL: &FieldSpec = &field("SPSEL", 1, 1, Access::ReadWrite);
    pub(crate) const FPCA: &FieldSpec = &field("FPCA", 2, 1, Access::ReadWrite);
}

/// `FPSCR`'s fields, A2.5.3.
pub(crate) mod fpscr {
    use super::{Access, FieldSpec, field};
    pub(crate) const N: &FieldSpec = &field("N", 31, 1, Access::ReadWrite);
    pub(crate) const Z: &FieldSpec = &field("Z", 30, 1, Access::ReadWrite);
    pub(crate) const C: &FieldSpec = &field("C", 29, 1, Access::ReadWrite);
    pub(crate) const V: &FieldSpec = &field("V", 28, 1, Access::ReadWrite);
    pub(crate) const AHP: &FieldSpec = &field("AHP", 26, 1, Access::ReadWrite);
    pub(crate) const DN: &FieldSpec = &field("DN", 25, 1, Access::ReadWrite);
    pub(crate) const FZ: &FieldSpec = &field("FZ", 24, 1, Access::ReadWrite);
    pub(crate) const RMODE: &FieldSpec = &field("RMode", 22, 2, Access::ReadWrite);
    pub(crate) const IDC: &FieldSpec = &field("IDC", 7, 1, Access::ReadWrite);
    pub(crate) const IXC: &FieldSpec = &field("IXC", 4, 1, Access::ReadWrite);
    pub(crate) const UFC: &FieldSpec = &field("UFC", 3, 1, Access::ReadWrite);
    pub(crate) const OFC: &FieldSpec = &field("OFC", 2, 1, Access::ReadWrite);
    pub(crate) const DZC: &FieldSpec = &field("DZC", 1, 1, Access::ReadWrite);
    pub(crate) const IOC: &FieldSpec = &field("IOC", 0, 1, Access::ReadWrite);
}

/// The bits of `EXC_RETURN` the core reads, B1.5.8. The manual numbers them without naming them,
/// and Table B1-9's columns say what each one means.
pub(crate) mod exc_return {
    use super::{Access, FieldSpec, field};
    /// All ones in every `EXC_RETURN`, which is how a load of the PC is told apart from a branch.
    pub(crate) const PREFIX: &FieldSpec = &field("EXC_RETURN<31:28>", 28, 4, Access::ReadWrite);
    /// Set for the basic frame and clear for the extended one, Table B1-9's frame type.
    pub(crate) const BASIC_FRAME: &FieldSpec = &field("EXC_RETURN<4>", 4, 1, Access::ReadWrite);
    /// Where the return goes, Table B1-9's mode and stack.
    pub(crate) const TARGET: &FieldSpec = &field("EXC_RETURN<3:0>", 0, 4, Access::ReadWrite);
    /// Set for a return to the process stack, Table B1-9's return stack.
    pub(crate) const PROCESS_STACK: &FieldSpec = &field("EXC_RETURN<2>", 2, 1, Access::ReadWrite);
}

/// `ICSR`'s fields, B3.2.4.
pub(crate) mod icsr {
    use super::{Access, FieldSpec, field};
    pub(crate) const NMIPENDSET: &FieldSpec = &field("NMIPENDSET", 31, 1, Access::ReadWrite);
    pub(crate) const PENDSVSET: &FieldSpec = &field("PENDSVSET", 28, 1, Access::ReadWrite);
    pub(crate) const PENDSVCLR: &FieldSpec = &field("PENDSVCLR", 27, 1, Access::WriteOnly);
    pub(crate) const PENDSTSET: &FieldSpec = &field("PENDSTSET", 26, 1, Access::ReadWrite);
    pub(crate) const PENDSTCLR: &FieldSpec = &field("PENDSTCLR", 25, 1, Access::WriteOnly);
    pub(crate) const ISRPENDING: &FieldSpec = &field("ISRPENDING", 22, 1, Access::ReadOnly);
    pub(crate) const VECTPENDING: &FieldSpec = &field("VECTPENDING", 12, 9, Access::ReadOnly);
    pub(crate) const RETTOBASE: &FieldSpec = &field("RETTOBASE", 11, 1, Access::ReadOnly);
    pub(crate) const VECTACTIVE: &FieldSpec = &field("VECTACTIVE", 0, 9, Access::ReadOnly);
}

/// `VTOR`'s field, B3.2.5.
pub(crate) mod vtor {
    use super::{Access, FieldSpec, field};
    pub(crate) const TBLOFF: &FieldSpec = &field("TBLOFF", 7, 25, Access::ReadWrite);
}

/// `AIRCR`'s fields, B3.2.6. Bits 31 to 16 are `VECTKEY` to a write and `VECTKEYSTAT` to a read.
pub(crate) mod aircr {
    use super::{Access, FieldSpec, field};
    pub(crate) const VECTKEY: &FieldSpec = &field("VECTKEY", 16, 16, Access::WriteOnly);
    pub(crate) const VECTKEYSTAT: &FieldSpec = &field("VECTKEYSTAT", 16, 16, Access::ReadOnly);
    pub(crate) const ENDIANNESS: &FieldSpec = &field("ENDIANNESS", 15, 1, Access::ReadOnly);
    pub(crate) const PRIGROUP: &FieldSpec = &field("PRIGROUP", 8, 3, Access::ReadWrite);
    pub(crate) const SYSRESETREQ: &FieldSpec = &field("SYSRESETREQ", 2, 1, Access::ReadWrite);
}

/// `SCR`'s fields, B3.2.7.
pub(crate) mod scr {
    use super::{Access, FieldSpec, field};
    pub(crate) const SEVONPEND: &FieldSpec = &field("SEVONPEND", 4, 1, Access::ReadWrite);
    pub(crate) const SLEEPDEEP: &FieldSpec = &field("SLEEPDEEP", 2, 1, Access::ReadWrite);
    pub(crate) const SLEEPONEXIT: &FieldSpec = &field("SLEEPONEXIT", 1, 1, Access::ReadWrite);
}

/// `CCR`'s fields, B3.2.8, but `BP`, `IC` and `DC`, which a core with no caches and no branch
/// prediction doesn't have.
pub(crate) mod ccr {
    use super::{Access, FieldSpec, field};
    pub(crate) const STKALIGN: &FieldSpec = &field("STKALIGN", 9, 1, Access::ReadWrite);
    pub(crate) const BFHFNMIGN: &FieldSpec = &field("BFHFNMIGN", 8, 1, Access::ReadWrite);
    pub(crate) const DIV_0_TRP: &FieldSpec = &field("DIV_0_TRP", 4, 1, Access::ReadWrite);
    pub(crate) const UNALIGN_TRP: &FieldSpec = &field("UNALIGN_TRP", 3, 1, Access::ReadWrite);
    pub(crate) const USERSETMPEND: &FieldSpec = &field("USERSETMPEND", 1, 1, Access::ReadWrite);
    pub(crate) const NONBASETHRDENA: &FieldSpec = &field("NONBASETHRDENA", 0, 1, Access::ReadWrite);
}

/// `SHCSR`'s fields, B3.2.13.
pub(crate) mod shcsr {
    use super::{Access, FieldSpec, field};
    pub(crate) const USGFAULTENA: &FieldSpec = &field("USGFAULTENA", 18, 1, Access::ReadWrite);
    pub(crate) const BUSFAULTENA: &FieldSpec = &field("BUSFAULTENA", 17, 1, Access::ReadWrite);
    pub(crate) const MEMFAULTENA: &FieldSpec = &field("MEMFAULTENA", 16, 1, Access::ReadWrite);
    pub(crate) const SVCALLPENDED: &FieldSpec = &field("SVCALLPENDED", 15, 1, Access::ReadWrite);
    pub(crate) const BUSFAULTPENDED: &FieldSpec =
        &field("BUSFAULTPENDED", 14, 1, Access::ReadWrite);
    pub(crate) const MEMFAULTPENDED: &FieldSpec =
        &field("MEMFAULTPENDED", 13, 1, Access::ReadWrite);
    pub(crate) const USGFAULTPENDED: &FieldSpec =
        &field("USGFAULTPENDED", 12, 1, Access::ReadWrite);
    pub(crate) const SYSTICKACT: &FieldSpec = &field("SYSTICKACT", 11, 1, Access::ReadWrite);
    pub(crate) const PENDSVACT: &FieldSpec = &field("PENDSVACT", 10, 1, Access::ReadWrite);
    pub(crate) const MONITORACT: &FieldSpec = &field("MONITORACT", 8, 1, Access::ReadWrite);
    pub(crate) const SVCALLACT: &FieldSpec = &field("SVCALLACT", 7, 1, Access::ReadWrite);
    pub(crate) const USGFAULTACT: &FieldSpec = &field("USGFAULTACT", 3, 1, Access::ReadWrite);
    pub(crate) const BUSFAULTACT: &FieldSpec = &field("BUSFAULTACT", 1, 1, Access::ReadWrite);
    pub(crate) const MEMFAULTACT: &FieldSpec = &field("MEMFAULTACT", 0, 1, Access::ReadWrite);
}

/// `CFSR`'s fields, B3.2.15. It's three registers in one word, `MMFSR` in bits 7 to 0, `BFSR` in
/// 15 to 8 and `UFSR` in 31 to 16, and each field sits where it is in the word, which is what the
/// core reads and writes. A write of one clears a bit.
pub(crate) mod cfsr {
    use super::{Access, FieldSpec, field};
    pub(crate) const IACCVIOL: &FieldSpec = &field("IACCVIOL", 0, 1, Access::ReadWrite);
    pub(crate) const DACCVIOL: &FieldSpec = &field("DACCVIOL", 1, 1, Access::ReadWrite);
    pub(crate) const MUNSTKERR: &FieldSpec = &field("MUNSTKERR", 3, 1, Access::ReadWrite);
    pub(crate) const MSTKERR: &FieldSpec = &field("MSTKERR", 4, 1, Access::ReadWrite);
    pub(crate) const MLSPERR: &FieldSpec = &field("MLSPERR", 5, 1, Access::ReadWrite);
    pub(crate) const MMARVALID: &FieldSpec = &field("MMARVALID", 7, 1, Access::ReadWrite);
    pub(crate) const IBUSERR: &FieldSpec = &field("IBUSERR", 8, 1, Access::ReadWrite);
    pub(crate) const PRECISERR: &FieldSpec = &field("PRECISERR", 9, 1, Access::ReadWrite);
    pub(crate) const UNSTKERR: &FieldSpec = &field("UNSTKERR", 11, 1, Access::ReadWrite);
    pub(crate) const STKERR: &FieldSpec = &field("STKERR", 12, 1, Access::ReadWrite);
    pub(crate) const LSPERR: &FieldSpec = &field("LSPERR", 13, 1, Access::ReadWrite);
    pub(crate) const BFARVALID: &FieldSpec = &field("BFARVALID", 15, 1, Access::ReadWrite);
    pub(crate) const UNDEFINSTR: &FieldSpec = &field("UNDEFINSTR", 16, 1, Access::ReadWrite);
    pub(crate) const INVSTATE: &FieldSpec = &field("INVSTATE", 17, 1, Access::ReadWrite);
    pub(crate) const INVPC: &FieldSpec = &field("INVPC", 18, 1, Access::ReadWrite);
    pub(crate) const NOCP: &FieldSpec = &field("NOCP", 19, 1, Access::ReadWrite);
    pub(crate) const UNALIGNED: &FieldSpec = &field("UNALIGNED", 24, 1, Access::ReadWrite);
    pub(crate) const DIVBYZERO: &FieldSpec = &field("DIVBYZERO", 25, 1, Access::ReadWrite);
}

/// `HFSR`'s fields, B3.2.16. A write of one clears a bit.
pub(crate) mod hfsr {
    use super::{Access, FieldSpec, field};
    pub(crate) const DEBUGEVT: &FieldSpec = &field("DEBUGEVT", 31, 1, Access::ReadWrite);
    pub(crate) const FORCED: &FieldSpec = &field("FORCED", 30, 1, Access::ReadWrite);
    pub(crate) const VECTTBL: &FieldSpec = &field("VECTTBL", 1, 1, Access::ReadWrite);
}

/// `CPACR`'s fields for the two coprocessors v7-M implements, the floating-point extension's,
/// B3.2.20.
pub(crate) mod cpacr {
    use super::{Access, FieldSpec, field};
    pub(crate) const CP11: &FieldSpec = &field("CP11", 22, 2, Access::ReadWrite);
    pub(crate) const CP10: &FieldSpec = &field("CP10", 20, 2, Access::ReadWrite);
}

/// `FPCCR`'s fields, B3.2.21.
pub(crate) mod fpccr {
    use super::{Access, FieldSpec, field};
    pub(crate) const ASPEN: &FieldSpec = &field("ASPEN", 31, 1, Access::ReadWrite);
    pub(crate) const LSPEN: &FieldSpec = &field("LSPEN", 30, 1, Access::ReadWrite);
    pub(crate) const MONRDY: &FieldSpec = &field("MONRDY", 8, 1, Access::ReadWrite);
    pub(crate) const BFRDY: &FieldSpec = &field("BFRDY", 6, 1, Access::ReadWrite);
    pub(crate) const MMRDY: &FieldSpec = &field("MMRDY", 5, 1, Access::ReadWrite);
    pub(crate) const HFRDY: &FieldSpec = &field("HFRDY", 4, 1, Access::ReadWrite);
    pub(crate) const THREAD: &FieldSpec = &field("THREAD", 3, 1, Access::ReadWrite);
    pub(crate) const USER: &FieldSpec = &field("USER", 1, 1, Access::ReadWrite);
    pub(crate) const LSPACT: &FieldSpec = &field("LSPACT", 0, 1, Access::ReadWrite);
}

/// `FPCAR`'s field, B3.2.22.
pub(crate) mod fpcar {
    use super::{Access, FieldSpec, field};
    pub(crate) const ADDRESS: &FieldSpec = &field("ADDRESS", 3, 29, Access::ReadWrite);
}

/// `FPDSCR`'s fields, B3.2.23, the defaults for the same fields of `FPSCR`.
pub(crate) mod fpdscr {
    use super::{Access, FieldSpec, field};
    pub(crate) const AHP: &FieldSpec = &field("AHP", 26, 1, Access::ReadWrite);
    pub(crate) const DN: &FieldSpec = &field("DN", 25, 1, Access::ReadWrite);
    pub(crate) const FZ: &FieldSpec = &field("FZ", 24, 1, Access::ReadWrite);
    pub(crate) const RMODE: &FieldSpec = &field("RMode", 22, 2, Access::ReadWrite);
}

/// `ACTLR`'s fields, which are the implementation's: the Cortex-M4's, 100166 section 4.2.
pub(crate) mod actlr {
    use super::{Access, FieldSpec, field};
    pub(crate) const DISOOFP: &FieldSpec = &field("DISOOFP", 9, 1, Access::ReadWrite);
    pub(crate) const DISFPCA: &FieldSpec = &field("DISFPCA", 8, 1, Access::ReadWrite);
    pub(crate) const DISFOLD: &FieldSpec = &field("DISFOLD", 2, 1, Access::ReadWrite);
    pub(crate) const DISDEFWBUF: &FieldSpec = &field("DISDEFWBUF", 1, 1, Access::ReadWrite);
    pub(crate) const DISMCYCINT: &FieldSpec = &field("DISMCYCINT", 0, 1, Access::ReadWrite);
}

/// `STIR`'s field, B3.2.26.
pub(crate) mod stir {
    use super::{Access, FieldSpec, field};
    pub(crate) const INTID: &FieldSpec = &field("INTID", 0, 9, Access::WriteOnly);
}

/// `SYST_CSR`'s fields, B3.3.3.
pub(crate) mod syst_csr {
    use super::{Access, FieldSpec, field};
    pub(crate) const COUNTFLAG: &FieldSpec = &field("COUNTFLAG", 16, 1, Access::ReadOnly);
    pub(crate) const CLKSOURCE: &FieldSpec = &field("CLKSOURCE", 2, 1, Access::ReadWrite);
    pub(crate) const TICKINT: &FieldSpec = &field("TICKINT", 1, 1, Access::ReadWrite);
    pub(crate) const ENABLE: &FieldSpec = &field("ENABLE", 0, 1, Access::ReadWrite);
}

/// `SYST_RVR`'s field, B3.3.4.
pub(crate) mod syst_rvr {
    use super::{Access, FieldSpec, field};
    pub(crate) const RELOAD: &FieldSpec = &field("RELOAD", 0, 24, Access::ReadWrite);
}

/// `SYST_CALIB`'s fields, B3.3.6.
pub(crate) mod syst_calib {
    use super::{Access, FieldSpec, field};
    pub(crate) const SKEW: &FieldSpec = &field("SKEW", 30, 1, Access::ReadOnly);
    pub(crate) const TENMS: &FieldSpec = &field("TENMS", 0, 24, Access::ReadOnly);
}

/// `MPU_TYPE`'s field, B3.5.5. `SEPARATE` and `IREGION` read as zero, since v7-M's MPU is unified.
pub(crate) mod mpu_type {
    use super::{Access, FieldSpec, field};
    pub(crate) const DREGION: &FieldSpec = &field("DREGION", 8, 8, Access::ReadOnly);
}

/// `MPU_CTRL`'s fields, B3.5.6.
pub(crate) mod mpu_ctrl {
    use super::{Access, FieldSpec, field};
    pub(crate) const ENABLE: &FieldSpec = &field("ENABLE", 0, 1, Access::ReadWrite);
    pub(crate) const HFNMIENA: &FieldSpec = &field("HFNMIENA", 1, 1, Access::ReadWrite);
    pub(crate) const PRIVDEFENA: &FieldSpec = &field("PRIVDEFENA", 2, 1, Access::ReadWrite);
}

/// `MPU_RNR`'s field, B3.5.7.
pub(crate) mod mpu_rnr {
    use super::{Access, FieldSpec, field};
    pub(crate) const REGION: &FieldSpec = &field("REGION", 0, 8, Access::ReadWrite);
}

/// `MPU_RBAR`'s fields, B3.5.8.
pub(crate) mod mpu_rbar {
    use super::{Access, FieldSpec, field};
    pub(crate) const REGION: &FieldSpec = &field("REGION", 0, 4, Access::ReadWrite);
    pub(crate) const VALID: &FieldSpec = &field("VALID", 4, 1, Access::WriteOnly);
    pub(crate) const ADDR: &FieldSpec = &field("ADDR", 5, 27, Access::ReadWrite);
}

/// `MPU_RASR`'s fields, B3.5.9.
pub(crate) mod mpu_rasr {
    use super::{Access, FieldSpec, field};
    pub(crate) const ENABLE: &FieldSpec = &field("ENABLE", 0, 1, Access::ReadWrite);
    pub(crate) const SIZE: &FieldSpec = &field("SIZE", 1, 5, Access::ReadWrite);
    pub(crate) const SRD: &FieldSpec = &field("SRD", 8, 8, Access::ReadWrite);
    pub(crate) const B: &FieldSpec = &field("B", 16, 1, Access::ReadWrite);
    pub(crate) const C: &FieldSpec = &field("C", 17, 1, Access::ReadWrite);
    pub(crate) const S: &FieldSpec = &field("S", 18, 1, Access::ReadWrite);
    pub(crate) const TEX: &FieldSpec = &field("TEX", 19, 3, Access::ReadWrite);
    pub(crate) const AP: &FieldSpec = &field("AP", 24, 3, Access::ReadWrite);
    pub(crate) const XN: &FieldSpec = &field("XN", 28, 1, Access::ReadWrite);
}

/// `DHCSR`'s fields the core answers, C1.6.2.
pub(crate) mod dhcsr {
    use super::{Access, FieldSpec, field};
    pub(crate) const S_LOCKUP: &FieldSpec = &field("S_LOCKUP", 19, 1, Access::ReadOnly);
    pub(crate) const S_SLEEP: &FieldSpec = &field("S_SLEEP", 18, 1, Access::ReadOnly);
    pub(crate) const S_HALT: &FieldSpec = &field("S_HALT", 17, 1, Access::ReadOnly);
    pub(crate) const S_REGRDY: &FieldSpec = &field("S_REGRDY", 16, 1, Access::ReadOnly);
    pub(crate) const C_MASKINTS: &FieldSpec = &field("C_MASKINTS", 3, 1, Access::ReadWrite);
    pub(crate) const C_STEP: &FieldSpec = &field("C_STEP", 2, 1, Access::ReadWrite);
    pub(crate) const C_HALT: &FieldSpec = &field("C_HALT", 1, 1, Access::ReadWrite);
    pub(crate) const C_DEBUGEN: &FieldSpec = &field("C_DEBUGEN", 0, 1, Access::ReadWrite);
}

/// `DEMCR`'s fields, C1.6.5.
pub(crate) mod demcr {
    use super::{Access, FieldSpec, field};
    pub(crate) const TRCENA: &FieldSpec = &field("TRCENA", 24, 1, Access::ReadWrite);
    pub(crate) const MON_REQ: &FieldSpec = &field("MON_REQ", 19, 1, Access::ReadWrite);
    pub(crate) const MON_STEP: &FieldSpec = &field("MON_STEP", 18, 1, Access::ReadWrite);
    pub(crate) const MON_PEND: &FieldSpec = &field("MON_PEND", 17, 1, Access::ReadWrite);
    pub(crate) const MON_EN: &FieldSpec = &field("MON_EN", 16, 1, Access::ReadWrite);
    pub(crate) const VC_HARDERR: &FieldSpec = &field("VC_HARDERR", 10, 1, Access::ReadWrite);
    pub(crate) const VC_INTERR: &FieldSpec = &field("VC_INTERR", 9, 1, Access::ReadWrite);
    pub(crate) const VC_BUSERR: &FieldSpec = &field("VC_BUSERR", 8, 1, Access::ReadWrite);
    pub(crate) const VC_STATERR: &FieldSpec = &field("VC_STATERR", 7, 1, Access::ReadWrite);
    pub(crate) const VC_CHKERR: &FieldSpec = &field("VC_CHKERR", 6, 1, Access::ReadWrite);
    pub(crate) const VC_NOCPERR: &FieldSpec = &field("VC_NOCPERR", 5, 1, Access::ReadWrite);
    pub(crate) const VC_MMERR: &FieldSpec = &field("VC_MMERR", 4, 1, Access::ReadWrite);
    pub(crate) const VC_CORERESET: &FieldSpec = &field("VC_CORERESET", 0, 1, Access::ReadWrite);
}

/// `DFSR`'s fields, C1.6.1, each the debug event that set it, but `EXTERNAL`, since nothing here
/// asserts an external debug request. A write of one clears a bit.
pub(crate) mod dfsr {
    use super::{Access, FieldSpec, field};
    pub(crate) const VCATCH: &FieldSpec = &field("VCATCH", 3, 1, Access::ReadWrite);
    pub(crate) const DWTTRAP: &FieldSpec = &field("DWTTRAP", 2, 1, Access::ReadWrite);
    pub(crate) const BKPT: &FieldSpec = &field("BKPT", 1, 1, Access::ReadWrite);
    pub(crate) const HALTED: &FieldSpec = &field("HALTED", 0, 1, Access::ReadWrite);
}

/// `ITM_TCR`'s fields, C1.7.6.
pub(crate) mod itm_tcr {
    use super::{Access, FieldSpec, field};
    pub(crate) const BUSY: &FieldSpec = &field("BUSY", 23, 1, Access::ReadOnly);
    pub(crate) const TRACEBUSID: &FieldSpec = &field("TraceBusID", 16, 7, Access::ReadWrite);
    pub(crate) const GTSFREQ: &FieldSpec = &field("GTSFREQ", 10, 2, Access::ReadWrite);
    pub(crate) const TSPRESCALE: &FieldSpec = &field("TSPrescale", 8, 2, Access::ReadWrite);
    pub(crate) const SWOENA: &FieldSpec = &field("SWOENA", 4, 1, Access::ReadWrite);
    pub(crate) const TXENA: &FieldSpec = &field("TXENA", 3, 1, Access::ReadWrite);
    pub(crate) const SYNCENA: &FieldSpec = &field("SYNCENA", 2, 1, Access::ReadWrite);
    pub(crate) const TSENA: &FieldSpec = &field("TSENA", 1, 1, Access::ReadWrite);
    pub(crate) const ITMENA: &FieldSpec = &field("ITMENA", 0, 1, Access::ReadWrite);
}

/// `ITM_TER0`'s enable for stimulus port `port`, `STIMENA[port]`, C1.7.4.
pub(crate) const fn stimena(port: u8) -> FieldSpec {
    field("STIMENA", port, 1, Access::ReadWrite)
}

/// `ITM_TPR`'s fields, C1.7.5, as wide as the Cortex-M4's 32 ports make it, 100166 table 10-2.
pub(crate) mod itm_tpr {
    use super::{Access, FieldSpec, field};
    pub(crate) const PRIVMASK: &FieldSpec = &field("PRIVMASK", 0, 4, Access::ReadWrite);
}

/// `PRIVMASK`'s bit for the eight stimulus ports from `8 * group`, C1.7.5.
pub(crate) const fn privmask(group: u8) -> FieldSpec {
    field("PRIVMASK", group, 1, Access::ReadWrite)
}

/// `ITM_STIM`'s read fields, C1.7.3.
pub(crate) mod itm_stim {
    use super::{Access, FieldSpec, field};
    pub(crate) const FIFOREADY: &FieldSpec = &field("FIFOREADY", 0, 1, Access::ReadOnly);
}

/// An Instrumentation packet's header, D4.2.8 figure D4-11: the port and the payload's size.
pub(crate) mod instrumentation {
    use super::{Access, FieldSpec, field};
    pub(crate) const A: &FieldSpec = &field("A", 3, 5, Access::ReadWrite);
    pub(crate) const SS: &FieldSpec = &field("SS", 0, 2, Access::ReadWrite);
}