// rigless svd from STM32F427.svd, sha256 5eb6bfd30833147f0cb93b74235b602f835fddd78d3795f67a5873804e80d414. Do not edit.
//! Registers of `OTG_HS_GLOBAL` and the instances derived from it.
use rigless::soc::{Access, FieldSpec, Layout, ReadAction, RegisterSpec, Width, WriteModify};
/// The registers by name; a variant's index is its row in [`REGISTERS`].
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum Register {
/// `OTG_HS_GOTGCTL` at offset `0x0`, resets to `0x0000_0800`, read-write.
OtgHsGotgctl = 0,
/// `OTG_HS_GOTGINT` at offset `0x4`, resets to `0x0000_0000`, read-write.
OtgHsGotgint = 1,
/// `OTG_HS_GAHBCFG` at offset `0x8`, resets to `0x0000_0000`, read-write.
OtgHsGahbcfg = 2,
/// `OTG_HS_GUSBCFG` at offset `0xC`, resets to `0x0000_0A00`, read-write.
OtgHsGusbcfg = 3,
/// `OTG_HS_GRSTCTL` at offset `0x10`, resets to `0x2000_0000`, read-write.
OtgHsGrstctl = 4,
/// `OTG_HS_GINTSTS` at offset `0x14`, resets to `0x0400_0020`, read-write.
OtgHsGintsts = 5,
/// `OTG_HS_GINTMSK` at offset `0x18`, resets to `0x0000_0000`, read-write.
OtgHsGintmsk = 6,
/// `OTG_HS_GRXSTSR_Host` at offset `0x1C`, resets to `0x0000_0000`, read-only.
OtgHsGrxstsrHost = 7,
/// `OTG_HS_GRXSTSR_Peripheral` at offset `0x1C`, resets to `0x0000_0000`, read-only.
OtgHsGrxstsrPeripheral = 8,
/// `OTG_HS_GRXSTSP_Host` at offset `0x20`, resets to `0x0000_0000`, read-only.
OtgHsGrxstspHost = 9,
/// `OTG_HS_GRXSTSP_Peripheral` at offset `0x20`, resets to `0x0000_0000`, read-only.
OtgHsGrxstspPeripheral = 10,
/// `OTG_HS_GRXFSIZ` at offset `0x24`, resets to `0x0000_0200`, read-write.
OtgHsGrxfsiz = 11,
/// `OTG_HS_GNPTXFSIZ_Host` at offset `0x28`, resets to `0x0000_0200`, read-write.
OtgHsGnptxfsizHost = 12,
/// `OTG_HS_TX0FSIZ_Peripheral` at offset `0x28`, resets to `0x0000_0200`, read-write.
OtgHsTx0fsizPeripheral = 13,
/// `OTG_HS_GNPTXSTS` at offset `0x2C`, resets to `0x0008_0200`, read-only.
OtgHsGnptxsts = 14,
/// `OTG_HS_GCCFG` at offset `0x38`, resets to `0x0000_0000`, read-write.
OtgHsGccfg = 15,
/// `OTG_HS_CID` at offset `0x3C`, resets to `0x0000_1200`, read-write.
OtgHsCid = 16,
/// `OTG_HS_HPTXFSIZ` at offset `0x100`, resets to `0x0200_0600`, read-write.
OtgHsHptxfsiz = 17,
/// `OTG_HS_DIEPTXF1` at offset `0x104`, resets to `0x0200_0400`, read-write.
OtgHsDieptxf1 = 18,
/// `OTG_HS_DIEPTXF2` at offset `0x108`, resets to `0x0200_0400`, read-write.
OtgHsDieptxf2 = 19,
/// `OTG_HS_DIEPTXF3` at offset `0x11C`, resets to `0x0200_0400`, read-write.
OtgHsDieptxf3 = 20,
/// `OTG_HS_DIEPTXF4` at offset `0x120`, resets to `0x0200_0400`, read-write.
OtgHsDieptxf4 = 21,
/// `OTG_HS_DIEPTXF5` at offset `0x124`, resets to `0x0200_0400`, read-write.
OtgHsDieptxf5 = 22,
/// `OTG_HS_DIEPTXF6` at offset `0x128`, resets to `0x0200_0400`, read-write.
OtgHsDieptxf6 = 23,
/// `OTG_HS_DIEPTXF7` at offset `0x12C`, resets to `0x0200_0400`, read-write.
OtgHsDieptxf7 = 24,
}
impl Register {
/// Every register, in table order.
pub const ALL: [Self; 25] = [Self::OtgHsGotgctl, Self::OtgHsGotgint, Self::OtgHsGahbcfg, Self::OtgHsGusbcfg, Self::OtgHsGrstctl, Self::OtgHsGintsts, Self::OtgHsGintmsk, Self::OtgHsGrxstsrHost, Self::OtgHsGrxstsrPeripheral, Self::OtgHsGrxstspHost, Self::OtgHsGrxstspPeripheral, Self::OtgHsGrxfsiz, Self::OtgHsGnptxfsizHost, Self::OtgHsTx0fsizPeripheral, Self::OtgHsGnptxsts, Self::OtgHsGccfg, Self::OtgHsCid, Self::OtgHsHptxfsiz, Self::OtgHsDieptxf1, Self::OtgHsDieptxf2, Self::OtgHsDieptxf3, Self::OtgHsDieptxf4, Self::OtgHsDieptxf5, Self::OtgHsDieptxf6, Self::OtgHsDieptxf7];
}
impl Layout for Register {
const REGISTERS: &'static [RegisterSpec] = ®ISTERS;
fn from_index(index: usize) -> Option<Self> {
Self::ALL.get(index).copied()
}
fn index(self) -> usize {
self as usize
}
}
/// The fields of `OTG_HS_GOTGCTL`.
pub mod otg_hs_gotgctl {
use super::FieldSpec;
/// `SRQSCS`, bit 0, read-only.
pub const SRQSCS: &FieldSpec = &super::REGISTERS[0].fields[0];
/// `SRQ`, bit 1.
pub const SRQ: &FieldSpec = &super::REGISTERS[0].fields[1];
/// `HNGSCS`, bit 8, read-only.
pub const HNGSCS: &FieldSpec = &super::REGISTERS[0].fields[2];
/// `HNPRQ`, bit 9.
pub const HNPRQ: &FieldSpec = &super::REGISTERS[0].fields[3];
/// `HSHNPEN`, bit 10.
pub const HSHNPEN: &FieldSpec = &super::REGISTERS[0].fields[4];
/// `DHNPEN`, bit 11.
pub const DHNPEN: &FieldSpec = &super::REGISTERS[0].fields[5];
/// `CIDSTS`, bit 16, read-only.
pub const CIDSTS: &FieldSpec = &super::REGISTERS[0].fields[6];
/// `DBCT`, bit 17, read-only.
pub const DBCT: &FieldSpec = &super::REGISTERS[0].fields[7];
/// `ASVLD`, bit 18, read-only.
pub const ASVLD: &FieldSpec = &super::REGISTERS[0].fields[8];
/// `BSVLD`, bit 19, read-only.
pub const BSVLD: &FieldSpec = &super::REGISTERS[0].fields[9];
}
/// The fields of `OTG_HS_GOTGINT`.
pub mod otg_hs_gotgint {
use super::FieldSpec;
/// `SEDET`, bit 2.
pub const SEDET: &FieldSpec = &super::REGISTERS[1].fields[0];
/// `SRSSCHG`, bit 8.
pub const SRSSCHG: &FieldSpec = &super::REGISTERS[1].fields[1];
/// `HNSSCHG`, bit 9.
pub const HNSSCHG: &FieldSpec = &super::REGISTERS[1].fields[2];
/// `HNGDET`, bit 17.
pub const HNGDET: &FieldSpec = &super::REGISTERS[1].fields[3];
/// `ADTOCHG`, bit 18.
pub const ADTOCHG: &FieldSpec = &super::REGISTERS[1].fields[4];
/// `DBCDNE`, bit 19.
pub const DBCDNE: &FieldSpec = &super::REGISTERS[1].fields[5];
}
/// The fields of `OTG_HS_GAHBCFG`.
pub mod otg_hs_gahbcfg {
use super::FieldSpec;
/// `GINT`, bit 0.
pub const GINT: &FieldSpec = &super::REGISTERS[2].fields[0];
/// `HBSTLEN`, bits 1..=4.
pub const HBSTLEN: &FieldSpec = &super::REGISTERS[2].fields[1];
/// `DMAEN`, bit 5.
pub const DMAEN: &FieldSpec = &super::REGISTERS[2].fields[2];
/// `TXFELVL`, bit 7.
pub const TXFELVL: &FieldSpec = &super::REGISTERS[2].fields[3];
/// `PTXFELVL`, bit 8.
pub const PTXFELVL: &FieldSpec = &super::REGISTERS[2].fields[4];
}
/// The fields of `OTG_HS_GUSBCFG`.
pub mod otg_hs_gusbcfg {
use super::FieldSpec;
/// `TOCAL`, bits 0..=2.
pub const TOCAL: &FieldSpec = &super::REGISTERS[3].fields[0];
/// `PHYSEL`, bit 6, write-only.
pub const PHYSEL: &FieldSpec = &super::REGISTERS[3].fields[1];
/// `SRPCAP`, bit 8.
pub const SRPCAP: &FieldSpec = &super::REGISTERS[3].fields[2];
/// `HNPCAP`, bit 9.
pub const HNPCAP: &FieldSpec = &super::REGISTERS[3].fields[3];
/// `TRDT`, bits 10..=13.
pub const TRDT: &FieldSpec = &super::REGISTERS[3].fields[4];
/// `PHYLPCS`, bit 15.
pub const PHYLPCS: &FieldSpec = &super::REGISTERS[3].fields[5];
/// `ULPIFSLS`, bit 17.
pub const ULPIFSLS: &FieldSpec = &super::REGISTERS[3].fields[6];
/// `ULPIAR`, bit 18.
pub const ULPIAR: &FieldSpec = &super::REGISTERS[3].fields[7];
/// `ULPICSM`, bit 19.
pub const ULPICSM: &FieldSpec = &super::REGISTERS[3].fields[8];
/// `ULPIEVBUSD`, bit 20.
pub const ULPIEVBUSD: &FieldSpec = &super::REGISTERS[3].fields[9];
/// `ULPIEVBUSI`, bit 21.
pub const ULPIEVBUSI: &FieldSpec = &super::REGISTERS[3].fields[10];
/// `TSDPS`, bit 22.
pub const TSDPS: &FieldSpec = &super::REGISTERS[3].fields[11];
/// `PCCI`, bit 23.
pub const PCCI: &FieldSpec = &super::REGISTERS[3].fields[12];
/// `PTCI`, bit 24.
pub const PTCI: &FieldSpec = &super::REGISTERS[3].fields[13];
/// `ULPIIPD`, bit 25.
pub const ULPIIPD: &FieldSpec = &super::REGISTERS[3].fields[14];
/// `FHMOD`, bit 29.
pub const FHMOD: &FieldSpec = &super::REGISTERS[3].fields[15];
/// `FDMOD`, bit 30.
pub const FDMOD: &FieldSpec = &super::REGISTERS[3].fields[16];
/// `CTXPKT`, bit 31.
pub const CTXPKT: &FieldSpec = &super::REGISTERS[3].fields[17];
}
/// The fields of `OTG_HS_GRSTCTL`.
pub mod otg_hs_grstctl {
use super::FieldSpec;
/// `CSRST`, bit 0.
pub const CSRST: &FieldSpec = &super::REGISTERS[4].fields[0];
/// `HSRST`, bit 1.
pub const HSRST: &FieldSpec = &super::REGISTERS[4].fields[1];
/// `FCRST`, bit 2.
pub const FCRST: &FieldSpec = &super::REGISTERS[4].fields[2];
/// `RXFFLSH`, bit 4.
pub const RXFFLSH: &FieldSpec = &super::REGISTERS[4].fields[3];
/// `TXFFLSH`, bit 5.
pub const TXFFLSH: &FieldSpec = &super::REGISTERS[4].fields[4];
/// `TXFNUM`, bits 6..=10.
pub const TXFNUM: &FieldSpec = &super::REGISTERS[4].fields[5];
/// `DMAREQ`, bit 30, read-only.
pub const DMAREQ: &FieldSpec = &super::REGISTERS[4].fields[6];
/// `AHBIDL`, bit 31, read-only.
pub const AHBIDL: &FieldSpec = &super::REGISTERS[4].fields[7];
}
/// The fields of `OTG_HS_GINTSTS`.
pub mod otg_hs_gintsts {
use super::FieldSpec;
/// `CMOD`, bit 0, read-only.
pub const CMOD: &FieldSpec = &super::REGISTERS[5].fields[0];
/// `MMIS`, bit 1.
pub const MMIS: &FieldSpec = &super::REGISTERS[5].fields[1];
/// `OTGINT`, bit 2, read-only.
pub const OTGINT: &FieldSpec = &super::REGISTERS[5].fields[2];
/// `SOF`, bit 3.
pub const SOF: &FieldSpec = &super::REGISTERS[5].fields[3];
/// `RXFLVL`, bit 4, read-only.
pub const RXFLVL: &FieldSpec = &super::REGISTERS[5].fields[4];
/// `NPTXFE`, bit 5, read-only.
pub const NPTXFE: &FieldSpec = &super::REGISTERS[5].fields[5];
/// `GINAKEFF`, bit 6, read-only.
pub const GINAKEFF: &FieldSpec = &super::REGISTERS[5].fields[6];
/// `BOUTNAKEFF`, bit 7, read-only.
pub const BOUTNAKEFF: &FieldSpec = &super::REGISTERS[5].fields[7];
/// `ESUSP`, bit 10.
pub const ESUSP: &FieldSpec = &super::REGISTERS[5].fields[8];
/// `USBSUSP`, bit 11.
pub const USBSUSP: &FieldSpec = &super::REGISTERS[5].fields[9];
/// `USBRST`, bit 12.
pub const USBRST: &FieldSpec = &super::REGISTERS[5].fields[10];
/// `ENUMDNE`, bit 13.
pub const ENUMDNE: &FieldSpec = &super::REGISTERS[5].fields[11];
/// `ISOODRP`, bit 14.
pub const ISOODRP: &FieldSpec = &super::REGISTERS[5].fields[12];
/// `EOPF`, bit 15.
pub const EOPF: &FieldSpec = &super::REGISTERS[5].fields[13];
/// `IEPINT`, bit 18, read-only.
pub const IEPINT: &FieldSpec = &super::REGISTERS[5].fields[14];
/// `OEPINT`, bit 19, read-only.
pub const OEPINT: &FieldSpec = &super::REGISTERS[5].fields[15];
/// `IISOIXFR`, bit 20.
pub const IISOIXFR: &FieldSpec = &super::REGISTERS[5].fields[16];
/// `PXFR_INCOMPISOOUT`, bit 21.
pub const PXFR_INCOMPISOOUT: &FieldSpec = &super::REGISTERS[5].fields[17];
/// `DATAFSUSP`, bit 22.
pub const DATAFSUSP: &FieldSpec = &super::REGISTERS[5].fields[18];
/// `HPRTINT`, bit 24, read-only.
pub const HPRTINT: &FieldSpec = &super::REGISTERS[5].fields[19];
/// `HCINT`, bit 25, read-only.
pub const HCINT: &FieldSpec = &super::REGISTERS[5].fields[20];
/// `PTXFE`, bit 26, read-only.
pub const PTXFE: &FieldSpec = &super::REGISTERS[5].fields[21];
/// `CIDSCHG`, bit 28.
pub const CIDSCHG: &FieldSpec = &super::REGISTERS[5].fields[22];
/// `DISCINT`, bit 29.
pub const DISCINT: &FieldSpec = &super::REGISTERS[5].fields[23];
/// `SRQINT`, bit 30.
pub const SRQINT: &FieldSpec = &super::REGISTERS[5].fields[24];
/// `WKUINT`, bit 31.
pub const WKUINT: &FieldSpec = &super::REGISTERS[5].fields[25];
}
/// The fields of `OTG_HS_GINTMSK`.
pub mod otg_hs_gintmsk {
use super::FieldSpec;
/// `MMISM`, bit 1.
pub const MMISM: &FieldSpec = &super::REGISTERS[6].fields[0];
/// `OTGINT`, bit 2.
pub const OTGINT: &FieldSpec = &super::REGISTERS[6].fields[1];
/// `SOFM`, bit 3.
pub const SOFM: &FieldSpec = &super::REGISTERS[6].fields[2];
/// `RXFLVLM`, bit 4.
pub const RXFLVLM: &FieldSpec = &super::REGISTERS[6].fields[3];
/// `NPTXFEM`, bit 5.
pub const NPTXFEM: &FieldSpec = &super::REGISTERS[6].fields[4];
/// `GINAKEFFM`, bit 6.
pub const GINAKEFFM: &FieldSpec = &super::REGISTERS[6].fields[5];
/// `GONAKEFFM`, bit 7.
pub const GONAKEFFM: &FieldSpec = &super::REGISTERS[6].fields[6];
/// `ESUSPM`, bit 10.
pub const ESUSPM: &FieldSpec = &super::REGISTERS[6].fields[7];
/// `USBSUSPM`, bit 11.
pub const USBSUSPM: &FieldSpec = &super::REGISTERS[6].fields[8];
/// `USBRST`, bit 12.
pub const USBRST: &FieldSpec = &super::REGISTERS[6].fields[9];
/// `ENUMDNEM`, bit 13.
pub const ENUMDNEM: &FieldSpec = &super::REGISTERS[6].fields[10];
/// `ISOODRPM`, bit 14.
pub const ISOODRPM: &FieldSpec = &super::REGISTERS[6].fields[11];
/// `EOPFM`, bit 15.
pub const EOPFM: &FieldSpec = &super::REGISTERS[6].fields[12];
/// `EPMISM`, bit 17.
pub const EPMISM: &FieldSpec = &super::REGISTERS[6].fields[13];
/// `IEPINT`, bit 18.
pub const IEPINT: &FieldSpec = &super::REGISTERS[6].fields[14];
/// `OEPINT`, bit 19.
pub const OEPINT: &FieldSpec = &super::REGISTERS[6].fields[15];
/// `IISOIXFRM`, bit 20.
pub const IISOIXFRM: &FieldSpec = &super::REGISTERS[6].fields[16];
/// `PXFRM_IISOOXFRM`, bit 21.
pub const PXFRM_IISOOXFRM: &FieldSpec = &super::REGISTERS[6].fields[17];
/// `FSUSPM`, bit 22.
pub const FSUSPM: &FieldSpec = &super::REGISTERS[6].fields[18];
/// `PRTIM`, bit 24, read-only.
pub const PRTIM: &FieldSpec = &super::REGISTERS[6].fields[19];
/// `HCIM`, bit 25.
pub const HCIM: &FieldSpec = &super::REGISTERS[6].fields[20];
/// `PTXFEM`, bit 26.
pub const PTXFEM: &FieldSpec = &super::REGISTERS[6].fields[21];
/// `CIDSCHGM`, bit 28.
pub const CIDSCHGM: &FieldSpec = &super::REGISTERS[6].fields[22];
/// `DISCINT`, bit 29.
pub const DISCINT: &FieldSpec = &super::REGISTERS[6].fields[23];
/// `SRQIM`, bit 30.
pub const SRQIM: &FieldSpec = &super::REGISTERS[6].fields[24];
/// `WUIM`, bit 31.
pub const WUIM: &FieldSpec = &super::REGISTERS[6].fields[25];
}
/// The fields of `OTG_HS_GRXSTSR_Host`.
pub mod otg_hs_grxstsr_host {
use super::FieldSpec;
/// `CHNUM`, bits 0..=3.
pub const CHNUM: &FieldSpec = &super::REGISTERS[7].fields[0];
/// `BCNT`, bits 4..=14.
pub const BCNT: &FieldSpec = &super::REGISTERS[7].fields[1];
/// `DPID`, bits 15..=16.
pub const DPID: &FieldSpec = &super::REGISTERS[7].fields[2];
/// `PKTSTS`, bits 17..=20.
pub const PKTSTS: &FieldSpec = &super::REGISTERS[7].fields[3];
}
/// The fields of `OTG_HS_GRXSTSR_Peripheral`.
pub mod otg_hs_grxstsr_peripheral {
use super::FieldSpec;
/// `EPNUM`, bits 0..=3.
pub const EPNUM: &FieldSpec = &super::REGISTERS[8].fields[0];
/// `BCNT`, bits 4..=14.
pub const BCNT: &FieldSpec = &super::REGISTERS[8].fields[1];
/// `DPID`, bits 15..=16.
pub const DPID: &FieldSpec = &super::REGISTERS[8].fields[2];
/// `PKTSTS`, bits 17..=20.
pub const PKTSTS: &FieldSpec = &super::REGISTERS[8].fields[3];
/// `FRMNUM`, bits 21..=24.
pub const FRMNUM: &FieldSpec = &super::REGISTERS[8].fields[4];
}
/// The fields of `OTG_HS_GRXSTSP_Host`.
pub mod otg_hs_grxstsp_host {
use super::FieldSpec;
/// `CHNUM`, bits 0..=3.
pub const CHNUM: &FieldSpec = &super::REGISTERS[9].fields[0];
/// `BCNT`, bits 4..=14.
pub const BCNT: &FieldSpec = &super::REGISTERS[9].fields[1];
/// `DPID`, bits 15..=16.
pub const DPID: &FieldSpec = &super::REGISTERS[9].fields[2];
/// `PKTSTS`, bits 17..=20.
pub const PKTSTS: &FieldSpec = &super::REGISTERS[9].fields[3];
}
/// The fields of `OTG_HS_GRXSTSP_Peripheral`.
pub mod otg_hs_grxstsp_peripheral {
use super::FieldSpec;
/// `EPNUM`, bits 0..=3.
pub const EPNUM: &FieldSpec = &super::REGISTERS[10].fields[0];
/// `BCNT`, bits 4..=14.
pub const BCNT: &FieldSpec = &super::REGISTERS[10].fields[1];
/// `DPID`, bits 15..=16.
pub const DPID: &FieldSpec = &super::REGISTERS[10].fields[2];
/// `PKTSTS`, bits 17..=20.
pub const PKTSTS: &FieldSpec = &super::REGISTERS[10].fields[3];
/// `FRMNUM`, bits 21..=24.
pub const FRMNUM: &FieldSpec = &super::REGISTERS[10].fields[4];
}
/// The fields of `OTG_HS_GRXFSIZ`.
pub mod otg_hs_grxfsiz {
use super::FieldSpec;
/// `RXFD`, bits 0..=15.
pub const RXFD: &FieldSpec = &super::REGISTERS[11].fields[0];
}
/// The fields of `OTG_HS_GNPTXFSIZ_Host`.
pub mod otg_hs_gnptxfsiz_host {
use super::FieldSpec;
/// `NPTXFSA`, bits 0..=15.
pub const NPTXFSA: &FieldSpec = &super::REGISTERS[12].fields[0];
/// `NPTXFD`, bits 16..=31.
pub const NPTXFD: &FieldSpec = &super::REGISTERS[12].fields[1];
}
/// The fields of `OTG_HS_TX0FSIZ_Peripheral`.
pub mod otg_hs_tx0fsiz_peripheral {
use super::FieldSpec;
/// `TX0FSA`, bits 0..=15.
pub const TX0FSA: &FieldSpec = &super::REGISTERS[13].fields[0];
/// `TX0FD`, bits 16..=31.
pub const TX0FD: &FieldSpec = &super::REGISTERS[13].fields[1];
}
/// The fields of `OTG_HS_GNPTXSTS`.
pub mod otg_hs_gnptxsts {
use super::FieldSpec;
/// `NPTXFSAV`, bits 0..=15.
pub const NPTXFSAV: &FieldSpec = &super::REGISTERS[14].fields[0];
/// `NPTQXSAV`, bits 16..=23.
pub const NPTQXSAV: &FieldSpec = &super::REGISTERS[14].fields[1];
/// `NPTXQTOP`, bits 24..=30.
pub const NPTXQTOP: &FieldSpec = &super::REGISTERS[14].fields[2];
}
/// The fields of `OTG_HS_GCCFG`.
pub mod otg_hs_gccfg {
use super::FieldSpec;
/// `PWRDWN`, bit 16.
pub const PWRDWN: &FieldSpec = &super::REGISTERS[15].fields[0];
/// `I2CPADEN`, bit 17.
pub const I2CPADEN: &FieldSpec = &super::REGISTERS[15].fields[1];
/// `VBUSASEN`, bit 18.
pub const VBUSASEN: &FieldSpec = &super::REGISTERS[15].fields[2];
/// `VBUSBSEN`, bit 19.
pub const VBUSBSEN: &FieldSpec = &super::REGISTERS[15].fields[3];
/// `SOFOUTEN`, bit 20.
pub const SOFOUTEN: &FieldSpec = &super::REGISTERS[15].fields[4];
/// `NOVBUSSENS`, bit 21.
pub const NOVBUSSENS: &FieldSpec = &super::REGISTERS[15].fields[5];
}
/// The fields of `OTG_HS_CID`.
pub mod otg_hs_cid {
use super::FieldSpec;
/// `PRODUCT_ID`, bits 0..=31.
pub const PRODUCT_ID: &FieldSpec = &super::REGISTERS[16].fields[0];
}
/// The fields of `OTG_HS_HPTXFSIZ`.
pub mod otg_hs_hptxfsiz {
use super::FieldSpec;
/// `PTXSA`, bits 0..=15.
pub const PTXSA: &FieldSpec = &super::REGISTERS[17].fields[0];
/// `PTXFD`, bits 16..=31.
pub const PTXFD: &FieldSpec = &super::REGISTERS[17].fields[1];
}
/// The fields of `OTG_HS_DIEPTXF1`.
pub mod otg_hs_dieptxf1 {
use super::FieldSpec;
/// `INEPTXSA`, bits 0..=15.
pub const INEPTXSA: &FieldSpec = &super::REGISTERS[18].fields[0];
/// `INEPTXFD`, bits 16..=31.
pub const INEPTXFD: &FieldSpec = &super::REGISTERS[18].fields[1];
}
/// The fields of `OTG_HS_DIEPTXF2`.
pub mod otg_hs_dieptxf2 {
use super::FieldSpec;
/// `INEPTXSA`, bits 0..=15.
pub const INEPTXSA: &FieldSpec = &super::REGISTERS[19].fields[0];
/// `INEPTXFD`, bits 16..=31.
pub const INEPTXFD: &FieldSpec = &super::REGISTERS[19].fields[1];
}
/// The fields of `OTG_HS_DIEPTXF3`.
pub mod otg_hs_dieptxf3 {
use super::FieldSpec;
/// `INEPTXSA`, bits 0..=15.
pub const INEPTXSA: &FieldSpec = &super::REGISTERS[20].fields[0];
/// `INEPTXFD`, bits 16..=31.
pub const INEPTXFD: &FieldSpec = &super::REGISTERS[20].fields[1];
}
/// The fields of `OTG_HS_DIEPTXF4`.
pub mod otg_hs_dieptxf4 {
use super::FieldSpec;
/// `INEPTXSA`, bits 0..=15.
pub const INEPTXSA: &FieldSpec = &super::REGISTERS[21].fields[0];
/// `INEPTXFD`, bits 16..=31.
pub const INEPTXFD: &FieldSpec = &super::REGISTERS[21].fields[1];
}
/// The fields of `OTG_HS_DIEPTXF5`.
pub mod otg_hs_dieptxf5 {
use super::FieldSpec;
/// `INEPTXSA`, bits 0..=15.
pub const INEPTXSA: &FieldSpec = &super::REGISTERS[22].fields[0];
/// `INEPTXFD`, bits 16..=31.
pub const INEPTXFD: &FieldSpec = &super::REGISTERS[22].fields[1];
}
/// The fields of `OTG_HS_DIEPTXF6`.
pub mod otg_hs_dieptxf6 {
use super::FieldSpec;
/// `INEPTXSA`, bits 0..=15.
pub const INEPTXSA: &FieldSpec = &super::REGISTERS[23].fields[0];
/// `INEPTXFD`, bits 16..=31.
pub const INEPTXFD: &FieldSpec = &super::REGISTERS[23].fields[1];
}
/// The fields of `OTG_HS_DIEPTXF7`.
pub mod otg_hs_dieptxf7 {
use super::FieldSpec;
/// `INEPTXSA`, bits 0..=15.
pub const INEPTXSA: &FieldSpec = &super::REGISTERS[24].fields[0];
/// `INEPTXFD`, bits 16..=31.
pub const INEPTXFD: &FieldSpec = &super::REGISTERS[24].fields[1];
}
/// The register table.
pub static REGISTERS: [RegisterSpec; 25] = [
RegisterSpec { name: "OTG_HS_GOTGCTL", offset: 0x0, width: Width::W32, reset: 0x0000_0800, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "SRQSCS", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "SRQ", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HNGSCS", bit: 8, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HNPRQ", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HSHNPEN", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DHNPEN", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CIDSTS", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DBCT", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ASVLD", bit: 18, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BSVLD", bit: 19, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GOTGINT", offset: 0x4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "SEDET", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "SRSSCHG", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HNSSCHG", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HNGDET", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ADTOCHG", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DBCDNE", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GAHBCFG", offset: 0x8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "GINT", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HBSTLEN", bit: 1, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DMAEN", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXFELVL", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PTXFELVL", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GUSBCFG", offset: 0xC, width: Width::W32, reset: 0x0000_0A00, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "TOCAL", bit: 0, width: 3, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PHYSEL", bit: 6, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "SRPCAP", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HNPCAP", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TRDT", bit: 10, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PHYLPCS", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ULPIFSLS", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ULPIAR", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ULPICSM", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ULPIEVBUSD", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ULPIEVBUSI", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TSDPS", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PCCI", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PTCI", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ULPIIPD", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FHMOD", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FDMOD", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CTXPKT", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GRSTCTL", offset: 0x10, width: Width::W32, reset: 0x2000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "CSRST", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HSRST", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FCRST", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "RXFFLSH", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXFFLSH", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXFNUM", bit: 6, width: 5, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DMAREQ", bit: 30, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "AHBIDL", bit: 31, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GINTSTS", offset: 0x14, width: Width::W32, reset: 0x0400_0020, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "CMOD", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "MMIS", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "OTGINT", bit: 2, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "SOF", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "RXFLVL", bit: 4, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NPTXFE", bit: 5, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "GINAKEFF", bit: 6, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BOUTNAKEFF", bit: 7, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ESUSP", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "USBSUSP", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "USBRST", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ENUMDNE", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ISOODRP", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EOPF", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "IEPINT", bit: 18, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "OEPINT", bit: 19, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "IISOIXFR", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PXFR_INCOMPISOOUT", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DATAFSUSP", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HPRTINT", bit: 24, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HCINT", bit: 25, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PTXFE", bit: 26, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CIDSCHG", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DISCINT", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "SRQINT", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "WKUINT", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GINTMSK", offset: 0x18, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "MMISM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "OTGINT", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "SOFM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "RXFLVLM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NPTXFEM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "GINAKEFFM", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "GONAKEFFM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ESUSPM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "USBSUSPM", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "USBRST", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ENUMDNEM", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ISOODRPM", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EOPFM", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPMISM", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "IEPINT", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "OEPINT", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "IISOIXFRM", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PXFRM_IISOOXFRM", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FSUSPM", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PRTIM", bit: 24, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "HCIM", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PTXFEM", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CIDSCHGM", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DISCINT", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "SRQIM", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "WUIM", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GRXSTSR_Host", offset: 0x1C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "CHNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GRXSTSR_Peripheral", offset: 0x1C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "EPNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMNUM", bit: 21, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GRXSTSP_Host", offset: 0x20, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "CHNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GRXSTSP_Peripheral", offset: 0x20, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "EPNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMNUM", bit: 21, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GRXFSIZ", offset: 0x24, width: Width::W32, reset: 0x0000_0200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "RXFD", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GNPTXFSIZ_Host", offset: 0x28, width: Width::W32, reset: 0x0000_0200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "NPTXFSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_TX0FSIZ_Peripheral", offset: 0x28, width: Width::W32, reset: 0x0000_0200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "TX0FSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TX0FD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GNPTXSTS", offset: 0x2C, width: Width::W32, reset: 0x0008_0200, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "NPTXFSAV", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NPTQXSAV", bit: 16, width: 8, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NPTXQTOP", bit: 24, width: 7, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_GCCFG", offset: 0x38, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "PWRDWN", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "I2CPADEN", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "VBUSASEN", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "VBUSBSEN", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "SOFOUTEN", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NOVBUSSENS", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_CID", offset: 0x3C, width: Width::W32, reset: 0x0000_1200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "PRODUCT_ID", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_HPTXFSIZ", offset: 0x100, width: Width::W32, reset: 0x0200_0600, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "PTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_DIEPTXF1", offset: 0x104, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_DIEPTXF2", offset: 0x108, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_DIEPTXF3", offset: 0x11C, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_DIEPTXF4", offset: 0x120, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_DIEPTXF5", offset: 0x124, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_DIEPTXF6", offset: 0x128, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "OTG_HS_DIEPTXF7", offset: 0x12C, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
];