region_cached 1.0.1

Adds a logical layer of caching between processor L3 cache and main memory
Documentation 
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use many_cpus::HardwareInfo;

#[cfg_attr(test, mockall::automock)]
pub(crate) trait HardwareInfoClient {
    fn max_memory_region_count(&self) -> usize;
}

#[derive(Debug)]
pub(crate) struct HardwareInfoClientImpl;

impl HardwareInfoClient for HardwareInfoClientImpl {
    #[cfg_attr(test, mutants::skip)] // Trivial fn, tested on lower levels - skip mutating.
    fn max_memory_region_count(&self) -> usize {
        HardwareInfo::max_memory_region_count()
    }
}