redfish-codegen 0.3.1

An unopinionated translation of the Redfish specification into Rust.
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55

// Generated by redfish-codegen. Do not modify.

use crate::models;

/// The properties of the FPGA device.
#[derive(Clone, Debug, serde::Deserialize, serde::Serialize)]
#[derive(derivative::Derivative)]
#[derivative(Default)]
pub struct FPGA {
    /// An array of the FPGA external interfaces.
    #[serde(rename = "ExternalInterfaces")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub external_interfaces: Option<Vec<models::processor::v1_18_0::ProcessorInterface>>,
    /// The FPGA firmware identifier.
    #[serde(rename = "FirmwareId")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub firmware_id: Option<String>,
    /// The FPGA firmware manufacturer.
    #[serde(rename = "FirmwareManufacturer")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub firmware_manufacturer: Option<String>,
    /// The FPGA firmware version.
    #[serde(rename = "FirmwareVersion")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub firmware_version: Option<String>,
    #[serde(rename = "FpgaType")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub fpga_type: Option<models::processor::v1_18_0::FpgaType>,
    #[serde(rename = "HostInterface")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub host_interface: Option<models::processor::v1_18_0::ProcessorInterface>,
    /// The FPGA model.
    #[serde(rename = "Model")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub model: Option<String>,
    #[serde(rename = "Oem")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub oem: Option<models::resource::Oem>,
    /// The number of the PCIe Virtual Functions.
    #[serde(rename = "PCIeVirtualFunctions")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub pcie_virtual_functions: Option<i64>,
    /// An indication of whether the FPGA firmware can be reprogrammed from the host by using system software.
    #[serde(rename = "ProgrammableFromHost")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub programmable_from_host: Option<bool>,
    /// An array of the FPGA reconfiguration slots.  An FPGA uses a reconfiguration slot to contain an acceleration function that can change as the FPGA is provisioned.
    #[serde(rename = "ReconfigurationSlots")]
    #[serde(default, skip_serializing_if = "Option::is_none")]
    pub reconfiguration_slots: Option<Vec<models::processor::v1_18_0::FpgaReconfigurationSlot>>,
}

impl crate::Metadata<'static> for FPGA {
    const JSON_SCHEMA: &'static str = "Processor.v1_18_0.json";
}