rdif_intc/
lib.rs

1#![no_std]
2
3extern crate alloc;
4
5pub use alloc::{boxed::Box, vec::Vec};
6use core::error::Error;
7
8use cfg_if::cfg_if;
9use rdif_base::custom_type;
10pub use rdif_base::{DriverGeneric, DriverResult, IrqConfig, IrqId, Trigger};
11
12custom_type!(CpuId, usize, "{:#x}");
13
14pub type Hardware = Box<dyn Interface>;
15pub type HardwareCPU = Box<dyn InterfaceCPU>;
16
17/// Fdt 解析 `interrupts` 函数，一次解析一个`cell`
18pub type FuncFdtParseConfig =
19    fn(prop_interrupts_one_cell: &[u32]) -> Result<IrqConfig, Box<dyn Error>>;
20
21cfg_if! {
22    if #[cfg(target_arch = "aarch64")]{
23        pub trait InterfaceCPU: Send + Sync {
24            fn set_eoi_model(&self, b: bool);
25            fn get_eoi_model(&self) -> bool;
26            fn ack(&self) -> Option<IrqId>;
27            fn eoi(&self, intid: IrqId);
28            fn dir(&self, intid: IrqId);
29        }
30    }else{
31        /// 在中断中调用，不会被打断，视为`Sync`
32        pub trait InterfaceCPU: Send + Sync {
33            fn ack(&self) -> Option<IrqId>;
34            fn eoi(&self, irq: IrqId);
35        }
36    }
37}
38
39pub trait Interface: DriverGeneric {
40    fn cpu_interface(&self) -> HardwareCPU;
41    fn irq_enable(&mut self, irq: IrqId);
42    fn irq_disable(&mut self, irq: IrqId);
43    fn set_priority(&mut self, irq: IrqId, priority: usize);
44    fn set_trigger(&mut self, irq: IrqId, trigger: Trigger);
45    fn set_target_cpu(&mut self, irq: IrqId, cpu: CpuId);
46    fn capabilities(&self) -> Vec<Capability> {
47        Vec::new()
48    }
49}
50
51pub enum Capability {
52    FdtParseConfig(FuncFdtParseConfig),
53}
rdif_intc/lib.rs

rdif_intc/
lib.rs
