pub mod registers {
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum GprO32 {
zero,
at,
v0,
v1,
a0,
a1,
a2,
a3,
t0,
t1,
t2,
t3,
t4,
t5,
t6,
t7,
s0,
s1,
s2,
s3,
s4,
s5,
s6,
s7,
t8,
t9,
k0,
k1,
gp,
sp,
fp,
ra,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum GprN32 {
zero,
at,
v0,
v1,
a0,
a1,
a2,
a3,
a4,
a5,
a6,
a7,
t0,
t1,
t2,
t3,
s0,
s1,
s2,
s3,
s4,
s5,
s6,
s7,
t8,
t9,
k0,
k1,
gp,
sp,
fp,
ra,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum Cop0 {
Index,
Random,
EntryLo0,
EntryLo1,
Context,
PageMask,
Wired,
Reserved07,
BadVaddr,
Count,
EntryHi,
Compare,
Status,
Cause,
EPC,
PRevID,
Config,
LLAddr,
WatchLo,
WatchHi,
XContext,
Reserved21,
Reserved22,
Reserved23,
Reserved24,
Reserved25,
PErr,
CacheErr,
TagLo,
TagHi,
ErrorEPC,
Reserved31,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum Cop1O32 {
fv0,
fv0f,
fv1,
fv1f,
ft0,
ft0f,
ft1,
ft1f,
ft2,
ft2f,
ft3,
ft3f,
fa0,
fa0f,
fa1,
fa1f,
ft4,
ft4f,
ft5,
ft5f,
fs0,
fs0f,
fs1,
fs1f,
fs2,
fs2f,
fs3,
fs3f,
fs4,
fs4f,
fs5,
fs5f,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum Cop1N32 {
fv0,
ft14,
fv1,
ft15,
ft0,
ft1,
ft2,
ft3,
ft4,
ft5,
ft6,
ft7,
fa0,
fa1,
fa2,
fa3,
fa4,
fa5,
fa6,
fa7,
fs0,
ft8,
fs1,
ft9,
fs2,
ft10,
fs3,
ft11,
fs4,
ft12,
fs5,
ft13,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum Cop1N64 {
fv0,
ft12,
fv1,
ft13,
ft0,
ft1,
ft2,
ft3,
ft4,
ft5,
ft6,
ft7,
fa0,
fa1,
fa2,
fa3,
fa4,
fa5,
fa6,
fa7,
ft8,
ft9,
ft10,
ft11,
fs0,
fs1,
fs2,
fs3,
fs4,
fs5,
fs6,
fs7,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum Cop1Control {
COP1_CONTROL_0,
COP1_CONTROL_1,
COP1_CONTROL_2,
COP1_CONTROL_3,
COP1_CONTROL_4,
COP1_CONTROL_5,
COP1_CONTROL_6,
COP1_CONTROL_7,
COP1_CONTROL_8,
COP1_CONTROL_9,
COP1_CONTROL_10,
COP1_CONTROL_11,
COP1_CONTROL_12,
COP1_CONTROL_13,
COP1_CONTROL_14,
COP1_CONTROL_15,
COP1_CONTROL_16,
COP1_CONTROL_17,
COP1_CONTROL_18,
COP1_CONTROL_19,
COP1_CONTROL_20,
COP1_CONTROL_21,
COP1_CONTROL_22,
COP1_CONTROL_23,
COP1_CONTROL_24,
COP1_CONTROL_25,
COP1_CONTROL_26,
COP1_CONTROL_27,
COP1_CONTROL_28,
COP1_CONTROL_29,
COP1_CONTROL_30,
COP1_CONTROL_FpcCsr,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum Cop2 {
COP2_0,
COP2_1,
COP2_2,
COP2_3,
COP2_4,
COP2_5,
COP2_6,
COP2_7,
COP2_8,
COP2_9,
COP2_10,
COP2_11,
COP2_12,
COP2_13,
COP2_14,
COP2_15,
COP2_16,
COP2_17,
COP2_18,
COP2_19,
COP2_20,
COP2_21,
COP2_22,
COP2_23,
COP2_24,
COP2_25,
COP2_26,
COP2_27,
COP2_28,
COP2_29,
COP2_30,
COP2_31,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum RspGpr {
RSP_GPR_zero,
RSP_GPR_1,
RSP_GPR_2,
RSP_GPR_3,
RSP_GPR_4,
RSP_GPR_5,
RSP_GPR_6,
RSP_GPR_7,
RSP_GPR_8,
RSP_GPR_9,
RSP_GPR_10,
RSP_GPR_11,
RSP_GPR_12,
RSP_GPR_13,
RSP_GPR_14,
RSP_GPR_15,
RSP_GPR_16,
RSP_GPR_17,
RSP_GPR_18,
RSP_GPR_19,
RSP_GPR_20,
RSP_GPR_21,
RSP_GPR_22,
RSP_GPR_23,
RSP_GPR_24,
RSP_GPR_25,
RSP_GPR_26,
RSP_GPR_27,
RSP_GPR_28,
RSP_GPR_29,
RSP_GPR_30,
RSP_GPR_ra,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum RspCop0 {
SP_MEM_ADDR,
SP_DRAM_ADDR,
SP_RD_LEN,
SP_WR_LEN,
SP_STATUS,
SP_DMA_FULL,
SP_DMA_BUSY,
SP_SEMAPHORE,
DPC_START,
DPC_END,
DPC_CURRENT,
DPC_STATUS,
DPC_CLOCK,
DPC_BUFBUSY,
DPC_PIPEBUSY,
DPC_TMEM,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum RspCop2 {
RSP_COP2_0,
RSP_COP2_1,
RSP_COP2_2,
RSP_COP2_3,
RSP_COP2_4,
RSP_COP2_5,
RSP_COP2_6,
RSP_COP2_7,
RSP_COP2_8,
RSP_COP2_9,
RSP_COP2_10,
RSP_COP2_11,
RSP_COP2_12,
RSP_COP2_13,
RSP_COP2_14,
RSP_COP2_15,
RSP_COP2_16,
RSP_COP2_17,
RSP_COP2_18,
RSP_COP2_19,
RSP_COP2_20,
RSP_COP2_21,
RSP_COP2_22,
RSP_COP2_23,
RSP_COP2_24,
RSP_COP2_25,
RSP_COP2_26,
RSP_COP2_27,
RSP_COP2_28,
RSP_COP2_29,
RSP_COP2_30,
RSP_COP2_31,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum RspCop2Control {
RSP_COP2_CONTROL_0,
RSP_COP2_CONTROL_1,
RSP_COP2_CONTROL_2,
RSP_COP2_CONTROL_3,
RSP_COP2_CONTROL_4,
RSP_COP2_CONTROL_5,
RSP_COP2_CONTROL_6,
RSP_COP2_CONTROL_7,
RSP_COP2_CONTROL_8,
RSP_COP2_CONTROL_9,
RSP_COP2_CONTROL_10,
RSP_COP2_CONTROL_11,
RSP_COP2_CONTROL_12,
RSP_COP2_CONTROL_13,
RSP_COP2_CONTROL_14,
RSP_COP2_CONTROL_15,
RSP_COP2_CONTROL_16,
RSP_COP2_CONTROL_17,
RSP_COP2_CONTROL_18,
RSP_COP2_CONTROL_19,
RSP_COP2_CONTROL_20,
RSP_COP2_CONTROL_21,
RSP_COP2_CONTROL_22,
RSP_COP2_CONTROL_23,
RSP_COP2_CONTROL_24,
RSP_COP2_CONTROL_25,
RSP_COP2_CONTROL_26,
RSP_COP2_CONTROL_27,
RSP_COP2_CONTROL_28,
RSP_COP2_CONTROL_29,
RSP_COP2_CONTROL_30,
RSP_COP2_CONTROL_31,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum RspVector {
v0,
v1,
v2,
v3,
v4,
v5,
v6,
v7,
v8,
v9,
v10,
v11,
v12,
v13,
v14,
v15,
v16,
v17,
v18,
v19,
v20,
v21,
v22,
v23,
v24,
v25,
v26,
v27,
v28,
v29,
v30,
v31,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R4000AllegrexS {
S000,
S010,
S020,
S030,
S100,
S110,
S120,
S130,
S200,
S210,
S220,
S230,
S300,
S310,
S320,
S330,
S400,
S410,
S420,
S430,
S500,
S510,
S520,
S530,
S600,
S610,
S620,
S630,
S700,
S710,
S720,
S730,
S001,
S011,
S021,
S031,
S101,
S111,
S121,
S131,
S201,
S211,
S221,
S231,
S301,
S311,
S321,
S331,
S401,
S411,
S421,
S431,
S501,
S511,
S521,
S531,
S601,
S611,
S621,
S631,
S701,
S711,
S721,
S731,
S002,
S012,
S022,
S032,
S102,
S112,
S122,
S132,
S202,
S212,
S222,
S232,
S302,
S312,
S322,
S332,
S402,
S412,
S422,
S432,
S502,
S512,
S522,
S532,
S602,
S612,
S622,
S632,
S702,
S712,
S722,
S732,
S003,
S013,
S023,
S033,
S103,
S113,
S123,
S133,
S203,
S213,
S223,
S233,
S303,
S313,
S323,
S333,
S403,
S413,
S423,
S433,
S503,
S513,
S523,
S533,
S603,
S613,
S623,
S633,
S703,
S713,
S723,
S733,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R4000AllegrexV2D {
C000,
C010,
C020,
C030,
C100,
C110,
C120,
C130,
C200,
C210,
C220,
C230,
C300,
C310,
C320,
C330,
C400,
C410,
C420,
C430,
C500,
C510,
C520,
C530,
C600,
C610,
C620,
C630,
C700,
C710,
C720,
C730,
R000,
R001,
R002,
R003,
R100,
R101,
R102,
R103,
R200,
R201,
R202,
R203,
R300,
R301,
R302,
R303,
R400,
R401,
R402,
R403,
R500,
R501,
R502,
R503,
R600,
R601,
R602,
R603,
R700,
R701,
R702,
R703,
C002,
C012,
C022,
C032,
C102,
C112,
C122,
C132,
C202,
C212,
C222,
C232,
C302,
C312,
C322,
C332,
C402,
C412,
C422,
C432,
C502,
C512,
C522,
C532,
C602,
C612,
C622,
C632,
C702,
C712,
C722,
C732,
R020,
R021,
R022,
R023,
R120,
R121,
R122,
R123,
R220,
R221,
R222,
R223,
R320,
R321,
R322,
R323,
R420,
R421,
R422,
R423,
R520,
R521,
R522,
R523,
R620,
R621,
R622,
R623,
R720,
R721,
R722,
R723,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R4000AllegrexV3D {
C000,
C010,
C020,
C030,
C100,
C110,
C120,
C130,
C200,
C210,
C220,
C230,
C300,
C310,
C320,
C330,
C400,
C410,
C420,
C430,
C500,
C510,
C520,
C530,
C600,
C610,
C620,
C630,
C700,
C710,
C720,
C730,
R000,
R001,
R002,
R003,
R100,
R101,
R102,
R103,
R200,
R201,
R202,
R203,
R300,
R301,
R302,
R303,
R400,
R401,
R402,
R403,
R500,
R501,
R502,
R503,
R600,
R601,
R602,
R603,
R700,
R701,
R702,
R703,
C001,
C011,
C021,
C031,
C101,
C111,
C121,
C131,
C201,
C211,
C221,
C231,
C301,
C311,
C321,
C331,
C401,
C411,
C421,
C431,
C501,
C511,
C521,
C531,
C601,
C611,
C621,
C631,
C701,
C711,
C721,
C731,
R010,
R011,
R012,
R013,
R110,
R111,
R112,
R113,
R210,
R211,
R212,
R213,
R310,
R311,
R312,
R313,
R410,
R411,
R412,
R413,
R510,
R511,
R512,
R513,
R610,
R611,
R612,
R613,
R710,
R711,
R712,
R713,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R4000AllegrexV4D {
C000,
C010,
C020,
C030,
C100,
C110,
C120,
C130,
C200,
C210,
C220,
C230,
C300,
C310,
C320,
C330,
C400,
C410,
C420,
C430,
C500,
C510,
C520,
C530,
C600,
C610,
C620,
C630,
C700,
C710,
C720,
C730,
R000,
R001,
R002,
R003,
R100,
R101,
R102,
R103,
R200,
R201,
R202,
R203,
R300,
R301,
R302,
R303,
R400,
R401,
R402,
R403,
R500,
R501,
R502,
R503,
R600,
R601,
R602,
R603,
R700,
R701,
R702,
R703,
C002,
C012,
C022,
C032,
C102,
C112,
C122,
C132,
C202,
C212,
C222,
C232,
C302,
C312,
C322,
C332,
C402,
C412,
C422,
C432,
C502,
C512,
C522,
C532,
C602,
C612,
C622,
C632,
C702,
C712,
C722,
C732,
R020,
R021,
R022,
R023,
R120,
R121,
R122,
R123,
R220,
R221,
R222,
R223,
R320,
R321,
R322,
R323,
R420,
R421,
R422,
R423,
R520,
R521,
R522,
R523,
R620,
R621,
R622,
R623,
R720,
R721,
R722,
R723,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R4000AllegrexM2x2 {
M000,
M010,
M020,
M030,
M100,
M110,
M120,
M130,
M200,
M210,
M220,
M230,
M300,
M310,
M320,
M330,
M400,
M410,
M420,
M430,
M500,
M510,
M520,
M530,
M600,
M610,
M620,
M630,
M700,
M710,
M720,
M730,
E000,
E001,
E002,
E003,
E100,
E101,
E102,
E103,
E200,
E201,
E202,
E203,
E300,
E301,
E302,
E303,
E400,
E401,
E402,
E403,
E500,
E501,
E502,
E503,
E600,
E601,
E602,
E603,
E700,
E701,
E702,
E703,
M002,
M012,
M022,
M032,
M102,
M112,
M122,
M132,
M202,
M212,
M222,
M232,
M302,
M312,
M322,
M332,
M402,
M412,
M422,
M432,
M502,
M512,
M522,
M532,
M602,
M612,
M622,
M632,
M702,
M712,
M722,
M732,
E020,
E021,
E022,
E023,
E120,
E121,
E122,
E123,
E220,
E221,
E222,
E223,
E320,
E321,
E322,
E323,
E420,
E421,
E422,
E423,
E520,
E521,
E522,
E523,
E620,
E621,
E622,
E623,
E720,
E721,
E722,
E723,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R4000AllegrexM3x3 {
M000,
M010,
M020,
M030,
M100,
M110,
M120,
M130,
M200,
M210,
M220,
M230,
M300,
M310,
M320,
M330,
M400,
M410,
M420,
M430,
M500,
M510,
M520,
M530,
M600,
M610,
M620,
M630,
M700,
M710,
M720,
M730,
E000,
E001,
E002,
E003,
E100,
E101,
E102,
E103,
E200,
E201,
E202,
E203,
E300,
E301,
E302,
E303,
E400,
E401,
E402,
E403,
E500,
E501,
E502,
E503,
E600,
E601,
E602,
E603,
E700,
E701,
E702,
E703,
M001,
M011,
M021,
M031,
M101,
M111,
M121,
M131,
M201,
M211,
M221,
M231,
M301,
M311,
M321,
M331,
M401,
M411,
M421,
M431,
M501,
M511,
M521,
M531,
M601,
M611,
M621,
M631,
M701,
M711,
M721,
M731,
E010,
E011,
E012,
E013,
E110,
E111,
E112,
E113,
E210,
E211,
E212,
E213,
E310,
E311,
E312,
E313,
E410,
E411,
E412,
E413,
E510,
E511,
E512,
E513,
E610,
E611,
E612,
E613,
E710,
E711,
E712,
E713,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R4000AllegrexM4x4 {
M000,
M010,
M020,
M030,
M100,
M110,
M120,
M130,
M200,
M210,
M220,
M230,
M300,
M310,
M320,
M330,
M400,
M410,
M420,
M430,
M500,
M510,
M520,
M530,
M600,
M610,
M620,
M630,
M700,
M710,
M720,
M730,
E000,
E001,
E002,
E003,
E100,
E101,
E102,
E103,
E200,
E201,
E202,
E203,
E300,
E301,
E302,
E303,
E400,
E401,
E402,
E403,
E500,
E501,
E502,
E503,
E600,
E601,
E602,
E603,
E700,
E701,
E702,
E703,
M002,
M012,
M022,
M032,
M102,
M112,
M122,
M132,
M202,
M212,
M222,
M232,
M302,
M312,
M322,
M332,
M402,
M412,
M422,
M432,
M502,
M512,
M522,
M532,
M602,
M612,
M622,
M632,
M702,
M712,
M722,
M732,
E020,
E021,
E022,
E023,
E120,
E121,
E122,
E123,
E220,
E221,
E222,
E223,
E320,
E321,
E322,
E323,
E420,
E421,
E422,
E423,
E520,
E521,
E522,
E523,
E620,
E621,
E622,
E623,
E720,
E721,
E722,
E723,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R4000AllegrexVfpuControl {
R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS,
R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT,
R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD,
R4000ALLEGREX_VFPUCONTROL_VFPU_CC,
R4000ALLEGREX_VFPUCONTROL_VFPU_INF4,
R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5,
R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6,
R4000ALLEGREX_VFPUCONTROL_VFPU_REV,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6,
R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7,
R4000ALLEGREX_VFPUCONTROL_144,
R4000ALLEGREX_VFPUCONTROL_145,
R4000ALLEGREX_VFPUCONTROL_146,
R4000ALLEGREX_VFPUCONTROL_147,
R4000ALLEGREX_VFPUCONTROL_148,
R4000ALLEGREX_VFPUCONTROL_149,
R4000ALLEGREX_VFPUCONTROL_150,
R4000ALLEGREX_VFPUCONTROL_151,
R4000ALLEGREX_VFPUCONTROL_152,
R4000ALLEGREX_VFPUCONTROL_153,
R4000ALLEGREX_VFPUCONTROL_154,
R4000ALLEGREX_VFPUCONTROL_155,
R4000ALLEGREX_VFPUCONTROL_156,
R4000ALLEGREX_VFPUCONTROL_157,
R4000ALLEGREX_VFPUCONTROL_158,
R4000ALLEGREX_VFPUCONTROL_159,
R4000ALLEGREX_VFPUCONTROL_160,
R4000ALLEGREX_VFPUCONTROL_161,
R4000ALLEGREX_VFPUCONTROL_162,
R4000ALLEGREX_VFPUCONTROL_163,
R4000ALLEGREX_VFPUCONTROL_164,
R4000ALLEGREX_VFPUCONTROL_165,
R4000ALLEGREX_VFPUCONTROL_166,
R4000ALLEGREX_VFPUCONTROL_167,
R4000ALLEGREX_VFPUCONTROL_168,
R4000ALLEGREX_VFPUCONTROL_169,
R4000ALLEGREX_VFPUCONTROL_170,
R4000ALLEGREX_VFPUCONTROL_171,
R4000ALLEGREX_VFPUCONTROL_172,
R4000ALLEGREX_VFPUCONTROL_173,
R4000ALLEGREX_VFPUCONTROL_174,
R4000ALLEGREX_VFPUCONTROL_175,
R4000ALLEGREX_VFPUCONTROL_176,
R4000ALLEGREX_VFPUCONTROL_177,
R4000ALLEGREX_VFPUCONTROL_178,
R4000ALLEGREX_VFPUCONTROL_179,
R4000ALLEGREX_VFPUCONTROL_180,
R4000ALLEGREX_VFPUCONTROL_181,
R4000ALLEGREX_VFPUCONTROL_182,
R4000ALLEGREX_VFPUCONTROL_183,
R4000ALLEGREX_VFPUCONTROL_184,
R4000ALLEGREX_VFPUCONTROL_185,
R4000ALLEGREX_VFPUCONTROL_186,
R4000ALLEGREX_VFPUCONTROL_187,
R4000ALLEGREX_VFPUCONTROL_188,
R4000ALLEGREX_VFPUCONTROL_189,
R4000ALLEGREX_VFPUCONTROL_190,
R4000ALLEGREX_VFPUCONTROL_191,
R4000ALLEGREX_VFPUCONTROL_192,
R4000ALLEGREX_VFPUCONTROL_193,
R4000ALLEGREX_VFPUCONTROL_194,
R4000ALLEGREX_VFPUCONTROL_195,
R4000ALLEGREX_VFPUCONTROL_196,
R4000ALLEGREX_VFPUCONTROL_197,
R4000ALLEGREX_VFPUCONTROL_198,
R4000ALLEGREX_VFPUCONTROL_199,
R4000ALLEGREX_VFPUCONTROL_200,
R4000ALLEGREX_VFPUCONTROL_201,
R4000ALLEGREX_VFPUCONTROL_202,
R4000ALLEGREX_VFPUCONTROL_203,
R4000ALLEGREX_VFPUCONTROL_204,
R4000ALLEGREX_VFPUCONTROL_205,
R4000ALLEGREX_VFPUCONTROL_206,
R4000ALLEGREX_VFPUCONTROL_207,
R4000ALLEGREX_VFPUCONTROL_208,
R4000ALLEGREX_VFPUCONTROL_209,
R4000ALLEGREX_VFPUCONTROL_210,
R4000ALLEGREX_VFPUCONTROL_211,
R4000ALLEGREX_VFPUCONTROL_212,
R4000ALLEGREX_VFPUCONTROL_213,
R4000ALLEGREX_VFPUCONTROL_214,
R4000ALLEGREX_VFPUCONTROL_215,
R4000ALLEGREX_VFPUCONTROL_216,
R4000ALLEGREX_VFPUCONTROL_217,
R4000ALLEGREX_VFPUCONTROL_218,
R4000ALLEGREX_VFPUCONTROL_219,
R4000ALLEGREX_VFPUCONTROL_220,
R4000ALLEGREX_VFPUCONTROL_221,
R4000ALLEGREX_VFPUCONTROL_222,
R4000ALLEGREX_VFPUCONTROL_223,
R4000ALLEGREX_VFPUCONTROL_224,
R4000ALLEGREX_VFPUCONTROL_225,
R4000ALLEGREX_VFPUCONTROL_226,
R4000ALLEGREX_VFPUCONTROL_227,
R4000ALLEGREX_VFPUCONTROL_228,
R4000ALLEGREX_VFPUCONTROL_229,
R4000ALLEGREX_VFPUCONTROL_230,
R4000ALLEGREX_VFPUCONTROL_231,
R4000ALLEGREX_VFPUCONTROL_232,
R4000ALLEGREX_VFPUCONTROL_233,
R4000ALLEGREX_VFPUCONTROL_234,
R4000ALLEGREX_VFPUCONTROL_235,
R4000ALLEGREX_VFPUCONTROL_236,
R4000ALLEGREX_VFPUCONTROL_237,
R4000ALLEGREX_VFPUCONTROL_238,
R4000ALLEGREX_VFPUCONTROL_239,
R4000ALLEGREX_VFPUCONTROL_240,
R4000ALLEGREX_VFPUCONTROL_241,
R4000ALLEGREX_VFPUCONTROL_242,
R4000ALLEGREX_VFPUCONTROL_243,
R4000ALLEGREX_VFPUCONTROL_244,
R4000ALLEGREX_VFPUCONTROL_245,
R4000ALLEGREX_VFPUCONTROL_246,
R4000ALLEGREX_VFPUCONTROL_247,
R4000ALLEGREX_VFPUCONTROL_248,
R4000ALLEGREX_VFPUCONTROL_249,
R4000ALLEGREX_VFPUCONTROL_250,
R4000ALLEGREX_VFPUCONTROL_251,
R4000ALLEGREX_VFPUCONTROL_252,
R4000ALLEGREX_VFPUCONTROL_253,
R4000ALLEGREX_VFPUCONTROL_254,
R4000ALLEGREX_VFPUCONTROL_255,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R4000AllegrexVConstant {
INVALID_0,
VFPU_HUGE,
VFPU_SQRT2,
VFPU_SQRT1_2,
VFPU_2_SQRTPI,
VFPU_2_PI,
VFPU_1_PI,
VFPU_PI_4,
VFPU_PI_2,
VFPU_PI,
VFPU_E,
VFPU_LOG2E,
VFPU_LOG10E,
VFPU_LN2,
VFPU_LN10,
VFPU_2PI,
VFPU_PI_6,
VFPU_LOG10TWO,
VFPU_LOG2TEN,
VFPU_SQRT3_2,
INVALID_20,
INVALID_21,
INVALID_22,
INVALID_23,
INVALID_24,
INVALID_25,
INVALID_26,
INVALID_27,
INVALID_28,
INVALID_29,
INVALID_30,
INVALID_31,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R5900VF {
vf0,
vf1,
vf2,
vf3,
vf4,
vf5,
vf6,
vf7,
vf8,
vf9,
vf10,
vf11,
vf12,
vf13,
vf14,
vf15,
vf16,
vf17,
vf18,
vf19,
vf20,
vf21,
vf22,
vf23,
vf24,
vf25,
vf26,
vf27,
vf28,
vf29,
vf30,
vf31,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
#[allow(non_camel_case_types)]
#[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)]
pub enum R5900VI {
vi0,
vi1,
vi2,
vi3,
vi4,
vi5,
vi6,
vi7,
vi8,
vi9,
vi10,
vi11,
vi12,
vi13,
vi14,
vi15,
vi16,
vi17,
vi18,
vi19,
vi20,
vi21,
vi22,
vi23,
vi24,
vi25,
vi26,
vi27,
vi28,
vi29,
vi30,
vi31,
}
}