ra8p1-pac 0.3.0

Peripheral Access Crate (PAC) for R7FAA8P1.
Documentation
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
/*
DISCLAIMER
This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
applicable laws, including copyright laws.
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
of this software. By using this software, you agree to the additional terms and conditions found by accessing the
following link:
http://www.renesas.com/disclaimer

*/
// Generated from SVD 1.00.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:55:39 +0000

#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"VIN0_NS Register area"]
unsafe impl ::core::marker::Send for super::Vin0Ns {}
unsafe impl ::core::marker::Sync for super::Vin0Ns {}
impl super::Vin0Ns {
    #[allow(unused)]
    #[inline(always)]
    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
        self.ptr
    }

    #[doc = "Main Control Register"]
    #[inline(always)]
    pub const fn mc(&self) -> &'static crate::common::Reg<self::Mc_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Mc_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(0usize),
            )
        }
    }

    #[doc = "Module Status Register"]
    #[inline(always)]
    pub const fn ms(&self) -> &'static crate::common::Reg<self::Ms_SPEC, crate::common::R> {
        unsafe {
            crate::common::Reg::<self::Ms_SPEC, crate::common::R>::from_ptr(
                self._svd2pac_as_ptr().add(4usize),
            )
        }
    }

    #[doc = "Frame Capture Register"]
    #[inline(always)]
    pub const fn fc(&self) -> &'static crate::common::Reg<self::Fc_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Fc_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(8usize),
            )
        }
    }

    #[doc = "Start Line Pre-Clip Register"]
    #[inline(always)]
    pub const fn slprc(&self) -> &'static crate::common::Reg<self::Slprc_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Slprc_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(12usize),
            )
        }
    }

    #[doc = "End Line Pre-Clip Register"]
    #[inline(always)]
    pub const fn elprc(&self) -> &'static crate::common::Reg<self::Elprc_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Elprc_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(16usize),
            )
        }
    }

    #[doc = "Start Pixel Pre-Clip Register"]
    #[inline(always)]
    pub const fn spprc(&self) -> &'static crate::common::Reg<self::Spprc_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Spprc_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(20usize),
            )
        }
    }

    #[doc = "End Pixel Pre-Clip Register"]
    #[inline(always)]
    pub const fn epprc(&self) -> &'static crate::common::Reg<self::Epprc_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Epprc_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(24usize),
            )
        }
    }

    #[doc = "CSI2 Interface Mode Register"]
    #[inline(always)]
    pub const fn csi_ifmd(
        &self,
    ) -> &'static crate::common::Reg<self::CsiIfmd_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CsiIfmd_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(32usize),
            )
        }
    }

    #[doc = "Field detection control Register"]
    #[inline(always)]
    pub const fn csifld(
        &self,
    ) -> &'static crate::common::Reg<self::Csifld_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Csifld_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(36usize),
            )
        }
    }

    #[doc = "Image Stride Register"]
    #[inline(always)]
    pub const fn is(&self) -> &'static crate::common::Reg<self::Is_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Is_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(44usize),
            )
        }
    }

    #[doc = "Memory Base 1 Register"]
    #[inline(always)]
    pub const fn mb1(&self) -> &'static crate::common::Reg<self::Mb1_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Mb1_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(48usize),
            )
        }
    }

    #[doc = "Memory Base 2 Register"]
    #[inline(always)]
    pub const fn mb2(&self) -> &'static crate::common::Reg<self::Mb2_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Mb2_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(52usize),
            )
        }
    }

    #[doc = "Memory Base 3 Register"]
    #[inline(always)]
    pub const fn mb3(&self) -> &'static crate::common::Reg<self::Mb3_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Mb3_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(56usize),
            )
        }
    }

    #[doc = "Line Count Register"]
    #[inline(always)]
    pub const fn lc(&self) -> &'static crate::common::Reg<self::Lc_SPEC, crate::common::R> {
        unsafe {
            crate::common::Reg::<self::Lc_SPEC, crate::common::R>::from_ptr(
                self._svd2pac_as_ptr().add(60usize),
            )
        }
    }

    #[doc = "Interrupt Enable Register"]
    #[inline(always)]
    pub const fn ie(&self) -> &'static crate::common::Reg<self::Ie_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Ie_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(64usize),
            )
        }
    }

    #[doc = "Interrupt Status Register"]
    #[inline(always)]
    pub const fn ints(&self) -> &'static crate::common::Reg<self::Ints_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Ints_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(68usize),
            )
        }
    }

    #[doc = "Scanline Interrupt Register"]
    #[inline(always)]
    pub const fn si(&self) -> &'static crate::common::Reg<self::Si_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Si_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(72usize),
            )
        }
    }

    #[doc = "AXI transfer stop control register"]
    #[inline(always)]
    pub const fn mtcstop(
        &self,
    ) -> &'static crate::common::Reg<self::Mtcstop_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Mtcstop_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(84usize),
            )
        }
    }

    #[doc = "Data Mode Register"]
    #[inline(always)]
    pub const fn dmr(&self) -> &'static crate::common::Reg<self::Dmr_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Dmr_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(88usize),
            )
        }
    }

    #[doc = "UV Address Offset Register"]
    #[inline(always)]
    pub const fn uvaof(&self) -> &'static crate::common::Reg<self::Uvaof_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Uvaof_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(96usize),
            )
        }
    }

    #[doc = "Scaling Control Registers"]
    #[inline(always)]
    pub const fn uds_ctrl(
        &self,
    ) -> &'static crate::common::Reg<self::UdsCtrl_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::UdsCtrl_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(128usize),
            )
        }
    }

    #[doc = "Scaling Factor Registers"]
    #[inline(always)]
    pub const fn uds_scale(
        &self,
    ) -> &'static crate::common::Reg<self::UdsScale_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::UdsScale_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(132usize),
            )
        }
    }

    #[doc = "Passband Registers"]
    #[inline(always)]
    pub const fn uds_pass_bwidth(
        &self,
    ) -> &'static crate::common::Reg<self::UdsPassBwidth_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::UdsPassBwidth_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(144usize),
            )
        }
    }

    #[doc = "UDS Output Size Clipping Registers"]
    #[inline(always)]
    pub const fn uds_clip_size(
        &self,
    ) -> &'static crate::common::Reg<self::UdsClipSize_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::UdsClipSize_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(164usize),
            )
        }
    }

    #[doc = "Lookup Table Pointer Register"]
    #[inline(always)]
    pub const fn lutp(&self) -> &'static crate::common::Reg<self::Lutp_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Lutp_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(256usize),
            )
        }
    }

    #[doc = "Lookup Table Data Register"]
    #[inline(always)]
    pub const fn lutd(&self) -> &'static crate::common::Reg<self::Lutd_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Lutd_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(260usize),
            )
        }
    }

    #[doc = "RGB to Y Calculation Setting Register 1"]
    #[inline(always)]
    pub const fn yccr1(&self) -> &'static crate::common::Reg<self::Yccr1_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Yccr1_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(552usize),
            )
        }
    }

    #[doc = "RGB to Y Calculation Setting Register 2"]
    #[inline(always)]
    pub const fn yccr2(&self) -> &'static crate::common::Reg<self::Yccr2_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Yccr2_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(556usize),
            )
        }
    }

    #[doc = "RGB to Y Calculation Setting Register 3"]
    #[inline(always)]
    pub const fn yccr3(&self) -> &'static crate::common::Reg<self::Yccr3_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Yccr3_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(560usize),
            )
        }
    }

    #[doc = "RGB to Cb Calculation Setting Register 1"]
    #[inline(always)]
    pub const fn cbccr1(
        &self,
    ) -> &'static crate::common::Reg<self::Cbccr1_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Cbccr1_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(564usize),
            )
        }
    }

    #[doc = "RGB to Cb Calculation Setting Register 2"]
    #[inline(always)]
    pub const fn cbccr2(
        &self,
    ) -> &'static crate::common::Reg<self::Cbccr2_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Cbccr2_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(568usize),
            )
        }
    }

    #[doc = "RGB to Cb Calculation Setting Register 3"]
    #[inline(always)]
    pub const fn cbccr3(
        &self,
    ) -> &'static crate::common::Reg<self::Cbccr3_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Cbccr3_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(572usize),
            )
        }
    }

    #[doc = "RGB to Cr Calculation Setting Register 1"]
    #[inline(always)]
    pub const fn crccr1(
        &self,
    ) -> &'static crate::common::Reg<self::Crccr1_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Crccr1_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(576usize),
            )
        }
    }

    #[doc = "RGB to Cr Calculation Setting Register 2"]
    #[inline(always)]
    pub const fn crccr2(
        &self,
    ) -> &'static crate::common::Reg<self::Crccr2_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Crccr2_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(580usize),
            )
        }
    }

    #[doc = "RGB to Cr Calculation Setting Register 3"]
    #[inline(always)]
    pub const fn crccr3(
        &self,
    ) -> &'static crate::common::Reg<self::Crccr3_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Crccr3_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(584usize),
            )
        }
    }

    #[doc = "YC to RGB Calculation Setting Extension Register 1"]
    #[inline(always)]
    pub const fn csce1(&self) -> &'static crate::common::Reg<self::Csce1_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Csce1_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(768usize),
            )
        }
    }

    #[doc = "YC to RGB Calculation Setting Extension Register 2"]
    #[inline(always)]
    pub const fn csce2(&self) -> &'static crate::common::Reg<self::Csce2_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Csce2_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(772usize),
            )
        }
    }

    #[doc = "YC to RGB Calculation Setting Extension Register 3"]
    #[inline(always)]
    pub const fn csce3(&self) -> &'static crate::common::Reg<self::Csce3_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Csce3_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(776usize),
            )
        }
    }

    #[doc = "YC to RGB Calculation Setting Extension Register 4"]
    #[inline(always)]
    pub const fn csce4(&self) -> &'static crate::common::Reg<self::Csce4_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Csce4_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(780usize),
            )
        }
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mc_SPEC;
impl crate::sealed::RegSpec for Mc_SPEC {
    type DataType = u32;
}

#[doc = "Main Control Register"]
pub type Mc = crate::RegValueT<Mc_SPEC>;

impl Mc {
    #[doc = "Module Enable"]
    #[inline(always)]
    pub fn me(
        self,
    ) -> crate::common::RegisterField<0, 0x1, 1, 0, mc::Me, mc::Me, Mc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x1,1,0,mc::Me,mc::Me,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Color Space Conversion Bypass Mode"]
    #[inline(always)]
    pub fn bps(
        self,
    ) -> crate::common::RegisterField<1, 0x1, 1, 0, mc::Bps, mc::Bps, Mc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<1,0x1,1,0,mc::Bps,mc::Bps,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Interlace Mode"]
    #[inline(always)]
    pub fn im(
        self,
    ) -> crate::common::RegisterField<3, 0x3, 1, 0, mc::Im, mc::Im, Mc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<3,0x3,1,0,mc::Im,mc::Im,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Endian Type"]
    #[inline(always)]
    pub fn en(
        self,
    ) -> crate::common::RegisterField<6, 0x1, 1, 0, mc::En, mc::En, Mc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<6,0x1,1,0,mc::En,mc::En,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Dithering Mode Control"]
    #[inline(always)]
    pub fn dc(
        self,
    ) -> crate::common::RegisterField<14, 0x3, 1, 0, mc::Dc, mc::Dc, Mc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<14,0x3,1,0,mc::Dc,mc::Dc,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Input Interface Format"]
    #[inline(always)]
    pub fn inf(
        self,
    ) -> crate::common::RegisterField<16, 0x7, 1, 0, mc::Inf, mc::Inf, Mc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0x7,1,0,mc::Inf,mc::Inf,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Lookup Table Enable"]
    #[inline(always)]
    pub fn lute(
        self,
    ) -> crate::common::RegisterField<20, 0x1, 1, 0, mc::Lute, mc::Lute, Mc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<20,0x1,1,0,mc::Lute,mc::Lute,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Initialization control at STartup"]
    #[inline(always)]
    pub fn st(
        self,
    ) -> crate::common::RegisterField<22, 0x1, 1, 0, mc::St, mc::St, Mc_SPEC, crate::common::W>
    {
        crate::common::RegisterField::<22,0x1,1,0,mc::St,mc::St,Mc_SPEC,crate::common::W>::from_register(self,0)
    }

    #[doc = "Dithering mode Control 2"]
    #[inline(always)]
    pub fn dc2(
        self,
    ) -> crate::common::RegisterField<24, 0x1, 1, 0, mc::Dc2, mc::Dc2, Mc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<24,0x1,1,0,mc::Dc2,mc::Dc2,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "YUV444 conversion"]
    #[inline(always)]
    pub fn yuv444(
        self,
    ) -> crate::common::RegisterField<
        25,
        0x1,
        1,
        0,
        mc::Yuv444,
        mc::Yuv444,
        Mc_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            25,
            0x1,
            1,
            0,
            mc::Yuv444,
            mc::Yuv444,
            Mc_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "This bit is used to enable or disable scaling by the UDS."]
    #[inline(always)]
    pub fn scle(
        self,
    ) -> crate::common::RegisterField<26, 0x1, 1, 0, mc::Scle, mc::Scle, Mc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<26,0x1,1,0,mc::Scle,mc::Scle,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Pixel Data Clipping"]
    #[inline(always)]
    pub fn clp(
        self,
    ) -> crate::common::RegisterField<28, 0x3, 1, 0, u8, u8, Mc_SPEC, crate::common::RW> {
        crate::common::RegisterField::<28,0x3,1,0,u8,u8,Mc_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Mc {
    #[inline(always)]
    fn default() -> Mc {
        <crate::RegValueT<Mc_SPEC> as RegisterValue<_>>::new(8)
    }
}
pub mod mc {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Me_SPEC;
    pub type Me = crate::EnumBitfieldStruct<u8, Me_SPEC>;
    impl Me {
        #[doc = "The module operation is stopped."]
        pub const _0: Self = Self::new(0);

        #[doc = "The module operation is enabled."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Bps_SPEC;
    pub type Bps = crate::EnumBitfieldStruct<u8, Bps_SPEC>;
    impl Bps {
        #[doc = "The input YCbCr data is converted into the RGB color space and RGB data is converted into the YCbCr color space."]
        pub const _0: Self = Self::new(0);

        #[doc = "Color space conversion is not performed."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Im_SPEC;
    pub type Im = crate::EnumBitfieldStruct<u8, Im_SPEC>;
    impl Im {
        #[doc = "Odd-field (field 1) capture mode Handles only odd fields as frames and stores them in external memory."]
        pub const _00: Self = Self::new(0);

        #[doc = "Odd-/even-field capture mode Handles odd and even fields as separate frames and stores them in external memory. This mode is available only in continuous frame capture mode. For progressive input and continuous frame capture mode, set 01b."]
        pub const _01: Self = Self::new(1);

        #[doc = "Even-field (field 2) capture mode Handles only even fields as frames and stores them in external memory."]
        pub const _10: Self = Self::new(2);

        #[doc = "Setting prohibited"]
        pub const _11: Self = Self::new(3);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct En_SPEC;
    pub type En = crate::EnumBitfieldStruct<u8, En_SPEC>;
    impl En {
        #[doc = "Image data is packed and allocated in little endian."]
        pub const _0: Self = Self::new(0);

        #[doc = "Image data is packed and allocated in big endian."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Dc_SPEC;
    pub type Dc = crate::EnumBitfieldStruct<u8, Dc_SPEC>;
    impl Dc {
        #[doc = "Dithering with cumulative addition"]
        pub const _00: Self = Self::new(0);

        #[doc = "Ordered dithering 1"]
        pub const _01: Self = Self::new(1);

        #[doc = "Setting prohibited"]
        pub const _10: Self = Self::new(2);

        #[doc = "Ordered dithering 2"]
        pub const _11: Self = Self::new(3);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Inf_SPEC;
    pub type Inf = crate::EnumBitfieldStruct<u8, Inf_SPEC>;
    impl Inf {
        #[doc = "Setting prohibited"]
        pub const _000: Self = Self::new(0);

        #[doc = "8-bit YCbCr-422"]
        pub const _001: Self = Self::new(1);

        #[doc = "Setting prohibited"]
        pub const _010: Self = Self::new(2);

        #[doc = "10-bit YCbCr-422"]
        pub const _011: Self = Self::new(3);

        #[doc = "8-bit user defined data (RAW8)"]
        pub const _100: Self = Self::new(4);

        #[doc = "Setting prohibited"]
        pub const _101: Self = Self::new(5);

        #[doc = "24-bit RGB-888"]
        pub const _110: Self = Self::new(6);

        #[doc = "Setting prohibited"]
        pub const _111: Self = Self::new(7);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Lute_SPEC;
    pub type Lute = crate::EnumBitfieldStruct<u8, Lute_SPEC>;
    impl Lute {
        #[doc = "LUT is not used."]
        pub const _0: Self = Self::new(0);

        #[doc = "LUT is used."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct St_SPEC;
    pub type St = crate::EnumBitfieldStruct<u8, St_SPEC>;
    impl St {
        #[doc = "Invalid."]
        pub const _0: Self = Self::new(0);

        #[doc = "Perform the initialization procedure. It is prohibited to use it except for the initialization and resumption procedure."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Dc2_SPEC;
    pub type Dc2 = crate::EnumBitfieldStruct<u8, Dc2_SPEC>;
    impl Dc2 {
        #[doc = "Enables dithering in the frame direction"]
        pub const _0: Self = Self::new(0);

        #[doc = "Disables dithering in the frame direction"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Yuv444_SPEC;
    pub type Yuv444 = crate::EnumBitfieldStruct<u8, Yuv444_SPEC>;
    impl Yuv444 {
        #[doc = "The data of CbCr to be interpolated holds the data one pixel before."]
        pub const _0: Self = Self::new(0);

        #[doc = "Generates CbCr data to be interpolated. This register is invalid when the input format is RGB. If the input format is RAW, set 0."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Scle_SPEC;
    pub type Scle = crate::EnumBitfieldStruct<u8, Scle_SPEC>;
    impl Scle {
        #[doc = "Disables scaling by the UDS."]
        pub const _0: Self = Self::new(0);

        #[doc = "Enables scaling by the UDS."]
        pub const _1: Self = Self::new(1);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Ms_SPEC;
impl crate::sealed::RegSpec for Ms_SPEC {
    type DataType = u32;
}

#[doc = "Module Status Register"]
pub type Ms = crate::RegValueT<Ms_SPEC>;

impl Ms {
    #[doc = "Video Capture Active Status"]
    #[inline(always)]
    pub fn ca(
        self,
    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ms::Ca, ms::Ca, Ms_SPEC, crate::common::R> {
        crate::common::RegisterField::<0,0x1,1,0,ms::Ca,ms::Ca,Ms_SPEC,crate::common::R>::from_register(self,0)
    }

    #[doc = "Active Video Status"]
    #[inline(always)]
    pub fn av(
        self,
    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ms::Av, ms::Av, Ms_SPEC, crate::common::R> {
        crate::common::RegisterField::<1,0x1,1,0,ms::Av,ms::Av,Ms_SPEC,crate::common::R>::from_register(self,0)
    }

    #[doc = "Field Status"]
    #[inline(always)]
    pub fn fs(
        self,
    ) -> crate::common::RegisterField<2, 0x1, 1, 0, ms::Fs, ms::Fs, Ms_SPEC, crate::common::R> {
        crate::common::RegisterField::<2,0x1,1,0,ms::Fs,ms::Fs,Ms_SPEC,crate::common::R>::from_register(self,0)
    }

    #[doc = "Frame Buffer Status"]
    #[inline(always)]
    pub fn fbs(
        self,
    ) -> crate::common::RegisterField<3, 0x3, 1, 0, ms::Fbs, ms::Fbs, Ms_SPEC, crate::common::R>
    {
        crate::common::RegisterField::<3,0x3,1,0,ms::Fbs,ms::Fbs,Ms_SPEC,crate::common::R>::from_register(self,0)
    }

    #[doc = "External frame Memory capture Active status"]
    #[inline(always)]
    pub fn ma(
        self,
    ) -> crate::common::RegisterField<16, 0x1, 1, 0, ms::Ma, ms::Ma, Ms_SPEC, crate::common::R>
    {
        crate::common::RegisterField::<16,0x1,1,0,ms::Ma,ms::Ma,Ms_SPEC,crate::common::R>::from_register(self,0)
    }

    #[doc = "External Frame Memory buffer Status"]
    #[inline(always)]
    pub fn fms(
        self,
    ) -> crate::common::RegisterField<19, 0x3, 1, 0, ms::Fms, ms::Fms, Ms_SPEC, crate::common::R>
    {
        crate::common::RegisterField::<19,0x3,1,0,ms::Fms,ms::Fms,Ms_SPEC,crate::common::R>::from_register(self,0)
    }
}
impl ::core::default::Default for Ms {
    #[inline(always)]
    fn default() -> Ms {
        <crate::RegValueT<Ms_SPEC> as RegisterValue<_>>::new(1572892)
    }
}
pub mod ms {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Ca_SPEC;
    pub type Ca = crate::EnumBitfieldStruct<u8, Ca_SPEC>;
    impl Ca {
        #[doc = "Video capture is not operating."]
        pub const _0: Self = Self::new(0);

        #[doc = "Video capture is operating."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Av_SPEC;
    pub type Av = crate::EnumBitfieldStruct<u8, Av_SPEC>;
    impl Av {
        #[doc = "The current field is not in the active video area."]
        pub const _0: Self = Self::new(0);

        #[doc = "The current field is in the active video area."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Fs_SPEC;
    pub type Fs = crate::EnumBitfieldStruct<u8, Fs_SPEC>;
    impl Fs {
        #[doc = "The current field is an odd field (field 1)."]
        pub const _0: Self = Self::new(0);

        #[doc = "The current field is an even field (field 2)."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Fbs_SPEC;
    pub type Fbs = crate::EnumBitfieldStruct<u8, Fbs_SPEC>;
    impl Fbs {
        #[doc = "The latest valid frame buffer has the base address defined by the memory base 1 register."]
        pub const _00: Self = Self::new(0);

        #[doc = "The latest valid frame buffer has the base address defined by the memory base 2 register."]
        pub const _01: Self = Self::new(1);

        #[doc = "The latest valid frame buffer has the base address defined by the memory base 3 register."]
        pub const _10: Self = Self::new(2);

        #[doc = "There is no valid frame buffer."]
        pub const _11: Self = Self::new(3);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Ma_SPEC;
    pub type Ma = crate::EnumBitfieldStruct<u8, Ma_SPEC>;
    impl Ma {
        #[doc = "Capture to external memory is stopped."]
        pub const _0: Self = Self::new(0);

        #[doc = "Capture to external memory is in operation."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Fms_SPEC;
    pub type Fms = crate::EnumBitfieldStruct<u8, Fms_SPEC>;
    impl Fms {
        #[doc = "The latest valid frame buffer has the base address defined by the memory base 1 register."]
        pub const _00: Self = Self::new(0);

        #[doc = "The latest valid frame buffer has the base address defined by the memory base 2 register."]
        pub const _01: Self = Self::new(1);

        #[doc = "The latest valid frame buffer has the base address defined by the memory base 3 register."]
        pub const _10: Self = Self::new(2);

        #[doc = "There is no valid frame buffer."]
        pub const _11: Self = Self::new(3);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Fc_SPEC;
impl crate::sealed::RegSpec for Fc_SPEC {
    type DataType = u32;
}

#[doc = "Frame Capture Register"]
pub type Fc = crate::RegValueT<Fc_SPEC>;

impl Fc {
    #[doc = "Continuous Frame Capture Mode"]
    #[inline(always)]
    pub fn cc(
        self,
    ) -> crate::common::RegisterField<1, 0x1, 1, 0, fc::Cc, fc::Cc, Fc_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<1,0x1,1,0,fc::Cc,fc::Cc,Fc_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Fc {
    #[inline(always)]
    fn default() -> Fc {
        <crate::RegValueT<Fc_SPEC> as RegisterValue<_>>::new(0)
    }
}
pub mod fc {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Cc_SPEC;
    pub type Cc = crate::EnumBitfieldStruct<u8, Cc_SPEC>;
    impl Cc {
        #[doc = "The continuous frame capture mode is not set."]
        pub const _0: Self = Self::new(0);

        #[doc = "The continuous frame capture mode is set."]
        pub const _1: Self = Self::new(1);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Slprc_SPEC;
impl crate::sealed::RegSpec for Slprc_SPEC {
    type DataType = u32;
}

#[doc = "Start Line Pre-Clip Register"]
pub type Slprc = crate::RegValueT<Slprc_SPEC>;

impl Slprc {
    #[doc = "Start Line PRe-Clip"]
    #[inline(always)]
    pub fn slprc(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Slprc_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Slprc_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Slprc {
    #[inline(always)]
    fn default() -> Slprc {
        <crate::RegValueT<Slprc_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Elprc_SPEC;
impl crate::sealed::RegSpec for Elprc_SPEC {
    type DataType = u32;
}

#[doc = "End Line Pre-Clip Register"]
pub type Elprc = crate::RegValueT<Elprc_SPEC>;

impl Elprc {
    #[doc = "End Line PRe-Clip"]
    #[inline(always)]
    pub fn elprc(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Elprc_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Elprc_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Elprc {
    #[inline(always)]
    fn default() -> Elprc {
        <crate::RegValueT<Elprc_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Spprc_SPEC;
impl crate::sealed::RegSpec for Spprc_SPEC {
    type DataType = u32;
}

#[doc = "Start Pixel Pre-Clip Register"]
pub type Spprc = crate::RegValueT<Spprc_SPEC>;

impl Spprc {
    #[doc = "Start Pixel Pre-Clip"]
    #[inline(always)]
    pub fn spprc(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Spprc_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Spprc_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Spprc {
    #[inline(always)]
    fn default() -> Spprc {
        <crate::RegValueT<Spprc_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Epprc_SPEC;
impl crate::sealed::RegSpec for Epprc_SPEC {
    type DataType = u32;
}

#[doc = "End Pixel Pre-Clip Register"]
pub type Epprc = crate::RegValueT<Epprc_SPEC>;

impl Epprc {
    #[doc = "End Pixel PRe-Clip"]
    #[inline(always)]
    pub fn epprc(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Epprc_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Epprc_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Epprc {
    #[inline(always)]
    fn default() -> Epprc {
        <crate::RegValueT<Epprc_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CsiIfmd_SPEC;
impl crate::sealed::RegSpec for CsiIfmd_SPEC {
    type DataType = u32;
}

#[doc = "CSI2 Interface Mode Register"]
pub type CsiIfmd = crate::RegValueT<CsiIfmd_SPEC>;

impl CsiIfmd {
    #[doc = "Virtual Channel SELect"]
    #[inline(always)]
    pub fn vc_sel(
        self,
    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, CsiIfmd_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0xf,1,0,u8,u8,CsiIfmd_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Data Type select"]
    #[inline(always)]
    pub fn dt(
        self,
    ) -> crate::common::RegisterField<
        8,
        0x3f,
        1,
        0,
        csi_ifmd::Dt,
        csi_ifmd::Dt,
        CsiIfmd_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            8,
            0x3f,
            1,
            0,
            csi_ifmd::Dt,
            csi_ifmd::Dt,
            CsiIfmd_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Data Extension Select"]
    #[inline(always)]
    pub fn des0(
        self,
    ) -> crate::common::RegisterField<
        25,
        0x1,
        1,
        0,
        csi_ifmd::Des0,
        csi_ifmd::Des0,
        CsiIfmd_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            25,
            0x1,
            1,
            0,
            csi_ifmd::Des0,
            csi_ifmd::Des0,
            CsiIfmd_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }
}
impl ::core::default::Default for CsiIfmd {
    #[inline(always)]
    fn default() -> CsiIfmd {
        <crate::RegValueT<CsiIfmd_SPEC> as RegisterValue<_>>::new(33562112)
    }
}
pub mod csi_ifmd {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Dt_SPEC;
    pub type Dt = crate::EnumBitfieldStruct<u8, Dt_SPEC>;
    impl Dt {
        #[doc = "YUV422 8-bit"]
        pub const _0_X_1_E: Self = Self::new(30);

        #[doc = "YUV422 10-bit"]
        pub const _0_X_1_F: Self = Self::new(31);

        #[doc = "RGB888"]
        pub const _0_X_24: Self = Self::new(36);

        #[doc = "RAW 8-bit"]
        pub const _0_X_2_A: Self = Self::new(42);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Des0_SPEC;
    pub type Des0 = crate::EnumBitfieldStruct<u8, Des0_SPEC>;
    impl Des0 {
        #[doc = "Empty bits in the input data are repeatedly expanded from the highest-order bit."]
        pub const _0: Self = Self::new(0);

        #[doc = "Empty bits will be padded with zeros."]
        pub const _1: Self = Self::new(1);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Csifld_SPEC;
impl crate::sealed::RegSpec for Csifld_SPEC {
    type DataType = u32;
}

#[doc = "Field detection control Register"]
pub type Csifld = crate::RegValueT<Csifld_SPEC>;

impl Csifld {
    #[doc = "FieLD detect ENable"]
    #[inline(always)]
    pub fn fld_en(
        self,
    ) -> crate::common::RegisterField<
        0,
        0x1,
        1,
        0,
        csifld::FldEn,
        csifld::FldEn,
        Csifld_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            0,
            0x1,
            1,
            0,
            csifld::FldEn,
            csifld::FldEn,
            Csifld_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "even FieLD DETect SELect"]
    #[inline(always)]
    pub fn fld_sel(
        self,
    ) -> crate::common::RegisterField<
        4,
        0x3,
        1,
        0,
        csifld::FldSel,
        csifld::FldSel,
        Csifld_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            4,
            0x3,
            1,
            0,
            csifld::FldSel,
            csifld::FldSel,
            Csifld_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "even FieLD NUMber setting"]
    #[inline(always)]
    pub fn fld_num(
        self,
    ) -> crate::common::RegisterFieldBool<16, 1, 0, Csifld_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<16, 1, 0, Csifld_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for Csifld {
    #[inline(always)]
    fn default() -> Csifld {
        <crate::RegValueT<Csifld_SPEC> as RegisterValue<_>>::new(16)
    }
}
pub mod csifld {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct FldEn_SPEC;
    pub type FldEn = crate::EnumBitfieldStruct<u8, FldEn_SPEC>;
    impl FldEn {
        #[doc = "Even field detection control disabled"]
        pub const _0: Self = Self::new(0);

        #[doc = "Even field detection control enabled"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct FldSel_SPEC;
    pub type FldSel = crate::EnumBitfieldStruct<u8, FldSel_SPEC>;
    impl FldSel {
        #[doc = "Setting is prohibited."]
        pub const _00: Self = Self::new(0);

        #[doc = "When FLD_NUM matches the field number \\[0\\] bit, the field is detected as an even field."]
        pub const _01: Self = Self::new(1);

        #[doc = "Setting is prohibited."]
        pub const _10: Self = Self::new(2);

        #[doc = "Setting is prohibited."]
        pub const _11: Self = Self::new(3);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Is_SPEC;
impl crate::sealed::RegSpec for Is_SPEC {
    type DataType = u32;
}

#[doc = "Image Stride Register"]
pub type Is = crate::RegValueT<Is_SPEC>;

impl Is {
    #[doc = "Image Stride (Setting unit: pixel)"]
    #[inline(always)]
    pub fn is(
        self,
    ) -> crate::common::RegisterField<0, 0x1fff, 1, 0, u16, u16, Is_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0x1fff,1,0,u16,u16,Is_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Is {
    #[inline(always)]
    fn default() -> Is {
        <crate::RegValueT<Is_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mb1_SPEC;
impl crate::sealed::RegSpec for Mb1_SPEC {
    type DataType = u32;
}

#[doc = "Memory Base 1 Register"]
pub type Mb1 = crate::RegValueT<Mb1_SPEC>;

impl Mb1 {
    #[doc = "Memory Base Address 1"]
    #[inline(always)]
    pub fn mb1(
        self,
    ) -> crate::common::RegisterField<7, 0x1ffffff, 1, 0, u32, u32, Mb1_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<7,0x1ffffff,1,0,u32,u32,Mb1_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Mb1 {
    #[inline(always)]
    fn default() -> Mb1 {
        <crate::RegValueT<Mb1_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mb2_SPEC;
impl crate::sealed::RegSpec for Mb2_SPEC {
    type DataType = u32;
}

#[doc = "Memory Base 2 Register"]
pub type Mb2 = crate::RegValueT<Mb2_SPEC>;

impl Mb2 {
    #[doc = "Memory Base Address 2"]
    #[inline(always)]
    pub fn mb2(
        self,
    ) -> crate::common::RegisterField<7, 0x1ffffff, 1, 0, u32, u32, Mb2_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<7,0x1ffffff,1,0,u32,u32,Mb2_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Mb2 {
    #[inline(always)]
    fn default() -> Mb2 {
        <crate::RegValueT<Mb2_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mb3_SPEC;
impl crate::sealed::RegSpec for Mb3_SPEC {
    type DataType = u32;
}

#[doc = "Memory Base 3 Register"]
pub type Mb3 = crate::RegValueT<Mb3_SPEC>;

impl Mb3 {
    #[doc = "Memory Base Address 3"]
    #[inline(always)]
    pub fn mb3(
        self,
    ) -> crate::common::RegisterField<7, 0x1ffffff, 1, 0, u32, u32, Mb3_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<7,0x1ffffff,1,0,u32,u32,Mb3_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Mb3 {
    #[inline(always)]
    fn default() -> Mb3 {
        <crate::RegValueT<Mb3_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Lc_SPEC;
impl crate::sealed::RegSpec for Lc_SPEC {
    type DataType = u32;
}

#[doc = "Line Count Register"]
pub type Lc = crate::RegValueT<Lc_SPEC>;

impl Lc {
    #[doc = "Line Count"]
    #[inline(always)]
    pub fn lc(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Lc_SPEC, crate::common::R> {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Lc_SPEC,crate::common::R>::from_register(self,0)
    }
}
impl ::core::default::Default for Lc {
    #[inline(always)]
    fn default() -> Lc {
        <crate::RegValueT<Lc_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Ie_SPEC;
impl crate::sealed::RegSpec for Ie_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt Enable Register"]
pub type Ie = crate::RegValueT<Ie_SPEC>;

impl Ie {
    #[doc = "FIFO Overflow Interrupt Enable"]
    #[inline(always)]
    pub fn foe(
        self,
    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ie::Foe, ie::Foe, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x1,1,0,ie::Foe,ie::Foe,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "End of Frame Interrupt Enable"]
    #[inline(always)]
    pub fn efe(
        self,
    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ie::Efe, ie::Efe, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<1,0x1,1,0,ie::Efe,ie::Efe,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Scanline Interrupt Enable"]
    #[inline(always)]
    pub fn sie(
        self,
    ) -> crate::common::RegisterField<2, 0x1, 1, 0, ie::Sie, ie::Sie, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<2,0x1,1,0,ie::Sie,ie::Sie,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Field Interrupt Enable"]
    #[inline(always)]
    pub fn fie(
        self,
    ) -> crate::common::RegisterField<4, 0x1, 1, 0, ie::Fie, ie::Fie, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<4,0x1,1,0,ie::Fie,ie::Fie,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Frame Memory write completion interrupt Enable"]
    #[inline(always)]
    pub fn fme(
        self,
    ) -> crate::common::RegisterField<5, 0x1, 1, 0, ie::Fme, ie::Fme, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<5,0x1,1,0,ie::Fme,ie::Fme,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "PRCLIPH Error interrupt Enable"]
    #[inline(always)]
    pub fn prcliphee(
        self,
    ) -> crate::common::RegisterField<
        8,
        0x1,
        1,
        0,
        ie::Prcliphee,
        ie::Prcliphee,
        Ie_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            8,
            0x1,
            1,
            0,
            ie::Prcliphee,
            ie::Prcliphee,
            Ie_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "PRCLIPV Error interrupt Enable"]
    #[inline(always)]
    pub fn prclipvee(
        self,
    ) -> crate::common::RegisterField<
        9,
        0x1,
        1,
        0,
        ie::Prclipvee,
        ie::Prclipvee,
        Ie_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            9,
            0x1,
            1,
            0,
            ie::Prclipvee,
            ie::Prclipvee,
            Ie_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Response Overflow interrupt Enable"]
    #[inline(always)]
    pub fn roe(
        self,
    ) -> crate::common::RegisterField<14, 0x1, 1, 0, ie::Roe, ie::Roe, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<14,0x1,1,0,ie::Roe,ie::Roe,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Axi Resp Error interrupt Enable"]
    #[inline(always)]
    pub fn aree(
        self,
    ) -> crate::common::RegisterField<15, 0x1, 1, 0, ie::Aree, ie::Aree, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<15,0x1,1,0,ie::Aree,ie::Aree,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "VSYNC Deasserting Detect Interrupt Enable"]
    #[inline(always)]
    pub fn vre(
        self,
    ) -> crate::common::RegisterField<16, 0x1, 1, 0, ie::Vre, ie::Vre, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0x1,1,0,ie::Vre,ie::Vre,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Vsync asserting detect interrupt Enable"]
    #[inline(always)]
    pub fn vfe(
        self,
    ) -> crate::common::RegisterField<17, 0x1, 1, 0, ie::Vfe, ie::Vfe, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<17,0x1,1,0,ie::Vfe,ie::Vfe,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Field Interrupt Enable 2"]
    #[inline(always)]
    pub fn fie2(
        self,
    ) -> crate::common::RegisterField<31, 0x1, 1, 0, ie::Fie2, ie::Fie2, Ie_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<31,0x1,1,0,ie::Fie2,ie::Fie2,Ie_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Ie {
    #[inline(always)]
    fn default() -> Ie {
        <crate::RegValueT<Ie_SPEC> as RegisterValue<_>>::new(0)
    }
}
pub mod ie {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Foe_SPEC;
    pub type Foe = crate::EnumBitfieldStruct<u8, Foe_SPEC>;
    impl Foe {
        #[doc = "FIFO overflow interrupts are disabled."]
        pub const _0: Self = Self::new(0);

        #[doc = "FIFO overflow interrupts are enabled."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Efe_SPEC;
    pub type Efe = crate::EnumBitfieldStruct<u8, Efe_SPEC>;
    impl Efe {
        #[doc = "End of frame interrupts are disabled."]
        pub const _0: Self = Self::new(0);

        #[doc = "End of frame interrupts are enabled."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Sie_SPEC;
    pub type Sie = crate::EnumBitfieldStruct<u8, Sie_SPEC>;
    impl Sie {
        #[doc = "Scanline interrupts are disabled."]
        pub const _0: Self = Self::new(0);

        #[doc = "Scanline interrupts are enabled."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Fie_SPEC;
    pub type Fie = crate::EnumBitfieldStruct<u8, Fie_SPEC>;
    impl Fie {
        #[doc = "Field-switching interrupts are disabled."]
        pub const _0: Self = Self::new(0);

        #[doc = "Field-switching interrupts are enabled."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Fme_SPEC;
    pub type Fme = crate::EnumBitfieldStruct<u8, Fme_SPEC>;
    impl Fme {
        #[doc = "Memory write completion interrupt disabled"]
        pub const _0: Self = Self::new(0);

        #[doc = "Memory write completion interrupt enabled"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Prcliphee_SPEC;
    pub type Prcliphee = crate::EnumBitfieldStruct<u8, Prcliphee_SPEC>;
    impl Prcliphee {
        #[doc = "PRCLIPH error detection interrupt disabled"]
        pub const _0: Self = Self::new(0);

        #[doc = "PRCLIPH error detection interrupt enabled"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Prclipvee_SPEC;
    pub type Prclipvee = crate::EnumBitfieldStruct<u8, Prclipvee_SPEC>;
    impl Prclipvee {
        #[doc = "PRCLIPV error detection interrupt disabled"]
        pub const _0: Self = Self::new(0);

        #[doc = "PRCLIPV error detection interrupt enabled"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Roe_SPEC;
    pub type Roe = crate::EnumBitfieldStruct<u8, Roe_SPEC>;
    impl Roe {
        #[doc = "Response overflow detection interrupt disabled"]
        pub const _0: Self = Self::new(0);

        #[doc = "Response overflow detection interrupt enabled"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Aree_SPEC;
    pub type Aree = crate::EnumBitfieldStruct<u8, Aree_SPEC>;
    impl Aree {
        #[doc = "AXI Resp error detection interrupt disabled"]
        pub const _0: Self = Self::new(0);

        #[doc = "AXI Resp error detection interrupt enabled"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Vre_SPEC;
    pub type Vre = crate::EnumBitfieldStruct<u8, Vre_SPEC>;
    impl Vre {
        #[doc = "VSYNC deasserting detect interrupts are disabled."]
        pub const _0: Self = Self::new(0);

        #[doc = "VSYNC deasserting detect interrupts are enabled."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Vfe_SPEC;
    pub type Vfe = crate::EnumBitfieldStruct<u8, Vfe_SPEC>;
    impl Vfe {
        #[doc = "VSYNC asserting detect interrupts are disabled."]
        pub const _0: Self = Self::new(0);

        #[doc = "VSYNC asserting detect interrupts are enabled."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Fie2_SPEC;
    pub type Fie2 = crate::EnumBitfieldStruct<u8, Fie2_SPEC>;
    impl Fie2 {
        #[doc = "Field interrupts are disabled."]
        pub const _0: Self = Self::new(0);

        #[doc = "Field interrupts are enabled."]
        pub const _1: Self = Self::new(1);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Ints_SPEC;
impl crate::sealed::RegSpec for Ints_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt Status Register"]
pub type Ints = crate::RegValueT<Ints_SPEC>;

impl Ints {
    #[doc = "FIFO Overflow Interrupt Status"]
    #[inline(always)]
    pub fn fos(self) -> crate::common::RegisterFieldBool<0, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "End of Frame Interrupt Status"]
    #[inline(always)]
    pub fn efs(self) -> crate::common::RegisterFieldBool<1, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<1, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Scanline Interrupt Status"]
    #[inline(always)]
    pub fn sis(self) -> crate::common::RegisterFieldBool<2, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<2, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Field Interrupt Status"]
    #[inline(always)]
    pub fn fis(self) -> crate::common::RegisterFieldBool<4, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<4, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Frame Memory write completion interrupt Status"]
    #[inline(always)]
    pub fn fms(self) -> crate::common::RegisterFieldBool<5, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<5, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "PRCLIPH Error interrupt Status"]
    #[inline(always)]
    pub fn prcliphes(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "PRCLIPV Error interrupt Status"]
    #[inline(always)]
    pub fn prclipves(
        self,
    ) -> crate::common::RegisterFieldBool<9, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<9, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Response Overflow interrupt Status"]
    #[inline(always)]
    pub fn ros(self) -> crate::common::RegisterFieldBool<14, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<14, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Axi Resp Error interrupt Status"]
    #[inline(always)]
    pub fn ares(self) -> crate::common::RegisterFieldBool<15, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<15, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "VSYNC Deasserting Detect Interrupt Status"]
    #[inline(always)]
    pub fn vrs(self) -> crate::common::RegisterFieldBool<16, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<16, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "VSYNC Asserting Detect Interrupt Status"]
    #[inline(always)]
    pub fn vfs(self) -> crate::common::RegisterFieldBool<17, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<17, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Field Interrupt Status 2"]
    #[inline(always)]
    pub fn fis2(self) -> crate::common::RegisterFieldBool<31, 1, 0, Ints_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<31, 1, 0, Ints_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for Ints {
    #[inline(always)]
    fn default() -> Ints {
        <crate::RegValueT<Ints_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Si_SPEC;
impl crate::sealed::RegSpec for Si_SPEC {
    type DataType = u32;
}

#[doc = "Scanline Interrupt Register"]
pub type Si = crate::RegValueT<Si_SPEC>;

impl Si {
    #[doc = "Scanline Interrupt Setting"]
    #[inline(always)]
    pub fn si(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Si_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Si_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Si {
    #[inline(always)]
    fn default() -> Si {
        <crate::RegValueT<Si_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mtcstop_SPEC;
impl crate::sealed::RegSpec for Mtcstop_SPEC {
    type DataType = u32;
}

#[doc = "AXI transfer stop control register"]
pub type Mtcstop = crate::RegValueT<Mtcstop_SPEC>;

impl Mtcstop {
    #[doc = "axi forced STOP REQuest"]
    #[inline(always)]
    pub fn stopreq(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, Mtcstop_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, Mtcstop_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "for axi forced STOP request, ACKnowledgement"]
    #[inline(always)]
    pub fn stopack(
        self,
    ) -> crate::common::RegisterFieldBool<1, 1, 0, Mtcstop_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<1, 1, 0, Mtcstop_SPEC, crate::common::R>::from_register(
            self, 0,
        )
    }

    #[doc = "OUTSTANDing current number"]
    #[inline(always)]
    pub fn outstand(
        self,
    ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, Mtcstop_SPEC, crate::common::R> {
        crate::common::RegisterField::<16,0x3f,1,0,u8,u8,Mtcstop_SPEC,crate::common::R>::from_register(self,0)
    }
}
impl ::core::default::Default for Mtcstop {
    #[inline(always)]
    fn default() -> Mtcstop {
        <crate::RegValueT<Mtcstop_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Dmr_SPEC;
impl crate::sealed::RegSpec for Dmr_SPEC {
    type DataType = u32;
}

#[doc = "Data Mode Register"]
pub type Dmr = crate::RegValueT<Dmr_SPEC>;

impl Dmr {
    #[doc = "Data Conversion Mode"]
    #[inline(always)]
    pub fn dtmd(
        self,
    ) -> crate::common::RegisterField<0, 0x3, 1, 0, dmr::Dtmd, dmr::Dtmd, Dmr_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<
            0,
            0x3,
            1,
            0,
            dmr::Dtmd,
            dmr::Dtmd,
            Dmr_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Alpha Bit"]
    #[inline(always)]
    pub fn abit(
        self,
    ) -> crate::common::RegisterField<2, 0x1, 1, 0, dmr::Abit, dmr::Abit, Dmr_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<
            2,
            0x1,
            1,
            0,
            dmr::Abit,
            dmr::Abit,
            Dmr_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Output Data Byte Swap Mode"]
    #[inline(always)]
    pub fn bpsm(
        self,
    ) -> crate::common::RegisterField<4, 0x1, 1, 0, dmr::Bpsm, dmr::Bpsm, Dmr_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<
            4,
            0x1,
            1,
            0,
            dmr::Bpsm,
            dmr::Bpsm,
            Dmr_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Extension RGB Conversion Mode"]
    #[inline(always)]
    pub fn exrgb(
        self,
    ) -> crate::common::RegisterField<
        8,
        0x1,
        1,
        0,
        dmr::Exrgb,
        dmr::Exrgb,
        Dmr_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            8,
            0x1,
            1,
            0,
            dmr::Exrgb,
            dmr::Exrgb,
            Dmr_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "YC Data Through Mode"]
    #[inline(always)]
    pub fn yc_thr(
        self,
    ) -> crate::common::RegisterField<
        11,
        0x1,
        1,
        0,
        dmr::YcThr,
        dmr::YcThr,
        Dmr_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            11,
            0x1,
            1,
            0,
            dmr::YcThr,
            dmr::YcThr,
            Dmr_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "YC Data Transfer Mode"]
    #[inline(always)]
    pub fn ymode(
        self,
    ) -> crate::common::RegisterField<
        12,
        0x7,
        1,
        0,
        dmr::Ymode,
        dmr::Ymode,
        Dmr_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            12,
            0x7,
            1,
            0,
            dmr::Ymode,
            dmr::Ymode,
            Dmr_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Alpha 8"]
    #[inline(always)]
    pub fn a8bit(
        self,
    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Dmr_SPEC, crate::common::RW> {
        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Dmr_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Dmr {
    #[inline(always)]
    fn default() -> Dmr {
        <crate::RegValueT<Dmr_SPEC> as RegisterValue<_>>::new(0)
    }
}
pub mod dmr {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Dtmd_SPEC;
    pub type Dtmd = crate::EnumBitfieldStruct<u8, Dtmd_SPEC>;
    impl Dtmd {
        #[doc = "Data is not converted."]
        pub const _00: Self = Self::new(0);

        #[doc = "RGB is converted to ARGB before output."]
        pub const _01: Self = Self::new(1);

        #[doc = "YC is separated before output."]
        pub const _10: Self = Self::new(2);

        #[doc = "Setting prohibited"]
        pub const _11: Self = Self::new(3);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Abit_SPEC;
    pub type Abit = crate::EnumBitfieldStruct<u8, Abit_SPEC>;
    impl Abit {
        #[doc = "The alpha value is set to 0."]
        pub const _0: Self = Self::new(0);

        #[doc = "The alpha value is set to 1."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Bpsm_SPEC;
    pub type Bpsm = crate::EnumBitfieldStruct<u8, Bpsm_SPEC>;
    impl Bpsm {
        #[doc = "Bytes are not swapped in output data."]
        pub const _0: Self = Self::new(0);

        #[doc = "Bytes are swapped in output data."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Exrgb_SPEC;
    pub type Exrgb = crate::EnumBitfieldStruct<u8, Exrgb_SPEC>;
    impl Exrgb {
        #[doc = "RGB data extension processing is not performed."]
        pub const _0: Self = Self::new(0);

        #[doc = "Data is extended to 32-bit RGB conversion when DTMD\\[1:0\\] is set to 00 or 01 as the data conversion mode."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct YcThr_SPEC;
    pub type YcThr = crate::EnumBitfieldStruct<u8, YcThr_SPEC>;
    impl YcThr {
        #[doc = "Y and CbCr data are transferred to memory in accordance with the setting in the YMODE\\[2:0\\] bits."]
        pub const _0: Self = Self::new(0);

        #[doc = "Y and CbCr data are transferred to memory as 10-bit data in accordance with the input format."]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Ymode_SPEC;
    pub type Ymode = crate::EnumBitfieldStruct<u8, Ymode_SPEC>;
    impl Ymode {
        #[doc = "Both Y and CbCr data are transferred to memory."]
        pub const _000: Self = Self::new(0);

        #[doc = "Only Y data is transferred to memory as 8-bit data."]
        pub const _001: Self = Self::new(1);

        #[doc = "10-bit Y data and 8-bit CbCr data are transferred to memory"]
        pub const _010: Self = Self::new(2);

        #[doc = "Only Y data is transferred to memory as 10-bit data"]
        pub const _011: Self = Self::new(3);

        #[doc = "Setting prohibited"]
        pub const _100: Self = Self::new(4);

        #[doc = "Setting prohibited"]
        pub const _101: Self = Self::new(5);

        #[doc = "Setting prohibited"]
        pub const _110: Self = Self::new(6);

        #[doc = "Setting prohibited"]
        pub const _111: Self = Self::new(7);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Uvaof_SPEC;
impl crate::sealed::RegSpec for Uvaof_SPEC {
    type DataType = u32;
}

#[doc = "UV Address Offset Register"]
pub type Uvaof = crate::RegValueT<Uvaof_SPEC>;

impl Uvaof {
    #[doc = "UV Data Address Offset"]
    #[inline(always)]
    pub fn uvaof(
        self,
    ) -> crate::common::RegisterField<7, 0x1ffffff, 1, 0, u32, u32, Uvaof_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<7,0x1ffffff,1,0,u32,u32,Uvaof_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Uvaof {
    #[inline(always)]
    fn default() -> Uvaof {
        <crate::RegValueT<Uvaof_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct UdsCtrl_SPEC;
impl crate::sealed::RegSpec for UdsCtrl_SPEC {
    type DataType = u32;
}

#[doc = "Scaling Control Registers"]
pub type UdsCtrl = crate::RegValueT<UdsCtrl_SPEC>;

impl UdsCtrl {
    #[doc = "B/Cb Interpolation Method When Bilinear/Nearest Neighbor Interpolation is Selected"]
    #[inline(always)]
    pub fn ne_bcb(
        self,
    ) -> crate::common::RegisterField<
        16,
        0x1,
        1,
        0,
        uds_ctrl::NeBcb,
        uds_ctrl::NeBcb,
        UdsCtrl_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            16,
            0x1,
            1,
            0,
            uds_ctrl::NeBcb,
            uds_ctrl::NeBcb,
            UdsCtrl_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "G/Y Interpolation Method When Bilinear/Nearest Neighbor Interpolation is Selected"]
    #[inline(always)]
    pub fn ne_gy(
        self,
    ) -> crate::common::RegisterField<
        17,
        0x1,
        1,
        0,
        uds_ctrl::NeGy,
        uds_ctrl::NeGy,
        UdsCtrl_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            17,
            0x1,
            1,
            0,
            uds_ctrl::NeGy,
            uds_ctrl::NeGy,
            UdsCtrl_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "R/Cr Interpolation Method When Bilinear/Nearest Neighbor Interpolation is Selected"]
    #[inline(always)]
    pub fn ne_rcr(
        self,
    ) -> crate::common::RegisterField<
        18,
        0x1,
        1,
        0,
        uds_ctrl::NeRcr,
        uds_ctrl::NeRcr,
        UdsCtrl_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            18,
            0x1,
            1,
            0,
            uds_ctrl::NeRcr,
            uds_ctrl::NeRcr,
            UdsCtrl_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Pixel Component Interpolation Method at Scale-Up/Down"]
    #[inline(always)]
    pub fn bc(
        self,
    ) -> crate::common::RegisterField<
        20,
        0x1,
        1,
        0,
        uds_ctrl::Bc,
        uds_ctrl::Bc,
        UdsCtrl_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            20,
            0x1,
            1,
            0,
            uds_ctrl::Bc,
            uds_ctrl::Bc,
            UdsCtrl_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "BiLinear or nearest neighbor interpolation characteristic ADVanced mode"]
    #[inline(always)]
    pub fn bladv(
        self,
    ) -> crate::common::RegisterFieldBool<28, 1, 0, UdsCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<28, 1, 0, UdsCtrl_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Advanced MoDe: Pixel Count at Scale-Up"]
    #[inline(always)]
    pub fn amd(
        self,
    ) -> crate::common::RegisterField<
        30,
        0x1,
        1,
        0,
        uds_ctrl::Amd,
        uds_ctrl::Amd,
        UdsCtrl_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            30,
            0x1,
            1,
            0,
            uds_ctrl::Amd,
            uds_ctrl::Amd,
            UdsCtrl_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }
}
impl ::core::default::Default for UdsCtrl {
    #[inline(always)]
    fn default() -> UdsCtrl {
        <crate::RegValueT<UdsCtrl_SPEC> as RegisterValue<_>>::new(0)
    }
}
pub mod uds_ctrl {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct NeBcb_SPEC;
    pub type NeBcb = crate::EnumBitfieldStruct<u8, NeBcb_SPEC>;
    impl NeBcb {
        #[doc = "Bilinear method"]
        pub const _0: Self = Self::new(0);

        #[doc = "Nearest neighbor method"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct NeGy_SPEC;
    pub type NeGy = crate::EnumBitfieldStruct<u8, NeGy_SPEC>;
    impl NeGy {
        #[doc = "Bilinear method"]
        pub const _0: Self = Self::new(0);

        #[doc = "Nearest neighbor method"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct NeRcr_SPEC;
    pub type NeRcr = crate::EnumBitfieldStruct<u8, NeRcr_SPEC>;
    impl NeRcr {
        #[doc = "Bilinear method"]
        pub const _0: Self = Self::new(0);

        #[doc = "Nearest neighbor method"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Bc_SPEC;
    pub type Bc = crate::EnumBitfieldStruct<u8, Bc_SPEC>;
    impl Bc {
        #[doc = "Bilinear or nearest neighbor interpolation method is used"]
        pub const _0: Self = Self::new(0);

        #[doc = "Interpolation method equivalent to 4 to 17 taps in accordance with the scaling factor is used (multi-tap mode)"]
        pub const _1: Self = Self::new(1);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Amd_SPEC;
    pub type Amd = crate::EnumBitfieldStruct<u8, Amd_SPEC>;
    impl Amd {
        #[doc = "Pixel count after scale-up is 1 + < (n - 1) × scale-up factor>"]
        pub const _0: Self = Self::new(0);

        #[doc = "Pixel count after scale-up is <n × scale-up factor>"]
        pub const _1: Self = Self::new(1);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct UdsScale_SPEC;
impl crate::sealed::RegSpec for UdsScale_SPEC {
    type DataType = u32;
}

#[doc = "Scaling Factor Registers"]
pub type UdsScale = crate::RegValueT<UdsScale_SPEC>;

impl UdsScale {
    #[doc = "Multiplier (Fractional Part) of Vertical Scaling Factor"]
    #[inline(always)]
    pub fn vfrac(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, UdsScale_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,UdsScale_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Multiplier (Integral Part) of Vertical Scaling Factor"]
    #[inline(always)]
    pub fn vmant(
        self,
    ) -> crate::common::RegisterField<12, 0xf, 1, 0, u8, u8, UdsScale_SPEC, crate::common::RW> {
        crate::common::RegisterField::<12,0xf,1,0,u8,u8,UdsScale_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Multiplier (Fractional Part) of Horizontal Scaling Factor"]
    #[inline(always)]
    pub fn hfrac(
        self,
    ) -> crate::common::RegisterField<16, 0xfff, 1, 0, u16, u16, UdsScale_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0xfff,1,0,u16,u16,UdsScale_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Multiplier (Integral Part) of Horizontal Scaling Factor"]
    #[inline(always)]
    pub fn hmant(
        self,
    ) -> crate::common::RegisterField<28, 0xf, 1, 0, u8, u8, UdsScale_SPEC, crate::common::RW> {
        crate::common::RegisterField::<28,0xf,1,0,u8,u8,UdsScale_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for UdsScale {
    #[inline(always)]
    fn default() -> UdsScale {
        <crate::RegValueT<UdsScale_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct UdsPassBwidth_SPEC;
impl crate::sealed::RegSpec for UdsPassBwidth_SPEC {
    type DataType = u32;
}

#[doc = "Passband Registers"]
pub type UdsPassBwidth = crate::RegValueT<UdsPassBwidth_SPEC>;

impl UdsPassBwidth {
    #[doc = "Vertical Signal Passband at Image Scale-Up/Down"]
    #[inline(always)]
    pub fn bwidth_v(
        self,
    ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, UdsPassBwidth_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x7f,1,0,u8,u8,UdsPassBwidth_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Horizontal Signal Passband at Image Scale-Up/Down"]
    #[inline(always)]
    pub fn bwidth_h(
        self,
    ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, UdsPassBwidth_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0x7f,1,0,u8,u8,UdsPassBwidth_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for UdsPassBwidth {
    #[inline(always)]
    fn default() -> UdsPassBwidth {
        <crate::RegValueT<UdsPassBwidth_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct UdsClipSize_SPEC;
impl crate::sealed::RegSpec for UdsClipSize_SPEC {
    type DataType = u32;
}

#[doc = "UDS Output Size Clipping Registers"]
pub type UdsClipSize = crate::RegValueT<UdsClipSize_SPEC>;

impl UdsClipSize {
    #[doc = "Clipping Size of Vertical Pixel Count after Scale-Up/-Down"]
    #[inline(always)]
    pub fn cl_vsize(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, UdsClipSize_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,UdsClipSize_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Clipping Size of Horizontal Pixel Count after Scale-Up/-Down"]
    #[inline(always)]
    pub fn cl_hsize(
        self,
    ) -> crate::common::RegisterField<16, 0xfff, 1, 0, u16, u16, UdsClipSize_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0xfff,1,0,u16,u16,UdsClipSize_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for UdsClipSize {
    #[inline(always)]
    fn default() -> UdsClipSize {
        <crate::RegValueT<UdsClipSize_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Lutp_SPEC;
impl crate::sealed::RegSpec for Lutp_SPEC {
    type DataType = u32;
}

#[doc = "Lookup Table Pointer Register"]
pub type Lutp = crate::RegValueT<Lutp_SPEC>;

impl Lutp {
    #[doc = "Lookup Table Cr Pointer"]
    #[inline(always)]
    pub fn ltcrpr(
        self,
    ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Lutp_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Lutp_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Lookup Table Cb Pointer"]
    #[inline(always)]
    pub fn ltcbpr(
        self,
    ) -> crate::common::RegisterField<10, 0x3ff, 1, 0, u16, u16, Lutp_SPEC, crate::common::RW> {
        crate::common::RegisterField::<10,0x3ff,1,0,u16,u16,Lutp_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Lookup Table Y Pointer"]
    #[inline(always)]
    pub fn ltypr(
        self,
    ) -> crate::common::RegisterField<20, 0x3ff, 1, 0, u16, u16, Lutp_SPEC, crate::common::RW> {
        crate::common::RegisterField::<20,0x3ff,1,0,u16,u16,Lutp_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Lutp {
    #[inline(always)]
    fn default() -> Lutp {
        <crate::RegValueT<Lutp_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Lutd_SPEC;
impl crate::sealed::RegSpec for Lutd_SPEC {
    type DataType = u32;
}

#[doc = "Lookup Table Data Register"]
pub type Lutd = crate::RegValueT<Lutd_SPEC>;

impl Lutd {
    #[doc = "Lookup Table Cr Data"]
    #[inline(always)]
    pub fn ltcrdt(
        self,
    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Lutd_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Lutd_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Lookup Table Cb Data"]
    #[inline(always)]
    pub fn ltcbdt(
        self,
    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Lutd_SPEC, crate::common::RW> {
        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Lutd_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Lookup Table Y Data"]
    #[inline(always)]
    pub fn ltydt(
        self,
    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Lutd_SPEC, crate::common::RW> {
        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Lutd_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Lutd {
    #[inline(always)]
    fn default() -> Lutd {
        <crate::RegValueT<Lutd_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Yccr1_SPEC;
impl crate::sealed::RegSpec for Yccr1_SPEC {
    type DataType = u32;
}

#[doc = "RGB to Y Calculation Setting Register 1"]
pub type Yccr1 = crate::RegValueT<Yccr1_SPEC>;

impl Yccr1 {
    #[doc = "R Multiplication Coefficient for Y Calculation"]
    #[inline(always)]
    pub fn yclrp(
        self,
    ) -> crate::common::RegisterField<0, 0x1fff, 1, 0, u16, u16, Yccr1_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x1fff,1,0,u16,u16,Yccr1_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Yccr1 {
    #[inline(always)]
    fn default() -> Yccr1 {
        <crate::RegValueT<Yccr1_SPEC> as RegisterValue<_>>::new(263)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Yccr2_SPEC;
impl crate::sealed::RegSpec for Yccr2_SPEC {
    type DataType = u32;
}

#[doc = "RGB to Y Calculation Setting Register 2"]
pub type Yccr2 = crate::RegValueT<Yccr2_SPEC>;

impl Yccr2 {
    #[doc = "G Multiplication Coefficient for Y Calculation"]
    #[inline(always)]
    pub fn yclgp(
        self,
    ) -> crate::common::RegisterField<0, 0x1fff, 1, 0, u16, u16, Yccr2_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x1fff,1,0,u16,u16,Yccr2_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "B Multiplication Coefficient for Y Calculation"]
    #[inline(always)]
    pub fn yclbp(
        self,
    ) -> crate::common::RegisterField<16, 0x1fff, 1, 0, u16, u16, Yccr2_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0x1fff,1,0,u16,u16,Yccr2_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Yccr2 {
    #[inline(always)]
    fn default() -> Yccr2 {
        <crate::RegValueT<Yccr2_SPEC> as RegisterValue<_>>::new(6554116)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Yccr3_SPEC;
impl crate::sealed::RegSpec for Yccr3_SPEC {
    type DataType = u32;
}

#[doc = "RGB to Y Calculation Setting Register 3"]
pub type Yccr3 = crate::RegValueT<Yccr3_SPEC>;

impl Yccr3 {
    #[doc = "Y Calculation Data Normalized Additional Value"]
    #[inline(always)]
    pub fn yclap(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Yccr3_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Yccr3_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Y Calculation Shift Down Result Round-Off Enable"]
    #[inline(always)]
    pub fn yclhen(
        self,
    ) -> crate::common::RegisterField<
        23,
        0x1,
        1,
        0,
        yccr3::Yclhen,
        yccr3::Yclhen,
        Yccr3_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            23,
            0x1,
            1,
            0,
            yccr3::Yclhen,
            yccr3::Yclhen,
            Yccr3_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Y Calculation Shift Down Volume"]
    #[inline(always)]
    pub fn yclsft(
        self,
    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, Yccr3_SPEC, crate::common::RW> {
        crate::common::RegisterField::<24,0x1f,1,0,u8,u8,Yccr3_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Yccr3 {
    #[inline(always)]
    fn default() -> Yccr3 {
        <crate::RegValueT<Yccr3_SPEC> as RegisterValue<_>>::new(2315321600)
    }
}
pub mod yccr3 {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Yclhen_SPEC;
    pub type Yclhen = crate::EnumBitfieldStruct<u8, Yclhen_SPEC>;
    impl Yclhen {
        #[doc = "Round down to down shift process"]
        pub const _0: Self = Self::new(0);

        #[doc = "Round-off to down shift process is enabled."]
        pub const _1: Self = Self::new(1);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cbccr1_SPEC;
impl crate::sealed::RegSpec for Cbccr1_SPEC {
    type DataType = u32;
}

#[doc = "RGB to Cb Calculation Setting Register 1"]
pub type Cbccr1 = crate::RegValueT<Cbccr1_SPEC>;

impl Cbccr1 {
    #[doc = "R Multiplication Coefficient for Cb Calculation"]
    #[inline(always)]
    pub fn cbclrp(
        self,
    ) -> crate::common::RegisterField<0, 0x1fff, 1, 0, u16, u16, Cbccr1_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x1fff,1,0,u16,u16,Cbccr1_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Cbccr1 {
    #[inline(always)]
    fn default() -> Cbccr1 {
        <crate::RegValueT<Cbccr1_SPEC> as RegisterValue<_>>::new(8040)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cbccr2_SPEC;
impl crate::sealed::RegSpec for Cbccr2_SPEC {
    type DataType = u32;
}

#[doc = "RGB to Cb Calculation Setting Register 2"]
pub type Cbccr2 = crate::RegValueT<Cbccr2_SPEC>;

impl Cbccr2 {
    #[doc = "G Multiplication Coefficient for Cb Calculation"]
    #[inline(always)]
    pub fn cbclgp(
        self,
    ) -> crate::common::RegisterField<0, 0x1fff, 1, 0, u16, u16, Cbccr2_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x1fff,1,0,u16,u16,Cbccr2_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "B Multiplication Coefficient for Cb Calculation"]
    #[inline(always)]
    pub fn cbclbp(
        self,
    ) -> crate::common::RegisterField<16, 0x1fff, 1, 0, u16, u16, Cbccr2_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0x1fff,1,0,u16,u16,Cbccr2_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Cbccr2 {
    #[inline(always)]
    fn default() -> Cbccr2 {
        <crate::RegValueT<Cbccr2_SPEC> as RegisterValue<_>>::new(29499094)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cbccr3_SPEC;
impl crate::sealed::RegSpec for Cbccr3_SPEC {
    type DataType = u32;
}

#[doc = "RGB to Cb Calculation Setting Register 3"]
pub type Cbccr3 = crate::RegValueT<Cbccr3_SPEC>;

impl Cbccr3 {
    #[doc = "Cb Calculation Data Normalized Additional Value"]
    #[inline(always)]
    pub fn cbclap(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Cbccr3_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Cbccr3_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Cb Calculation Shift Down Result Round-Off Enable"]
    #[inline(always)]
    pub fn cbclhen(
        self,
    ) -> crate::common::RegisterField<
        23,
        0x1,
        1,
        0,
        cbccr3::Cbclhen,
        cbccr3::Cbclhen,
        Cbccr3_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            23,
            0x1,
            1,
            0,
            cbccr3::Cbclhen,
            cbccr3::Cbclhen,
            Cbccr3_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Cb Calculation Shift Down Volume"]
    #[inline(always)]
    pub fn cbclsft(
        self,
    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, Cbccr3_SPEC, crate::common::RW> {
        crate::common::RegisterField::<24,0x1f,1,0,u8,u8,Cbccr3_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Cbccr3 {
    #[inline(always)]
    fn default() -> Cbccr3 {
        <crate::RegValueT<Cbccr3_SPEC> as RegisterValue<_>>::new(2315323392)
    }
}
pub mod cbccr3 {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Cbclhen_SPEC;
    pub type Cbclhen = crate::EnumBitfieldStruct<u8, Cbclhen_SPEC>;
    impl Cbclhen {
        #[doc = "Round down to down shift process"]
        pub const _0: Self = Self::new(0);

        #[doc = "Round-off to down shift process is enabled."]
        pub const _1: Self = Self::new(1);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Crccr1_SPEC;
impl crate::sealed::RegSpec for Crccr1_SPEC {
    type DataType = u32;
}

#[doc = "RGB to Cr Calculation Setting Register 1"]
pub type Crccr1 = crate::RegValueT<Crccr1_SPEC>;

impl Crccr1 {
    #[doc = "R Multiplication Coefficient for Cr Calculation"]
    #[inline(always)]
    pub fn crclrp(
        self,
    ) -> crate::common::RegisterField<0, 0x1fff, 1, 0, u16, u16, Crccr1_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x1fff,1,0,u16,u16,Crccr1_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Crccr1 {
    #[inline(always)]
    fn default() -> Crccr1 {
        <crate::RegValueT<Crccr1_SPEC> as RegisterValue<_>>::new(450)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Crccr2_SPEC;
impl crate::sealed::RegSpec for Crccr2_SPEC {
    type DataType = u32;
}

#[doc = "RGB to Cr Calculation Setting Register 2"]
pub type Crccr2 = crate::RegValueT<Crccr2_SPEC>;

impl Crccr2 {
    #[doc = "G Multiplication Coefficient for Cr Calculation"]
    #[inline(always)]
    pub fn crclgp(
        self,
    ) -> crate::common::RegisterField<0, 0x1fff, 1, 0, u16, u16, Crccr2_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x1fff,1,0,u16,u16,Crccr2_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "B Multiplication Coefficient for Cr Calculation"]
    #[inline(always)]
    pub fn crclbp(
        self,
    ) -> crate::common::RegisterField<16, 0x1fff, 1, 0, u16, u16, Crccr2_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0x1fff,1,0,u16,u16,Crccr2_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Crccr2 {
    #[inline(always)]
    fn default() -> Crccr2 {
        <crate::RegValueT<Crccr2_SPEC> as RegisterValue<_>>::new(532094599)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Crccr3_SPEC;
impl crate::sealed::RegSpec for Crccr3_SPEC {
    type DataType = u32;
}

#[doc = "RGB to Cr Calculation Setting Register 3"]
pub type Crccr3 = crate::RegValueT<Crccr3_SPEC>;

impl Crccr3 {
    #[doc = "Cr Calculation Data Normalized Additional Value"]
    #[inline(always)]
    pub fn crclap(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Crccr3_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Crccr3_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Cr Calculation Shift Down Result Round-Off Enable"]
    #[inline(always)]
    pub fn crclhen(
        self,
    ) -> crate::common::RegisterField<
        23,
        0x1,
        1,
        0,
        crccr3::Crclhen,
        crccr3::Crclhen,
        Crccr3_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            23,
            0x1,
            1,
            0,
            crccr3::Crclhen,
            crccr3::Crclhen,
            Crccr3_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Cr Calculation Shift Down Volume"]
    #[inline(always)]
    pub fn crclsft(
        self,
    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, Crccr3_SPEC, crate::common::RW> {
        crate::common::RegisterField::<24,0x1f,1,0,u8,u8,Crccr3_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Crccr3 {
    #[inline(always)]
    fn default() -> Crccr3 {
        <crate::RegValueT<Crccr3_SPEC> as RegisterValue<_>>::new(2315323392)
    }
}
pub mod crccr3 {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Crclhen_SPEC;
    pub type Crclhen = crate::EnumBitfieldStruct<u8, Crclhen_SPEC>;
    impl Crclhen {
        #[doc = "Round down to down shift process"]
        pub const _0: Self = Self::new(0);

        #[doc = "Round-off to down shift process is enabled."]
        pub const _1: Self = Self::new(1);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Csce1_SPEC;
impl crate::sealed::RegSpec for Csce1_SPEC {
    type DataType = u32;
}

#[doc = "YC to RGB Calculation Setting Extension Register 1"]
pub type Csce1 = crate::RegValueT<Csce1_SPEC>;

impl Csce1 {
    #[doc = "Y Multiplication Coefficient 2 for RGB Calculation"]
    #[inline(always)]
    pub fn ymul2(
        self,
    ) -> crate::common::RegisterField<0, 0x3fff, 1, 0, u16, u16, Csce1_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x3fff,1,0,u16,u16,Csce1_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "ROUND off enable"]
    #[inline(always)]
    pub fn round(
        self,
    ) -> crate::common::RegisterField<
        16,
        0x1,
        1,
        0,
        csce1::Round,
        csce1::Round,
        Csce1_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            16,
            0x1,
            1,
            0,
            csce1::Round,
            csce1::Round,
            Csce1_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }
}
impl ::core::default::Default for Csce1 {
    #[inline(always)]
    fn default() -> Csce1 {
        <crate::RegValueT<Csce1_SPEC> as RegisterValue<_>>::new(4767)
    }
}
pub mod csce1 {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Round_SPEC;
    pub type Round = crate::EnumBitfieldStruct<u8, Round_SPEC>;
    impl Round {
        #[doc = "Round down"]
        pub const _0: Self = Self::new(0);

        #[doc = "Round off"]
        pub const _1: Self = Self::new(1);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Csce2_SPEC;
impl crate::sealed::RegSpec for Csce2_SPEC {
    type DataType = u32;
}

#[doc = "YC to RGB Calculation Setting Extension Register 2"]
pub type Csce2 = crate::RegValueT<Csce2_SPEC>;

impl Csce2 {
    #[doc = "CbCr Subtraction Coefficient 2 for RGB Calculation"]
    #[inline(always)]
    pub fn csub2(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Csce2_SPEC, crate::common::RW> {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Csce2_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Y Subtraction Coefficient 2 for RGB Calculation"]
    #[inline(always)]
    pub fn ysub2(
        self,
    ) -> crate::common::RegisterField<16, 0xfff, 1, 0, u16, u16, Csce2_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0xfff,1,0,u16,u16,Csce2_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Csce2 {
    #[inline(always)]
    fn default() -> Csce2 {
        <crate::RegValueT<Csce2_SPEC> as RegisterValue<_>>::new(16779264)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Csce3_SPEC;
impl crate::sealed::RegSpec for Csce3_SPEC {
    type DataType = u32;
}

#[doc = "YC to RGB Calculation Setting Extension Register 3"]
pub type Csce3 = crate::RegValueT<Csce3_SPEC>;

impl Csce3 {
    #[doc = "Cr Multiplication Coefficient 2 for G Calculation"]
    #[inline(always)]
    pub fn gcrmul2(
        self,
    ) -> crate::common::RegisterField<0, 0x3fff, 1, 0, u16, u16, Csce3_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x3fff,1,0,u16,u16,Csce3_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Cr Multiplication Coefficient 2 for R Calculation"]
    #[inline(always)]
    pub fn rcrmul2(
        self,
    ) -> crate::common::RegisterField<16, 0x3fff, 1, 0, u16, u16, Csce3_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0x3fff,1,0,u16,u16,Csce3_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Csce3 {
    #[inline(always)]
    fn default() -> Csce3 {
        <crate::RegValueT<Csce3_SPEC> as RegisterValue<_>>::new(428412162)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Csce4_SPEC;
impl crate::sealed::RegSpec for Csce4_SPEC {
    type DataType = u32;
}

#[doc = "YC to RGB Calculation Setting Extension Register 4"]
pub type Csce4 = crate::RegValueT<Csce4_SPEC>;

impl Csce4 {
    #[doc = "Cb Multiplication Coefficient 2 for B Calculation"]
    #[inline(always)]
    pub fn bcbmul2(
        self,
    ) -> crate::common::RegisterField<0, 0x3fff, 1, 0, u16, u16, Csce4_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x3fff,1,0,u16,u16,Csce4_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Cb Multiplication Coefficient 2 for G Calculation"]
    #[inline(always)]
    pub fn gcbmul2(
        self,
    ) -> crate::common::RegisterField<16, 0x3fff, 1, 0, u16, u16, Csce4_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<16,0x3fff,1,0,u16,u16,Csce4_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Csce4 {
    #[inline(always)]
    fn default() -> Csce4 {
        <crate::RegValueT<Csce4_SPEC> as RegisterValue<_>>::new(105193541)
    }
}