ra8m1_pac/
fcache.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:55:06 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Flash Cache"]
28unsafe impl ::core::marker::Send for super::Fcache {}
29unsafe impl ::core::marker::Sync for super::Fcache {}
30impl super::Fcache {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Flash Cache Enable Register"]
38    #[inline(always)]
39    pub const fn fcachee(
40        &self,
41    ) -> &'static crate::common::Reg<self::Fcachee_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Fcachee_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "Flash Cache Invalidate Register"]
50    #[inline(always)]
51    pub const fn fcacheiv(
52        &self,
53    ) -> &'static crate::common::Reg<self::Fcacheiv_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Fcacheiv_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(4usize),
57            )
58        }
59    }
60
61    #[doc = "Flash Wait Cycle Register"]
62    #[inline(always)]
63    pub const fn flwt(&self) -> &'static crate::common::Reg<self::Flwt_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Flwt_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(28usize),
67            )
68        }
69    }
70
71    #[doc = "Flash Security Attribution Register"]
72    #[inline(always)]
73    pub const fn fsar(&self) -> &'static crate::common::Reg<self::Fsar_SPEC, crate::common::RW> {
74        unsafe {
75            crate::common::Reg::<self::Fsar_SPEC, crate::common::RW>::from_ptr(
76                self._svd2pac_as_ptr().add(64usize),
77            )
78        }
79    }
80}
81#[doc(hidden)]
82#[derive(Copy, Clone, Eq, PartialEq)]
83pub struct Fcachee_SPEC;
84impl crate::sealed::RegSpec for Fcachee_SPEC {
85    type DataType = u16;
86}
87
88#[doc = "Flash Cache Enable Register"]
89pub type Fcachee = crate::RegValueT<Fcachee_SPEC>;
90
91impl Fcachee {
92    #[doc = "Flash Cache Enable"]
93    #[inline(always)]
94    pub fn fcacheen(
95        self,
96    ) -> crate::common::RegisterField<
97        0,
98        0x1,
99        1,
100        0,
101        fcachee::Fcacheen,
102        fcachee::Fcacheen,
103        Fcachee_SPEC,
104        crate::common::RW,
105    > {
106        crate::common::RegisterField::<
107            0,
108            0x1,
109            1,
110            0,
111            fcachee::Fcacheen,
112            fcachee::Fcacheen,
113            Fcachee_SPEC,
114            crate::common::RW,
115        >::from_register(self, 0)
116    }
117
118    #[doc = "These bits are read as 000000000000000. The write value should be 000000000000000."]
119    #[inline(always)]
120    pub fn reserved(
121        self,
122    ) -> crate::common::RegisterField<1, 0x7fff, 1, 0, u16, u16, Fcachee_SPEC, crate::common::RW>
123    {
124        crate::common::RegisterField::<1,0x7fff,1,0,u16,u16,Fcachee_SPEC,crate::common::RW>::from_register(self,0)
125    }
126}
127impl ::core::default::Default for Fcachee {
128    #[inline(always)]
129    fn default() -> Fcachee {
130        <crate::RegValueT<Fcachee_SPEC> as RegisterValue<_>>::new(0)
131    }
132}
133pub mod fcachee {
134
135    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
136    pub struct Fcacheen_SPEC;
137    pub type Fcacheen = crate::EnumBitfieldStruct<u8, Fcacheen_SPEC>;
138    impl Fcacheen {
139        #[doc = "FCACHE is disabled"]
140        pub const _0: Self = Self::new(0);
141
142        #[doc = "FCACHE is enabled"]
143        pub const _1: Self = Self::new(1);
144    }
145}
146#[doc(hidden)]
147#[derive(Copy, Clone, Eq, PartialEq)]
148pub struct Fcacheiv_SPEC;
149impl crate::sealed::RegSpec for Fcacheiv_SPEC {
150    type DataType = u16;
151}
152
153#[doc = "Flash Cache Invalidate Register"]
154pub type Fcacheiv = crate::RegValueT<Fcacheiv_SPEC>;
155
156impl Fcacheiv {
157    #[doc = "Flash Cache Invalidate"]
158    #[inline(always)]
159    pub fn fcacheiv(
160        self,
161    ) -> crate::common::RegisterField<
162        0,
163        0x1,
164        1,
165        0,
166        fcacheiv::Fcacheiv,
167        fcacheiv::Fcacheiv,
168        Fcacheiv_SPEC,
169        crate::common::RW,
170    > {
171        crate::common::RegisterField::<
172            0,
173            0x1,
174            1,
175            0,
176            fcacheiv::Fcacheiv,
177            fcacheiv::Fcacheiv,
178            Fcacheiv_SPEC,
179            crate::common::RW,
180        >::from_register(self, 0)
181    }
182
183    #[doc = "These bits are read as 000000000000000. The write value should be 000000000000000."]
184    #[inline(always)]
185    pub fn reserved(
186        self,
187    ) -> crate::common::RegisterField<1, 0x7fff, 1, 0, u16, u16, Fcacheiv_SPEC, crate::common::RW>
188    {
189        crate::common::RegisterField::<1,0x7fff,1,0,u16,u16,Fcacheiv_SPEC,crate::common::RW>::from_register(self,0)
190    }
191}
192impl ::core::default::Default for Fcacheiv {
193    #[inline(always)]
194    fn default() -> Fcacheiv {
195        <crate::RegValueT<Fcacheiv_SPEC> as RegisterValue<_>>::new(0)
196    }
197}
198pub mod fcacheiv {
199
200    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
201    pub struct Fcacheiv_SPEC;
202    pub type Fcacheiv = crate::EnumBitfieldStruct<u8, Fcacheiv_SPEC>;
203    impl Fcacheiv {
204        #[doc = "Read : Do not invalidate. Write: the setting is ignored."]
205        pub const _0: Self = Self::new(0);
206
207        #[doc = "FCACHE is invalidated."]
208        pub const _1: Self = Self::new(1);
209    }
210}
211#[doc(hidden)]
212#[derive(Copy, Clone, Eq, PartialEq)]
213pub struct Flwt_SPEC;
214impl crate::sealed::RegSpec for Flwt_SPEC {
215    type DataType = u8;
216}
217
218#[doc = "Flash Wait Cycle Register"]
219pub type Flwt = crate::RegValueT<Flwt_SPEC>;
220
221impl Flwt {
222    #[doc = "Flash Wait Cycle"]
223    #[inline(always)]
224    pub fn flwt(
225        self,
226    ) -> crate::common::RegisterField<
227        0,
228        0x7,
229        1,
230        0,
231        flwt::Flwt,
232        flwt::Flwt,
233        Flwt_SPEC,
234        crate::common::RW,
235    > {
236        crate::common::RegisterField::<
237            0,
238            0x7,
239            1,
240            0,
241            flwt::Flwt,
242            flwt::Flwt,
243            Flwt_SPEC,
244            crate::common::RW,
245        >::from_register(self, 0)
246    }
247
248    #[doc = "These bits are read as 00000. The write value should be 00000."]
249    #[inline(always)]
250    pub fn reserved(
251        self,
252    ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Flwt_SPEC, crate::common::RW> {
253        crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Flwt_SPEC,crate::common::RW>::from_register(self,0)
254    }
255}
256impl ::core::default::Default for Flwt {
257    #[inline(always)]
258    fn default() -> Flwt {
259        <crate::RegValueT<Flwt_SPEC> as RegisterValue<_>>::new(0)
260    }
261}
262pub mod flwt {
263
264    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
265    pub struct Flwt_SPEC;
266    pub type Flwt = crate::EnumBitfieldStruct<u8, Flwt_SPEC>;
267    impl Flwt {
268        #[doc = "0 wait (ICLK <= 48MHz)"]
269        pub const _000: Self = Self::new(0);
270
271        #[doc = "1 wait (48MHz < ICLK <= 96MHz)"]
272        pub const _001: Self = Self::new(1);
273
274        #[doc = "2 waits (96MHz < ICLK <= 144MHz)"]
275        pub const _010: Self = Self::new(2);
276
277        #[doc = "3 waits (144Hz < ICLK <= 192MHz)"]
278        pub const _011: Self = Self::new(3);
279
280        #[doc = "4 waits (192Hz < ICLK <= 240MHz)"]
281        pub const _100: Self = Self::new(4);
282
283        #[doc = "Setting prohibited"]
284        pub const OTHERS: Self = Self::new(0);
285    }
286}
287#[doc(hidden)]
288#[derive(Copy, Clone, Eq, PartialEq)]
289pub struct Fsar_SPEC;
290impl crate::sealed::RegSpec for Fsar_SPEC {
291    type DataType = u16;
292}
293
294#[doc = "Flash Security Attribution Register"]
295pub type Fsar = crate::RegValueT<Fsar_SPEC>;
296
297impl Fsar {
298    #[doc = "FLWT Security Attribution"]
299    #[inline(always)]
300    pub fn flwtsa(
301        self,
302    ) -> crate::common::RegisterField<
303        0,
304        0x1,
305        1,
306        0,
307        fsar::Flwtsa,
308        fsar::Flwtsa,
309        Fsar_SPEC,
310        crate::common::RW,
311    > {
312        crate::common::RegisterField::<
313            0,
314            0x1,
315            1,
316            0,
317            fsar::Flwtsa,
318            fsar::Flwtsa,
319            Fsar_SPEC,
320            crate::common::RW,
321        >::from_register(self, 0)
322    }
323
324    #[doc = "FCHACHEEN Security Attribution"]
325    #[inline(always)]
326    pub fn fcacheensa(
327        self,
328    ) -> crate::common::RegisterField<
329        1,
330        0x1,
331        1,
332        0,
333        fsar::Fcacheensa,
334        fsar::Fcacheensa,
335        Fsar_SPEC,
336        crate::common::RW,
337    > {
338        crate::common::RegisterField::<
339            1,
340            0x1,
341            1,
342            0,
343            fsar::Fcacheensa,
344            fsar::Fcacheensa,
345            Fsar_SPEC,
346            crate::common::RW,
347        >::from_register(self, 0)
348    }
349
350    #[doc = "FCKMHZ Security Attribution"]
351    #[inline(always)]
352    pub fn fckmhzsa(
353        self,
354    ) -> crate::common::RegisterField<
355        8,
356        0x1,
357        1,
358        0,
359        fsar::Fckmhzsa,
360        fsar::Fckmhzsa,
361        Fsar_SPEC,
362        crate::common::RW,
363    > {
364        crate::common::RegisterField::<
365            8,
366            0x1,
367            1,
368            0,
369            fsar::Fckmhzsa,
370            fsar::Fckmhzsa,
371            Fsar_SPEC,
372            crate::common::RW,
373        >::from_register(self, 0)
374    }
375
376    #[doc = "FACI command Issuing Security Attribution"]
377    #[inline(always)]
378    pub fn facicomisa(
379        self,
380    ) -> crate::common::RegisterField<
381        9,
382        0x1,
383        1,
384        0,
385        fsar::Facicomisa,
386        fsar::Facicomisa,
387        Fsar_SPEC,
388        crate::common::RW,
389    > {
390        crate::common::RegisterField::<
391            9,
392            0x1,
393            1,
394            0,
395            fsar::Facicomisa,
396            fsar::Facicomisa,
397            Fsar_SPEC,
398            crate::common::RW,
399        >::from_register(self, 0)
400    }
401
402    #[doc = "FACI command Registers Security Attribution"]
403    #[inline(always)]
404    pub fn facicomrsa(
405        self,
406    ) -> crate::common::RegisterField<
407        10,
408        0x1,
409        1,
410        0,
411        fsar::Facicomrsa,
412        fsar::Facicomrsa,
413        Fsar_SPEC,
414        crate::common::RW,
415    > {
416        crate::common::RegisterField::<
417            10,
418            0x1,
419            1,
420            0,
421            fsar::Facicomrsa,
422            fsar::Facicomrsa,
423            Fsar_SPEC,
424            crate::common::RW,
425        >::from_register(self, 0)
426    }
427
428    #[doc = "FACI transfer Security Attribution"]
429    #[inline(always)]
430    pub fn facitrsa(
431        self,
432    ) -> crate::common::RegisterField<
433        11,
434        0x1,
435        1,
436        0,
437        fsar::Facitrsa,
438        fsar::Facitrsa,
439        Fsar_SPEC,
440        crate::common::RW,
441    > {
442        crate::common::RegisterField::<
443            11,
444            0x1,
445            1,
446            0,
447            fsar::Facitrsa,
448            fsar::Facitrsa,
449            Fsar_SPEC,
450            crate::common::RW,
451        >::from_register(self, 0)
452    }
453
454    #[doc = "These bits are read as 1111. The write value should be 1111."]
455    #[inline(always)]
456    pub fn reserved(
457        self,
458    ) -> crate::common::RegisterField<12, 0xf, 1, 0, u8, u8, Fsar_SPEC, crate::common::RW> {
459        crate::common::RegisterField::<12,0xf,1,0,u8,u8,Fsar_SPEC,crate::common::RW>::from_register(self,0)
460    }
461}
462impl ::core::default::Default for Fsar {
463    #[inline(always)]
464    fn default() -> Fsar {
465        <crate::RegValueT<Fsar_SPEC> as RegisterValue<_>>::new(0)
466    }
467}
468pub mod fsar {
469
470    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
471    pub struct Flwtsa_SPEC;
472    pub type Flwtsa = crate::EnumBitfieldStruct<u8, Flwtsa_SPEC>;
473    impl Flwtsa {
474        #[doc = "Secure"]
475        pub const _0: Self = Self::new(0);
476
477        #[doc = "Non-Secure"]
478        pub const _1: Self = Self::new(1);
479    }
480    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
481    pub struct Fcacheensa_SPEC;
482    pub type Fcacheensa = crate::EnumBitfieldStruct<u8, Fcacheensa_SPEC>;
483    impl Fcacheensa {
484        #[doc = "Secure"]
485        pub const _0: Self = Self::new(0);
486
487        #[doc = "Non-Secure"]
488        pub const _1: Self = Self::new(1);
489    }
490    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
491    pub struct Fckmhzsa_SPEC;
492    pub type Fckmhzsa = crate::EnumBitfieldStruct<u8, Fckmhzsa_SPEC>;
493    impl Fckmhzsa {
494        #[doc = "Secure"]
495        pub const _0: Self = Self::new(0);
496
497        #[doc = "Non-Secure"]
498        pub const _1: Self = Self::new(1);
499    }
500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
501    pub struct Facicomisa_SPEC;
502    pub type Facicomisa = crate::EnumBitfieldStruct<u8, Facicomisa_SPEC>;
503    impl Facicomisa {
504        #[doc = "Secure"]
505        pub const _0: Self = Self::new(0);
506
507        #[doc = "Non-Secure"]
508        pub const _1: Self = Self::new(1);
509    }
510    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
511    pub struct Facicomrsa_SPEC;
512    pub type Facicomrsa = crate::EnumBitfieldStruct<u8, Facicomrsa_SPEC>;
513    impl Facicomrsa {
514        #[doc = "Secure"]
515        pub const _0: Self = Self::new(0);
516
517        #[doc = "Non-Secure"]
518        pub const _1: Self = Self::new(1);
519    }
520    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
521    pub struct Facitrsa_SPEC;
522    pub type Facitrsa = crate::EnumBitfieldStruct<u8, Facitrsa_SPEC>;
523    impl Facitrsa {
524        #[doc = "Secure"]
525        pub const _0: Self = Self::new(0);
526
527        #[doc = "Non-Secure"]
528        pub const _1: Self = Self::new(1);
529    }
530}
ra8m1_pac/fcache.rs

ra8m1_pac/
fcache.rs
