1#[doc = "Register `CCR2` reader"]
2pub struct R(crate::R<CCR2_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CCR2_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CCR2_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CCR2_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CCR2` writer"]
17pub struct W(crate::W<CCR2_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CCR2_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CCR2_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CCR2_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `BCP` reader - Base Clock Pulse"]
38pub type BCP_R = crate::FieldReader<u8, BCP_A>;
39#[doc = "Base Clock Pulse\n\nValue on reset: 4"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum BCP_A {
43 #[doc = "0: 93 clock cycles (S = 93)"]
44 _000 = 0,
45 #[doc = "1: 128 clock cycles (S = 128)"]
46 _001 = 1,
47 #[doc = "2: 186 clock cycles (S = 186)"]
48 _010 = 2,
49 #[doc = "3: 512 clock cycles (S = 512)"]
50 _011 = 3,
51 #[doc = "4: 32 clock cycles (S = 32) (Initial value)"]
52 _100 = 4,
53 #[doc = "5: 64 clock cycles (S = 64)"]
54 _101 = 5,
55 #[doc = "6: 372 clock cycles (S = 372)"]
56 _110 = 6,
57 #[doc = "7: 256 clock cycles (S = 256)"]
58 _111 = 7,
59}
60impl From<BCP_A> for u8 {
61 #[inline(always)]
62 fn from(variant: BCP_A) -> Self {
63 variant as _
64 }
65}
66impl BCP_R {
67 #[doc = "Get enumerated values variant"]
68 #[inline(always)]
69 pub fn variant(&self) -> BCP_A {
70 match self.bits {
71 0 => BCP_A::_000,
72 1 => BCP_A::_001,
73 2 => BCP_A::_010,
74 3 => BCP_A::_011,
75 4 => BCP_A::_100,
76 5 => BCP_A::_101,
77 6 => BCP_A::_110,
78 7 => BCP_A::_111,
79 _ => unreachable!(),
80 }
81 }
82 #[doc = "Checks if the value of the field is `_000`"]
83 #[inline(always)]
84 pub fn is_000(&self) -> bool {
85 *self == BCP_A::_000
86 }
87 #[doc = "Checks if the value of the field is `_001`"]
88 #[inline(always)]
89 pub fn is_001(&self) -> bool {
90 *self == BCP_A::_001
91 }
92 #[doc = "Checks if the value of the field is `_010`"]
93 #[inline(always)]
94 pub fn is_010(&self) -> bool {
95 *self == BCP_A::_010
96 }
97 #[doc = "Checks if the value of the field is `_011`"]
98 #[inline(always)]
99 pub fn is_011(&self) -> bool {
100 *self == BCP_A::_011
101 }
102 #[doc = "Checks if the value of the field is `_100`"]
103 #[inline(always)]
104 pub fn is_100(&self) -> bool {
105 *self == BCP_A::_100
106 }
107 #[doc = "Checks if the value of the field is `_101`"]
108 #[inline(always)]
109 pub fn is_101(&self) -> bool {
110 *self == BCP_A::_101
111 }
112 #[doc = "Checks if the value of the field is `_110`"]
113 #[inline(always)]
114 pub fn is_110(&self) -> bool {
115 *self == BCP_A::_110
116 }
117 #[doc = "Checks if the value of the field is `_111`"]
118 #[inline(always)]
119 pub fn is_111(&self) -> bool {
120 *self == BCP_A::_111
121 }
122}
123#[doc = "Field `BCP` writer - Base Clock Pulse"]
124pub type BCP_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CCR2_SPEC, u8, BCP_A, 3, O>;
125impl<'a, const O: u8> BCP_W<'a, O> {
126 #[doc = "93 clock cycles (S = 93)"]
127 #[inline(always)]
128 pub fn _000(self) -> &'a mut W {
129 self.variant(BCP_A::_000)
130 }
131 #[doc = "128 clock cycles (S = 128)"]
132 #[inline(always)]
133 pub fn _001(self) -> &'a mut W {
134 self.variant(BCP_A::_001)
135 }
136 #[doc = "186 clock cycles (S = 186)"]
137 #[inline(always)]
138 pub fn _010(self) -> &'a mut W {
139 self.variant(BCP_A::_010)
140 }
141 #[doc = "512 clock cycles (S = 512)"]
142 #[inline(always)]
143 pub fn _011(self) -> &'a mut W {
144 self.variant(BCP_A::_011)
145 }
146 #[doc = "32 clock cycles (S = 32) (Initial value)"]
147 #[inline(always)]
148 pub fn _100(self) -> &'a mut W {
149 self.variant(BCP_A::_100)
150 }
151 #[doc = "64 clock cycles (S = 64)"]
152 #[inline(always)]
153 pub fn _101(self) -> &'a mut W {
154 self.variant(BCP_A::_101)
155 }
156 #[doc = "372 clock cycles (S = 372)"]
157 #[inline(always)]
158 pub fn _110(self) -> &'a mut W {
159 self.variant(BCP_A::_110)
160 }
161 #[doc = "256 clock cycles (S = 256)"]
162 #[inline(always)]
163 pub fn _111(self) -> &'a mut W {
164 self.variant(BCP_A::_111)
165 }
166}
167#[doc = "Field `BGDM` reader - Baud Rate Generator Double-Speed Mode Select"]
168pub type BGDM_R = crate::BitReader<BGDM_A>;
169#[doc = "Baud Rate Generator Double-Speed Mode Select\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq, Eq)]
171pub enum BGDM_A {
172 #[doc = "0: Baud rate generator outputs the clock with single frequency."]
173 _0 = 0,
174 #[doc = "1: Baud rate generator outputs the clock with doubled frequency."]
175 _1 = 1,
176}
177impl From<BGDM_A> for bool {
178 #[inline(always)]
179 fn from(variant: BGDM_A) -> Self {
180 variant as u8 != 0
181 }
182}
183impl BGDM_R {
184 #[doc = "Get enumerated values variant"]
185 #[inline(always)]
186 pub fn variant(&self) -> BGDM_A {
187 match self.bits {
188 false => BGDM_A::_0,
189 true => BGDM_A::_1,
190 }
191 }
192 #[doc = "Checks if the value of the field is `_0`"]
193 #[inline(always)]
194 pub fn is_0(&self) -> bool {
195 *self == BGDM_A::_0
196 }
197 #[doc = "Checks if the value of the field is `_1`"]
198 #[inline(always)]
199 pub fn is_1(&self) -> bool {
200 *self == BGDM_A::_1
201 }
202}
203#[doc = "Field `BGDM` writer - Baud Rate Generator Double-Speed Mode Select"]
204pub type BGDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCR2_SPEC, BGDM_A, O>;
205impl<'a, const O: u8> BGDM_W<'a, O> {
206 #[doc = "Baud rate generator outputs the clock with single frequency."]
207 #[inline(always)]
208 pub fn _0(self) -> &'a mut W {
209 self.variant(BGDM_A::_0)
210 }
211 #[doc = "Baud rate generator outputs the clock with doubled frequency."]
212 #[inline(always)]
213 pub fn _1(self) -> &'a mut W {
214 self.variant(BGDM_A::_1)
215 }
216}
217#[doc = "Field `ABCS` reader - Asynchronous Mode Base Clock Select"]
218pub type ABCS_R = crate::BitReader<ABCS_A>;
219#[doc = "Asynchronous Mode Base Clock Select\n\nValue on reset: 0"]
220#[derive(Clone, Copy, Debug, PartialEq, Eq)]
221pub enum ABCS_A {
222 #[doc = "0: Selects 16 base clock cycles for 1-bit period."]
223 _0 = 0,
224 #[doc = "1: Selects 8 base clock cycles for 1-bit period."]
225 _1 = 1,
226}
227impl From<ABCS_A> for bool {
228 #[inline(always)]
229 fn from(variant: ABCS_A) -> Self {
230 variant as u8 != 0
231 }
232}
233impl ABCS_R {
234 #[doc = "Get enumerated values variant"]
235 #[inline(always)]
236 pub fn variant(&self) -> ABCS_A {
237 match self.bits {
238 false => ABCS_A::_0,
239 true => ABCS_A::_1,
240 }
241 }
242 #[doc = "Checks if the value of the field is `_0`"]
243 #[inline(always)]
244 pub fn is_0(&self) -> bool {
245 *self == ABCS_A::_0
246 }
247 #[doc = "Checks if the value of the field is `_1`"]
248 #[inline(always)]
249 pub fn is_1(&self) -> bool {
250 *self == ABCS_A::_1
251 }
252}
253#[doc = "Field `ABCS` writer - Asynchronous Mode Base Clock Select"]
254pub type ABCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCR2_SPEC, ABCS_A, O>;
255impl<'a, const O: u8> ABCS_W<'a, O> {
256 #[doc = "Selects 16 base clock cycles for 1-bit period."]
257 #[inline(always)]
258 pub fn _0(self) -> &'a mut W {
259 self.variant(ABCS_A::_0)
260 }
261 #[doc = "Selects 8 base clock cycles for 1-bit period."]
262 #[inline(always)]
263 pub fn _1(self) -> &'a mut W {
264 self.variant(ABCS_A::_1)
265 }
266}
267#[doc = "Field `ABCSE` reader - Asynchronous Mode Extended Base Clock Select"]
268pub type ABCSE_R = crate::BitReader<ABCSE_A>;
269#[doc = "Asynchronous Mode Extended Base Clock Select\n\nValue on reset: 0"]
270#[derive(Clone, Copy, Debug, PartialEq, Eq)]
271pub enum ABCSE_A {
272 #[doc = "0: Clock cycles for 1-bit period is decided with combination be-tween CCR2.BGDM and CCR2.ABCS."]
273 _0 = 0,
274 #[doc = "1: Baud rate is 6 base clock cycles for 1-bit period and the clock of a double frequency is output from the baud rate generator."]
275 _1 = 1,
276}
277impl From<ABCSE_A> for bool {
278 #[inline(always)]
279 fn from(variant: ABCSE_A) -> Self {
280 variant as u8 != 0
281 }
282}
283impl ABCSE_R {
284 #[doc = "Get enumerated values variant"]
285 #[inline(always)]
286 pub fn variant(&self) -> ABCSE_A {
287 match self.bits {
288 false => ABCSE_A::_0,
289 true => ABCSE_A::_1,
290 }
291 }
292 #[doc = "Checks if the value of the field is `_0`"]
293 #[inline(always)]
294 pub fn is_0(&self) -> bool {
295 *self == ABCSE_A::_0
296 }
297 #[doc = "Checks if the value of the field is `_1`"]
298 #[inline(always)]
299 pub fn is_1(&self) -> bool {
300 *self == ABCSE_A::_1
301 }
302}
303#[doc = "Field `ABCSE` writer - Asynchronous Mode Extended Base Clock Select"]
304pub type ABCSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCR2_SPEC, ABCSE_A, O>;
305impl<'a, const O: u8> ABCSE_W<'a, O> {
306 #[doc = "Clock cycles for 1-bit period is decided with combination be-tween CCR2.BGDM and CCR2.ABCS."]
307 #[inline(always)]
308 pub fn _0(self) -> &'a mut W {
309 self.variant(ABCSE_A::_0)
310 }
311 #[doc = "Baud rate is 6 base clock cycles for 1-bit period and the clock of a double frequency is output from the baud rate generator."]
312 #[inline(always)]
313 pub fn _1(self) -> &'a mut W {
314 self.variant(ABCSE_A::_1)
315 }
316}
317#[doc = "Field `BRR` reader - Bit rate setting"]
318pub type BRR_R = crate::FieldReader<u8, u8>;
319#[doc = "Field `BRR` writer - Bit rate setting"]
320pub type BRR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CCR2_SPEC, u8, u8, 8, O>;
321#[doc = "Field `BRME` reader - Bit Modulation Enable"]
322pub type BRME_R = crate::BitReader<BRME_A>;
323#[doc = "Bit Modulation Enable\n\nValue on reset: 0"]
324#[derive(Clone, Copy, Debug, PartialEq, Eq)]
325pub enum BRME_A {
326 #[doc = "0: Bit rate modulation function is disabled."]
327 _0 = 0,
328 #[doc = "1: Bit rate modulation function is enabled."]
329 _1 = 1,
330}
331impl From<BRME_A> for bool {
332 #[inline(always)]
333 fn from(variant: BRME_A) -> Self {
334 variant as u8 != 0
335 }
336}
337impl BRME_R {
338 #[doc = "Get enumerated values variant"]
339 #[inline(always)]
340 pub fn variant(&self) -> BRME_A {
341 match self.bits {
342 false => BRME_A::_0,
343 true => BRME_A::_1,
344 }
345 }
346 #[doc = "Checks if the value of the field is `_0`"]
347 #[inline(always)]
348 pub fn is_0(&self) -> bool {
349 *self == BRME_A::_0
350 }
351 #[doc = "Checks if the value of the field is `_1`"]
352 #[inline(always)]
353 pub fn is_1(&self) -> bool {
354 *self == BRME_A::_1
355 }
356}
357#[doc = "Field `BRME` writer - Bit Modulation Enable"]
358pub type BRME_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCR2_SPEC, BRME_A, O>;
359impl<'a, const O: u8> BRME_W<'a, O> {
360 #[doc = "Bit rate modulation function is disabled."]
361 #[inline(always)]
362 pub fn _0(self) -> &'a mut W {
363 self.variant(BRME_A::_0)
364 }
365 #[doc = "Bit rate modulation function is enabled."]
366 #[inline(always)]
367 pub fn _1(self) -> &'a mut W {
368 self.variant(BRME_A::_1)
369 }
370}
371#[doc = "Field `CKS` reader - Clock Select"]
372pub type CKS_R = crate::FieldReader<u8, CKS_A>;
373#[doc = "Clock Select\n\nValue on reset: 0"]
374#[derive(Clone, Copy, Debug, PartialEq, Eq)]
375#[repr(u8)]
376pub enum CKS_A {
377 #[doc = "0: TCLK clock (n = 0)"]
378 _00 = 0,
379 #[doc = "1: TCLK/4 clock (n = 1)"]
380 _01 = 1,
381 #[doc = "2: TCLK/16 clock (n = 2)"]
382 _10 = 2,
383 #[doc = "3: TCLK/64 clock (n = 3)"]
384 _11 = 3,
385}
386impl From<CKS_A> for u8 {
387 #[inline(always)]
388 fn from(variant: CKS_A) -> Self {
389 variant as _
390 }
391}
392impl CKS_R {
393 #[doc = "Get enumerated values variant"]
394 #[inline(always)]
395 pub fn variant(&self) -> CKS_A {
396 match self.bits {
397 0 => CKS_A::_00,
398 1 => CKS_A::_01,
399 2 => CKS_A::_10,
400 3 => CKS_A::_11,
401 _ => unreachable!(),
402 }
403 }
404 #[doc = "Checks if the value of the field is `_00`"]
405 #[inline(always)]
406 pub fn is_00(&self) -> bool {
407 *self == CKS_A::_00
408 }
409 #[doc = "Checks if the value of the field is `_01`"]
410 #[inline(always)]
411 pub fn is_01(&self) -> bool {
412 *self == CKS_A::_01
413 }
414 #[doc = "Checks if the value of the field is `_10`"]
415 #[inline(always)]
416 pub fn is_10(&self) -> bool {
417 *self == CKS_A::_10
418 }
419 #[doc = "Checks if the value of the field is `_11`"]
420 #[inline(always)]
421 pub fn is_11(&self) -> bool {
422 *self == CKS_A::_11
423 }
424}
425#[doc = "Field `CKS` writer - Clock Select"]
426pub type CKS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CCR2_SPEC, u8, CKS_A, 2, O>;
427impl<'a, const O: u8> CKS_W<'a, O> {
428 #[doc = "TCLK clock (n = 0)"]
429 #[inline(always)]
430 pub fn _00(self) -> &'a mut W {
431 self.variant(CKS_A::_00)
432 }
433 #[doc = "TCLK/4 clock (n = 1)"]
434 #[inline(always)]
435 pub fn _01(self) -> &'a mut W {
436 self.variant(CKS_A::_01)
437 }
438 #[doc = "TCLK/16 clock (n = 2)"]
439 #[inline(always)]
440 pub fn _10(self) -> &'a mut W {
441 self.variant(CKS_A::_10)
442 }
443 #[doc = "TCLK/64 clock (n = 3)"]
444 #[inline(always)]
445 pub fn _11(self) -> &'a mut W {
446 self.variant(CKS_A::_11)
447 }
448}
449#[doc = "Field `MDDR` reader - Modulation Duty Setting"]
450pub type MDDR_R = crate::FieldReader<u8, u8>;
451#[doc = "Field `MDDR` writer - Modulation Duty Setting"]
452pub type MDDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CCR2_SPEC, u8, u8, 8, O>;
453impl R {
454 #[doc = "Bits 0:2 - Base Clock Pulse"]
455 #[inline(always)]
456 pub fn bcp(&self) -> BCP_R {
457 BCP_R::new((self.bits & 7) as u8)
458 }
459 #[doc = "Bit 4 - Baud Rate Generator Double-Speed Mode Select"]
460 #[inline(always)]
461 pub fn bgdm(&self) -> BGDM_R {
462 BGDM_R::new(((self.bits >> 4) & 1) != 0)
463 }
464 #[doc = "Bit 5 - Asynchronous Mode Base Clock Select"]
465 #[inline(always)]
466 pub fn abcs(&self) -> ABCS_R {
467 ABCS_R::new(((self.bits >> 5) & 1) != 0)
468 }
469 #[doc = "Bit 6 - Asynchronous Mode Extended Base Clock Select"]
470 #[inline(always)]
471 pub fn abcse(&self) -> ABCSE_R {
472 ABCSE_R::new(((self.bits >> 6) & 1) != 0)
473 }
474 #[doc = "Bits 8:15 - Bit rate setting"]
475 #[inline(always)]
476 pub fn brr(&self) -> BRR_R {
477 BRR_R::new(((self.bits >> 8) & 0xff) as u8)
478 }
479 #[doc = "Bit 16 - Bit Modulation Enable"]
480 #[inline(always)]
481 pub fn brme(&self) -> BRME_R {
482 BRME_R::new(((self.bits >> 16) & 1) != 0)
483 }
484 #[doc = "Bits 20:21 - Clock Select"]
485 #[inline(always)]
486 pub fn cks(&self) -> CKS_R {
487 CKS_R::new(((self.bits >> 20) & 3) as u8)
488 }
489 #[doc = "Bits 24:31 - Modulation Duty Setting"]
490 #[inline(always)]
491 pub fn mddr(&self) -> MDDR_R {
492 MDDR_R::new(((self.bits >> 24) & 0xff) as u8)
493 }
494}
495impl W {
496 #[doc = "Bits 0:2 - Base Clock Pulse"]
497 #[inline(always)]
498 #[must_use]
499 pub fn bcp(&mut self) -> BCP_W<0> {
500 BCP_W::new(self)
501 }
502 #[doc = "Bit 4 - Baud Rate Generator Double-Speed Mode Select"]
503 #[inline(always)]
504 #[must_use]
505 pub fn bgdm(&mut self) -> BGDM_W<4> {
506 BGDM_W::new(self)
507 }
508 #[doc = "Bit 5 - Asynchronous Mode Base Clock Select"]
509 #[inline(always)]
510 #[must_use]
511 pub fn abcs(&mut self) -> ABCS_W<5> {
512 ABCS_W::new(self)
513 }
514 #[doc = "Bit 6 - Asynchronous Mode Extended Base Clock Select"]
515 #[inline(always)]
516 #[must_use]
517 pub fn abcse(&mut self) -> ABCSE_W<6> {
518 ABCSE_W::new(self)
519 }
520 #[doc = "Bits 8:15 - Bit rate setting"]
521 #[inline(always)]
522 #[must_use]
523 pub fn brr(&mut self) -> BRR_W<8> {
524 BRR_W::new(self)
525 }
526 #[doc = "Bit 16 - Bit Modulation Enable"]
527 #[inline(always)]
528 #[must_use]
529 pub fn brme(&mut self) -> BRME_W<16> {
530 BRME_W::new(self)
531 }
532 #[doc = "Bits 20:21 - Clock Select"]
533 #[inline(always)]
534 #[must_use]
535 pub fn cks(&mut self) -> CKS_W<20> {
536 CKS_W::new(self)
537 }
538 #[doc = "Bits 24:31 - Modulation Duty Setting"]
539 #[inline(always)]
540 #[must_use]
541 pub fn mddr(&mut self) -> MDDR_W<24> {
542 MDDR_W::new(self)
543 }
544 #[doc = "Writes raw bits to the register."]
545 #[inline(always)]
546 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
547 self.0.bits(bits);
548 self
549 }
550}
551#[doc = "Common Control Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr2](index.html) module"]
552pub struct CCR2_SPEC;
553impl crate::RegisterSpec for CCR2_SPEC {
554 type Ux = u32;
555}
556#[doc = "`read()` method returns [ccr2::R](R) reader structure"]
557impl crate::Readable for CCR2_SPEC {
558 type Reader = R;
559}
560#[doc = "`write(|w| ..)` method takes [ccr2::W](W) writer structure"]
561impl crate::Writable for CCR2_SPEC {
562 type Writer = W;
563 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
564 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
565}
566#[doc = "`reset()` method sets CCR2 to value 0xff00_ff04"]
567impl crate::Resettable for CCR2_SPEC {
568 const RESET_VALUE: Self::Ux = 0xff00_ff04;
569}