ra6t2/sysc/
lvd2cr1.rs

1#[doc = "Register `LVD2CR1` reader"]
2pub struct R(crate::R<LVD2CR1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LVD2CR1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LVD2CR1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LVD2CR1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `LVD2CR1` writer"]
17pub struct W(crate::W<LVD2CR1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LVD2CR1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LVD2CR1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LVD2CR1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `IDTSEL` reader - Voltage Monitor 2 Interrupt Generation Condition Select"]
38pub type IDTSEL_R = crate::FieldReader<u8, IDTSEL_A>;
39#[doc = "Voltage Monitor 2 Interrupt Generation Condition Select\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum IDTSEL_A {
43    #[doc = "0: When VCC>= Vdet2 (rise) is detected"]
44    _00 = 0,
45    #[doc = "1: When VCC < Vdet2 (fall) is detected"]
46    _01 = 1,
47    #[doc = "2: When fall and rise are detected"]
48    _10 = 2,
49    #[doc = "3: Settings prohibited"]
50    _11 = 3,
51}
52impl From<IDTSEL_A> for u8 {
53    #[inline(always)]
54    fn from(variant: IDTSEL_A) -> Self {
55        variant as _
56    }
57}
58impl IDTSEL_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> IDTSEL_A {
62        match self.bits {
63            0 => IDTSEL_A::_00,
64            1 => IDTSEL_A::_01,
65            2 => IDTSEL_A::_10,
66            3 => IDTSEL_A::_11,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `_00`"]
71    #[inline(always)]
72    pub fn is_00(&self) -> bool {
73        *self == IDTSEL_A::_00
74    }
75    #[doc = "Checks if the value of the field is `_01`"]
76    #[inline(always)]
77    pub fn is_01(&self) -> bool {
78        *self == IDTSEL_A::_01
79    }
80    #[doc = "Checks if the value of the field is `_10`"]
81    #[inline(always)]
82    pub fn is_10(&self) -> bool {
83        *self == IDTSEL_A::_10
84    }
85    #[doc = "Checks if the value of the field is `_11`"]
86    #[inline(always)]
87    pub fn is_11(&self) -> bool {
88        *self == IDTSEL_A::_11
89    }
90}
91#[doc = "Field `IDTSEL` writer - Voltage Monitor 2 Interrupt Generation Condition Select"]
92pub type IDTSEL_W<'a, const O: u8> =
93    crate::FieldWriterSafe<'a, u8, LVD2CR1_SPEC, u8, IDTSEL_A, 2, O>;
94impl<'a, const O: u8> IDTSEL_W<'a, O> {
95    #[doc = "When VCC>= Vdet2 (rise) is detected"]
96    #[inline(always)]
97    pub fn _00(self) -> &'a mut W {
98        self.variant(IDTSEL_A::_00)
99    }
100    #[doc = "When VCC < Vdet2 (fall) is detected"]
101    #[inline(always)]
102    pub fn _01(self) -> &'a mut W {
103        self.variant(IDTSEL_A::_01)
104    }
105    #[doc = "When fall and rise are detected"]
106    #[inline(always)]
107    pub fn _10(self) -> &'a mut W {
108        self.variant(IDTSEL_A::_10)
109    }
110    #[doc = "Settings prohibited"]
111    #[inline(always)]
112    pub fn _11(self) -> &'a mut W {
113        self.variant(IDTSEL_A::_11)
114    }
115}
116#[doc = "Field `IRQSEL` reader - Voltage Monitor 2 Interrupt Type Select"]
117pub type IRQSEL_R = crate::BitReader<IRQSEL_A>;
118#[doc = "Voltage Monitor 2 Interrupt Type Select\n\nValue on reset: 0"]
119#[derive(Clone, Copy, Debug, PartialEq, Eq)]
120pub enum IRQSEL_A {
121    #[doc = "0: Non-maskable interrupt"]
122    _0 = 0,
123    #[doc = "1: Maskable interrupt"]
124    _1 = 1,
125}
126impl From<IRQSEL_A> for bool {
127    #[inline(always)]
128    fn from(variant: IRQSEL_A) -> Self {
129        variant as u8 != 0
130    }
131}
132impl IRQSEL_R {
133    #[doc = "Get enumerated values variant"]
134    #[inline(always)]
135    pub fn variant(&self) -> IRQSEL_A {
136        match self.bits {
137            false => IRQSEL_A::_0,
138            true => IRQSEL_A::_1,
139        }
140    }
141    #[doc = "Checks if the value of the field is `_0`"]
142    #[inline(always)]
143    pub fn is_0(&self) -> bool {
144        *self == IRQSEL_A::_0
145    }
146    #[doc = "Checks if the value of the field is `_1`"]
147    #[inline(always)]
148    pub fn is_1(&self) -> bool {
149        *self == IRQSEL_A::_1
150    }
151}
152#[doc = "Field `IRQSEL` writer - Voltage Monitor 2 Interrupt Type Select"]
153pub type IRQSEL_W<'a, const O: u8> = crate::BitWriter<'a, u8, LVD2CR1_SPEC, IRQSEL_A, O>;
154impl<'a, const O: u8> IRQSEL_W<'a, O> {
155    #[doc = "Non-maskable interrupt"]
156    #[inline(always)]
157    pub fn _0(self) -> &'a mut W {
158        self.variant(IRQSEL_A::_0)
159    }
160    #[doc = "Maskable interrupt"]
161    #[inline(always)]
162    pub fn _1(self) -> &'a mut W {
163        self.variant(IRQSEL_A::_1)
164    }
165}
166impl R {
167    #[doc = "Bits 0:1 - Voltage Monitor 2 Interrupt Generation Condition Select"]
168    #[inline(always)]
169    pub fn idtsel(&self) -> IDTSEL_R {
170        IDTSEL_R::new(self.bits & 3)
171    }
172    #[doc = "Bit 2 - Voltage Monitor 2 Interrupt Type Select"]
173    #[inline(always)]
174    pub fn irqsel(&self) -> IRQSEL_R {
175        IRQSEL_R::new(((self.bits >> 2) & 1) != 0)
176    }
177}
178impl W {
179    #[doc = "Bits 0:1 - Voltage Monitor 2 Interrupt Generation Condition Select"]
180    #[inline(always)]
181    #[must_use]
182    pub fn idtsel(&mut self) -> IDTSEL_W<0> {
183        IDTSEL_W::new(self)
184    }
185    #[doc = "Bit 2 - Voltage Monitor 2 Interrupt Type Select"]
186    #[inline(always)]
187    #[must_use]
188    pub fn irqsel(&mut self) -> IRQSEL_W<2> {
189        IRQSEL_W::new(self)
190    }
191    #[doc = "Writes raw bits to the register."]
192    #[inline(always)]
193    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
194        self.0.bits(bits);
195        self
196    }
197}
198#[doc = "Voltage Monitor 2 Circuit Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lvd2cr1](index.html) module"]
199pub struct LVD2CR1_SPEC;
200impl crate::RegisterSpec for LVD2CR1_SPEC {
201    type Ux = u8;
202}
203#[doc = "`read()` method returns [lvd2cr1::R](R) reader structure"]
204impl crate::Readable for LVD2CR1_SPEC {
205    type Reader = R;
206}
207#[doc = "`write(|w| ..)` method takes [lvd2cr1::W](W) writer structure"]
208impl crate::Writable for LVD2CR1_SPEC {
209    type Writer = W;
210    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
211    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
212}
213#[doc = "`reset()` method sets LVD2CR1 to value 0x01"]
214impl crate::Resettable for LVD2CR1_SPEC {
215    const RESET_VALUE: Self::Ux = 0x01;
216}
ra6t2/sysc/lvd2cr1.rs

ra6t2/sysc/
lvd2cr1.rs
