1#[doc = "Register `ICCR2` reader"]
2pub struct R(crate::R<ICCR2_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ICCR2_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ICCR2_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ICCR2_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ICCR2` writer"]
17pub struct W(crate::W<ICCR2_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ICCR2_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ICCR2_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ICCR2_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `ST` reader - Start Condition Issuance Request Set the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)."]
38pub type ST_R = crate::BitReader<ST_A>;
39#[doc = "Start Condition Issuance Request Set the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state).\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum ST_A {
42 #[doc = "0: Does not request to issue a start condition."]
43 _0 = 0,
44 #[doc = "1: Requests to issue a start condition."]
45 _1 = 1,
46}
47impl From<ST_A> for bool {
48 #[inline(always)]
49 fn from(variant: ST_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl ST_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> ST_A {
57 match self.bits {
58 false => ST_A::_0,
59 true => ST_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == ST_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == ST_A::_1
71 }
72}
73#[doc = "Field `ST` writer - Start Condition Issuance Request Set the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)."]
74pub type ST_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICCR2_SPEC, ST_A, O>;
75impl<'a, const O: u8> ST_W<'a, O> {
76 #[doc = "Does not request to issue a start condition."]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(ST_A::_0)
80 }
81 #[doc = "Requests to issue a start condition."]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(ST_A::_1)
85 }
86}
87#[doc = "Field `RS` reader - Restart Condition Issuance Request Note: Do not set the RS bit to 1 while issuing a stop condition."]
88pub type RS_R = crate::BitReader<RS_A>;
89#[doc = "Restart Condition Issuance Request Note: Do not set the RS bit to 1 while issuing a stop condition.\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum RS_A {
92 #[doc = "0: Does not request to issue a restart condition."]
93 _0 = 0,
94 #[doc = "1: Requests to issue a restart condition."]
95 _1 = 1,
96}
97impl From<RS_A> for bool {
98 #[inline(always)]
99 fn from(variant: RS_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl RS_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> RS_A {
107 match self.bits {
108 false => RS_A::_0,
109 true => RS_A::_1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `_0`"]
113 #[inline(always)]
114 pub fn is_0(&self) -> bool {
115 *self == RS_A::_0
116 }
117 #[doc = "Checks if the value of the field is `_1`"]
118 #[inline(always)]
119 pub fn is_1(&self) -> bool {
120 *self == RS_A::_1
121 }
122}
123#[doc = "Field `RS` writer - Restart Condition Issuance Request Note: Do not set the RS bit to 1 while issuing a stop condition."]
124pub type RS_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICCR2_SPEC, RS_A, O>;
125impl<'a, const O: u8> RS_W<'a, O> {
126 #[doc = "Does not request to issue a restart condition."]
127 #[inline(always)]
128 pub fn _0(self) -> &'a mut W {
129 self.variant(RS_A::_0)
130 }
131 #[doc = "Requests to issue a restart condition."]
132 #[inline(always)]
133 pub fn _1(self) -> &'a mut W {
134 self.variant(RS_A::_1)
135 }
136}
137#[doc = "Field `SP` reader - Stop Condition Issuance Request Note: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state). Note: Do not set the SP bit to 1 while a restart condition is being issued."]
138pub type SP_R = crate::BitReader<SP_A>;
139#[doc = "Stop Condition Issuance Request Note: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state). Note: Do not set the SP bit to 1 while a restart condition is being issued.\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum SP_A {
142 #[doc = "0: Does not request to issue a stop condition."]
143 _0 = 0,
144 #[doc = "1: Requests to issue a stop condition."]
145 _1 = 1,
146}
147impl From<SP_A> for bool {
148 #[inline(always)]
149 fn from(variant: SP_A) -> Self {
150 variant as u8 != 0
151 }
152}
153impl SP_R {
154 #[doc = "Get enumerated values variant"]
155 #[inline(always)]
156 pub fn variant(&self) -> SP_A {
157 match self.bits {
158 false => SP_A::_0,
159 true => SP_A::_1,
160 }
161 }
162 #[doc = "Checks if the value of the field is `_0`"]
163 #[inline(always)]
164 pub fn is_0(&self) -> bool {
165 *self == SP_A::_0
166 }
167 #[doc = "Checks if the value of the field is `_1`"]
168 #[inline(always)]
169 pub fn is_1(&self) -> bool {
170 *self == SP_A::_1
171 }
172}
173#[doc = "Field `SP` writer - Stop Condition Issuance Request Note: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state). Note: Do not set the SP bit to 1 while a restart condition is being issued."]
174pub type SP_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICCR2_SPEC, SP_A, O>;
175impl<'a, const O: u8> SP_W<'a, O> {
176 #[doc = "Does not request to issue a stop condition."]
177 #[inline(always)]
178 pub fn _0(self) -> &'a mut W {
179 self.variant(SP_A::_0)
180 }
181 #[doc = "Requests to issue a stop condition."]
182 #[inline(always)]
183 pub fn _1(self) -> &'a mut W {
184 self.variant(SP_A::_1)
185 }
186}
187#[doc = "Field `TRS` reader - Transmit/Receive Mode"]
188pub type TRS_R = crate::BitReader<TRS_A>;
189#[doc = "Transmit/Receive Mode\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum TRS_A {
192 #[doc = "0: Receive mode"]
193 _0 = 0,
194 #[doc = "1: Transmit mode"]
195 _1 = 1,
196}
197impl From<TRS_A> for bool {
198 #[inline(always)]
199 fn from(variant: TRS_A) -> Self {
200 variant as u8 != 0
201 }
202}
203impl TRS_R {
204 #[doc = "Get enumerated values variant"]
205 #[inline(always)]
206 pub fn variant(&self) -> TRS_A {
207 match self.bits {
208 false => TRS_A::_0,
209 true => TRS_A::_1,
210 }
211 }
212 #[doc = "Checks if the value of the field is `_0`"]
213 #[inline(always)]
214 pub fn is_0(&self) -> bool {
215 *self == TRS_A::_0
216 }
217 #[doc = "Checks if the value of the field is `_1`"]
218 #[inline(always)]
219 pub fn is_1(&self) -> bool {
220 *self == TRS_A::_1
221 }
222}
223#[doc = "Field `TRS` writer - Transmit/Receive Mode"]
224pub type TRS_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICCR2_SPEC, TRS_A, O>;
225impl<'a, const O: u8> TRS_W<'a, O> {
226 #[doc = "Receive mode"]
227 #[inline(always)]
228 pub fn _0(self) -> &'a mut W {
229 self.variant(TRS_A::_0)
230 }
231 #[doc = "Transmit mode"]
232 #[inline(always)]
233 pub fn _1(self) -> &'a mut W {
234 self.variant(TRS_A::_1)
235 }
236}
237#[doc = "Field `MST` reader - Master/Slave Mode"]
238pub type MST_R = crate::BitReader<MST_A>;
239#[doc = "Master/Slave Mode\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum MST_A {
242 #[doc = "0: Slave mode"]
243 _0 = 0,
244 #[doc = "1: Master mode"]
245 _1 = 1,
246}
247impl From<MST_A> for bool {
248 #[inline(always)]
249 fn from(variant: MST_A) -> Self {
250 variant as u8 != 0
251 }
252}
253impl MST_R {
254 #[doc = "Get enumerated values variant"]
255 #[inline(always)]
256 pub fn variant(&self) -> MST_A {
257 match self.bits {
258 false => MST_A::_0,
259 true => MST_A::_1,
260 }
261 }
262 #[doc = "Checks if the value of the field is `_0`"]
263 #[inline(always)]
264 pub fn is_0(&self) -> bool {
265 *self == MST_A::_0
266 }
267 #[doc = "Checks if the value of the field is `_1`"]
268 #[inline(always)]
269 pub fn is_1(&self) -> bool {
270 *self == MST_A::_1
271 }
272}
273#[doc = "Field `MST` writer - Master/Slave Mode"]
274pub type MST_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICCR2_SPEC, MST_A, O>;
275impl<'a, const O: u8> MST_W<'a, O> {
276 #[doc = "Slave mode"]
277 #[inline(always)]
278 pub fn _0(self) -> &'a mut W {
279 self.variant(MST_A::_0)
280 }
281 #[doc = "Master mode"]
282 #[inline(always)]
283 pub fn _1(self) -> &'a mut W {
284 self.variant(MST_A::_1)
285 }
286}
287#[doc = "Field `BBSY` reader - Bus Busy Detection Flag"]
288pub type BBSY_R = crate::BitReader<BBSY_A>;
289#[doc = "Bus Busy Detection Flag\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum BBSY_A {
292 #[doc = "0: The I2C bus is released (bus free state)."]
293 _0 = 0,
294 #[doc = "1: The I2C bus is occupied (bus busy state)."]
295 _1 = 1,
296}
297impl From<BBSY_A> for bool {
298 #[inline(always)]
299 fn from(variant: BBSY_A) -> Self {
300 variant as u8 != 0
301 }
302}
303impl BBSY_R {
304 #[doc = "Get enumerated values variant"]
305 #[inline(always)]
306 pub fn variant(&self) -> BBSY_A {
307 match self.bits {
308 false => BBSY_A::_0,
309 true => BBSY_A::_1,
310 }
311 }
312 #[doc = "Checks if the value of the field is `_0`"]
313 #[inline(always)]
314 pub fn is_0(&self) -> bool {
315 *self == BBSY_A::_0
316 }
317 #[doc = "Checks if the value of the field is `_1`"]
318 #[inline(always)]
319 pub fn is_1(&self) -> bool {
320 *self == BBSY_A::_1
321 }
322}
323impl R {
324 #[doc = "Bit 1 - Start Condition Issuance Request Set the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)."]
325 #[inline(always)]
326 pub fn st(&self) -> ST_R {
327 ST_R::new(((self.bits >> 1) & 1) != 0)
328 }
329 #[doc = "Bit 2 - Restart Condition Issuance Request Note: Do not set the RS bit to 1 while issuing a stop condition."]
330 #[inline(always)]
331 pub fn rs(&self) -> RS_R {
332 RS_R::new(((self.bits >> 2) & 1) != 0)
333 }
334 #[doc = "Bit 3 - Stop Condition Issuance Request Note: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state). Note: Do not set the SP bit to 1 while a restart condition is being issued."]
335 #[inline(always)]
336 pub fn sp(&self) -> SP_R {
337 SP_R::new(((self.bits >> 3) & 1) != 0)
338 }
339 #[doc = "Bit 5 - Transmit/Receive Mode"]
340 #[inline(always)]
341 pub fn trs(&self) -> TRS_R {
342 TRS_R::new(((self.bits >> 5) & 1) != 0)
343 }
344 #[doc = "Bit 6 - Master/Slave Mode"]
345 #[inline(always)]
346 pub fn mst(&self) -> MST_R {
347 MST_R::new(((self.bits >> 6) & 1) != 0)
348 }
349 #[doc = "Bit 7 - Bus Busy Detection Flag"]
350 #[inline(always)]
351 pub fn bbsy(&self) -> BBSY_R {
352 BBSY_R::new(((self.bits >> 7) & 1) != 0)
353 }
354}
355impl W {
356 #[doc = "Bit 1 - Start Condition Issuance Request Set the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)."]
357 #[inline(always)]
358 #[must_use]
359 pub fn st(&mut self) -> ST_W<1> {
360 ST_W::new(self)
361 }
362 #[doc = "Bit 2 - Restart Condition Issuance Request Note: Do not set the RS bit to 1 while issuing a stop condition."]
363 #[inline(always)]
364 #[must_use]
365 pub fn rs(&mut self) -> RS_W<2> {
366 RS_W::new(self)
367 }
368 #[doc = "Bit 3 - Stop Condition Issuance Request Note: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state). Note: Do not set the SP bit to 1 while a restart condition is being issued."]
369 #[inline(always)]
370 #[must_use]
371 pub fn sp(&mut self) -> SP_W<3> {
372 SP_W::new(self)
373 }
374 #[doc = "Bit 5 - Transmit/Receive Mode"]
375 #[inline(always)]
376 #[must_use]
377 pub fn trs(&mut self) -> TRS_W<5> {
378 TRS_W::new(self)
379 }
380 #[doc = "Bit 6 - Master/Slave Mode"]
381 #[inline(always)]
382 #[must_use]
383 pub fn mst(&mut self) -> MST_W<6> {
384 MST_W::new(self)
385 }
386 #[doc = "Writes raw bits to the register."]
387 #[inline(always)]
388 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
389 self.0.bits(bits);
390 self
391 }
392}
393#[doc = "I2C Bus Control Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iccr2](index.html) module"]
394pub struct ICCR2_SPEC;
395impl crate::RegisterSpec for ICCR2_SPEC {
396 type Ux = u8;
397}
398#[doc = "`read()` method returns [iccr2::R](R) reader structure"]
399impl crate::Readable for ICCR2_SPEC {
400 type Reader = R;
401}
402#[doc = "`write(|w| ..)` method takes [iccr2::W](W) writer structure"]
403impl crate::Writable for ICCR2_SPEC {
404 type Writer = W;
405 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
406 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
407}
408#[doc = "`reset()` method sets ICCR2 to value 0"]
409impl crate::Resettable for ICCR2_SPEC {
410 const RESET_VALUE: Self::Ux = 0;
411}