ra6m4/usbfs/
dpusr0r.rs

1#[doc = "Register `DPUSR0R` reader"]
2pub struct R(crate::R<DPUSR0R_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DPUSR0R_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DPUSR0R_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DPUSR0R_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DPUSR0R` writer"]
17pub struct W(crate::W<DPUSR0R_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DPUSR0R_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DPUSR0R_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DPUSR0R_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SRPC0` reader - USB Single-ended Receiver Control"]
38pub type SRPC0_R = crate::BitReader<SRPC0_A>;
39#[doc = "USB Single-ended Receiver Control\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum SRPC0_A {
42    #[doc = "0: Disable input through DP and DM inputs"]
43    _0 = 0,
44    #[doc = "1: Enable input through DP and DM inputs"]
45    _1 = 1,
46}
47impl From<SRPC0_A> for bool {
48    #[inline(always)]
49    fn from(variant: SRPC0_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl SRPC0_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> SRPC0_A {
57        match self.bits {
58            false => SRPC0_A::_0,
59            true => SRPC0_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == SRPC0_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == SRPC0_A::_1
71    }
72}
73#[doc = "Field `SRPC0` writer - USB Single-ended Receiver Control"]
74pub type SRPC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, DPUSR0R_SPEC, SRPC0_A, O>;
75impl<'a, const O: u8> SRPC0_W<'a, O> {
76    #[doc = "Disable input through DP and DM inputs"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(SRPC0_A::_0)
80    }
81    #[doc = "Enable input through DP and DM inputs"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(SRPC0_A::_1)
85    }
86}
87#[doc = "Field `RPUE0` reader - DP Pull-Up Resistor Control"]
88pub type RPUE0_R = crate::BitReader<RPUE0_A>;
89#[doc = "DP Pull-Up Resistor Control\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum RPUE0_A {
92    #[doc = "0: Disable DP pull-up resistor"]
93    _0 = 0,
94    #[doc = "1: Enable DP pull-up resistor"]
95    _1 = 1,
96}
97impl From<RPUE0_A> for bool {
98    #[inline(always)]
99    fn from(variant: RPUE0_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl RPUE0_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> RPUE0_A {
107        match self.bits {
108            false => RPUE0_A::_0,
109            true => RPUE0_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == RPUE0_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == RPUE0_A::_1
121    }
122}
123#[doc = "Field `RPUE0` writer - DP Pull-Up Resistor Control"]
124pub type RPUE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, DPUSR0R_SPEC, RPUE0_A, O>;
125impl<'a, const O: u8> RPUE0_W<'a, O> {
126    #[doc = "Disable DP pull-up resistor"]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(RPUE0_A::_0)
130    }
131    #[doc = "Enable DP pull-up resistor"]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(RPUE0_A::_1)
135    }
136}
137#[doc = "Field `DRPD0` reader - D+/D- Pull-Down Resistor Control"]
138pub type DRPD0_R = crate::BitReader<DRPD0_A>;
139#[doc = "D+/D- Pull-Down Resistor Control\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum DRPD0_A {
142    #[doc = "0: Disable DP/DM pull-down resistor"]
143    _0 = 0,
144    #[doc = "1: Enable DP/DM pull-down resistor"]
145    _1 = 1,
146}
147impl From<DRPD0_A> for bool {
148    #[inline(always)]
149    fn from(variant: DRPD0_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl DRPD0_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> DRPD0_A {
157        match self.bits {
158            false => DRPD0_A::_0,
159            true => DRPD0_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == DRPD0_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == DRPD0_A::_1
171    }
172}
173#[doc = "Field `DRPD0` writer - D+/D- Pull-Down Resistor Control"]
174pub type DRPD0_W<'a, const O: u8> = crate::BitWriter<'a, u32, DPUSR0R_SPEC, DRPD0_A, O>;
175impl<'a, const O: u8> DRPD0_W<'a, O> {
176    #[doc = "Disable DP/DM pull-down resistor"]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(DRPD0_A::_0)
180    }
181    #[doc = "Enable DP/DM pull-down resistor"]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(DRPD0_A::_1)
185    }
186}
187#[doc = "Field `FIXPHY0` reader - USB Transceiver Output Fix"]
188pub type FIXPHY0_R = crate::BitReader<FIXPHY0_A>;
189#[doc = "USB Transceiver Output Fix\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum FIXPHY0_A {
192    #[doc = "0: Fix outputs in Normal mode and on return from Deep Software Standby mode"]
193    _0 = 0,
194    #[doc = "1: Fix outputs on transition to Deep Software Standby mode"]
195    _1 = 1,
196}
197impl From<FIXPHY0_A> for bool {
198    #[inline(always)]
199    fn from(variant: FIXPHY0_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl FIXPHY0_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> FIXPHY0_A {
207        match self.bits {
208            false => FIXPHY0_A::_0,
209            true => FIXPHY0_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == FIXPHY0_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == FIXPHY0_A::_1
221    }
222}
223#[doc = "Field `FIXPHY0` writer - USB Transceiver Output Fix"]
224pub type FIXPHY0_W<'a, const O: u8> = crate::BitWriter<'a, u32, DPUSR0R_SPEC, FIXPHY0_A, O>;
225impl<'a, const O: u8> FIXPHY0_W<'a, O> {
226    #[doc = "Fix outputs in Normal mode and on return from Deep Software Standby mode"]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(FIXPHY0_A::_0)
230    }
231    #[doc = "Fix outputs on transition to Deep Software Standby mode"]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(FIXPHY0_A::_1)
235    }
236}
237#[doc = "Field `DP0` reader - USB D+ Input"]
238pub type DP0_R = crate::BitReader<bool>;
239#[doc = "Field `DM0` reader - USB D- Input"]
240pub type DM0_R = crate::BitReader<bool>;
241#[doc = "Field `DOVCA0` reader - USB OVRCURA Input"]
242pub type DOVCA0_R = crate::BitReader<bool>;
243#[doc = "Field `DOVCB0` reader - USB OVRCURB Input"]
244pub type DOVCB0_R = crate::BitReader<bool>;
245#[doc = "Field `DVBSTS0` reader - USB VBUS Input"]
246pub type DVBSTS0_R = crate::BitReader<bool>;
247impl R {
248    #[doc = "Bit 0 - USB Single-ended Receiver Control"]
249    #[inline(always)]
250    pub fn srpc0(&self) -> SRPC0_R {
251        SRPC0_R::new((self.bits & 1) != 0)
252    }
253    #[doc = "Bit 1 - DP Pull-Up Resistor Control"]
254    #[inline(always)]
255    pub fn rpue0(&self) -> RPUE0_R {
256        RPUE0_R::new(((self.bits >> 1) & 1) != 0)
257    }
258    #[doc = "Bit 3 - D+/D- Pull-Down Resistor Control"]
259    #[inline(always)]
260    pub fn drpd0(&self) -> DRPD0_R {
261        DRPD0_R::new(((self.bits >> 3) & 1) != 0)
262    }
263    #[doc = "Bit 4 - USB Transceiver Output Fix"]
264    #[inline(always)]
265    pub fn fixphy0(&self) -> FIXPHY0_R {
266        FIXPHY0_R::new(((self.bits >> 4) & 1) != 0)
267    }
268    #[doc = "Bit 16 - USB D+ Input"]
269    #[inline(always)]
270    pub fn dp0(&self) -> DP0_R {
271        DP0_R::new(((self.bits >> 16) & 1) != 0)
272    }
273    #[doc = "Bit 17 - USB D- Input"]
274    #[inline(always)]
275    pub fn dm0(&self) -> DM0_R {
276        DM0_R::new(((self.bits >> 17) & 1) != 0)
277    }
278    #[doc = "Bit 20 - USB OVRCURA Input"]
279    #[inline(always)]
280    pub fn dovca0(&self) -> DOVCA0_R {
281        DOVCA0_R::new(((self.bits >> 20) & 1) != 0)
282    }
283    #[doc = "Bit 21 - USB OVRCURB Input"]
284    #[inline(always)]
285    pub fn dovcb0(&self) -> DOVCB0_R {
286        DOVCB0_R::new(((self.bits >> 21) & 1) != 0)
287    }
288    #[doc = "Bit 23 - USB VBUS Input"]
289    #[inline(always)]
290    pub fn dvbsts0(&self) -> DVBSTS0_R {
291        DVBSTS0_R::new(((self.bits >> 23) & 1) != 0)
292    }
293}
294impl W {
295    #[doc = "Bit 0 - USB Single-ended Receiver Control"]
296    #[inline(always)]
297    #[must_use]
298    pub fn srpc0(&mut self) -> SRPC0_W<0> {
299        SRPC0_W::new(self)
300    }
301    #[doc = "Bit 1 - DP Pull-Up Resistor Control"]
302    #[inline(always)]
303    #[must_use]
304    pub fn rpue0(&mut self) -> RPUE0_W<1> {
305        RPUE0_W::new(self)
306    }
307    #[doc = "Bit 3 - D+/D- Pull-Down Resistor Control"]
308    #[inline(always)]
309    #[must_use]
310    pub fn drpd0(&mut self) -> DRPD0_W<3> {
311        DRPD0_W::new(self)
312    }
313    #[doc = "Bit 4 - USB Transceiver Output Fix"]
314    #[inline(always)]
315    #[must_use]
316    pub fn fixphy0(&mut self) -> FIXPHY0_W<4> {
317        FIXPHY0_W::new(self)
318    }
319    #[doc = "Writes raw bits to the register."]
320    #[inline(always)]
321    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
322        self.0.bits(bits);
323        self
324    }
325}
326#[doc = "Deep Software Standby USB Transceiver Control/Pin Monitor Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dpusr0r](index.html) module"]
327pub struct DPUSR0R_SPEC;
328impl crate::RegisterSpec for DPUSR0R_SPEC {
329    type Ux = u32;
330}
331#[doc = "`read()` method returns [dpusr0r::R](R) reader structure"]
332impl crate::Readable for DPUSR0R_SPEC {
333    type Reader = R;
334}
335#[doc = "`write(|w| ..)` method takes [dpusr0r::W](W) writer structure"]
336impl crate::Writable for DPUSR0R_SPEC {
337    type Writer = W;
338    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
339    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
340}
341#[doc = "`reset()` method sets DPUSR0R to value 0"]
342impl crate::Resettable for DPUSR0R_SPEC {
343    const RESET_VALUE: Self::Ux = 0;
344}
ra6m4/usbfs/dpusr0r.rs

ra6m4/usbfs/
dpusr0r.rs
