1#[doc = "Register `DSR0` reader"]
2pub struct R(crate::R<DSR0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DSR0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DSR0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DSR0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DSR0` writer"]
17pub struct W(crate::W<DSR0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DSR0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DSR0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DSR0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `DV0SZ` reader - Device 0 size setting"]
38pub type DV0SZ_R = crate::FieldReader<u32, u32>;
39#[doc = "Field `DV0SZ` writer - Device 0 size setting"]
40pub type DV0SZ_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DSR0_SPEC, u32, u32, 30, O>;
41#[doc = "Field `DV0TYP` reader - Device 0 type setting"]
42pub type DV0TYP_R = crate::FieldReader<u8, DV0TYP_A>;
43#[doc = "Device 0 type setting\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum DV0TYP_A {
47 #[doc = "0: flash on device 0"]
48 _00 = 0,
49 #[doc = "1: RAM on device 0"]
50 _01 = 1,
51 #[doc = "2: no connection on device 0"]
52 _10 = 2,
53 #[doc = "3: forbidden"]
54 _11 = 3,
55}
56impl From<DV0TYP_A> for u8 {
57 #[inline(always)]
58 fn from(variant: DV0TYP_A) -> Self {
59 variant as _
60 }
61}
62impl DV0TYP_R {
63 #[doc = "Get enumerated values variant"]
64 #[inline(always)]
65 pub fn variant(&self) -> DV0TYP_A {
66 match self.bits {
67 0 => DV0TYP_A::_00,
68 1 => DV0TYP_A::_01,
69 2 => DV0TYP_A::_10,
70 3 => DV0TYP_A::_11,
71 _ => unreachable!(),
72 }
73 }
74 #[doc = "Checks if the value of the field is `_00`"]
75 #[inline(always)]
76 pub fn is_00(&self) -> bool {
77 *self == DV0TYP_A::_00
78 }
79 #[doc = "Checks if the value of the field is `_01`"]
80 #[inline(always)]
81 pub fn is_01(&self) -> bool {
82 *self == DV0TYP_A::_01
83 }
84 #[doc = "Checks if the value of the field is `_10`"]
85 #[inline(always)]
86 pub fn is_10(&self) -> bool {
87 *self == DV0TYP_A::_10
88 }
89 #[doc = "Checks if the value of the field is `_11`"]
90 #[inline(always)]
91 pub fn is_11(&self) -> bool {
92 *self == DV0TYP_A::_11
93 }
94}
95#[doc = "Field `DV0TYP` writer - Device 0 type setting"]
96pub type DV0TYP_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DSR0_SPEC, u8, DV0TYP_A, 2, O>;
97impl<'a, const O: u8> DV0TYP_W<'a, O> {
98 #[doc = "flash on device 0"]
99 #[inline(always)]
100 pub fn _00(self) -> &'a mut W {
101 self.variant(DV0TYP_A::_00)
102 }
103 #[doc = "RAM on device 0"]
104 #[inline(always)]
105 pub fn _01(self) -> &'a mut W {
106 self.variant(DV0TYP_A::_01)
107 }
108 #[doc = "no connection on device 0"]
109 #[inline(always)]
110 pub fn _10(self) -> &'a mut W {
111 self.variant(DV0TYP_A::_10)
112 }
113 #[doc = "forbidden"]
114 #[inline(always)]
115 pub fn _11(self) -> &'a mut W {
116 self.variant(DV0TYP_A::_11)
117 }
118}
119impl R {
120 #[doc = "Bits 0:29 - Device 0 size setting"]
121 #[inline(always)]
122 pub fn dv0sz(&self) -> DV0SZ_R {
123 DV0SZ_R::new(self.bits & 0x3fff_ffff)
124 }
125 #[doc = "Bits 30:31 - Device 0 type setting"]
126 #[inline(always)]
127 pub fn dv0typ(&self) -> DV0TYP_R {
128 DV0TYP_R::new(((self.bits >> 30) & 3) as u8)
129 }
130}
131impl W {
132 #[doc = "Bits 0:29 - Device 0 size setting"]
133 #[inline(always)]
134 #[must_use]
135 pub fn dv0sz(&mut self) -> DV0SZ_W<0> {
136 DV0SZ_W::new(self)
137 }
138 #[doc = "Bits 30:31 - Device 0 type setting"]
139 #[inline(always)]
140 #[must_use]
141 pub fn dv0typ(&mut self) -> DV0TYP_W<30> {
142 DV0TYP_W::new(self)
143 }
144 #[doc = "Writes raw bits to the register."]
145 #[inline(always)]
146 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
147 self.0.bits(bits);
148 self
149 }
150}
151#[doc = "Device Size Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dsr0](index.html) module"]
152pub struct DSR0_SPEC;
153impl crate::RegisterSpec for DSR0_SPEC {
154 type Ux = u32;
155}
156#[doc = "`read()` method returns [dsr0::R](R) reader structure"]
157impl crate::Readable for DSR0_SPEC {
158 type Reader = R;
159}
160#[doc = "`write(|w| ..)` method takes [dsr0::W](W) writer structure"]
161impl crate::Writable for DSR0_SPEC {
162 type Writer = W;
163 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
164 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
165}
166#[doc = "`reset()` method sets DSR0 to value 0"]
167impl crate::Resettable for DSR0_SPEC {
168 const RESET_VALUE: Self::Ux = 0;
169}