ra6m3/bus/
csrecen.rs

1#[doc = "Register `CSRECEN` reader"]
2pub struct R(crate::R<CSRECEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CSRECEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CSRECEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CSRECEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CSRECEN` writer"]
17pub struct W(crate::W<CSRECEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CSRECEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CSRECEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CSRECEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `RCVEN0` reader - Separate Bus Recovery Cycle Insertion Enable 0"]
38pub type RCVEN0_R = crate::BitReader<RCVEN0_A>;
39#[doc = "Separate Bus Recovery Cycle Insertion Enable 0\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum RCVEN0_A {
42    #[doc = "0: Recovery cycle insertion is disabled."]
43    _0 = 0,
44    #[doc = "1: Recovery cycle insertion is enabled."]
45    _1 = 1,
46}
47impl From<RCVEN0_A> for bool {
48    #[inline(always)]
49    fn from(variant: RCVEN0_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl RCVEN0_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> RCVEN0_A {
57        match self.bits {
58            false => RCVEN0_A::_0,
59            true => RCVEN0_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == RCVEN0_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == RCVEN0_A::_1
71    }
72}
73#[doc = "Field `RCVEN0` writer - Separate Bus Recovery Cycle Insertion Enable 0"]
74pub type RCVEN0_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVEN0_A, O>;
75impl<'a, const O: u8> RCVEN0_W<'a, O> {
76    #[doc = "Recovery cycle insertion is disabled."]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(RCVEN0_A::_0)
80    }
81    #[doc = "Recovery cycle insertion is enabled."]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(RCVEN0_A::_1)
85    }
86}
87#[doc = "Field `RCVEN1` reader - Separate Bus Recovery Cycle Insertion Enable 1"]
88pub type RCVEN1_R = crate::BitReader<RCVEN1_A>;
89#[doc = "Separate Bus Recovery Cycle Insertion Enable 1\n\nValue on reset: 1"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum RCVEN1_A {
92    #[doc = "0: Recovery cycle insertion is disabled."]
93    _0 = 0,
94    #[doc = "1: Recovery cycle insertion is enabled."]
95    _1 = 1,
96}
97impl From<RCVEN1_A> for bool {
98    #[inline(always)]
99    fn from(variant: RCVEN1_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl RCVEN1_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> RCVEN1_A {
107        match self.bits {
108            false => RCVEN1_A::_0,
109            true => RCVEN1_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == RCVEN1_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == RCVEN1_A::_1
121    }
122}
123#[doc = "Field `RCVEN1` writer - Separate Bus Recovery Cycle Insertion Enable 1"]
124pub type RCVEN1_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVEN1_A, O>;
125impl<'a, const O: u8> RCVEN1_W<'a, O> {
126    #[doc = "Recovery cycle insertion is disabled."]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(RCVEN1_A::_0)
130    }
131    #[doc = "Recovery cycle insertion is enabled."]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(RCVEN1_A::_1)
135    }
136}
137#[doc = "Field `RCVEN2` reader - Separate Bus Recovery Cycle Insertion Enable 2"]
138pub type RCVEN2_R = crate::BitReader<RCVEN2_A>;
139#[doc = "Separate Bus Recovery Cycle Insertion Enable 2\n\nValue on reset: 1"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum RCVEN2_A {
142    #[doc = "0: Recovery cycle insertion is disabled."]
143    _0 = 0,
144    #[doc = "1: Recovery cycle insertion is enabled."]
145    _1 = 1,
146}
147impl From<RCVEN2_A> for bool {
148    #[inline(always)]
149    fn from(variant: RCVEN2_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl RCVEN2_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> RCVEN2_A {
157        match self.bits {
158            false => RCVEN2_A::_0,
159            true => RCVEN2_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == RCVEN2_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == RCVEN2_A::_1
171    }
172}
173#[doc = "Field `RCVEN2` writer - Separate Bus Recovery Cycle Insertion Enable 2"]
174pub type RCVEN2_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVEN2_A, O>;
175impl<'a, const O: u8> RCVEN2_W<'a, O> {
176    #[doc = "Recovery cycle insertion is disabled."]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(RCVEN2_A::_0)
180    }
181    #[doc = "Recovery cycle insertion is enabled."]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(RCVEN2_A::_1)
185    }
186}
187#[doc = "Field `RCVEN3` reader - Separate Bus Recovery Cycle Insertion Enable 3"]
188pub type RCVEN3_R = crate::BitReader<RCVEN3_A>;
189#[doc = "Separate Bus Recovery Cycle Insertion Enable 3\n\nValue on reset: 1"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum RCVEN3_A {
192    #[doc = "0: Recovery cycle insertion is disabled."]
193    _0 = 0,
194    #[doc = "1: Recovery cycle insertion is enabled."]
195    _1 = 1,
196}
197impl From<RCVEN3_A> for bool {
198    #[inline(always)]
199    fn from(variant: RCVEN3_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl RCVEN3_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> RCVEN3_A {
207        match self.bits {
208            false => RCVEN3_A::_0,
209            true => RCVEN3_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == RCVEN3_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == RCVEN3_A::_1
221    }
222}
223#[doc = "Field `RCVEN3` writer - Separate Bus Recovery Cycle Insertion Enable 3"]
224pub type RCVEN3_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVEN3_A, O>;
225impl<'a, const O: u8> RCVEN3_W<'a, O> {
226    #[doc = "Recovery cycle insertion is disabled."]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(RCVEN3_A::_0)
230    }
231    #[doc = "Recovery cycle insertion is enabled."]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(RCVEN3_A::_1)
235    }
236}
237#[doc = "Field `RCVEN4` reader - Separate Bus Recovery Cycle Insertion Enable 4"]
238pub type RCVEN4_R = crate::BitReader<RCVEN4_A>;
239#[doc = "Separate Bus Recovery Cycle Insertion Enable 4\n\nValue on reset: 1"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum RCVEN4_A {
242    #[doc = "0: Recovery cycle insertion is disabled."]
243    _0 = 0,
244    #[doc = "1: Recovery cycle insertion is enabled."]
245    _1 = 1,
246}
247impl From<RCVEN4_A> for bool {
248    #[inline(always)]
249    fn from(variant: RCVEN4_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl RCVEN4_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> RCVEN4_A {
257        match self.bits {
258            false => RCVEN4_A::_0,
259            true => RCVEN4_A::_1,
260        }
261    }
262    #[doc = "Checks if the value of the field is `_0`"]
263    #[inline(always)]
264    pub fn is_0(&self) -> bool {
265        *self == RCVEN4_A::_0
266    }
267    #[doc = "Checks if the value of the field is `_1`"]
268    #[inline(always)]
269    pub fn is_1(&self) -> bool {
270        *self == RCVEN4_A::_1
271    }
272}
273#[doc = "Field `RCVEN4` writer - Separate Bus Recovery Cycle Insertion Enable 4"]
274pub type RCVEN4_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVEN4_A, O>;
275impl<'a, const O: u8> RCVEN4_W<'a, O> {
276    #[doc = "Recovery cycle insertion is disabled."]
277    #[inline(always)]
278    pub fn _0(self) -> &'a mut W {
279        self.variant(RCVEN4_A::_0)
280    }
281    #[doc = "Recovery cycle insertion is enabled."]
282    #[inline(always)]
283    pub fn _1(self) -> &'a mut W {
284        self.variant(RCVEN4_A::_1)
285    }
286}
287#[doc = "Field `RCVEN5` reader - Separate Bus Recovery Cycle Insertion Enable 5"]
288pub type RCVEN5_R = crate::BitReader<RCVEN5_A>;
289#[doc = "Separate Bus Recovery Cycle Insertion Enable 5\n\nValue on reset: 1"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum RCVEN5_A {
292    #[doc = "0: Recovery cycle insertion is disabled."]
293    _0 = 0,
294    #[doc = "1: Recovery cycle insertion is enabled."]
295    _1 = 1,
296}
297impl From<RCVEN5_A> for bool {
298    #[inline(always)]
299    fn from(variant: RCVEN5_A) -> Self {
300        variant as u8 != 0
301    }
302}
303impl RCVEN5_R {
304    #[doc = "Get enumerated values variant"]
305    #[inline(always)]
306    pub fn variant(&self) -> RCVEN5_A {
307        match self.bits {
308            false => RCVEN5_A::_0,
309            true => RCVEN5_A::_1,
310        }
311    }
312    #[doc = "Checks if the value of the field is `_0`"]
313    #[inline(always)]
314    pub fn is_0(&self) -> bool {
315        *self == RCVEN5_A::_0
316    }
317    #[doc = "Checks if the value of the field is `_1`"]
318    #[inline(always)]
319    pub fn is_1(&self) -> bool {
320        *self == RCVEN5_A::_1
321    }
322}
323#[doc = "Field `RCVEN5` writer - Separate Bus Recovery Cycle Insertion Enable 5"]
324pub type RCVEN5_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVEN5_A, O>;
325impl<'a, const O: u8> RCVEN5_W<'a, O> {
326    #[doc = "Recovery cycle insertion is disabled."]
327    #[inline(always)]
328    pub fn _0(self) -> &'a mut W {
329        self.variant(RCVEN5_A::_0)
330    }
331    #[doc = "Recovery cycle insertion is enabled."]
332    #[inline(always)]
333    pub fn _1(self) -> &'a mut W {
334        self.variant(RCVEN5_A::_1)
335    }
336}
337#[doc = "Field `RCVEN6` reader - Separate Bus Recovery Cycle Insertion Enable 6"]
338pub type RCVEN6_R = crate::BitReader<RCVEN6_A>;
339#[doc = "Separate Bus Recovery Cycle Insertion Enable 6\n\nValue on reset: 0"]
340#[derive(Clone, Copy, Debug, PartialEq, Eq)]
341pub enum RCVEN6_A {
342    #[doc = "0: Recovery cycle insertion is disabled."]
343    _0 = 0,
344    #[doc = "1: Recovery cycle insertion is enabled."]
345    _1 = 1,
346}
347impl From<RCVEN6_A> for bool {
348    #[inline(always)]
349    fn from(variant: RCVEN6_A) -> Self {
350        variant as u8 != 0
351    }
352}
353impl RCVEN6_R {
354    #[doc = "Get enumerated values variant"]
355    #[inline(always)]
356    pub fn variant(&self) -> RCVEN6_A {
357        match self.bits {
358            false => RCVEN6_A::_0,
359            true => RCVEN6_A::_1,
360        }
361    }
362    #[doc = "Checks if the value of the field is `_0`"]
363    #[inline(always)]
364    pub fn is_0(&self) -> bool {
365        *self == RCVEN6_A::_0
366    }
367    #[doc = "Checks if the value of the field is `_1`"]
368    #[inline(always)]
369    pub fn is_1(&self) -> bool {
370        *self == RCVEN6_A::_1
371    }
372}
373#[doc = "Field `RCVEN6` writer - Separate Bus Recovery Cycle Insertion Enable 6"]
374pub type RCVEN6_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVEN6_A, O>;
375impl<'a, const O: u8> RCVEN6_W<'a, O> {
376    #[doc = "Recovery cycle insertion is disabled."]
377    #[inline(always)]
378    pub fn _0(self) -> &'a mut W {
379        self.variant(RCVEN6_A::_0)
380    }
381    #[doc = "Recovery cycle insertion is enabled."]
382    #[inline(always)]
383    pub fn _1(self) -> &'a mut W {
384        self.variant(RCVEN6_A::_1)
385    }
386}
387#[doc = "Field `RCVEN7` reader - Separate Bus Recovery Cycle Insertion Enable 7"]
388pub type RCVEN7_R = crate::BitReader<RCVEN7_A>;
389#[doc = "Separate Bus Recovery Cycle Insertion Enable 7\n\nValue on reset: 0"]
390#[derive(Clone, Copy, Debug, PartialEq, Eq)]
391pub enum RCVEN7_A {
392    #[doc = "0: Recovery cycle insertion is disabled."]
393    _0 = 0,
394    #[doc = "1: Recovery cycle insertion is enabled."]
395    _1 = 1,
396}
397impl From<RCVEN7_A> for bool {
398    #[inline(always)]
399    fn from(variant: RCVEN7_A) -> Self {
400        variant as u8 != 0
401    }
402}
403impl RCVEN7_R {
404    #[doc = "Get enumerated values variant"]
405    #[inline(always)]
406    pub fn variant(&self) -> RCVEN7_A {
407        match self.bits {
408            false => RCVEN7_A::_0,
409            true => RCVEN7_A::_1,
410        }
411    }
412    #[doc = "Checks if the value of the field is `_0`"]
413    #[inline(always)]
414    pub fn is_0(&self) -> bool {
415        *self == RCVEN7_A::_0
416    }
417    #[doc = "Checks if the value of the field is `_1`"]
418    #[inline(always)]
419    pub fn is_1(&self) -> bool {
420        *self == RCVEN7_A::_1
421    }
422}
423#[doc = "Field `RCVEN7` writer - Separate Bus Recovery Cycle Insertion Enable 7"]
424pub type RCVEN7_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVEN7_A, O>;
425impl<'a, const O: u8> RCVEN7_W<'a, O> {
426    #[doc = "Recovery cycle insertion is disabled."]
427    #[inline(always)]
428    pub fn _0(self) -> &'a mut W {
429        self.variant(RCVEN7_A::_0)
430    }
431    #[doc = "Recovery cycle insertion is enabled."]
432    #[inline(always)]
433    pub fn _1(self) -> &'a mut W {
434        self.variant(RCVEN7_A::_1)
435    }
436}
437#[doc = "Field `RCVENM0` reader - Multiplexed Bus Recovery Cycle Insertion Enable 0"]
438pub type RCVENM0_R = crate::BitReader<RCVENM0_A>;
439#[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 0\n\nValue on reset: 0"]
440#[derive(Clone, Copy, Debug, PartialEq, Eq)]
441pub enum RCVENM0_A {
442    #[doc = "0: Recovery cycle insertion is disabled."]
443    _0 = 0,
444    #[doc = "1: Recovery cycle insertion is enabled."]
445    _1 = 1,
446}
447impl From<RCVENM0_A> for bool {
448    #[inline(always)]
449    fn from(variant: RCVENM0_A) -> Self {
450        variant as u8 != 0
451    }
452}
453impl RCVENM0_R {
454    #[doc = "Get enumerated values variant"]
455    #[inline(always)]
456    pub fn variant(&self) -> RCVENM0_A {
457        match self.bits {
458            false => RCVENM0_A::_0,
459            true => RCVENM0_A::_1,
460        }
461    }
462    #[doc = "Checks if the value of the field is `_0`"]
463    #[inline(always)]
464    pub fn is_0(&self) -> bool {
465        *self == RCVENM0_A::_0
466    }
467    #[doc = "Checks if the value of the field is `_1`"]
468    #[inline(always)]
469    pub fn is_1(&self) -> bool {
470        *self == RCVENM0_A::_1
471    }
472}
473#[doc = "Field `RCVENM0` writer - Multiplexed Bus Recovery Cycle Insertion Enable 0"]
474pub type RCVENM0_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVENM0_A, O>;
475impl<'a, const O: u8> RCVENM0_W<'a, O> {
476    #[doc = "Recovery cycle insertion is disabled."]
477    #[inline(always)]
478    pub fn _0(self) -> &'a mut W {
479        self.variant(RCVENM0_A::_0)
480    }
481    #[doc = "Recovery cycle insertion is enabled."]
482    #[inline(always)]
483    pub fn _1(self) -> &'a mut W {
484        self.variant(RCVENM0_A::_1)
485    }
486}
487#[doc = "Field `RCVENM1` reader - Multiplexed Bus Recovery Cycle Insertion Enable 1"]
488pub type RCVENM1_R = crate::BitReader<RCVENM1_A>;
489#[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 1\n\nValue on reset: 1"]
490#[derive(Clone, Copy, Debug, PartialEq, Eq)]
491pub enum RCVENM1_A {
492    #[doc = "0: Recovery cycle insertion is disabled."]
493    _0 = 0,
494    #[doc = "1: Recovery cycle insertion is enabled."]
495    _1 = 1,
496}
497impl From<RCVENM1_A> for bool {
498    #[inline(always)]
499    fn from(variant: RCVENM1_A) -> Self {
500        variant as u8 != 0
501    }
502}
503impl RCVENM1_R {
504    #[doc = "Get enumerated values variant"]
505    #[inline(always)]
506    pub fn variant(&self) -> RCVENM1_A {
507        match self.bits {
508            false => RCVENM1_A::_0,
509            true => RCVENM1_A::_1,
510        }
511    }
512    #[doc = "Checks if the value of the field is `_0`"]
513    #[inline(always)]
514    pub fn is_0(&self) -> bool {
515        *self == RCVENM1_A::_0
516    }
517    #[doc = "Checks if the value of the field is `_1`"]
518    #[inline(always)]
519    pub fn is_1(&self) -> bool {
520        *self == RCVENM1_A::_1
521    }
522}
523#[doc = "Field `RCVENM1` writer - Multiplexed Bus Recovery Cycle Insertion Enable 1"]
524pub type RCVENM1_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVENM1_A, O>;
525impl<'a, const O: u8> RCVENM1_W<'a, O> {
526    #[doc = "Recovery cycle insertion is disabled."]
527    #[inline(always)]
528    pub fn _0(self) -> &'a mut W {
529        self.variant(RCVENM1_A::_0)
530    }
531    #[doc = "Recovery cycle insertion is enabled."]
532    #[inline(always)]
533    pub fn _1(self) -> &'a mut W {
534        self.variant(RCVENM1_A::_1)
535    }
536}
537#[doc = "Field `RCVENM2` reader - Multiplexed Bus Recovery Cycle Insertion Enable 2"]
538pub type RCVENM2_R = crate::BitReader<RCVENM2_A>;
539#[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 2\n\nValue on reset: 1"]
540#[derive(Clone, Copy, Debug, PartialEq, Eq)]
541pub enum RCVENM2_A {
542    #[doc = "0: Recovery cycle insertion is disabled."]
543    _0 = 0,
544    #[doc = "1: Recovery cycle insertion is enabled."]
545    _1 = 1,
546}
547impl From<RCVENM2_A> for bool {
548    #[inline(always)]
549    fn from(variant: RCVENM2_A) -> Self {
550        variant as u8 != 0
551    }
552}
553impl RCVENM2_R {
554    #[doc = "Get enumerated values variant"]
555    #[inline(always)]
556    pub fn variant(&self) -> RCVENM2_A {
557        match self.bits {
558            false => RCVENM2_A::_0,
559            true => RCVENM2_A::_1,
560        }
561    }
562    #[doc = "Checks if the value of the field is `_0`"]
563    #[inline(always)]
564    pub fn is_0(&self) -> bool {
565        *self == RCVENM2_A::_0
566    }
567    #[doc = "Checks if the value of the field is `_1`"]
568    #[inline(always)]
569    pub fn is_1(&self) -> bool {
570        *self == RCVENM2_A::_1
571    }
572}
573#[doc = "Field `RCVENM2` writer - Multiplexed Bus Recovery Cycle Insertion Enable 2"]
574pub type RCVENM2_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVENM2_A, O>;
575impl<'a, const O: u8> RCVENM2_W<'a, O> {
576    #[doc = "Recovery cycle insertion is disabled."]
577    #[inline(always)]
578    pub fn _0(self) -> &'a mut W {
579        self.variant(RCVENM2_A::_0)
580    }
581    #[doc = "Recovery cycle insertion is enabled."]
582    #[inline(always)]
583    pub fn _1(self) -> &'a mut W {
584        self.variant(RCVENM2_A::_1)
585    }
586}
587#[doc = "Field `RCVENM3` reader - Multiplexed Bus Recovery Cycle Insertion Enable 3"]
588pub type RCVENM3_R = crate::BitReader<RCVENM3_A>;
589#[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 3\n\nValue on reset: 1"]
590#[derive(Clone, Copy, Debug, PartialEq, Eq)]
591pub enum RCVENM3_A {
592    #[doc = "0: Recovery cycle insertion is disabled."]
593    _0 = 0,
594    #[doc = "1: Recovery cycle insertion is enabled."]
595    _1 = 1,
596}
597impl From<RCVENM3_A> for bool {
598    #[inline(always)]
599    fn from(variant: RCVENM3_A) -> Self {
600        variant as u8 != 0
601    }
602}
603impl RCVENM3_R {
604    #[doc = "Get enumerated values variant"]
605    #[inline(always)]
606    pub fn variant(&self) -> RCVENM3_A {
607        match self.bits {
608            false => RCVENM3_A::_0,
609            true => RCVENM3_A::_1,
610        }
611    }
612    #[doc = "Checks if the value of the field is `_0`"]
613    #[inline(always)]
614    pub fn is_0(&self) -> bool {
615        *self == RCVENM3_A::_0
616    }
617    #[doc = "Checks if the value of the field is `_1`"]
618    #[inline(always)]
619    pub fn is_1(&self) -> bool {
620        *self == RCVENM3_A::_1
621    }
622}
623#[doc = "Field `RCVENM3` writer - Multiplexed Bus Recovery Cycle Insertion Enable 3"]
624pub type RCVENM3_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVENM3_A, O>;
625impl<'a, const O: u8> RCVENM3_W<'a, O> {
626    #[doc = "Recovery cycle insertion is disabled."]
627    #[inline(always)]
628    pub fn _0(self) -> &'a mut W {
629        self.variant(RCVENM3_A::_0)
630    }
631    #[doc = "Recovery cycle insertion is enabled."]
632    #[inline(always)]
633    pub fn _1(self) -> &'a mut W {
634        self.variant(RCVENM3_A::_1)
635    }
636}
637#[doc = "Field `RCVENM4` reader - Multiplexed Bus Recovery Cycle Insertion Enable 4"]
638pub type RCVENM4_R = crate::BitReader<RCVENM4_A>;
639#[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 4\n\nValue on reset: 1"]
640#[derive(Clone, Copy, Debug, PartialEq, Eq)]
641pub enum RCVENM4_A {
642    #[doc = "0: Recovery cycle insertion is disabled."]
643    _0 = 0,
644    #[doc = "1: Recovery cycle insertion is enabled."]
645    _1 = 1,
646}
647impl From<RCVENM4_A> for bool {
648    #[inline(always)]
649    fn from(variant: RCVENM4_A) -> Self {
650        variant as u8 != 0
651    }
652}
653impl RCVENM4_R {
654    #[doc = "Get enumerated values variant"]
655    #[inline(always)]
656    pub fn variant(&self) -> RCVENM4_A {
657        match self.bits {
658            false => RCVENM4_A::_0,
659            true => RCVENM4_A::_1,
660        }
661    }
662    #[doc = "Checks if the value of the field is `_0`"]
663    #[inline(always)]
664    pub fn is_0(&self) -> bool {
665        *self == RCVENM4_A::_0
666    }
667    #[doc = "Checks if the value of the field is `_1`"]
668    #[inline(always)]
669    pub fn is_1(&self) -> bool {
670        *self == RCVENM4_A::_1
671    }
672}
673#[doc = "Field `RCVENM4` writer - Multiplexed Bus Recovery Cycle Insertion Enable 4"]
674pub type RCVENM4_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVENM4_A, O>;
675impl<'a, const O: u8> RCVENM4_W<'a, O> {
676    #[doc = "Recovery cycle insertion is disabled."]
677    #[inline(always)]
678    pub fn _0(self) -> &'a mut W {
679        self.variant(RCVENM4_A::_0)
680    }
681    #[doc = "Recovery cycle insertion is enabled."]
682    #[inline(always)]
683    pub fn _1(self) -> &'a mut W {
684        self.variant(RCVENM4_A::_1)
685    }
686}
687#[doc = "Field `RCVENM5` reader - Multiplexed Bus Recovery Cycle Insertion Enable 5"]
688pub type RCVENM5_R = crate::BitReader<RCVENM5_A>;
689#[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 5\n\nValue on reset: 1"]
690#[derive(Clone, Copy, Debug, PartialEq, Eq)]
691pub enum RCVENM5_A {
692    #[doc = "0: Recovery cycle insertion is disabled."]
693    _0 = 0,
694    #[doc = "1: Recovery cycle insertion is enabled."]
695    _1 = 1,
696}
697impl From<RCVENM5_A> for bool {
698    #[inline(always)]
699    fn from(variant: RCVENM5_A) -> Self {
700        variant as u8 != 0
701    }
702}
703impl RCVENM5_R {
704    #[doc = "Get enumerated values variant"]
705    #[inline(always)]
706    pub fn variant(&self) -> RCVENM5_A {
707        match self.bits {
708            false => RCVENM5_A::_0,
709            true => RCVENM5_A::_1,
710        }
711    }
712    #[doc = "Checks if the value of the field is `_0`"]
713    #[inline(always)]
714    pub fn is_0(&self) -> bool {
715        *self == RCVENM5_A::_0
716    }
717    #[doc = "Checks if the value of the field is `_1`"]
718    #[inline(always)]
719    pub fn is_1(&self) -> bool {
720        *self == RCVENM5_A::_1
721    }
722}
723#[doc = "Field `RCVENM5` writer - Multiplexed Bus Recovery Cycle Insertion Enable 5"]
724pub type RCVENM5_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVENM5_A, O>;
725impl<'a, const O: u8> RCVENM5_W<'a, O> {
726    #[doc = "Recovery cycle insertion is disabled."]
727    #[inline(always)]
728    pub fn _0(self) -> &'a mut W {
729        self.variant(RCVENM5_A::_0)
730    }
731    #[doc = "Recovery cycle insertion is enabled."]
732    #[inline(always)]
733    pub fn _1(self) -> &'a mut W {
734        self.variant(RCVENM5_A::_1)
735    }
736}
737#[doc = "Field `RCVENM6` reader - Multiplexed Bus Recovery Cycle Insertion Enable 6"]
738pub type RCVENM6_R = crate::BitReader<RCVENM6_A>;
739#[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 6\n\nValue on reset: 0"]
740#[derive(Clone, Copy, Debug, PartialEq, Eq)]
741pub enum RCVENM6_A {
742    #[doc = "0: Recovery cycle insertion is disabled."]
743    _0 = 0,
744    #[doc = "1: Recovery cycle insertion is enabled."]
745    _1 = 1,
746}
747impl From<RCVENM6_A> for bool {
748    #[inline(always)]
749    fn from(variant: RCVENM6_A) -> Self {
750        variant as u8 != 0
751    }
752}
753impl RCVENM6_R {
754    #[doc = "Get enumerated values variant"]
755    #[inline(always)]
756    pub fn variant(&self) -> RCVENM6_A {
757        match self.bits {
758            false => RCVENM6_A::_0,
759            true => RCVENM6_A::_1,
760        }
761    }
762    #[doc = "Checks if the value of the field is `_0`"]
763    #[inline(always)]
764    pub fn is_0(&self) -> bool {
765        *self == RCVENM6_A::_0
766    }
767    #[doc = "Checks if the value of the field is `_1`"]
768    #[inline(always)]
769    pub fn is_1(&self) -> bool {
770        *self == RCVENM6_A::_1
771    }
772}
773#[doc = "Field `RCVENM6` writer - Multiplexed Bus Recovery Cycle Insertion Enable 6"]
774pub type RCVENM6_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVENM6_A, O>;
775impl<'a, const O: u8> RCVENM6_W<'a, O> {
776    #[doc = "Recovery cycle insertion is disabled."]
777    #[inline(always)]
778    pub fn _0(self) -> &'a mut W {
779        self.variant(RCVENM6_A::_0)
780    }
781    #[doc = "Recovery cycle insertion is enabled."]
782    #[inline(always)]
783    pub fn _1(self) -> &'a mut W {
784        self.variant(RCVENM6_A::_1)
785    }
786}
787#[doc = "Field `RCVENM7` reader - Multiplexed Bus Recovery Cycle Insertion Enable 7"]
788pub type RCVENM7_R = crate::BitReader<RCVENM7_A>;
789#[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 7\n\nValue on reset: 0"]
790#[derive(Clone, Copy, Debug, PartialEq, Eq)]
791pub enum RCVENM7_A {
792    #[doc = "0: Recovery cycle insertion is disabled."]
793    _0 = 0,
794    #[doc = "1: Recovery cycle insertion is enabled."]
795    _1 = 1,
796}
797impl From<RCVENM7_A> for bool {
798    #[inline(always)]
799    fn from(variant: RCVENM7_A) -> Self {
800        variant as u8 != 0
801    }
802}
803impl RCVENM7_R {
804    #[doc = "Get enumerated values variant"]
805    #[inline(always)]
806    pub fn variant(&self) -> RCVENM7_A {
807        match self.bits {
808            false => RCVENM7_A::_0,
809            true => RCVENM7_A::_1,
810        }
811    }
812    #[doc = "Checks if the value of the field is `_0`"]
813    #[inline(always)]
814    pub fn is_0(&self) -> bool {
815        *self == RCVENM7_A::_0
816    }
817    #[doc = "Checks if the value of the field is `_1`"]
818    #[inline(always)]
819    pub fn is_1(&self) -> bool {
820        *self == RCVENM7_A::_1
821    }
822}
823#[doc = "Field `RCVENM7` writer - Multiplexed Bus Recovery Cycle Insertion Enable 7"]
824pub type RCVENM7_W<'a, const O: u8> = crate::BitWriter<'a, u16, CSRECEN_SPEC, RCVENM7_A, O>;
825impl<'a, const O: u8> RCVENM7_W<'a, O> {
826    #[doc = "Recovery cycle insertion is disabled."]
827    #[inline(always)]
828    pub fn _0(self) -> &'a mut W {
829        self.variant(RCVENM7_A::_0)
830    }
831    #[doc = "Recovery cycle insertion is enabled."]
832    #[inline(always)]
833    pub fn _1(self) -> &'a mut W {
834        self.variant(RCVENM7_A::_1)
835    }
836}
837impl R {
838    #[doc = "Bit 0 - Separate Bus Recovery Cycle Insertion Enable 0"]
839    #[inline(always)]
840    pub fn rcven0(&self) -> RCVEN0_R {
841        RCVEN0_R::new((self.bits & 1) != 0)
842    }
843    #[doc = "Bit 1 - Separate Bus Recovery Cycle Insertion Enable 1"]
844    #[inline(always)]
845    pub fn rcven1(&self) -> RCVEN1_R {
846        RCVEN1_R::new(((self.bits >> 1) & 1) != 0)
847    }
848    #[doc = "Bit 2 - Separate Bus Recovery Cycle Insertion Enable 2"]
849    #[inline(always)]
850    pub fn rcven2(&self) -> RCVEN2_R {
851        RCVEN2_R::new(((self.bits >> 2) & 1) != 0)
852    }
853    #[doc = "Bit 3 - Separate Bus Recovery Cycle Insertion Enable 3"]
854    #[inline(always)]
855    pub fn rcven3(&self) -> RCVEN3_R {
856        RCVEN3_R::new(((self.bits >> 3) & 1) != 0)
857    }
858    #[doc = "Bit 4 - Separate Bus Recovery Cycle Insertion Enable 4"]
859    #[inline(always)]
860    pub fn rcven4(&self) -> RCVEN4_R {
861        RCVEN4_R::new(((self.bits >> 4) & 1) != 0)
862    }
863    #[doc = "Bit 5 - Separate Bus Recovery Cycle Insertion Enable 5"]
864    #[inline(always)]
865    pub fn rcven5(&self) -> RCVEN5_R {
866        RCVEN5_R::new(((self.bits >> 5) & 1) != 0)
867    }
868    #[doc = "Bit 6 - Separate Bus Recovery Cycle Insertion Enable 6"]
869    #[inline(always)]
870    pub fn rcven6(&self) -> RCVEN6_R {
871        RCVEN6_R::new(((self.bits >> 6) & 1) != 0)
872    }
873    #[doc = "Bit 7 - Separate Bus Recovery Cycle Insertion Enable 7"]
874    #[inline(always)]
875    pub fn rcven7(&self) -> RCVEN7_R {
876        RCVEN7_R::new(((self.bits >> 7) & 1) != 0)
877    }
878    #[doc = "Bit 8 - Multiplexed Bus Recovery Cycle Insertion Enable 0"]
879    #[inline(always)]
880    pub fn rcvenm0(&self) -> RCVENM0_R {
881        RCVENM0_R::new(((self.bits >> 8) & 1) != 0)
882    }
883    #[doc = "Bit 9 - Multiplexed Bus Recovery Cycle Insertion Enable 1"]
884    #[inline(always)]
885    pub fn rcvenm1(&self) -> RCVENM1_R {
886        RCVENM1_R::new(((self.bits >> 9) & 1) != 0)
887    }
888    #[doc = "Bit 10 - Multiplexed Bus Recovery Cycle Insertion Enable 2"]
889    #[inline(always)]
890    pub fn rcvenm2(&self) -> RCVENM2_R {
891        RCVENM2_R::new(((self.bits >> 10) & 1) != 0)
892    }
893    #[doc = "Bit 11 - Multiplexed Bus Recovery Cycle Insertion Enable 3"]
894    #[inline(always)]
895    pub fn rcvenm3(&self) -> RCVENM3_R {
896        RCVENM3_R::new(((self.bits >> 11) & 1) != 0)
897    }
898    #[doc = "Bit 12 - Multiplexed Bus Recovery Cycle Insertion Enable 4"]
899    #[inline(always)]
900    pub fn rcvenm4(&self) -> RCVENM4_R {
901        RCVENM4_R::new(((self.bits >> 12) & 1) != 0)
902    }
903    #[doc = "Bit 13 - Multiplexed Bus Recovery Cycle Insertion Enable 5"]
904    #[inline(always)]
905    pub fn rcvenm5(&self) -> RCVENM5_R {
906        RCVENM5_R::new(((self.bits >> 13) & 1) != 0)
907    }
908    #[doc = "Bit 14 - Multiplexed Bus Recovery Cycle Insertion Enable 6"]
909    #[inline(always)]
910    pub fn rcvenm6(&self) -> RCVENM6_R {
911        RCVENM6_R::new(((self.bits >> 14) & 1) != 0)
912    }
913    #[doc = "Bit 15 - Multiplexed Bus Recovery Cycle Insertion Enable 7"]
914    #[inline(always)]
915    pub fn rcvenm7(&self) -> RCVENM7_R {
916        RCVENM7_R::new(((self.bits >> 15) & 1) != 0)
917    }
918}
919impl W {
920    #[doc = "Bit 0 - Separate Bus Recovery Cycle Insertion Enable 0"]
921    #[inline(always)]
922    #[must_use]
923    pub fn rcven0(&mut self) -> RCVEN0_W<0> {
924        RCVEN0_W::new(self)
925    }
926    #[doc = "Bit 1 - Separate Bus Recovery Cycle Insertion Enable 1"]
927    #[inline(always)]
928    #[must_use]
929    pub fn rcven1(&mut self) -> RCVEN1_W<1> {
930        RCVEN1_W::new(self)
931    }
932    #[doc = "Bit 2 - Separate Bus Recovery Cycle Insertion Enable 2"]
933    #[inline(always)]
934    #[must_use]
935    pub fn rcven2(&mut self) -> RCVEN2_W<2> {
936        RCVEN2_W::new(self)
937    }
938    #[doc = "Bit 3 - Separate Bus Recovery Cycle Insertion Enable 3"]
939    #[inline(always)]
940    #[must_use]
941    pub fn rcven3(&mut self) -> RCVEN3_W<3> {
942        RCVEN3_W::new(self)
943    }
944    #[doc = "Bit 4 - Separate Bus Recovery Cycle Insertion Enable 4"]
945    #[inline(always)]
946    #[must_use]
947    pub fn rcven4(&mut self) -> RCVEN4_W<4> {
948        RCVEN4_W::new(self)
949    }
950    #[doc = "Bit 5 - Separate Bus Recovery Cycle Insertion Enable 5"]
951    #[inline(always)]
952    #[must_use]
953    pub fn rcven5(&mut self) -> RCVEN5_W<5> {
954        RCVEN5_W::new(self)
955    }
956    #[doc = "Bit 6 - Separate Bus Recovery Cycle Insertion Enable 6"]
957    #[inline(always)]
958    #[must_use]
959    pub fn rcven6(&mut self) -> RCVEN6_W<6> {
960        RCVEN6_W::new(self)
961    }
962    #[doc = "Bit 7 - Separate Bus Recovery Cycle Insertion Enable 7"]
963    #[inline(always)]
964    #[must_use]
965    pub fn rcven7(&mut self) -> RCVEN7_W<7> {
966        RCVEN7_W::new(self)
967    }
968    #[doc = "Bit 8 - Multiplexed Bus Recovery Cycle Insertion Enable 0"]
969    #[inline(always)]
970    #[must_use]
971    pub fn rcvenm0(&mut self) -> RCVENM0_W<8> {
972        RCVENM0_W::new(self)
973    }
974    #[doc = "Bit 9 - Multiplexed Bus Recovery Cycle Insertion Enable 1"]
975    #[inline(always)]
976    #[must_use]
977    pub fn rcvenm1(&mut self) -> RCVENM1_W<9> {
978        RCVENM1_W::new(self)
979    }
980    #[doc = "Bit 10 - Multiplexed Bus Recovery Cycle Insertion Enable 2"]
981    #[inline(always)]
982    #[must_use]
983    pub fn rcvenm2(&mut self) -> RCVENM2_W<10> {
984        RCVENM2_W::new(self)
985    }
986    #[doc = "Bit 11 - Multiplexed Bus Recovery Cycle Insertion Enable 3"]
987    #[inline(always)]
988    #[must_use]
989    pub fn rcvenm3(&mut self) -> RCVENM3_W<11> {
990        RCVENM3_W::new(self)
991    }
992    #[doc = "Bit 12 - Multiplexed Bus Recovery Cycle Insertion Enable 4"]
993    #[inline(always)]
994    #[must_use]
995    pub fn rcvenm4(&mut self) -> RCVENM4_W<12> {
996        RCVENM4_W::new(self)
997    }
998    #[doc = "Bit 13 - Multiplexed Bus Recovery Cycle Insertion Enable 5"]
999    #[inline(always)]
1000    #[must_use]
1001    pub fn rcvenm5(&mut self) -> RCVENM5_W<13> {
1002        RCVENM5_W::new(self)
1003    }
1004    #[doc = "Bit 14 - Multiplexed Bus Recovery Cycle Insertion Enable 6"]
1005    #[inline(always)]
1006    #[must_use]
1007    pub fn rcvenm6(&mut self) -> RCVENM6_W<14> {
1008        RCVENM6_W::new(self)
1009    }
1010    #[doc = "Bit 15 - Multiplexed Bus Recovery Cycle Insertion Enable 7"]
1011    #[inline(always)]
1012    #[must_use]
1013    pub fn rcvenm7(&mut self) -> RCVENM7_W<15> {
1014        RCVENM7_W::new(self)
1015    }
1016    #[doc = "Writes raw bits to the register."]
1017    #[inline(always)]
1018    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
1019        self.0.bits(bits);
1020        self
1021    }
1022}
1023#[doc = "CS Recovery Cycle Insertion Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csrecen](index.html) module"]
1024pub struct CSRECEN_SPEC;
1025impl crate::RegisterSpec for CSRECEN_SPEC {
1026    type Ux = u16;
1027}
1028#[doc = "`read()` method returns [csrecen::R](R) reader structure"]
1029impl crate::Readable for CSRECEN_SPEC {
1030    type Reader = R;
1031}
1032#[doc = "`write(|w| ..)` method takes [csrecen::W](W) writer structure"]
1033impl crate::Writable for CSRECEN_SPEC {
1034    type Writer = W;
1035    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1036    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1037}
1038#[doc = "`reset()` method sets CSRECEN to value 0x3e3e"]
1039impl crate::Resettable for CSRECEN_SPEC {
1040    const RESET_VALUE: Self::Ux = 0x3e3e;
1041}
ra6m3/bus/csrecen.rs

ra6m3/bus/
csrecen.rs
