ra6m3/src/
srcodctrl.rs

1#[doc = "Register `SRCODCTRL` reader"]
2pub struct R(crate::R<SRCODCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SRCODCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SRCODCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SRCODCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SRCODCTRL` writer"]
17pub struct W(crate::W<SRCODCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SRCODCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SRCODCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SRCODCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `OFTRG` reader - Output FIFO Data Trigger Number"]
38pub type OFTRG_R = crate::FieldReader<u8, OFTRG_A>;
39#[doc = "Output FIFO Data Trigger Number\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum OFTRG_A {
43    #[doc = "0: 1"]
44    _00 = 0,
45    #[doc = "1: 4"]
46    _01 = 1,
47    #[doc = "2: 8"]
48    _10 = 2,
49    #[doc = "3: 12"]
50    _11 = 3,
51}
52impl From<OFTRG_A> for u8 {
53    #[inline(always)]
54    fn from(variant: OFTRG_A) -> Self {
55        variant as _
56    }
57}
58impl OFTRG_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> OFTRG_A {
62        match self.bits {
63            0 => OFTRG_A::_00,
64            1 => OFTRG_A::_01,
65            2 => OFTRG_A::_10,
66            3 => OFTRG_A::_11,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `_00`"]
71    #[inline(always)]
72    pub fn is_00(&self) -> bool {
73        *self == OFTRG_A::_00
74    }
75    #[doc = "Checks if the value of the field is `_01`"]
76    #[inline(always)]
77    pub fn is_01(&self) -> bool {
78        *self == OFTRG_A::_01
79    }
80    #[doc = "Checks if the value of the field is `_10`"]
81    #[inline(always)]
82    pub fn is_10(&self) -> bool {
83        *self == OFTRG_A::_10
84    }
85    #[doc = "Checks if the value of the field is `_11`"]
86    #[inline(always)]
87    pub fn is_11(&self) -> bool {
88        *self == OFTRG_A::_11
89    }
90}
91#[doc = "Field `OFTRG` writer - Output FIFO Data Trigger Number"]
92pub type OFTRG_W<'a, const O: u8> =
93    crate::FieldWriterSafe<'a, u16, SRCODCTRL_SPEC, u8, OFTRG_A, 2, O>;
94impl<'a, const O: u8> OFTRG_W<'a, O> {
95    #[doc = "1"]
96    #[inline(always)]
97    pub fn _00(self) -> &'a mut W {
98        self.variant(OFTRG_A::_00)
99    }
100    #[doc = "4"]
101    #[inline(always)]
102    pub fn _01(self) -> &'a mut W {
103        self.variant(OFTRG_A::_01)
104    }
105    #[doc = "8"]
106    #[inline(always)]
107    pub fn _10(self) -> &'a mut W {
108        self.variant(OFTRG_A::_10)
109    }
110    #[doc = "12"]
111    #[inline(always)]
112    pub fn _11(self) -> &'a mut W {
113        self.variant(OFTRG_A::_11)
114    }
115}
116#[doc = "Field `OEN` reader - Output Data FIFO Full Interrupt Enable"]
117pub type OEN_R = crate::BitReader<OEN_A>;
118#[doc = "Output Data FIFO Full Interrupt Enable\n\nValue on reset: 0"]
119#[derive(Clone, Copy, Debug, PartialEq, Eq)]
120pub enum OEN_A {
121    #[doc = "0: Output data FIFO full interrupt is disabled."]
122    _0 = 0,
123    #[doc = "1: Output data FIFO full interrupt is enabled."]
124    _1 = 1,
125}
126impl From<OEN_A> for bool {
127    #[inline(always)]
128    fn from(variant: OEN_A) -> Self {
129        variant as u8 != 0
130    }
131}
132impl OEN_R {
133    #[doc = "Get enumerated values variant"]
134    #[inline(always)]
135    pub fn variant(&self) -> OEN_A {
136        match self.bits {
137            false => OEN_A::_0,
138            true => OEN_A::_1,
139        }
140    }
141    #[doc = "Checks if the value of the field is `_0`"]
142    #[inline(always)]
143    pub fn is_0(&self) -> bool {
144        *self == OEN_A::_0
145    }
146    #[doc = "Checks if the value of the field is `_1`"]
147    #[inline(always)]
148    pub fn is_1(&self) -> bool {
149        *self == OEN_A::_1
150    }
151}
152#[doc = "Field `OEN` writer - Output Data FIFO Full Interrupt Enable"]
153pub type OEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, SRCODCTRL_SPEC, OEN_A, O>;
154impl<'a, const O: u8> OEN_W<'a, O> {
155    #[doc = "Output data FIFO full interrupt is disabled."]
156    #[inline(always)]
157    pub fn _0(self) -> &'a mut W {
158        self.variant(OEN_A::_0)
159    }
160    #[doc = "Output data FIFO full interrupt is enabled."]
161    #[inline(always)]
162    pub fn _1(self) -> &'a mut W {
163        self.variant(OEN_A::_1)
164    }
165}
166#[doc = "Field `OED` reader - Output Data Endian"]
167pub type OED_R = crate::BitReader<OED_A>;
168#[doc = "Output Data Endian\n\nValue on reset: 0"]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum OED_A {
171    #[doc = "0: Endian formats are the same between the chip and input data."]
172    _0 = 0,
173    #[doc = "1: Endian formats are different between the chip and input data."]
174    _1 = 1,
175}
176impl From<OED_A> for bool {
177    #[inline(always)]
178    fn from(variant: OED_A) -> Self {
179        variant as u8 != 0
180    }
181}
182impl OED_R {
183    #[doc = "Get enumerated values variant"]
184    #[inline(always)]
185    pub fn variant(&self) -> OED_A {
186        match self.bits {
187            false => OED_A::_0,
188            true => OED_A::_1,
189        }
190    }
191    #[doc = "Checks if the value of the field is `_0`"]
192    #[inline(always)]
193    pub fn is_0(&self) -> bool {
194        *self == OED_A::_0
195    }
196    #[doc = "Checks if the value of the field is `_1`"]
197    #[inline(always)]
198    pub fn is_1(&self) -> bool {
199        *self == OED_A::_1
200    }
201}
202#[doc = "Field `OED` writer - Output Data Endian"]
203pub type OED_W<'a, const O: u8> = crate::BitWriter<'a, u16, SRCODCTRL_SPEC, OED_A, O>;
204impl<'a, const O: u8> OED_W<'a, O> {
205    #[doc = "Endian formats are the same between the chip and input data."]
206    #[inline(always)]
207    pub fn _0(self) -> &'a mut W {
208        self.variant(OED_A::_0)
209    }
210    #[doc = "Endian formats are different between the chip and input data."]
211    #[inline(always)]
212    pub fn _1(self) -> &'a mut W {
213        self.variant(OED_A::_1)
214    }
215}
216#[doc = "Field `OCH` reader - Output Data Channel Exchange"]
217pub type OCH_R = crate::BitReader<OCH_A>;
218#[doc = "Output Data Channel Exchange\n\nValue on reset: 0"]
219#[derive(Clone, Copy, Debug, PartialEq, Eq)]
220pub enum OCH_A {
221    #[doc = "0: Does not exchange the channels (the same order as data input)"]
222    _0 = 0,
223    #[doc = "1: Exchanges the channels (the opposite order from data input)"]
224    _1 = 1,
225}
226impl From<OCH_A> for bool {
227    #[inline(always)]
228    fn from(variant: OCH_A) -> Self {
229        variant as u8 != 0
230    }
231}
232impl OCH_R {
233    #[doc = "Get enumerated values variant"]
234    #[inline(always)]
235    pub fn variant(&self) -> OCH_A {
236        match self.bits {
237            false => OCH_A::_0,
238            true => OCH_A::_1,
239        }
240    }
241    #[doc = "Checks if the value of the field is `_0`"]
242    #[inline(always)]
243    pub fn is_0(&self) -> bool {
244        *self == OCH_A::_0
245    }
246    #[doc = "Checks if the value of the field is `_1`"]
247    #[inline(always)]
248    pub fn is_1(&self) -> bool {
249        *self == OCH_A::_1
250    }
251}
252#[doc = "Field `OCH` writer - Output Data Channel Exchange"]
253pub type OCH_W<'a, const O: u8> = crate::BitWriter<'a, u16, SRCODCTRL_SPEC, OCH_A, O>;
254impl<'a, const O: u8> OCH_W<'a, O> {
255    #[doc = "Does not exchange the channels (the same order as data input)"]
256    #[inline(always)]
257    pub fn _0(self) -> &'a mut W {
258        self.variant(OCH_A::_0)
259    }
260    #[doc = "Exchanges the channels (the opposite order from data input)"]
261    #[inline(always)]
262    pub fn _1(self) -> &'a mut W {
263        self.variant(OCH_A::_1)
264    }
265}
266impl R {
267    #[doc = "Bits 0:1 - Output FIFO Data Trigger Number"]
268    #[inline(always)]
269    pub fn oftrg(&self) -> OFTRG_R {
270        OFTRG_R::new((self.bits & 3) as u8)
271    }
272    #[doc = "Bit 8 - Output Data FIFO Full Interrupt Enable"]
273    #[inline(always)]
274    pub fn oen(&self) -> OEN_R {
275        OEN_R::new(((self.bits >> 8) & 1) != 0)
276    }
277    #[doc = "Bit 9 - Output Data Endian"]
278    #[inline(always)]
279    pub fn oed(&self) -> OED_R {
280        OED_R::new(((self.bits >> 9) & 1) != 0)
281    }
282    #[doc = "Bit 10 - Output Data Channel Exchange"]
283    #[inline(always)]
284    pub fn och(&self) -> OCH_R {
285        OCH_R::new(((self.bits >> 10) & 1) != 0)
286    }
287}
288impl W {
289    #[doc = "Bits 0:1 - Output FIFO Data Trigger Number"]
290    #[inline(always)]
291    #[must_use]
292    pub fn oftrg(&mut self) -> OFTRG_W<0> {
293        OFTRG_W::new(self)
294    }
295    #[doc = "Bit 8 - Output Data FIFO Full Interrupt Enable"]
296    #[inline(always)]
297    #[must_use]
298    pub fn oen(&mut self) -> OEN_W<8> {
299        OEN_W::new(self)
300    }
301    #[doc = "Bit 9 - Output Data Endian"]
302    #[inline(always)]
303    #[must_use]
304    pub fn oed(&mut self) -> OED_W<9> {
305        OED_W::new(self)
306    }
307    #[doc = "Bit 10 - Output Data Channel Exchange"]
308    #[inline(always)]
309    #[must_use]
310    pub fn och(&mut self) -> OCH_W<10> {
311        OCH_W::new(self)
312    }
313    #[doc = "Writes raw bits to the register."]
314    #[inline(always)]
315    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
316        self.0.bits(bits);
317        self
318    }
319}
320#[doc = "Output Data Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [srcodctrl](index.html) module"]
321pub struct SRCODCTRL_SPEC;
322impl crate::RegisterSpec for SRCODCTRL_SPEC {
323    type Ux = u16;
324}
325#[doc = "`read()` method returns [srcodctrl::R](R) reader structure"]
326impl crate::Readable for SRCODCTRL_SPEC {
327    type Reader = R;
328}
329#[doc = "`write(|w| ..)` method takes [srcodctrl::W](W) writer structure"]
330impl crate::Writable for SRCODCTRL_SPEC {
331    type Writer = W;
332    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
333    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
334}
335#[doc = "`reset()` method sets SRCODCTRL to value 0"]
336impl crate::Resettable for SRCODCTRL_SPEC {
337    const RESET_VALUE: Self::Ux = 0;
338}
ra6m3/src/srcodctrl.rs

ra6m3/src/
srcodctrl.rs
