ra6m2/usbfs/
sofcfg.rs

1#[doc = "Register `SOFCFG` reader"]
2pub struct R(crate::R<SOFCFG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SOFCFG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SOFCFG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SOFCFG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SOFCFG` writer"]
17pub struct W(crate::W<SOFCFG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SOFCFG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SOFCFG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SOFCFG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EDGESTS` reader - Edge Interrupt Output Status Monitor"]
38pub type EDGESTS_R = crate::BitReader<EDGESTS_A>;
39#[doc = "Edge Interrupt Output Status Monitor\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum EDGESTS_A {
42    #[doc = "0: before stopping the clock supply to the USB module"]
43    _0 = 0,
44    #[doc = "1: the edge interrupt output signal is in the middle of the edge processing"]
45    _1 = 1,
46}
47impl From<EDGESTS_A> for bool {
48    #[inline(always)]
49    fn from(variant: EDGESTS_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl EDGESTS_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> EDGESTS_A {
57        match self.bits {
58            false => EDGESTS_A::_0,
59            true => EDGESTS_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == EDGESTS_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == EDGESTS_A::_1
71    }
72}
73#[doc = "Field `BRDYM` reader - BRDY Interrupt Status Clear Timing"]
74pub type BRDYM_R = crate::BitReader<BRDYM_A>;
75#[doc = "BRDY Interrupt Status Clear Timing\n\nValue on reset: 0"]
76#[derive(Clone, Copy, Debug, PartialEq, Eq)]
77pub enum BRDYM_A {
78    #[doc = "0: Software clears the status."]
79    _0 = 0,
80    #[doc = "1: The USB clears the status when data has been read from the FIFO buffer or data has been written to the FIFO buffer."]
81    _1 = 1,
82}
83impl From<BRDYM_A> for bool {
84    #[inline(always)]
85    fn from(variant: BRDYM_A) -> Self {
86        variant as u8 != 0
87    }
88}
89impl BRDYM_R {
90    #[doc = "Get enumerated values variant"]
91    #[inline(always)]
92    pub fn variant(&self) -> BRDYM_A {
93        match self.bits {
94            false => BRDYM_A::_0,
95            true => BRDYM_A::_1,
96        }
97    }
98    #[doc = "Checks if the value of the field is `_0`"]
99    #[inline(always)]
100    pub fn is_0(&self) -> bool {
101        *self == BRDYM_A::_0
102    }
103    #[doc = "Checks if the value of the field is `_1`"]
104    #[inline(always)]
105    pub fn is_1(&self) -> bool {
106        *self == BRDYM_A::_1
107    }
108}
109#[doc = "Field `BRDYM` writer - BRDY Interrupt Status Clear Timing"]
110pub type BRDYM_W<'a, const O: u8> = crate::BitWriter<'a, u16, SOFCFG_SPEC, BRDYM_A, O>;
111impl<'a, const O: u8> BRDYM_W<'a, O> {
112    #[doc = "Software clears the status."]
113    #[inline(always)]
114    pub fn _0(self) -> &'a mut W {
115        self.variant(BRDYM_A::_0)
116    }
117    #[doc = "The USB clears the status when data has been read from the FIFO buffer or data has been written to the FIFO buffer."]
118    #[inline(always)]
119    pub fn _1(self) -> &'a mut W {
120        self.variant(BRDYM_A::_1)
121    }
122}
123#[doc = "Field `TRNENSEL` reader - Transaction-Enabled Time Select"]
124pub type TRNENSEL_R = crate::BitReader<TRNENSEL_A>;
125#[doc = "Transaction-Enabled Time Select\n\nValue on reset: 0"]
126#[derive(Clone, Copy, Debug, PartialEq, Eq)]
127pub enum TRNENSEL_A {
128    #[doc = "0: For non-low-speed communication"]
129    _0 = 0,
130    #[doc = "1: For low-speed communication"]
131    _1 = 1,
132}
133impl From<TRNENSEL_A> for bool {
134    #[inline(always)]
135    fn from(variant: TRNENSEL_A) -> Self {
136        variant as u8 != 0
137    }
138}
139impl TRNENSEL_R {
140    #[doc = "Get enumerated values variant"]
141    #[inline(always)]
142    pub fn variant(&self) -> TRNENSEL_A {
143        match self.bits {
144            false => TRNENSEL_A::_0,
145            true => TRNENSEL_A::_1,
146        }
147    }
148    #[doc = "Checks if the value of the field is `_0`"]
149    #[inline(always)]
150    pub fn is_0(&self) -> bool {
151        *self == TRNENSEL_A::_0
152    }
153    #[doc = "Checks if the value of the field is `_1`"]
154    #[inline(always)]
155    pub fn is_1(&self) -> bool {
156        *self == TRNENSEL_A::_1
157    }
158}
159#[doc = "Field `TRNENSEL` writer - Transaction-Enabled Time Select"]
160pub type TRNENSEL_W<'a, const O: u8> = crate::BitWriter<'a, u16, SOFCFG_SPEC, TRNENSEL_A, O>;
161impl<'a, const O: u8> TRNENSEL_W<'a, O> {
162    #[doc = "For non-low-speed communication"]
163    #[inline(always)]
164    pub fn _0(self) -> &'a mut W {
165        self.variant(TRNENSEL_A::_0)
166    }
167    #[doc = "For low-speed communication"]
168    #[inline(always)]
169    pub fn _1(self) -> &'a mut W {
170        self.variant(TRNENSEL_A::_1)
171    }
172}
173impl R {
174    #[doc = "Bit 4 - Edge Interrupt Output Status Monitor"]
175    #[inline(always)]
176    pub fn edgests(&self) -> EDGESTS_R {
177        EDGESTS_R::new(((self.bits >> 4) & 1) != 0)
178    }
179    #[doc = "Bit 6 - BRDY Interrupt Status Clear Timing"]
180    #[inline(always)]
181    pub fn brdym(&self) -> BRDYM_R {
182        BRDYM_R::new(((self.bits >> 6) & 1) != 0)
183    }
184    #[doc = "Bit 8 - Transaction-Enabled Time Select"]
185    #[inline(always)]
186    pub fn trnensel(&self) -> TRNENSEL_R {
187        TRNENSEL_R::new(((self.bits >> 8) & 1) != 0)
188    }
189}
190impl W {
191    #[doc = "Bit 6 - BRDY Interrupt Status Clear Timing"]
192    #[inline(always)]
193    #[must_use]
194    pub fn brdym(&mut self) -> BRDYM_W<6> {
195        BRDYM_W::new(self)
196    }
197    #[doc = "Bit 8 - Transaction-Enabled Time Select"]
198    #[inline(always)]
199    #[must_use]
200    pub fn trnensel(&mut self) -> TRNENSEL_W<8> {
201        TRNENSEL_W::new(self)
202    }
203    #[doc = "Writes raw bits to the register."]
204    #[inline(always)]
205    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
206        self.0.bits(bits);
207        self
208    }
209}
210#[doc = "SOF Output Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sofcfg](index.html) module"]
211pub struct SOFCFG_SPEC;
212impl crate::RegisterSpec for SOFCFG_SPEC {
213    type Ux = u16;
214}
215#[doc = "`read()` method returns [sofcfg::R](R) reader structure"]
216impl crate::Readable for SOFCFG_SPEC {
217    type Reader = R;
218}
219#[doc = "`write(|w| ..)` method takes [sofcfg::W](W) writer structure"]
220impl crate::Writable for SOFCFG_SPEC {
221    type Writer = W;
222    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
223    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
224}
225#[doc = "`reset()` method sets SOFCFG to value 0"]
226impl crate::Resettable for SOFCFG_SPEC {
227    const RESET_VALUE: Self::Ux = 0;
228}
ra6m2/usbfs/sofcfg.rs

ra6m2/usbfs/
sofcfg.rs
