ra6m2/system/
sckdivcr2.rs1#[doc = "Register `SCKDIVCR2` reader"]
2pub struct R(crate::R<SCKDIVCR2_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SCKDIVCR2_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SCKDIVCR2_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SCKDIVCR2_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SCKDIVCR2` writer"]
17pub struct W(crate::W<SCKDIVCR2_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SCKDIVCR2_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SCKDIVCR2_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SCKDIVCR2_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `UCK` reader - USB Clock (UCLK) Select"]
38pub type UCK_R = crate::FieldReader<u8, UCK_A>;
39#[doc = "USB Clock (UCLK) Select\n\nValue on reset: 4"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum UCK_A {
43 #[doc = "2: /3"]
44 _010 = 2,
45 #[doc = "3: /4"]
46 _011 = 3,
47 #[doc = "4: /5"]
48 _100 = 4,
49}
50impl From<UCK_A> for u8 {
51 #[inline(always)]
52 fn from(variant: UCK_A) -> Self {
53 variant as _
54 }
55}
56impl UCK_R {
57 #[doc = "Get enumerated values variant"]
58 #[inline(always)]
59 pub fn variant(&self) -> Option<UCK_A> {
60 match self.bits {
61 2 => Some(UCK_A::_010),
62 3 => Some(UCK_A::_011),
63 4 => Some(UCK_A::_100),
64 _ => None,
65 }
66 }
67 #[doc = "Checks if the value of the field is `_010`"]
68 #[inline(always)]
69 pub fn is_010(&self) -> bool {
70 *self == UCK_A::_010
71 }
72 #[doc = "Checks if the value of the field is `_011`"]
73 #[inline(always)]
74 pub fn is_011(&self) -> bool {
75 *self == UCK_A::_011
76 }
77 #[doc = "Checks if the value of the field is `_100`"]
78 #[inline(always)]
79 pub fn is_100(&self) -> bool {
80 *self == UCK_A::_100
81 }
82}
83#[doc = "Field `UCK` writer - USB Clock (UCLK) Select"]
84pub type UCK_W<'a, const O: u8> = crate::FieldWriter<'a, u8, SCKDIVCR2_SPEC, u8, UCK_A, 3, O>;
85impl<'a, const O: u8> UCK_W<'a, O> {
86 #[doc = "/3"]
87 #[inline(always)]
88 pub fn _010(self) -> &'a mut W {
89 self.variant(UCK_A::_010)
90 }
91 #[doc = "/4"]
92 #[inline(always)]
93 pub fn _011(self) -> &'a mut W {
94 self.variant(UCK_A::_011)
95 }
96 #[doc = "/5"]
97 #[inline(always)]
98 pub fn _100(self) -> &'a mut W {
99 self.variant(UCK_A::_100)
100 }
101}
102impl R {
103 #[doc = "Bits 4:6 - USB Clock (UCLK) Select"]
104 #[inline(always)]
105 pub fn uck(&self) -> UCK_R {
106 UCK_R::new((self.bits >> 4) & 7)
107 }
108}
109impl W {
110 #[doc = "Bits 4:6 - USB Clock (UCLK) Select"]
111 #[inline(always)]
112 #[must_use]
113 pub fn uck(&mut self) -> UCK_W<4> {
114 UCK_W::new(self)
115 }
116 #[doc = "Writes raw bits to the register."]
117 #[inline(always)]
118 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
119 self.0.bits(bits);
120 self
121 }
122}
123#[doc = "System Clock Division Control Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sckdivcr2](index.html) module"]
124pub struct SCKDIVCR2_SPEC;
125impl crate::RegisterSpec for SCKDIVCR2_SPEC {
126 type Ux = u8;
127}
128#[doc = "`read()` method returns [sckdivcr2::R](R) reader structure"]
129impl crate::Readable for SCKDIVCR2_SPEC {
130 type Reader = R;
131}
132#[doc = "`write(|w| ..)` method takes [sckdivcr2::W](W) writer structure"]
133impl crate::Writable for SCKDIVCR2_SPEC {
134 type Writer = W;
135 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
136 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
137}
138#[doc = "`reset()` method sets SCKDIVCR2 to value 0x40"]
139impl crate::Resettable for SCKDIVCR2_SPEC {
140 const RESET_VALUE: Self::Ux = 0x40;
141}