ra6m2_pac/
sram.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:11:44 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SRAM Control"]
28unsafe impl ::core::marker::Send for super::Sram {}
29unsafe impl ::core::marker::Sync for super::Sram {}
30impl super::Sram {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "SRAM Parity Error Operation After Detection Register"]
38    #[inline(always)]
39    pub const fn parioad(
40        &self,
41    ) -> &'static crate::common::Reg<self::Parioad_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Parioad_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "SRAM Protection Register"]
50    #[inline(always)]
51    pub const fn sramprcr(
52        &self,
53    ) -> &'static crate::common::Reg<self::Sramprcr_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Sramprcr_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(4usize),
57            )
58        }
59    }
60
61    #[doc = "RAM Wait State Control Register"]
62    #[inline(always)]
63    pub const fn sramwtsc(
64        &self,
65    ) -> &'static crate::common::Reg<self::Sramwtsc_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Sramwtsc_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(8usize),
69            )
70        }
71    }
72
73    #[doc = "ECCRAM Operating Mode Control Register"]
74    #[inline(always)]
75    pub const fn eccmode(
76        &self,
77    ) -> &'static crate::common::Reg<self::Eccmode_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Eccmode_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(192usize),
81            )
82        }
83    }
84
85    #[doc = "ECCRAM 2-Bit Error Status Register"]
86    #[inline(always)]
87    pub const fn ecc2sts(
88        &self,
89    ) -> &'static crate::common::Reg<self::Ecc2Sts_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Ecc2Sts_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(193usize),
93            )
94        }
95    }
96
97    #[doc = "ECCRAM 1-Bit Error Information Update Enable Register"]
98    #[inline(always)]
99    pub const fn ecc1stsen(
100        &self,
101    ) -> &'static crate::common::Reg<self::Ecc1Stsen_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Ecc1Stsen_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(194usize),
105            )
106        }
107    }
108
109    #[doc = "ECCRAM 1-Bit Error Status Register"]
110    #[inline(always)]
111    pub const fn ecc1sts(
112        &self,
113    ) -> &'static crate::common::Reg<self::Ecc1Sts_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::Ecc1Sts_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(195usize),
117            )
118        }
119    }
120
121    #[doc = "ECCRAM Protection Register"]
122    #[inline(always)]
123    pub const fn eccprcr(
124        &self,
125    ) -> &'static crate::common::Reg<self::Eccprcr_SPEC, crate::common::RW> {
126        unsafe {
127            crate::common::Reg::<self::Eccprcr_SPEC, crate::common::RW>::from_ptr(
128                self._svd2pac_as_ptr().add(196usize),
129            )
130        }
131    }
132
133    #[doc = "ECC Test Control Register"]
134    #[inline(always)]
135    pub const fn eccetst(
136        &self,
137    ) -> &'static crate::common::Reg<self::Eccetst_SPEC, crate::common::RW> {
138        unsafe {
139            crate::common::Reg::<self::Eccetst_SPEC, crate::common::RW>::from_ptr(
140                self._svd2pac_as_ptr().add(212usize),
141            )
142        }
143    }
144
145    #[doc = "RAM ECC Error Operation After Detection Register"]
146    #[inline(always)]
147    pub const fn eccoad(
148        &self,
149    ) -> &'static crate::common::Reg<self::Eccoad_SPEC, crate::common::RW> {
150        unsafe {
151            crate::common::Reg::<self::Eccoad_SPEC, crate::common::RW>::from_ptr(
152                self._svd2pac_as_ptr().add(216usize),
153            )
154        }
155    }
156}
157#[doc(hidden)]
158#[derive(Copy, Clone, Eq, PartialEq)]
159pub struct Parioad_SPEC;
160impl crate::sealed::RegSpec for Parioad_SPEC {
161    type DataType = u8;
162}
163
164#[doc = "SRAM Parity Error Operation After Detection Register"]
165pub type Parioad = crate::RegValueT<Parioad_SPEC>;
166
167impl Parioad {
168    #[doc = "Operation after Detection"]
169    #[inline(always)]
170    pub fn oad(
171        self,
172    ) -> crate::common::RegisterField<
173        0,
174        0x1,
175        1,
176        0,
177        parioad::Oad,
178        parioad::Oad,
179        Parioad_SPEC,
180        crate::common::RW,
181    > {
182        crate::common::RegisterField::<
183            0,
184            0x1,
185            1,
186            0,
187            parioad::Oad,
188            parioad::Oad,
189            Parioad_SPEC,
190            crate::common::RW,
191        >::from_register(self, 0)
192    }
193}
194impl ::core::default::Default for Parioad {
195    #[inline(always)]
196    fn default() -> Parioad {
197        <crate::RegValueT<Parioad_SPEC> as RegisterValue<_>>::new(0)
198    }
199}
200pub mod parioad {
201
202    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
203    pub struct Oad_SPEC;
204    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
205    impl Oad {
206        #[doc = "Non-maskable interrupt"]
207        pub const _0: Self = Self::new(0);
208
209        #[doc = "Reset"]
210        pub const _1: Self = Self::new(1);
211    }
212}
213#[doc(hidden)]
214#[derive(Copy, Clone, Eq, PartialEq)]
215pub struct Sramprcr_SPEC;
216impl crate::sealed::RegSpec for Sramprcr_SPEC {
217    type DataType = u8;
218}
219
220#[doc = "SRAM Protection Register"]
221pub type Sramprcr = crate::RegValueT<Sramprcr_SPEC>;
222
223impl Sramprcr {
224    #[doc = "Write Key Code"]
225    #[inline(always)]
226    pub fn kw(
227        self,
228    ) -> crate::common::RegisterField<
229        1,
230        0x7f,
231        1,
232        0,
233        sramprcr::Kw,
234        sramprcr::Kw,
235        Sramprcr_SPEC,
236        crate::common::W,
237    > {
238        crate::common::RegisterField::<
239            1,
240            0x7f,
241            1,
242            0,
243            sramprcr::Kw,
244            sramprcr::Kw,
245            Sramprcr_SPEC,
246            crate::common::W,
247        >::from_register(self, 0)
248    }
249
250    #[doc = "Register Write Control"]
251    #[inline(always)]
252    pub fn sramprcr(
253        self,
254    ) -> crate::common::RegisterField<
255        0,
256        0x1,
257        1,
258        0,
259        sramprcr::Sramprcr,
260        sramprcr::Sramprcr,
261        Sramprcr_SPEC,
262        crate::common::RW,
263    > {
264        crate::common::RegisterField::<
265            0,
266            0x1,
267            1,
268            0,
269            sramprcr::Sramprcr,
270            sramprcr::Sramprcr,
271            Sramprcr_SPEC,
272            crate::common::RW,
273        >::from_register(self, 0)
274    }
275}
276impl ::core::default::Default for Sramprcr {
277    #[inline(always)]
278    fn default() -> Sramprcr {
279        <crate::RegValueT<Sramprcr_SPEC> as RegisterValue<_>>::new(0)
280    }
281}
282pub mod sramprcr {
283
284    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
285    pub struct Kw_SPEC;
286    pub type Kw = crate::EnumBitfieldStruct<u8, Kw_SPEC>;
287    impl Kw {
288        #[doc = "Writing to the RAMPRCR bit is valid, when the KEY bits are written 1111000b."]
289        pub const _1111000: Self = Self::new(120);
290    }
291    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
292    pub struct Sramprcr_SPEC;
293    pub type Sramprcr = crate::EnumBitfieldStruct<u8, Sramprcr_SPEC>;
294    impl Sramprcr {
295        #[doc = "Disable writes to protected registers"]
296        pub const _0: Self = Self::new(0);
297
298        #[doc = "Enable writes to protected registers"]
299        pub const _1: Self = Self::new(1);
300    }
301}
302#[doc(hidden)]
303#[derive(Copy, Clone, Eq, PartialEq)]
304pub struct Sramwtsc_SPEC;
305impl crate::sealed::RegSpec for Sramwtsc_SPEC {
306    type DataType = u8;
307}
308
309#[doc = "RAM Wait State Control Register"]
310pub type Sramwtsc = crate::RegValueT<Sramwtsc_SPEC>;
311
312impl Sramwtsc {
313    #[doc = "SRAM1 Wait Enable"]
314    #[inline(always)]
315    pub fn sram1wten(
316        self,
317    ) -> crate::common::RegisterField<
318        3,
319        0x1,
320        1,
321        0,
322        sramwtsc::Sram1Wten,
323        sramwtsc::Sram1Wten,
324        Sramwtsc_SPEC,
325        crate::common::RW,
326    > {
327        crate::common::RegisterField::<
328            3,
329            0x1,
330            1,
331            0,
332            sramwtsc::Sram1Wten,
333            sramwtsc::Sram1Wten,
334            Sramwtsc_SPEC,
335            crate::common::RW,
336        >::from_register(self, 0)
337    }
338
339    #[doc = "SRAM0 Wait Enable"]
340    #[inline(always)]
341    pub fn sram0wten(
342        self,
343    ) -> crate::common::RegisterField<
344        2,
345        0x1,
346        1,
347        0,
348        sramwtsc::Sram0Wten,
349        sramwtsc::Sram0Wten,
350        Sramwtsc_SPEC,
351        crate::common::RW,
352    > {
353        crate::common::RegisterField::<
354            2,
355            0x1,
356            1,
357            0,
358            sramwtsc::Sram0Wten,
359            sramwtsc::Sram0Wten,
360            Sramwtsc_SPEC,
361            crate::common::RW,
362        >::from_register(self, 0)
363    }
364
365    #[doc = "ECCRAM Read wait enable"]
366    #[inline(always)]
367    pub fn eccramrdwten(
368        self,
369    ) -> crate::common::RegisterField<
370        1,
371        0x1,
372        1,
373        0,
374        sramwtsc::Eccramrdwten,
375        sramwtsc::Eccramrdwten,
376        Sramwtsc_SPEC,
377        crate::common::RW,
378    > {
379        crate::common::RegisterField::<
380            1,
381            0x1,
382            1,
383            0,
384            sramwtsc::Eccramrdwten,
385            sramwtsc::Eccramrdwten,
386            Sramwtsc_SPEC,
387            crate::common::RW,
388        >::from_register(self, 0)
389    }
390}
391impl ::core::default::Default for Sramwtsc {
392    #[inline(always)]
393    fn default() -> Sramwtsc {
394        <crate::RegValueT<Sramwtsc_SPEC> as RegisterValue<_>>::new(14)
395    }
396}
397pub mod sramwtsc {
398
399    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
400    pub struct Sram1Wten_SPEC;
401    pub type Sram1Wten = crate::EnumBitfieldStruct<u8, Sram1Wten_SPEC>;
402    impl Sram1Wten {
403        #[doc = "Not add wait state in read access cycle to SRAM1"]
404        pub const _0: Self = Self::new(0);
405
406        #[doc = "Add wait state in read access cycle to SRAM1"]
407        pub const _1: Self = Self::new(1);
408    }
409    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
410    pub struct Sram0Wten_SPEC;
411    pub type Sram0Wten = crate::EnumBitfieldStruct<u8, Sram0Wten_SPEC>;
412    impl Sram0Wten {
413        #[doc = "Not add wait state in read access cycle to SRAM0"]
414        pub const _0: Self = Self::new(0);
415
416        #[doc = "Add wait state in read access cycle to SRAM0"]
417        pub const _1: Self = Self::new(1);
418    }
419    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
420    pub struct Eccramrdwten_SPEC;
421    pub type Eccramrdwten = crate::EnumBitfieldStruct<u8, Eccramrdwten_SPEC>;
422    impl Eccramrdwten {
423        #[doc = "Not add wait state in read access cycle to SRAM0 (ECC area)"]
424        pub const _0: Self = Self::new(0);
425
426        #[doc = "Add wait state in read access cycle to SRAM0 (ECC area)"]
427        pub const _1: Self = Self::new(1);
428    }
429}
430#[doc(hidden)]
431#[derive(Copy, Clone, Eq, PartialEq)]
432pub struct Eccmode_SPEC;
433impl crate::sealed::RegSpec for Eccmode_SPEC {
434    type DataType = u8;
435}
436
437#[doc = "ECCRAM Operating Mode Control Register"]
438pub type Eccmode = crate::RegValueT<Eccmode_SPEC>;
439
440impl Eccmode {
441    #[doc = "ECC Operating Mode Select"]
442    #[inline(always)]
443    pub fn eccmod(
444        self,
445    ) -> crate::common::RegisterField<
446        0,
447        0x3,
448        1,
449        0,
450        eccmode::Eccmod,
451        eccmode::Eccmod,
452        Eccmode_SPEC,
453        crate::common::RW,
454    > {
455        crate::common::RegisterField::<
456            0,
457            0x3,
458            1,
459            0,
460            eccmode::Eccmod,
461            eccmode::Eccmod,
462            Eccmode_SPEC,
463            crate::common::RW,
464        >::from_register(self, 0)
465    }
466}
467impl ::core::default::Default for Eccmode {
468    #[inline(always)]
469    fn default() -> Eccmode {
470        <crate::RegValueT<Eccmode_SPEC> as RegisterValue<_>>::new(0)
471    }
472}
473pub mod eccmode {
474
475    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
476    pub struct Eccmod_SPEC;
477    pub type Eccmod = crate::EnumBitfieldStruct<u8, Eccmod_SPEC>;
478    impl Eccmod {
479        #[doc = "Disable ECC function"]
480        pub const _00: Self = Self::new(0);
481
482        #[doc = "Setting prohibited"]
483        pub const _01: Self = Self::new(1);
484
485        #[doc = "Enable ECC function without error checking"]
486        pub const _10: Self = Self::new(2);
487
488        #[doc = "Enable ECC function with error checking."]
489        pub const _11: Self = Self::new(3);
490    }
491}
492#[doc(hidden)]
493#[derive(Copy, Clone, Eq, PartialEq)]
494pub struct Ecc2Sts_SPEC;
495impl crate::sealed::RegSpec for Ecc2Sts_SPEC {
496    type DataType = u8;
497}
498
499#[doc = "ECCRAM 2-Bit Error Status Register"]
500pub type Ecc2Sts = crate::RegValueT<Ecc2Sts_SPEC>;
501
502impl Ecc2Sts {
503    #[doc = "ECC 2-Bit Error Status"]
504    #[inline(always)]
505    pub fn ecc2err(
506        self,
507    ) -> crate::common::RegisterField<
508        0,
509        0x1,
510        1,
511        0,
512        ecc2sts::Ecc2Err,
513        ecc2sts::Ecc2Err,
514        Ecc2Sts_SPEC,
515        crate::common::RW,
516    > {
517        crate::common::RegisterField::<
518            0,
519            0x1,
520            1,
521            0,
522            ecc2sts::Ecc2Err,
523            ecc2sts::Ecc2Err,
524            Ecc2Sts_SPEC,
525            crate::common::RW,
526        >::from_register(self, 0)
527    }
528}
529impl ::core::default::Default for Ecc2Sts {
530    #[inline(always)]
531    fn default() -> Ecc2Sts {
532        <crate::RegValueT<Ecc2Sts_SPEC> as RegisterValue<_>>::new(0)
533    }
534}
535pub mod ecc2sts {
536
537    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
538    pub struct Ecc2Err_SPEC;
539    pub type Ecc2Err = crate::EnumBitfieldStruct<u8, Ecc2Err_SPEC>;
540    impl Ecc2Err {
541        #[doc = "No 2-bit ECC error occurred"]
542        pub const _0: Self = Self::new(0);
543
544        #[doc = "2-bit ECC error occurred"]
545        pub const _1: Self = Self::new(1);
546    }
547}
548#[doc(hidden)]
549#[derive(Copy, Clone, Eq, PartialEq)]
550pub struct Ecc1Stsen_SPEC;
551impl crate::sealed::RegSpec for Ecc1Stsen_SPEC {
552    type DataType = u8;
553}
554
555#[doc = "ECCRAM 1-Bit Error Information Update Enable Register"]
556pub type Ecc1Stsen = crate::RegValueT<Ecc1Stsen_SPEC>;
557
558impl Ecc1Stsen {
559    #[doc = "ECC 1-Bit Error Information Update Enable"]
560    #[inline(always)]
561    pub fn e1stsen(
562        self,
563    ) -> crate::common::RegisterField<
564        0,
565        0x1,
566        1,
567        0,
568        ecc1stsen::E1Stsen,
569        ecc1stsen::E1Stsen,
570        Ecc1Stsen_SPEC,
571        crate::common::RW,
572    > {
573        crate::common::RegisterField::<
574            0,
575            0x1,
576            1,
577            0,
578            ecc1stsen::E1Stsen,
579            ecc1stsen::E1Stsen,
580            Ecc1Stsen_SPEC,
581            crate::common::RW,
582        >::from_register(self, 0)
583    }
584}
585impl ::core::default::Default for Ecc1Stsen {
586    #[inline(always)]
587    fn default() -> Ecc1Stsen {
588        <crate::RegValueT<Ecc1Stsen_SPEC> as RegisterValue<_>>::new(0)
589    }
590}
591pub mod ecc1stsen {
592
593    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
594    pub struct E1Stsen_SPEC;
595    pub type E1Stsen = crate::EnumBitfieldStruct<u8, E1Stsen_SPEC>;
596    impl E1Stsen {
597        #[doc = "Disables updating of the 1-bit ECC error information."]
598        pub const _0: Self = Self::new(0);
599
600        #[doc = "Enables updating of the 1-bit ECC error information."]
601        pub const _1: Self = Self::new(1);
602    }
603}
604#[doc(hidden)]
605#[derive(Copy, Clone, Eq, PartialEq)]
606pub struct Ecc1Sts_SPEC;
607impl crate::sealed::RegSpec for Ecc1Sts_SPEC {
608    type DataType = u8;
609}
610
611#[doc = "ECCRAM 1-Bit Error Status Register"]
612pub type Ecc1Sts = crate::RegValueT<Ecc1Sts_SPEC>;
613
614impl Ecc1Sts {
615    #[doc = "ECC 1-Bit Error Status"]
616    #[inline(always)]
617    pub fn ecc1err(
618        self,
619    ) -> crate::common::RegisterField<
620        0,
621        0x1,
622        1,
623        0,
624        ecc1sts::Ecc1Err,
625        ecc1sts::Ecc1Err,
626        Ecc1Sts_SPEC,
627        crate::common::RW,
628    > {
629        crate::common::RegisterField::<
630            0,
631            0x1,
632            1,
633            0,
634            ecc1sts::Ecc1Err,
635            ecc1sts::Ecc1Err,
636            Ecc1Sts_SPEC,
637            crate::common::RW,
638        >::from_register(self, 0)
639    }
640}
641impl ::core::default::Default for Ecc1Sts {
642    #[inline(always)]
643    fn default() -> Ecc1Sts {
644        <crate::RegValueT<Ecc1Sts_SPEC> as RegisterValue<_>>::new(0)
645    }
646}
647pub mod ecc1sts {
648
649    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
650    pub struct Ecc1Err_SPEC;
651    pub type Ecc1Err = crate::EnumBitfieldStruct<u8, Ecc1Err_SPEC>;
652    impl Ecc1Err {
653        #[doc = "No 1-bit ECC error occurred"]
654        pub const _0: Self = Self::new(0);
655
656        #[doc = "1-bit ECC error occurred"]
657        pub const _1: Self = Self::new(1);
658    }
659}
660#[doc(hidden)]
661#[derive(Copy, Clone, Eq, PartialEq)]
662pub struct Eccprcr_SPEC;
663impl crate::sealed::RegSpec for Eccprcr_SPEC {
664    type DataType = u8;
665}
666
667#[doc = "ECCRAM Protection Register"]
668pub type Eccprcr = crate::RegValueT<Eccprcr_SPEC>;
669
670impl Eccprcr {
671    #[doc = "Write Key Code"]
672    #[inline(always)]
673    pub fn kw(
674        self,
675    ) -> crate::common::RegisterField<
676        1,
677        0x7f,
678        1,
679        0,
680        eccprcr::Kw,
681        eccprcr::Kw,
682        Eccprcr_SPEC,
683        crate::common::W,
684    > {
685        crate::common::RegisterField::<
686            1,
687            0x7f,
688            1,
689            0,
690            eccprcr::Kw,
691            eccprcr::Kw,
692            Eccprcr_SPEC,
693            crate::common::W,
694        >::from_register(self, 0)
695    }
696
697    #[doc = "ECCRAMETST Register Write Control"]
698    #[inline(always)]
699    pub fn eccprcr(
700        self,
701    ) -> crate::common::RegisterField<
702        0,
703        0x1,
704        1,
705        0,
706        eccprcr::Eccprcr,
707        eccprcr::Eccprcr,
708        Eccprcr_SPEC,
709        crate::common::RW,
710    > {
711        crate::common::RegisterField::<
712            0,
713            0x1,
714            1,
715            0,
716            eccprcr::Eccprcr,
717            eccprcr::Eccprcr,
718            Eccprcr_SPEC,
719            crate::common::RW,
720        >::from_register(self, 0)
721    }
722}
723impl ::core::default::Default for Eccprcr {
724    #[inline(always)]
725    fn default() -> Eccprcr {
726        <crate::RegValueT<Eccprcr_SPEC> as RegisterValue<_>>::new(0)
727    }
728}
729pub mod eccprcr {
730
731    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
732    pub struct Kw_SPEC;
733    pub type Kw = crate::EnumBitfieldStruct<u8, Kw_SPEC>;
734    impl Kw {
735        #[doc = "Writing to the ECCRAMPRCR bit is valid, when the KEY bits are written 1111000b."]
736        pub const _1111000: Self = Self::new(120);
737    }
738    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
739    pub struct Eccprcr_SPEC;
740    pub type Eccprcr = crate::EnumBitfieldStruct<u8, Eccprcr_SPEC>;
741    impl Eccprcr {
742        #[doc = "Disable writes to protected registers"]
743        pub const _0: Self = Self::new(0);
744
745        #[doc = "Enable writes to protected registers"]
746        pub const _1: Self = Self::new(1);
747    }
748}
749#[doc(hidden)]
750#[derive(Copy, Clone, Eq, PartialEq)]
751pub struct Eccetst_SPEC;
752impl crate::sealed::RegSpec for Eccetst_SPEC {
753    type DataType = u8;
754}
755
756#[doc = "ECC Test Control Register"]
757pub type Eccetst = crate::RegValueT<Eccetst_SPEC>;
758
759impl Eccetst {
760    #[doc = "ECC Bypass Select"]
761    #[inline(always)]
762    pub fn tstbyp(
763        self,
764    ) -> crate::common::RegisterField<
765        0,
766        0x1,
767        1,
768        0,
769        eccetst::Tstbyp,
770        eccetst::Tstbyp,
771        Eccetst_SPEC,
772        crate::common::RW,
773    > {
774        crate::common::RegisterField::<
775            0,
776            0x1,
777            1,
778            0,
779            eccetst::Tstbyp,
780            eccetst::Tstbyp,
781            Eccetst_SPEC,
782            crate::common::RW,
783        >::from_register(self, 0)
784    }
785}
786impl ::core::default::Default for Eccetst {
787    #[inline(always)]
788    fn default() -> Eccetst {
789        <crate::RegValueT<Eccetst_SPEC> as RegisterValue<_>>::new(0)
790    }
791}
792pub mod eccetst {
793
794    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
795    pub struct Tstbyp_SPEC;
796    pub type Tstbyp = crate::EnumBitfieldStruct<u8, Tstbyp_SPEC>;
797    impl Tstbyp {
798        #[doc = "ECC bypass disabled"]
799        pub const _0: Self = Self::new(0);
800
801        #[doc = "ECC bypass enabled."]
802        pub const _1: Self = Self::new(1);
803    }
804}
805#[doc(hidden)]
806#[derive(Copy, Clone, Eq, PartialEq)]
807pub struct Eccoad_SPEC;
808impl crate::sealed::RegSpec for Eccoad_SPEC {
809    type DataType = u8;
810}
811
812#[doc = "RAM ECC Error Operation After Detection Register"]
813pub type Eccoad = crate::RegValueT<Eccoad_SPEC>;
814
815impl Eccoad {
816    #[doc = "Operation after Detection"]
817    #[inline(always)]
818    pub fn oad(
819        self,
820    ) -> crate::common::RegisterField<
821        0,
822        0x1,
823        1,
824        0,
825        eccoad::Oad,
826        eccoad::Oad,
827        Eccoad_SPEC,
828        crate::common::RW,
829    > {
830        crate::common::RegisterField::<
831            0,
832            0x1,
833            1,
834            0,
835            eccoad::Oad,
836            eccoad::Oad,
837            Eccoad_SPEC,
838            crate::common::RW,
839        >::from_register(self, 0)
840    }
841}
842impl ::core::default::Default for Eccoad {
843    #[inline(always)]
844    fn default() -> Eccoad {
845        <crate::RegValueT<Eccoad_SPEC> as RegisterValue<_>>::new(0)
846    }
847}
848pub mod eccoad {
849
850    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
851    pub struct Oad_SPEC;
852    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
853    impl Oad {
854        #[doc = "Non maskable interrupt."]
855        pub const _0: Self = Self::new(0);
856
857        #[doc = "Internal reset."]
858        pub const _1: Self = Self::new(1);
859    }
860}
ra6m2_pac/sram.rs

ra6m2_pac/
sram.rs
