1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SD Host Interface 0"]
28unsafe impl ::core::marker::Send for super::Sdhi0 {}
29unsafe impl ::core::marker::Sync for super::Sdhi0 {}
30impl super::Sdhi0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Command Type Register"]
38 #[inline(always)]
39 pub const fn sd_cmd(&self) -> &'static crate::common::Reg<self::SdCmd_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::SdCmd_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "SD Command Argument Register"]
48 #[inline(always)]
49 pub const fn sd_arg(&self) -> &'static crate::common::Reg<self::SdArg_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::SdArg_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(8usize),
53 )
54 }
55 }
56
57 #[doc = "SD Command Argument Register 1"]
58 #[inline(always)]
59 pub const fn sd_arg1(
60 &self,
61 ) -> &'static crate::common::Reg<self::SdArg1_SPEC, crate::common::RW> {
62 unsafe {
63 crate::common::Reg::<self::SdArg1_SPEC, crate::common::RW>::from_ptr(
64 self._svd2pac_as_ptr().add(12usize),
65 )
66 }
67 }
68
69 #[doc = "Data Stop Register"]
70 #[inline(always)]
71 pub const fn sd_stop(
72 &self,
73 ) -> &'static crate::common::Reg<self::SdStop_SPEC, crate::common::RW> {
74 unsafe {
75 crate::common::Reg::<self::SdStop_SPEC, crate::common::RW>::from_ptr(
76 self._svd2pac_as_ptr().add(16usize),
77 )
78 }
79 }
80
81 #[doc = "Block Count Register"]
82 #[inline(always)]
83 pub const fn sd_seccnt(
84 &self,
85 ) -> &'static crate::common::Reg<self::SdSeccnt_SPEC, crate::common::RW> {
86 unsafe {
87 crate::common::Reg::<self::SdSeccnt_SPEC, crate::common::RW>::from_ptr(
88 self._svd2pac_as_ptr().add(20usize),
89 )
90 }
91 }
92
93 #[doc = "SD Card Response Register 10"]
94 #[inline(always)]
95 pub const fn sd_rsp10(
96 &self,
97 ) -> &'static crate::common::Reg<self::SdRsp10_SPEC, crate::common::R> {
98 unsafe {
99 crate::common::Reg::<self::SdRsp10_SPEC, crate::common::R>::from_ptr(
100 self._svd2pac_as_ptr().add(24usize),
101 )
102 }
103 }
104
105 #[doc = "SD Card Response Register 1"]
106 #[inline(always)]
107 pub const fn sd_rsp1(
108 &self,
109 ) -> &'static crate::common::Reg<self::SdRsp1_SPEC, crate::common::R> {
110 unsafe {
111 crate::common::Reg::<self::SdRsp1_SPEC, crate::common::R>::from_ptr(
112 self._svd2pac_as_ptr().add(28usize),
113 )
114 }
115 }
116
117 #[doc = "SD Card Response Register 32"]
118 #[inline(always)]
119 pub const fn sd_rsp32(
120 &self,
121 ) -> &'static crate::common::Reg<self::SdRsp32_SPEC, crate::common::R> {
122 unsafe {
123 crate::common::Reg::<self::SdRsp32_SPEC, crate::common::R>::from_ptr(
124 self._svd2pac_as_ptr().add(32usize),
125 )
126 }
127 }
128
129 #[doc = "SD Card Response Register 3"]
130 #[inline(always)]
131 pub const fn sd_rsp3(
132 &self,
133 ) -> &'static crate::common::Reg<self::SdRsp3_SPEC, crate::common::R> {
134 unsafe {
135 crate::common::Reg::<self::SdRsp3_SPEC, crate::common::R>::from_ptr(
136 self._svd2pac_as_ptr().add(36usize),
137 )
138 }
139 }
140
141 #[doc = "SD Card Response Register 54"]
142 #[inline(always)]
143 pub const fn sd_rsp54(
144 &self,
145 ) -> &'static crate::common::Reg<self::SdRsp54_SPEC, crate::common::R> {
146 unsafe {
147 crate::common::Reg::<self::SdRsp54_SPEC, crate::common::R>::from_ptr(
148 self._svd2pac_as_ptr().add(40usize),
149 )
150 }
151 }
152
153 #[doc = "SD Card Response Register 5"]
154 #[inline(always)]
155 pub const fn sd_rsp5(
156 &self,
157 ) -> &'static crate::common::Reg<self::SdRsp5_SPEC, crate::common::R> {
158 unsafe {
159 crate::common::Reg::<self::SdRsp5_SPEC, crate::common::R>::from_ptr(
160 self._svd2pac_as_ptr().add(44usize),
161 )
162 }
163 }
164
165 #[doc = "SD Card Response Register 76"]
166 #[inline(always)]
167 pub const fn sd_rsp76(
168 &self,
169 ) -> &'static crate::common::Reg<self::SdRsp76_SPEC, crate::common::R> {
170 unsafe {
171 crate::common::Reg::<self::SdRsp76_SPEC, crate::common::R>::from_ptr(
172 self._svd2pac_as_ptr().add(48usize),
173 )
174 }
175 }
176
177 #[doc = "SD Card Response Register 7"]
178 #[inline(always)]
179 pub const fn sd_rsp7(
180 &self,
181 ) -> &'static crate::common::Reg<self::SdRsp7_SPEC, crate::common::R> {
182 unsafe {
183 crate::common::Reg::<self::SdRsp7_SPEC, crate::common::R>::from_ptr(
184 self._svd2pac_as_ptr().add(52usize),
185 )
186 }
187 }
188
189 #[doc = "SD Card Interrupt Flag Register 1"]
190 #[inline(always)]
191 pub const fn sd_info1(
192 &self,
193 ) -> &'static crate::common::Reg<self::SdInfo1_SPEC, crate::common::RW> {
194 unsafe {
195 crate::common::Reg::<self::SdInfo1_SPEC, crate::common::RW>::from_ptr(
196 self._svd2pac_as_ptr().add(56usize),
197 )
198 }
199 }
200
201 #[doc = "SD Card Interrupt Flag Register 2"]
202 #[inline(always)]
203 pub const fn sd_info2(
204 &self,
205 ) -> &'static crate::common::Reg<self::SdInfo2_SPEC, crate::common::RW> {
206 unsafe {
207 crate::common::Reg::<self::SdInfo2_SPEC, crate::common::RW>::from_ptr(
208 self._svd2pac_as_ptr().add(60usize),
209 )
210 }
211 }
212
213 #[doc = "SD_INFO1 Interrupt Mask Register"]
214 #[inline(always)]
215 pub const fn sd_info1_mask(
216 &self,
217 ) -> &'static crate::common::Reg<self::SdInfo1Mask_SPEC, crate::common::RW> {
218 unsafe {
219 crate::common::Reg::<self::SdInfo1Mask_SPEC, crate::common::RW>::from_ptr(
220 self._svd2pac_as_ptr().add(64usize),
221 )
222 }
223 }
224
225 #[doc = "SD_INFO2 Interrupt Mask Register"]
226 #[inline(always)]
227 pub const fn sd_info2_mask(
228 &self,
229 ) -> &'static crate::common::Reg<self::SdInfo2Mask_SPEC, crate::common::RW> {
230 unsafe {
231 crate::common::Reg::<self::SdInfo2Mask_SPEC, crate::common::RW>::from_ptr(
232 self._svd2pac_as_ptr().add(68usize),
233 )
234 }
235 }
236
237 #[doc = "SD Clock Control Register"]
238 #[inline(always)]
239 pub const fn sd_clk_ctrl(
240 &self,
241 ) -> &'static crate::common::Reg<self::SdClkCtrl_SPEC, crate::common::RW> {
242 unsafe {
243 crate::common::Reg::<self::SdClkCtrl_SPEC, crate::common::RW>::from_ptr(
244 self._svd2pac_as_ptr().add(72usize),
245 )
246 }
247 }
248
249 #[doc = "Transfer Data Length Register"]
250 #[inline(always)]
251 pub const fn sd_size(
252 &self,
253 ) -> &'static crate::common::Reg<self::SdSize_SPEC, crate::common::RW> {
254 unsafe {
255 crate::common::Reg::<self::SdSize_SPEC, crate::common::RW>::from_ptr(
256 self._svd2pac_as_ptr().add(76usize),
257 )
258 }
259 }
260
261 #[doc = "SD Card Access Control Option Register"]
262 #[inline(always)]
263 pub const fn sd_option(
264 &self,
265 ) -> &'static crate::common::Reg<self::SdOption_SPEC, crate::common::RW> {
266 unsafe {
267 crate::common::Reg::<self::SdOption_SPEC, crate::common::RW>::from_ptr(
268 self._svd2pac_as_ptr().add(80usize),
269 )
270 }
271 }
272
273 #[doc = "SD Error Status Register 1"]
274 #[inline(always)]
275 pub const fn sd_err_sts1(
276 &self,
277 ) -> &'static crate::common::Reg<self::SdErrSts1_SPEC, crate::common::R> {
278 unsafe {
279 crate::common::Reg::<self::SdErrSts1_SPEC, crate::common::R>::from_ptr(
280 self._svd2pac_as_ptr().add(88usize),
281 )
282 }
283 }
284
285 #[doc = "SD Error Status Register 2"]
286 #[inline(always)]
287 pub const fn sd_err_sts2(
288 &self,
289 ) -> &'static crate::common::Reg<self::SdErrSts2_SPEC, crate::common::R> {
290 unsafe {
291 crate::common::Reg::<self::SdErrSts2_SPEC, crate::common::R>::from_ptr(
292 self._svd2pac_as_ptr().add(92usize),
293 )
294 }
295 }
296
297 #[doc = "SD Buffer Register"]
298 #[inline(always)]
299 pub const fn sd_buf0(
300 &self,
301 ) -> &'static crate::common::Reg<self::SdBuf0_SPEC, crate::common::RW> {
302 unsafe {
303 crate::common::Reg::<self::SdBuf0_SPEC, crate::common::RW>::from_ptr(
304 self._svd2pac_as_ptr().add(96usize),
305 )
306 }
307 }
308
309 #[doc = "SDIO Mode Control Register"]
310 #[inline(always)]
311 pub const fn sdio_mode(
312 &self,
313 ) -> &'static crate::common::Reg<self::SdioMode_SPEC, crate::common::RW> {
314 unsafe {
315 crate::common::Reg::<self::SdioMode_SPEC, crate::common::RW>::from_ptr(
316 self._svd2pac_as_ptr().add(104usize),
317 )
318 }
319 }
320
321 #[doc = "SDIO Interrupt Flag Register 1"]
322 #[inline(always)]
323 pub const fn sdio_info1(
324 &self,
325 ) -> &'static crate::common::Reg<self::SdioInfo1_SPEC, crate::common::RW> {
326 unsafe {
327 crate::common::Reg::<self::SdioInfo1_SPEC, crate::common::RW>::from_ptr(
328 self._svd2pac_as_ptr().add(108usize),
329 )
330 }
331 }
332
333 #[doc = "SDIO_INFO1 Interrupt Mask Register"]
334 #[inline(always)]
335 pub const fn sdio_info1_mask(
336 &self,
337 ) -> &'static crate::common::Reg<self::SdioInfo1Mask_SPEC, crate::common::RW> {
338 unsafe {
339 crate::common::Reg::<self::SdioInfo1Mask_SPEC, crate::common::RW>::from_ptr(
340 self._svd2pac_as_ptr().add(112usize),
341 )
342 }
343 }
344
345 #[doc = "DMA Mode Enable Register"]
346 #[inline(always)]
347 pub const fn sd_dmaen(
348 &self,
349 ) -> &'static crate::common::Reg<self::SdDmaen_SPEC, crate::common::RW> {
350 unsafe {
351 crate::common::Reg::<self::SdDmaen_SPEC, crate::common::RW>::from_ptr(
352 self._svd2pac_as_ptr().add(432usize),
353 )
354 }
355 }
356
357 #[doc = "Software Reset Register"]
358 #[inline(always)]
359 pub const fn soft_rst(
360 &self,
361 ) -> &'static crate::common::Reg<self::SoftRst_SPEC, crate::common::RW> {
362 unsafe {
363 crate::common::Reg::<self::SoftRst_SPEC, crate::common::RW>::from_ptr(
364 self._svd2pac_as_ptr().add(448usize),
365 )
366 }
367 }
368
369 #[doc = "SD Interface Mode Setting Register"]
370 #[inline(always)]
371 pub const fn sdif_mode(
372 &self,
373 ) -> &'static crate::common::Reg<self::SdifMode_SPEC, crate::common::RW> {
374 unsafe {
375 crate::common::Reg::<self::SdifMode_SPEC, crate::common::RW>::from_ptr(
376 self._svd2pac_as_ptr().add(460usize),
377 )
378 }
379 }
380
381 #[doc = "Swap Control Register"]
382 #[inline(always)]
383 pub const fn ext_swap(
384 &self,
385 ) -> &'static crate::common::Reg<self::ExtSwap_SPEC, crate::common::RW> {
386 unsafe {
387 crate::common::Reg::<self::ExtSwap_SPEC, crate::common::RW>::from_ptr(
388 self._svd2pac_as_ptr().add(480usize),
389 )
390 }
391 }
392}
393#[doc(hidden)]
394#[derive(Copy, Clone, Eq, PartialEq)]
395pub struct SdCmd_SPEC;
396impl crate::sealed::RegSpec for SdCmd_SPEC {
397 type DataType = u32;
398}
399
400#[doc = "Command Type Register"]
401pub type SdCmd = crate::RegValueT<SdCmd_SPEC>;
402
403impl SdCmd {
404 #[doc = "Multiple Block Transfer Mode (enabled at multiple block transfer)"]
405 #[inline(always)]
406 pub fn cmd12at(
407 self,
408 ) -> crate::common::RegisterField<
409 14,
410 0x3,
411 1,
412 0,
413 sd_cmd::Cmd12At,
414 sd_cmd::Cmd12At,
415 SdCmd_SPEC,
416 crate::common::RW,
417 > {
418 crate::common::RegisterField::<
419 14,
420 0x3,
421 1,
422 0,
423 sd_cmd::Cmd12At,
424 sd_cmd::Cmd12At,
425 SdCmd_SPEC,
426 crate::common::RW,
427 >::from_register(self, 0)
428 }
429
430 #[doc = "Single/Multiple Block Transfer (enabled when the command with data is handled)"]
431 #[inline(always)]
432 pub fn trstp(
433 self,
434 ) -> crate::common::RegisterField<
435 13,
436 0x1,
437 1,
438 0,
439 sd_cmd::Trstp,
440 sd_cmd::Trstp,
441 SdCmd_SPEC,
442 crate::common::RW,
443 > {
444 crate::common::RegisterField::<
445 13,
446 0x1,
447 1,
448 0,
449 sd_cmd::Trstp,
450 sd_cmd::Trstp,
451 SdCmd_SPEC,
452 crate::common::RW,
453 >::from_register(self, 0)
454 }
455
456 #[doc = "Write/Read Mode (enabled when the command with data is handled)"]
457 #[inline(always)]
458 pub fn cmdrw(
459 self,
460 ) -> crate::common::RegisterField<
461 12,
462 0x1,
463 1,
464 0,
465 sd_cmd::Cmdrw,
466 sd_cmd::Cmdrw,
467 SdCmd_SPEC,
468 crate::common::RW,
469 > {
470 crate::common::RegisterField::<
471 12,
472 0x1,
473 1,
474 0,
475 sd_cmd::Cmdrw,
476 sd_cmd::Cmdrw,
477 SdCmd_SPEC,
478 crate::common::RW,
479 >::from_register(self, 0)
480 }
481
482 #[doc = "Data Mode (Command Type)"]
483 #[inline(always)]
484 pub fn cmdtp(
485 self,
486 ) -> crate::common::RegisterField<
487 11,
488 0x1,
489 1,
490 0,
491 sd_cmd::Cmdtp,
492 sd_cmd::Cmdtp,
493 SdCmd_SPEC,
494 crate::common::RW,
495 > {
496 crate::common::RegisterField::<
497 11,
498 0x1,
499 1,
500 0,
501 sd_cmd::Cmdtp,
502 sd_cmd::Cmdtp,
503 SdCmd_SPEC,
504 crate::common::RW,
505 >::from_register(self, 0)
506 }
507
508 #[doc = "Mode/Response TypeNOTE: As some commands cannot be used in normal mode, see section 1.4.10, Example of SD_CMD Register Setting to select mode/response type."]
509 #[inline(always)]
510 pub fn rsptp(
511 self,
512 ) -> crate::common::RegisterField<
513 8,
514 0x7,
515 1,
516 0,
517 sd_cmd::Rsptp,
518 sd_cmd::Rsptp,
519 SdCmd_SPEC,
520 crate::common::RW,
521 > {
522 crate::common::RegisterField::<
523 8,
524 0x7,
525 1,
526 0,
527 sd_cmd::Rsptp,
528 sd_cmd::Rsptp,
529 SdCmd_SPEC,
530 crate::common::RW,
531 >::from_register(self, 0)
532 }
533
534 #[doc = "Command Type Select"]
535 #[inline(always)]
536 pub fn acmd(
537 self,
538 ) -> crate::common::RegisterField<
539 6,
540 0x3,
541 1,
542 0,
543 sd_cmd::Acmd,
544 sd_cmd::Acmd,
545 SdCmd_SPEC,
546 crate::common::RW,
547 > {
548 crate::common::RegisterField::<
549 6,
550 0x3,
551 1,
552 0,
553 sd_cmd::Acmd,
554 sd_cmd::Acmd,
555 SdCmd_SPEC,
556 crate::common::RW,
557 >::from_register(self, 0)
558 }
559
560 #[doc = "Command IndexThese bits specify Command Format\\[45:40\\] (command index).\\[Examples\\]CMD6: SD_CMD\\[7:0\\] = 8\'b00_000110CMD18: SD_CMD\\[7:0\\] = 8\'b00_010010ACMD13: SD_CMD\\[7:0\\] = 8\'b01_001101"]
561 #[inline(always)]
562 pub fn cmdidx(
563 self,
564 ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, SdCmd_SPEC, crate::common::RW> {
565 crate::common::RegisterField::<0,0x3f,1,0,u8,u8,SdCmd_SPEC,crate::common::RW>::from_register(self,0)
566 }
567}
568impl ::core::default::Default for SdCmd {
569 #[inline(always)]
570 fn default() -> SdCmd {
571 <crate::RegValueT<SdCmd_SPEC> as RegisterValue<_>>::new(0)
572 }
573}
574pub mod sd_cmd {
575
576 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
577 pub struct Cmd12At_SPEC;
578 pub type Cmd12At = crate::EnumBitfieldStruct<u8, Cmd12At_SPEC>;
579 impl Cmd12At {
580 #[doc = "CMD12 is automatically issued at multiple block transfer."]
581 pub const _00: Self = Self::new(0);
582
583 #[doc = "CMD12 is not automatically issued at multiple block transfer."]
584 pub const _01: Self = Self::new(1);
585
586 #[doc = "Setting prohibited"]
587 pub const _10: Self = Self::new(2);
588
589 #[doc = "Setting prohibited"]
590 pub const _11: Self = Self::new(3);
591 }
592 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
593 pub struct Trstp_SPEC;
594 pub type Trstp = crate::EnumBitfieldStruct<u8, Trstp_SPEC>;
595 impl Trstp {
596 #[doc = "Single block transfer"]
597 pub const _0: Self = Self::new(0);
598
599 #[doc = "Multiple block transfer"]
600 pub const _1: Self = Self::new(1);
601 }
602 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
603 pub struct Cmdrw_SPEC;
604 pub type Cmdrw = crate::EnumBitfieldStruct<u8, Cmdrw_SPEC>;
605 impl Cmdrw {
606 #[doc = "Write (SD/MMC host interface -> SD card/MMC)"]
607 pub const _0: Self = Self::new(0);
608
609 #[doc = "Read (SD/MMC host interface <- SD card/MMC)"]
610 pub const _1: Self = Self::new(1);
611 }
612 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
613 pub struct Cmdtp_SPEC;
614 pub type Cmdtp = crate::EnumBitfieldStruct<u8, Cmdtp_SPEC>;
615 impl Cmdtp {
616 #[doc = "Command does not include data transfer (bc, bcr, or ac)"]
617 pub const _0: Self = Self::new(0);
618
619 #[doc = "Command includes data transfer (adtc)"]
620 pub const _1: Self = Self::new(1);
621 }
622 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
623 pub struct Rsptp_SPEC;
624 pub type Rsptp = crate::EnumBitfieldStruct<u8, Rsptp_SPEC>;
625 impl Rsptp {
626 #[doc = "Normal mode The response type and the transfer mode are selected by SD_CMD\\[7:0\\], and the SD_CMD\\[15:11\\] setting is disabled."]
627 pub const _000: Self = Self::new(0);
628
629 #[doc = "Expansion mode and no response"]
630 pub const _011: Self = Self::new(3);
631
632 #[doc = "Expansion mode and R1, R5, R6, or R7 response"]
633 pub const _100: Self = Self::new(4);
634
635 #[doc = "Expansion mode and R1b response"]
636 pub const _101: Self = Self::new(5);
637
638 #[doc = "Expansion mode and R2 response"]
639 pub const _110: Self = Self::new(6);
640
641 #[doc = "Expansion mode and R3 or R4 response"]
642 pub const _111: Self = Self::new(7);
643 }
644 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
645 pub struct Acmd_SPEC;
646 pub type Acmd = crate::EnumBitfieldStruct<u8, Acmd_SPEC>;
647 impl Acmd {
648 #[doc = "CMD"]
649 pub const _00: Self = Self::new(0);
650
651 #[doc = "ACMD"]
652 pub const _01: Self = Self::new(1);
653 }
654}
655#[doc(hidden)]
656#[derive(Copy, Clone, Eq, PartialEq)]
657pub struct SdArg_SPEC;
658impl crate::sealed::RegSpec for SdArg_SPEC {
659 type DataType = u32;
660}
661
662#[doc = "SD Command Argument Register"]
663pub type SdArg = crate::RegValueT<SdArg_SPEC>;
664
665impl SdArg {
666 #[doc = "Argument RegisterSet command format\\[39:8\\] (argument)"]
667 #[inline(always)]
668 pub fn sd_arg(
669 self,
670 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, SdArg_SPEC, crate::common::RW>
671 {
672 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,SdArg_SPEC,crate::common::RW>::from_register(self,0)
673 }
674}
675impl ::core::default::Default for SdArg {
676 #[inline(always)]
677 fn default() -> SdArg {
678 <crate::RegValueT<SdArg_SPEC> as RegisterValue<_>>::new(0)
679 }
680}
681
682#[doc(hidden)]
683#[derive(Copy, Clone, Eq, PartialEq)]
684pub struct SdArg1_SPEC;
685impl crate::sealed::RegSpec for SdArg1_SPEC {
686 type DataType = u32;
687}
688
689#[doc = "SD Command Argument Register 1"]
690pub type SdArg1 = crate::RegValueT<SdArg1_SPEC>;
691
692impl SdArg1 {
693 #[doc = "Argument Register 1Set command format\\[39:24\\] (argument)"]
694 #[inline(always)]
695 pub fn sd_arg1(
696 self,
697 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, SdArg1_SPEC, crate::common::RW>
698 {
699 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,SdArg1_SPEC,crate::common::RW>::from_register(self,0)
700 }
701}
702impl ::core::default::Default for SdArg1 {
703 #[inline(always)]
704 fn default() -> SdArg1 {
705 <crate::RegValueT<SdArg1_SPEC> as RegisterValue<_>>::new(0)
706 }
707}
708
709#[doc(hidden)]
710#[derive(Copy, Clone, Eq, PartialEq)]
711pub struct SdStop_SPEC;
712impl crate::sealed::RegSpec for SdStop_SPEC {
713 type DataType = u32;
714}
715
716#[doc = "Data Stop Register"]
717pub type SdStop = crate::RegValueT<SdStop_SPEC>;
718
719impl SdStop {
720 #[doc = "Block Count EnableSet SEC to 1 at multiple block transfer.When SD_CMD is set as follows to start the command sequence while SEC is set to 1, CMD12 is automatically issued to stop multi-block transfer with the number of blocks which is set to SD_SECCNT.1. CMD18 or CMD25 in normal mode (SD_CMD\\[10:8\\] = 000)2. SD_CMD\\[15:13\\] = 001 in extended mode (CMD12 is automatically issued, multiple block transfer)When the command sequence is halted because of a communications error or timeout, CMD12 is not automatically issued.NOTE: Do not change the value of this bit when the CBSY bit in SD_INFO2 is set to 1."]
721 #[inline(always)]
722 pub fn sec(
723 self,
724 ) -> crate::common::RegisterField<
725 8,
726 0x1,
727 1,
728 0,
729 sd_stop::Sec,
730 sd_stop::Sec,
731 SdStop_SPEC,
732 crate::common::RW,
733 > {
734 crate::common::RegisterField::<
735 8,
736 0x1,
737 1,
738 0,
739 sd_stop::Sec,
740 sd_stop::Sec,
741 SdStop_SPEC,
742 crate::common::RW,
743 >::from_register(self, 0)
744 }
745
746 #[doc = "Stop- When STP is set to 1 during multiple block transfer, CMD12 is issued to halt the transfer through the SD host interface.However, if a command sequence is halted because of a communications error or timeout, CMD12 is not issued. Although continued buffer access is possible even after STP has been set to 1, the buffer access error bit (ERR5 or ERR4) in SD_INFO2 will be set accordingly.- When STP has been set to 1 during transfer for single block write, the access end flag is set when SD_BUF becomes empty, and CMD12 is not issued. If SD_BUF does contain data, the access end flag is set on completion of reception of the busy state without CMD12 having been issued.- When STP has been set to 1 during transfer for single block read, the access end flag is set immediately after setting of the STP bit and CMD12 is not issued.- When STP is set to 1 during reception of the busy state after an R1b response, the access end flag is set on completion of reception of the busy state without CMD12 having been issued.- When STP is set to 1 after a command sequence has been completed, CMD12 is not issued and the access end flag is not set.- Set STP to 1 after the response end flag has been set.- Set STP to 0 after the response end flag has been set."]
747 #[inline(always)]
748 pub fn stp(self) -> crate::common::RegisterFieldBool<0, 1, 0, SdStop_SPEC, crate::common::RW> {
749 crate::common::RegisterFieldBool::<0, 1, 0, SdStop_SPEC, crate::common::RW>::from_register(
750 self, 0,
751 )
752 }
753}
754impl ::core::default::Default for SdStop {
755 #[inline(always)]
756 fn default() -> SdStop {
757 <crate::RegValueT<SdStop_SPEC> as RegisterValue<_>>::new(0)
758 }
759}
760pub mod sd_stop {
761
762 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
763 pub struct Sec_SPEC;
764 pub type Sec = crate::EnumBitfieldStruct<u8, Sec_SPEC>;
765 impl Sec {
766 #[doc = "Disables SD_SECCNT setting value."]
767 pub const _0: Self = Self::new(0);
768
769 #[doc = "Enables SD_SECCNT setting value."]
770 pub const _1: Self = Self::new(1);
771 }
772}
773#[doc(hidden)]
774#[derive(Copy, Clone, Eq, PartialEq)]
775pub struct SdSeccnt_SPEC;
776impl crate::sealed::RegSpec for SdSeccnt_SPEC {
777 type DataType = u32;
778}
779
780#[doc = "Block Count Register"]
781pub type SdSeccnt = crate::RegValueT<SdSeccnt_SPEC>;
782
783impl SdSeccnt {
784 #[doc = "Number of Transfer BlocksNOTE: Do not change the value of this bit when the CBSY bit in SD_INFO2 is set to 1."]
785 #[inline(always)]
786 pub fn sd_seccnt(
787 self,
788 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, SdSeccnt_SPEC, crate::common::RW>
789 {
790 crate::common::RegisterField::<
791 0,
792 0xffffffff,
793 1,
794 0,
795 u32,
796 u32,
797 SdSeccnt_SPEC,
798 crate::common::RW,
799 >::from_register(self, 0)
800 }
801}
802impl ::core::default::Default for SdSeccnt {
803 #[inline(always)]
804 fn default() -> SdSeccnt {
805 <crate::RegValueT<SdSeccnt_SPEC> as RegisterValue<_>>::new(0)
806 }
807}
808
809#[doc(hidden)]
810#[derive(Copy, Clone, Eq, PartialEq)]
811pub struct SdRsp10_SPEC;
812impl crate::sealed::RegSpec for SdRsp10_SPEC {
813 type DataType = u32;
814}
815
816#[doc = "SD Card Response Register 10"]
817pub type SdRsp10 = crate::RegValueT<SdRsp10_SPEC>;
818
819impl SdRsp10 {
820 #[doc = "Store the response from the SD card/MMC"]
821 #[inline(always)]
822 pub fn sd_rsp10(
823 self,
824 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, SdRsp10_SPEC, crate::common::R>
825 {
826 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,SdRsp10_SPEC,crate::common::R>::from_register(self,0)
827 }
828}
829impl ::core::default::Default for SdRsp10 {
830 #[inline(always)]
831 fn default() -> SdRsp10 {
832 <crate::RegValueT<SdRsp10_SPEC> as RegisterValue<_>>::new(0)
833 }
834}
835
836#[doc(hidden)]
837#[derive(Copy, Clone, Eq, PartialEq)]
838pub struct SdRsp1_SPEC;
839impl crate::sealed::RegSpec for SdRsp1_SPEC {
840 type DataType = u32;
841}
842
843#[doc = "SD Card Response Register 1"]
844pub type SdRsp1 = crate::RegValueT<SdRsp1_SPEC>;
845
846impl SdRsp1 {
847 #[doc = "Store the response from the SD card/MMC"]
848 #[inline(always)]
849 pub fn sd_rsp1(
850 self,
851 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, SdRsp1_SPEC, crate::common::R>
852 {
853 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,SdRsp1_SPEC,crate::common::R>::from_register(self,0)
854 }
855}
856impl ::core::default::Default for SdRsp1 {
857 #[inline(always)]
858 fn default() -> SdRsp1 {
859 <crate::RegValueT<SdRsp1_SPEC> as RegisterValue<_>>::new(0)
860 }
861}
862
863#[doc(hidden)]
864#[derive(Copy, Clone, Eq, PartialEq)]
865pub struct SdRsp32_SPEC;
866impl crate::sealed::RegSpec for SdRsp32_SPEC {
867 type DataType = u32;
868}
869
870#[doc = "SD Card Response Register 32"]
871pub type SdRsp32 = crate::RegValueT<SdRsp32_SPEC>;
872
873impl SdRsp32 {
874 #[doc = "Store the response from the SD card/MMC"]
875 #[inline(always)]
876 pub fn sd_rsp32(
877 self,
878 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, SdRsp32_SPEC, crate::common::R>
879 {
880 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,SdRsp32_SPEC,crate::common::R>::from_register(self,0)
881 }
882}
883impl ::core::default::Default for SdRsp32 {
884 #[inline(always)]
885 fn default() -> SdRsp32 {
886 <crate::RegValueT<SdRsp32_SPEC> as RegisterValue<_>>::new(0)
887 }
888}
889
890#[doc(hidden)]
891#[derive(Copy, Clone, Eq, PartialEq)]
892pub struct SdRsp3_SPEC;
893impl crate::sealed::RegSpec for SdRsp3_SPEC {
894 type DataType = u32;
895}
896
897#[doc = "SD Card Response Register 3"]
898pub type SdRsp3 = crate::RegValueT<SdRsp3_SPEC>;
899
900impl SdRsp3 {
901 #[doc = "Store the response from the SD card/MMC"]
902 #[inline(always)]
903 pub fn sd_rsp3(
904 self,
905 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, SdRsp3_SPEC, crate::common::R>
906 {
907 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,SdRsp3_SPEC,crate::common::R>::from_register(self,0)
908 }
909}
910impl ::core::default::Default for SdRsp3 {
911 #[inline(always)]
912 fn default() -> SdRsp3 {
913 <crate::RegValueT<SdRsp3_SPEC> as RegisterValue<_>>::new(0)
914 }
915}
916
917#[doc(hidden)]
918#[derive(Copy, Clone, Eq, PartialEq)]
919pub struct SdRsp54_SPEC;
920impl crate::sealed::RegSpec for SdRsp54_SPEC {
921 type DataType = u32;
922}
923
924#[doc = "SD Card Response Register 54"]
925pub type SdRsp54 = crate::RegValueT<SdRsp54_SPEC>;
926
927impl SdRsp54 {
928 #[doc = "Store the response from the SD card/MMC"]
929 #[inline(always)]
930 pub fn sd_rsp54(
931 self,
932 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, SdRsp54_SPEC, crate::common::R>
933 {
934 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,SdRsp54_SPEC,crate::common::R>::from_register(self,0)
935 }
936}
937impl ::core::default::Default for SdRsp54 {
938 #[inline(always)]
939 fn default() -> SdRsp54 {
940 <crate::RegValueT<SdRsp54_SPEC> as RegisterValue<_>>::new(0)
941 }
942}
943
944#[doc(hidden)]
945#[derive(Copy, Clone, Eq, PartialEq)]
946pub struct SdRsp5_SPEC;
947impl crate::sealed::RegSpec for SdRsp5_SPEC {
948 type DataType = u32;
949}
950
951#[doc = "SD Card Response Register 5"]
952pub type SdRsp5 = crate::RegValueT<SdRsp5_SPEC>;
953
954impl SdRsp5 {
955 #[doc = "Store the response from the SD card/MMC"]
956 #[inline(always)]
957 pub fn sd_rsp5(
958 self,
959 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, SdRsp5_SPEC, crate::common::R>
960 {
961 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,SdRsp5_SPEC,crate::common::R>::from_register(self,0)
962 }
963}
964impl ::core::default::Default for SdRsp5 {
965 #[inline(always)]
966 fn default() -> SdRsp5 {
967 <crate::RegValueT<SdRsp5_SPEC> as RegisterValue<_>>::new(0)
968 }
969}
970
971#[doc(hidden)]
972#[derive(Copy, Clone, Eq, PartialEq)]
973pub struct SdRsp76_SPEC;
974impl crate::sealed::RegSpec for SdRsp76_SPEC {
975 type DataType = u32;
976}
977
978#[doc = "SD Card Response Register 76"]
979pub type SdRsp76 = crate::RegValueT<SdRsp76_SPEC>;
980
981impl SdRsp76 {
982 #[doc = "Store the response from the SD card/MMC"]
983 #[inline(always)]
984 pub fn sd_rsp76(
985 self,
986 ) -> crate::common::RegisterField<0, 0xffffff, 1, 0, u32, u32, SdRsp76_SPEC, crate::common::R>
987 {
988 crate::common::RegisterField::<0,0xffffff,1,0,u32,u32,SdRsp76_SPEC,crate::common::R>::from_register(self,0)
989 }
990}
991impl ::core::default::Default for SdRsp76 {
992 #[inline(always)]
993 fn default() -> SdRsp76 {
994 <crate::RegValueT<SdRsp76_SPEC> as RegisterValue<_>>::new(0)
995 }
996}
997
998#[doc(hidden)]
999#[derive(Copy, Clone, Eq, PartialEq)]
1000pub struct SdRsp7_SPEC;
1001impl crate::sealed::RegSpec for SdRsp7_SPEC {
1002 type DataType = u32;
1003}
1004
1005#[doc = "SD Card Response Register 7"]
1006pub type SdRsp7 = crate::RegValueT<SdRsp7_SPEC>;
1007
1008impl SdRsp7 {
1009 #[doc = "Store the response from the SD card/MMC"]
1010 #[inline(always)]
1011 pub fn sd_rsp7(
1012 self,
1013 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, SdRsp7_SPEC, crate::common::R> {
1014 crate::common::RegisterField::<0,0xff,1,0,u8,u8,SdRsp7_SPEC,crate::common::R>::from_register(self,0)
1015 }
1016}
1017impl ::core::default::Default for SdRsp7 {
1018 #[inline(always)]
1019 fn default() -> SdRsp7 {
1020 <crate::RegValueT<SdRsp7_SPEC> as RegisterValue<_>>::new(0)
1021 }
1022}
1023
1024#[doc(hidden)]
1025#[derive(Copy, Clone, Eq, PartialEq)]
1026pub struct SdInfo1_SPEC;
1027impl crate::sealed::RegSpec for SdInfo1_SPEC {
1028 type DataType = u32;
1029}
1030
1031#[doc = "SD Card Interrupt Flag Register 1"]
1032pub type SdInfo1 = crate::RegValueT<SdInfo1_SPEC>;
1033
1034impl SdInfo1 {
1035 #[doc = "Inticates the SDnDAT3 State"]
1036 #[inline(always)]
1037 pub fn sdd3mon(
1038 self,
1039 ) -> crate::common::RegisterField<
1040 10,
1041 0x1,
1042 1,
1043 0,
1044 sd_info1::Sdd3Mon,
1045 sd_info1::Sdd3Mon,
1046 SdInfo1_SPEC,
1047 crate::common::R,
1048 > {
1049 crate::common::RegisterField::<
1050 10,
1051 0x1,
1052 1,
1053 0,
1054 sd_info1::Sdd3Mon,
1055 sd_info1::Sdd3Mon,
1056 SdInfo1_SPEC,
1057 crate::common::R,
1058 >::from_register(self, 0)
1059 }
1060
1061 #[doc = "SDnDAT3 Card Insertion"]
1062 #[inline(always)]
1063 pub fn sdd3in(
1064 self,
1065 ) -> crate::common::RegisterField<
1066 9,
1067 0x1,
1068 1,
1069 0,
1070 sd_info1::Sdd3In,
1071 sd_info1::Sdd3In,
1072 SdInfo1_SPEC,
1073 crate::common::RW,
1074 > {
1075 crate::common::RegisterField::<
1076 9,
1077 0x1,
1078 1,
1079 0,
1080 sd_info1::Sdd3In,
1081 sd_info1::Sdd3In,
1082 SdInfo1_SPEC,
1083 crate::common::RW,
1084 >::from_register(self, 0)
1085 }
1086
1087 #[doc = "SDnDAT3 Card Removal"]
1088 #[inline(always)]
1089 pub fn sdd3rm(
1090 self,
1091 ) -> crate::common::RegisterField<
1092 8,
1093 0x1,
1094 1,
1095 0,
1096 sd_info1::Sdd3Rm,
1097 sd_info1::Sdd3Rm,
1098 SdInfo1_SPEC,
1099 crate::common::RW,
1100 > {
1101 crate::common::RegisterField::<
1102 8,
1103 0x1,
1104 1,
1105 0,
1106 sd_info1::Sdd3Rm,
1107 sd_info1::Sdd3Rm,
1108 SdInfo1_SPEC,
1109 crate::common::RW,
1110 >::from_register(self, 0)
1111 }
1112
1113 #[doc = "Indicates the SDnWP state"]
1114 #[inline(always)]
1115 pub fn sdwpmon(
1116 self,
1117 ) -> crate::common::RegisterField<
1118 7,
1119 0x1,
1120 1,
1121 0,
1122 sd_info1::Sdwpmon,
1123 sd_info1::Sdwpmon,
1124 SdInfo1_SPEC,
1125 crate::common::R,
1126 > {
1127 crate::common::RegisterField::<
1128 7,
1129 0x1,
1130 1,
1131 0,
1132 sd_info1::Sdwpmon,
1133 sd_info1::Sdwpmon,
1134 SdInfo1_SPEC,
1135 crate::common::R,
1136 >::from_register(self, 0)
1137 }
1138
1139 #[doc = "Indicates the SDnCD state"]
1140 #[inline(always)]
1141 pub fn sdcdmon(
1142 self,
1143 ) -> crate::common::RegisterField<
1144 5,
1145 0x1,
1146 1,
1147 0,
1148 sd_info1::Sdcdmon,
1149 sd_info1::Sdcdmon,
1150 SdInfo1_SPEC,
1151 crate::common::R,
1152 > {
1153 crate::common::RegisterField::<
1154 5,
1155 0x1,
1156 1,
1157 0,
1158 sd_info1::Sdcdmon,
1159 sd_info1::Sdcdmon,
1160 SdInfo1_SPEC,
1161 crate::common::R,
1162 >::from_register(self, 0)
1163 }
1164
1165 #[doc = "SDnCD Card Insertion"]
1166 #[inline(always)]
1167 pub fn sdcdin(
1168 self,
1169 ) -> crate::common::RegisterField<
1170 4,
1171 0x1,
1172 1,
1173 0,
1174 sd_info1::Sdcdin,
1175 sd_info1::Sdcdin,
1176 SdInfo1_SPEC,
1177 crate::common::RW,
1178 > {
1179 crate::common::RegisterField::<
1180 4,
1181 0x1,
1182 1,
1183 0,
1184 sd_info1::Sdcdin,
1185 sd_info1::Sdcdin,
1186 SdInfo1_SPEC,
1187 crate::common::RW,
1188 >::from_register(self, 0)
1189 }
1190
1191 #[doc = "SDnCD Card Removal"]
1192 #[inline(always)]
1193 pub fn sdcdrm(
1194 self,
1195 ) -> crate::common::RegisterField<
1196 3,
1197 0x1,
1198 1,
1199 0,
1200 sd_info1::Sdcdrm,
1201 sd_info1::Sdcdrm,
1202 SdInfo1_SPEC,
1203 crate::common::RW,
1204 > {
1205 crate::common::RegisterField::<
1206 3,
1207 0x1,
1208 1,
1209 0,
1210 sd_info1::Sdcdrm,
1211 sd_info1::Sdcdrm,
1212 SdInfo1_SPEC,
1213 crate::common::RW,
1214 >::from_register(self, 0)
1215 }
1216
1217 #[doc = "Access End"]
1218 #[inline(always)]
1219 pub fn acend(
1220 self,
1221 ) -> crate::common::RegisterField<
1222 2,
1223 0x1,
1224 1,
1225 0,
1226 sd_info1::Acend,
1227 sd_info1::Acend,
1228 SdInfo1_SPEC,
1229 crate::common::RW,
1230 > {
1231 crate::common::RegisterField::<
1232 2,
1233 0x1,
1234 1,
1235 0,
1236 sd_info1::Acend,
1237 sd_info1::Acend,
1238 SdInfo1_SPEC,
1239 crate::common::RW,
1240 >::from_register(self, 0)
1241 }
1242
1243 #[doc = "Response End Detection"]
1244 #[inline(always)]
1245 pub fn rspend(
1246 self,
1247 ) -> crate::common::RegisterField<
1248 0,
1249 0x1,
1250 1,
1251 0,
1252 sd_info1::Rspend,
1253 sd_info1::Rspend,
1254 SdInfo1_SPEC,
1255 crate::common::RW,
1256 > {
1257 crate::common::RegisterField::<
1258 0,
1259 0x1,
1260 1,
1261 0,
1262 sd_info1::Rspend,
1263 sd_info1::Rspend,
1264 SdInfo1_SPEC,
1265 crate::common::RW,
1266 >::from_register(self, 0)
1267 }
1268}
1269impl ::core::default::Default for SdInfo1 {
1270 #[inline(always)]
1271 fn default() -> SdInfo1 {
1272 <crate::RegValueT<SdInfo1_SPEC> as RegisterValue<_>>::new(0)
1273 }
1274}
1275pub mod sd_info1 {
1276
1277 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1278 pub struct Sdd3Mon_SPEC;
1279 pub type Sdd3Mon = crate::EnumBitfieldStruct<u8, Sdd3Mon_SPEC>;
1280 impl Sdd3Mon {
1281 #[doc = "SDnDAT3 is set to 0."]
1282 pub const _0: Self = Self::new(0);
1283
1284 #[doc = "SDnDAT3 is set to 1."]
1285 pub const _1: Self = Self::new(1);
1286 }
1287 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1288 pub struct Sdd3In_SPEC;
1289 pub type Sdd3In = crate::EnumBitfieldStruct<u8, Sdd3In_SPEC>;
1290 impl Sdd3In {
1291 #[doc = "SD card insertion not detected"]
1292 pub const _0: Self = Self::new(0);
1293
1294 #[doc = "SD card insertion detected"]
1295 pub const _1: Self = Self::new(1);
1296 }
1297 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1298 pub struct Sdd3Rm_SPEC;
1299 pub type Sdd3Rm = crate::EnumBitfieldStruct<u8, Sdd3Rm_SPEC>;
1300 impl Sdd3Rm {
1301 #[doc = "SD card removal not detected"]
1302 pub const _0: Self = Self::new(0);
1303
1304 #[doc = "SD card removal detected"]
1305 pub const _1: Self = Self::new(1);
1306 }
1307 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1308 pub struct Sdwpmon_SPEC;
1309 pub type Sdwpmon = crate::EnumBitfieldStruct<u8, Sdwpmon_SPEC>;
1310 impl Sdwpmon {
1311 #[doc = "SDnWP is set to 1."]
1312 pub const _0: Self = Self::new(0);
1313
1314 #[doc = "SDnWP is set to 0."]
1315 pub const _1: Self = Self::new(1);
1316 }
1317 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1318 pub struct Sdcdmon_SPEC;
1319 pub type Sdcdmon = crate::EnumBitfieldStruct<u8, Sdcdmon_SPEC>;
1320 impl Sdcdmon {
1321 #[doc = "Indicates that Mcycle has elapsed with SDnCD held 1.(Mcycle is set by bits 3 to 0 in SD_OPTION.)"]
1322 pub const _0: Self = Self::new(0);
1323
1324 #[doc = "Indicates that Mcycle has elapsed with SDnCD held 0. (Mcycle is set by bits 3 to 0 in SD_OPTION.)"]
1325 pub const _1: Self = Self::new(1);
1326 }
1327 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1328 pub struct Sdcdin_SPEC;
1329 pub type Sdcdin = crate::EnumBitfieldStruct<u8, Sdcdin_SPEC>;
1330 impl Sdcdin {
1331 #[doc = "Card insertion not detected"]
1332 pub const _0: Self = Self::new(0);
1333
1334 #[doc = "Card insertion detected"]
1335 pub const _1: Self = Self::new(1);
1336 }
1337 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1338 pub struct Sdcdrm_SPEC;
1339 pub type Sdcdrm = crate::EnumBitfieldStruct<u8, Sdcdrm_SPEC>;
1340 impl Sdcdrm {
1341 #[doc = "Card removal not detected"]
1342 pub const _0: Self = Self::new(0);
1343
1344 #[doc = "Card removal detected"]
1345 pub const _1: Self = Self::new(1);
1346 }
1347 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1348 pub struct Acend_SPEC;
1349 pub type Acend = crate::EnumBitfieldStruct<u8, Acend_SPEC>;
1350 impl Acend {
1351 #[doc = "Access end is not detected"]
1352 pub const _0: Self = Self::new(0);
1353
1354 #[doc = "Access end is detected"]
1355 pub const _1: Self = Self::new(1);
1356 }
1357 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1358 pub struct Rspend_SPEC;
1359 pub type Rspend = crate::EnumBitfieldStruct<u8, Rspend_SPEC>;
1360 impl Rspend {
1361 #[doc = "Response end is not detected"]
1362 pub const _0: Self = Self::new(0);
1363
1364 #[doc = "Response end is detected"]
1365 pub const _1: Self = Self::new(1);
1366 }
1367}
1368#[doc(hidden)]
1369#[derive(Copy, Clone, Eq, PartialEq)]
1370pub struct SdInfo2_SPEC;
1371impl crate::sealed::RegSpec for SdInfo2_SPEC {
1372 type DataType = u32;
1373}
1374
1375#[doc = "SD Card Interrupt Flag Register 2"]
1376pub type SdInfo2 = crate::RegValueT<SdInfo2_SPEC>;
1377
1378impl SdInfo2 {
1379 #[doc = "Illegal Access Error"]
1380 #[inline(always)]
1381 pub fn ila(
1382 self,
1383 ) -> crate::common::RegisterField<
1384 15,
1385 0x1,
1386 1,
1387 0,
1388 sd_info2::Ila,
1389 sd_info2::Ila,
1390 SdInfo2_SPEC,
1391 crate::common::RW,
1392 > {
1393 crate::common::RegisterField::<
1394 15,
1395 0x1,
1396 1,
1397 0,
1398 sd_info2::Ila,
1399 sd_info2::Ila,
1400 SdInfo2_SPEC,
1401 crate::common::RW,
1402 >::from_register(self, 0)
1403 }
1404
1405 #[doc = "Command Type Register Busy"]
1406 #[inline(always)]
1407 pub fn cbsy(
1408 self,
1409 ) -> crate::common::RegisterField<
1410 14,
1411 0x1,
1412 1,
1413 0,
1414 sd_info2::Cbsy,
1415 sd_info2::Cbsy,
1416 SdInfo2_SPEC,
1417 crate::common::R,
1418 > {
1419 crate::common::RegisterField::<
1420 14,
1421 0x1,
1422 1,
1423 0,
1424 sd_info2::Cbsy,
1425 sd_info2::Cbsy,
1426 SdInfo2_SPEC,
1427 crate::common::R,
1428 >::from_register(self, 0)
1429 }
1430
1431 #[doc = "When a command sequence is started by writing to SD_CMD, the CBSY bit is set to 1 and, at the same time, the SCLKDIVEN bit is set to 0. The SCLKDIVEN bit is set to 1 after 8 cycles of SDCLK have elapsed after setting of the CBSY bit to 0 due to completion of the command sequence."]
1432 #[inline(always)]
1433 pub fn sd_clk_ctrlen(
1434 self,
1435 ) -> crate::common::RegisterField<
1436 13,
1437 0x1,
1438 1,
1439 0,
1440 sd_info2::SdClkCtrlen,
1441 sd_info2::SdClkCtrlen,
1442 SdInfo2_SPEC,
1443 crate::common::R,
1444 > {
1445 crate::common::RegisterField::<
1446 13,
1447 0x1,
1448 1,
1449 0,
1450 sd_info2::SdClkCtrlen,
1451 sd_info2::SdClkCtrlen,
1452 SdInfo2_SPEC,
1453 crate::common::R,
1454 >::from_register(self, 0)
1455 }
1456
1457 #[doc = "SD_BUF Write Enable"]
1458 #[inline(always)]
1459 pub fn bwe(
1460 self,
1461 ) -> crate::common::RegisterField<
1462 9,
1463 0x1,
1464 1,
1465 0,
1466 sd_info2::Bwe,
1467 sd_info2::Bwe,
1468 SdInfo2_SPEC,
1469 crate::common::RW,
1470 > {
1471 crate::common::RegisterField::<
1472 9,
1473 0x1,
1474 1,
1475 0,
1476 sd_info2::Bwe,
1477 sd_info2::Bwe,
1478 SdInfo2_SPEC,
1479 crate::common::RW,
1480 >::from_register(self, 0)
1481 }
1482
1483 #[doc = "SD_BUF Read Enable"]
1484 #[inline(always)]
1485 pub fn bre(
1486 self,
1487 ) -> crate::common::RegisterField<
1488 8,
1489 0x1,
1490 1,
1491 0,
1492 sd_info2::Bre,
1493 sd_info2::Bre,
1494 SdInfo2_SPEC,
1495 crate::common::RW,
1496 > {
1497 crate::common::RegisterField::<
1498 8,
1499 0x1,
1500 1,
1501 0,
1502 sd_info2::Bre,
1503 sd_info2::Bre,
1504 SdInfo2_SPEC,
1505 crate::common::RW,
1506 >::from_register(self, 0)
1507 }
1508
1509 #[doc = "SDDAT0Indicates the SDDAT0 state of the port specified by SD_PORTSEL."]
1510 #[inline(always)]
1511 pub fn sdd0mon(
1512 self,
1513 ) -> crate::common::RegisterField<
1514 7,
1515 0x1,
1516 1,
1517 0,
1518 sd_info2::Sdd0Mon,
1519 sd_info2::Sdd0Mon,
1520 SdInfo2_SPEC,
1521 crate::common::R,
1522 > {
1523 crate::common::RegisterField::<
1524 7,
1525 0x1,
1526 1,
1527 0,
1528 sd_info2::Sdd0Mon,
1529 sd_info2::Sdd0Mon,
1530 SdInfo2_SPEC,
1531 crate::common::R,
1532 >::from_register(self, 0)
1533 }
1534
1535 #[doc = "Response Timeout"]
1536 #[inline(always)]
1537 pub fn rspto(
1538 self,
1539 ) -> crate::common::RegisterField<
1540 6,
1541 0x1,
1542 1,
1543 0,
1544 sd_info2::Rspto,
1545 sd_info2::Rspto,
1546 SdInfo2_SPEC,
1547 crate::common::RW,
1548 > {
1549 crate::common::RegisterField::<
1550 6,
1551 0x1,
1552 1,
1553 0,
1554 sd_info2::Rspto,
1555 sd_info2::Rspto,
1556 SdInfo2_SPEC,
1557 crate::common::RW,
1558 >::from_register(self, 0)
1559 }
1560
1561 #[doc = "SD_BUF Illegal Read Access"]
1562 #[inline(always)]
1563 pub fn ilr(
1564 self,
1565 ) -> crate::common::RegisterField<
1566 5,
1567 0x1,
1568 1,
1569 0,
1570 sd_info2::Ilr,
1571 sd_info2::Ilr,
1572 SdInfo2_SPEC,
1573 crate::common::RW,
1574 > {
1575 crate::common::RegisterField::<
1576 5,
1577 0x1,
1578 1,
1579 0,
1580 sd_info2::Ilr,
1581 sd_info2::Ilr,
1582 SdInfo2_SPEC,
1583 crate::common::RW,
1584 >::from_register(self, 0)
1585 }
1586
1587 #[doc = "SD_BUF Illegal Write Access"]
1588 #[inline(always)]
1589 pub fn ilw(
1590 self,
1591 ) -> crate::common::RegisterField<
1592 4,
1593 0x1,
1594 1,
1595 0,
1596 sd_info2::Ilw,
1597 sd_info2::Ilw,
1598 SdInfo2_SPEC,
1599 crate::common::RW,
1600 > {
1601 crate::common::RegisterField::<
1602 4,
1603 0x1,
1604 1,
1605 0,
1606 sd_info2::Ilw,
1607 sd_info2::Ilw,
1608 SdInfo2_SPEC,
1609 crate::common::RW,
1610 >::from_register(self, 0)
1611 }
1612
1613 #[doc = "Data Timeout"]
1614 #[inline(always)]
1615 pub fn dto(
1616 self,
1617 ) -> crate::common::RegisterField<
1618 3,
1619 0x1,
1620 1,
1621 0,
1622 sd_info2::Dto,
1623 sd_info2::Dto,
1624 SdInfo2_SPEC,
1625 crate::common::RW,
1626 > {
1627 crate::common::RegisterField::<
1628 3,
1629 0x1,
1630 1,
1631 0,
1632 sd_info2::Dto,
1633 sd_info2::Dto,
1634 SdInfo2_SPEC,
1635 crate::common::RW,
1636 >::from_register(self, 0)
1637 }
1638
1639 #[doc = "END Error"]
1640 #[inline(always)]
1641 pub fn ende(
1642 self,
1643 ) -> crate::common::RegisterField<
1644 2,
1645 0x1,
1646 1,
1647 0,
1648 sd_info2::Ende,
1649 sd_info2::Ende,
1650 SdInfo2_SPEC,
1651 crate::common::RW,
1652 > {
1653 crate::common::RegisterField::<
1654 2,
1655 0x1,
1656 1,
1657 0,
1658 sd_info2::Ende,
1659 sd_info2::Ende,
1660 SdInfo2_SPEC,
1661 crate::common::RW,
1662 >::from_register(self, 0)
1663 }
1664
1665 #[doc = "CRC Error"]
1666 #[inline(always)]
1667 pub fn crce(
1668 self,
1669 ) -> crate::common::RegisterField<
1670 1,
1671 0x1,
1672 1,
1673 0,
1674 sd_info2::Crce,
1675 sd_info2::Crce,
1676 SdInfo2_SPEC,
1677 crate::common::RW,
1678 > {
1679 crate::common::RegisterField::<
1680 1,
1681 0x1,
1682 1,
1683 0,
1684 sd_info2::Crce,
1685 sd_info2::Crce,
1686 SdInfo2_SPEC,
1687 crate::common::RW,
1688 >::from_register(self, 0)
1689 }
1690
1691 #[doc = "Command Error"]
1692 #[inline(always)]
1693 pub fn cmde(
1694 self,
1695 ) -> crate::common::RegisterField<
1696 0,
1697 0x1,
1698 1,
1699 0,
1700 sd_info2::Cmde,
1701 sd_info2::Cmde,
1702 SdInfo2_SPEC,
1703 crate::common::RW,
1704 > {
1705 crate::common::RegisterField::<
1706 0,
1707 0x1,
1708 1,
1709 0,
1710 sd_info2::Cmde,
1711 sd_info2::Cmde,
1712 SdInfo2_SPEC,
1713 crate::common::RW,
1714 >::from_register(self, 0)
1715 }
1716}
1717impl ::core::default::Default for SdInfo2 {
1718 #[inline(always)]
1719 fn default() -> SdInfo2 {
1720 <crate::RegValueT<SdInfo2_SPEC> as RegisterValue<_>>::new(8192)
1721 }
1722}
1723pub mod sd_info2 {
1724
1725 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1726 pub struct Ila_SPEC;
1727 pub type Ila = crate::EnumBitfieldStruct<u8, Ila_SPEC>;
1728 impl Ila {
1729 #[doc = "Illegal access error not detected"]
1730 pub const _0: Self = Self::new(0);
1731
1732 #[doc = "Illegal access error detected"]
1733 pub const _1: Self = Self::new(1);
1734 }
1735 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1736 pub struct Cbsy_SPEC;
1737 pub type Cbsy = crate::EnumBitfieldStruct<u8, Cbsy_SPEC>;
1738 impl Cbsy {
1739 #[doc = "A command sequence is being executed."]
1740 pub const _0: Self = Self::new(0);
1741
1742 #[doc = "A command sequence has been completed."]
1743 pub const _1: Self = Self::new(1);
1744 }
1745 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1746 pub struct SdClkCtrlen_SPEC;
1747 pub type SdClkCtrlen = crate::EnumBitfieldStruct<u8, SdClkCtrlen_SPEC>;
1748 impl SdClkCtrlen {
1749 #[doc = "The SD/MMC bus (CMD, DAT) is busy. Writing to the SCLKEN and DIV bits in SD_CLK_CTRL is not possible."]
1750 pub const _0: Self = Self::new(0);
1751
1752 #[doc = "The SD/MMC bus (CMD, DAT) is not busy."]
1753 pub const _1: Self = Self::new(1);
1754 }
1755 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1756 pub struct Bwe_SPEC;
1757 pub type Bwe = crate::EnumBitfieldStruct<u8, Bwe_SPEC>;
1758 impl Bwe {
1759 #[doc = "Data can be written in SD_BUF0."]
1760 pub const _1: Self = Self::new(1);
1761
1762 #[doc = "Data cannot be written in SD_BUF0."]
1763 pub const _0: Self = Self::new(0);
1764 }
1765 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1766 pub struct Bre_SPEC;
1767 pub type Bre = crate::EnumBitfieldStruct<u8, Bre_SPEC>;
1768 impl Bre {
1769 #[doc = "Data can be read from SD_BUF0."]
1770 pub const _1: Self = Self::new(1);
1771
1772 #[doc = "Data cannot be read from SD_BUF0."]
1773 pub const _0: Self = Self::new(0);
1774 }
1775 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1776 pub struct Sdd0Mon_SPEC;
1777 pub type Sdd0Mon = crate::EnumBitfieldStruct<u8, Sdd0Mon_SPEC>;
1778 impl Sdd0Mon {
1779 #[doc = "SDDAT0 is set to 1."]
1780 pub const _1: Self = Self::new(1);
1781
1782 #[doc = "SDDAT0 is set to 0."]
1783 pub const _0: Self = Self::new(0);
1784 }
1785 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1786 pub struct Rspto_SPEC;
1787 pub type Rspto = crate::EnumBitfieldStruct<u8, Rspto_SPEC>;
1788 impl Rspto {
1789 #[doc = "Response timeout not detected"]
1790 pub const _0: Self = Self::new(0);
1791
1792 #[doc = "Response timeout detected"]
1793 pub const _1: Self = Self::new(1);
1794 }
1795 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1796 pub struct Ilr_SPEC;
1797 pub type Ilr = crate::EnumBitfieldStruct<u8, Ilr_SPEC>;
1798 impl Ilr {
1799 #[doc = "Illegal read access to the SD_BUF register not detected"]
1800 pub const _0: Self = Self::new(0);
1801
1802 #[doc = "Illegal read access to the SD_BUF register detected"]
1803 pub const _1: Self = Self::new(1);
1804 }
1805 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1806 pub struct Ilw_SPEC;
1807 pub type Ilw = crate::EnumBitfieldStruct<u8, Ilw_SPEC>;
1808 impl Ilw {
1809 #[doc = "Illegal write access to the SD_BUF register not detected"]
1810 pub const _0: Self = Self::new(0);
1811
1812 #[doc = "Illegal write access to the SD_BUF register detected"]
1813 pub const _1: Self = Self::new(1);
1814 }
1815 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1816 pub struct Dto_SPEC;
1817 pub type Dto = crate::EnumBitfieldStruct<u8, Dto_SPEC>;
1818 impl Dto {
1819 #[doc = "Data timeout not detected"]
1820 pub const _0: Self = Self::new(0);
1821
1822 #[doc = "Data timeout detected"]
1823 pub const _1: Self = Self::new(1);
1824 }
1825 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1826 pub struct Ende_SPEC;
1827 pub type Ende = crate::EnumBitfieldStruct<u8, Ende_SPEC>;
1828 impl Ende {
1829 #[doc = "End bit error not detected"]
1830 pub const _0: Self = Self::new(0);
1831
1832 #[doc = "End bit error detected"]
1833 pub const _1: Self = Self::new(1);
1834 }
1835 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1836 pub struct Crce_SPEC;
1837 pub type Crce = crate::EnumBitfieldStruct<u8, Crce_SPEC>;
1838 impl Crce {
1839 #[doc = "CRC error not detected"]
1840 pub const _0: Self = Self::new(0);
1841
1842 #[doc = "CRC error detected"]
1843 pub const _1: Self = Self::new(1);
1844 }
1845 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1846 pub struct Cmde_SPEC;
1847 pub type Cmde = crate::EnumBitfieldStruct<u8, Cmde_SPEC>;
1848 impl Cmde {
1849 #[doc = "Command error not detected"]
1850 pub const _0: Self = Self::new(0);
1851
1852 #[doc = "Command error detected"]
1853 pub const _1: Self = Self::new(1);
1854 }
1855}
1856#[doc(hidden)]
1857#[derive(Copy, Clone, Eq, PartialEq)]
1858pub struct SdInfo1Mask_SPEC;
1859impl crate::sealed::RegSpec for SdInfo1Mask_SPEC {
1860 type DataType = u32;
1861}
1862
1863#[doc = "SD_INFO1 Interrupt Mask Register"]
1864pub type SdInfo1Mask = crate::RegValueT<SdInfo1Mask_SPEC>;
1865
1866impl SdInfo1Mask {
1867 #[doc = "SDnDAT3 Card Insertion Interrupt Request Mask"]
1868 #[inline(always)]
1869 pub fn sdd3inm(
1870 self,
1871 ) -> crate::common::RegisterField<
1872 9,
1873 0x1,
1874 1,
1875 0,
1876 sd_info1_mask::Sdd3Inm,
1877 sd_info1_mask::Sdd3Inm,
1878 SdInfo1Mask_SPEC,
1879 crate::common::RW,
1880 > {
1881 crate::common::RegisterField::<
1882 9,
1883 0x1,
1884 1,
1885 0,
1886 sd_info1_mask::Sdd3Inm,
1887 sd_info1_mask::Sdd3Inm,
1888 SdInfo1Mask_SPEC,
1889 crate::common::RW,
1890 >::from_register(self, 0)
1891 }
1892
1893 #[doc = "SDnDAT3 Card Removal Interrupt Request Mask"]
1894 #[inline(always)]
1895 pub fn sdd3rmm(
1896 self,
1897 ) -> crate::common::RegisterField<
1898 8,
1899 0x1,
1900 1,
1901 0,
1902 sd_info1_mask::Sdd3Rmm,
1903 sd_info1_mask::Sdd3Rmm,
1904 SdInfo1Mask_SPEC,
1905 crate::common::RW,
1906 > {
1907 crate::common::RegisterField::<
1908 8,
1909 0x1,
1910 1,
1911 0,
1912 sd_info1_mask::Sdd3Rmm,
1913 sd_info1_mask::Sdd3Rmm,
1914 SdInfo1Mask_SPEC,
1915 crate::common::RW,
1916 >::from_register(self, 0)
1917 }
1918
1919 #[doc = "SDnCD card Insertion Interrupt Request Mask"]
1920 #[inline(always)]
1921 pub fn sdcdinm(
1922 self,
1923 ) -> crate::common::RegisterField<
1924 4,
1925 0x1,
1926 1,
1927 0,
1928 sd_info1_mask::Sdcdinm,
1929 sd_info1_mask::Sdcdinm,
1930 SdInfo1Mask_SPEC,
1931 crate::common::RW,
1932 > {
1933 crate::common::RegisterField::<
1934 4,
1935 0x1,
1936 1,
1937 0,
1938 sd_info1_mask::Sdcdinm,
1939 sd_info1_mask::Sdcdinm,
1940 SdInfo1Mask_SPEC,
1941 crate::common::RW,
1942 >::from_register(self, 0)
1943 }
1944
1945 #[doc = "SDnCD card Removal Interrupt Request Mask"]
1946 #[inline(always)]
1947 pub fn sdcdrmm(
1948 self,
1949 ) -> crate::common::RegisterField<
1950 3,
1951 0x1,
1952 1,
1953 0,
1954 sd_info1_mask::Sdcdrmm,
1955 sd_info1_mask::Sdcdrmm,
1956 SdInfo1Mask_SPEC,
1957 crate::common::RW,
1958 > {
1959 crate::common::RegisterField::<
1960 3,
1961 0x1,
1962 1,
1963 0,
1964 sd_info1_mask::Sdcdrmm,
1965 sd_info1_mask::Sdcdrmm,
1966 SdInfo1Mask_SPEC,
1967 crate::common::RW,
1968 >::from_register(self, 0)
1969 }
1970
1971 #[doc = "Access End Interrupt Request Mask"]
1972 #[inline(always)]
1973 pub fn acendm(
1974 self,
1975 ) -> crate::common::RegisterField<
1976 2,
1977 0x1,
1978 1,
1979 0,
1980 sd_info1_mask::Acendm,
1981 sd_info1_mask::Acendm,
1982 SdInfo1Mask_SPEC,
1983 crate::common::RW,
1984 > {
1985 crate::common::RegisterField::<
1986 2,
1987 0x1,
1988 1,
1989 0,
1990 sd_info1_mask::Acendm,
1991 sd_info1_mask::Acendm,
1992 SdInfo1Mask_SPEC,
1993 crate::common::RW,
1994 >::from_register(self, 0)
1995 }
1996
1997 #[doc = "Response End Interrupt Request Mask"]
1998 #[inline(always)]
1999 pub fn rspendm(
2000 self,
2001 ) -> crate::common::RegisterField<
2002 0,
2003 0x1,
2004 1,
2005 0,
2006 sd_info1_mask::Rspendm,
2007 sd_info1_mask::Rspendm,
2008 SdInfo1Mask_SPEC,
2009 crate::common::RW,
2010 > {
2011 crate::common::RegisterField::<
2012 0,
2013 0x1,
2014 1,
2015 0,
2016 sd_info1_mask::Rspendm,
2017 sd_info1_mask::Rspendm,
2018 SdInfo1Mask_SPEC,
2019 crate::common::RW,
2020 >::from_register(self, 0)
2021 }
2022}
2023impl ::core::default::Default for SdInfo1Mask {
2024 #[inline(always)]
2025 fn default() -> SdInfo1Mask {
2026 <crate::RegValueT<SdInfo1Mask_SPEC> as RegisterValue<_>>::new(797)
2027 }
2028}
2029pub mod sd_info1_mask {
2030
2031 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2032 pub struct Sdd3Inm_SPEC;
2033 pub type Sdd3Inm = crate::EnumBitfieldStruct<u8, Sdd3Inm_SPEC>;
2034 impl Sdd3Inm {
2035 #[doc = "SD card insertion interrupt request by the SDnDAT3 is not masked"]
2036 pub const _0: Self = Self::new(0);
2037
2038 #[doc = "SD card insertion interrupt request by the SDnDAT3 is masked"]
2039 pub const _1: Self = Self::new(1);
2040 }
2041 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2042 pub struct Sdd3Rmm_SPEC;
2043 pub type Sdd3Rmm = crate::EnumBitfieldStruct<u8, Sdd3Rmm_SPEC>;
2044 impl Sdd3Rmm {
2045 #[doc = "SD card removal interrupt request by the SDnDAT3 is not masked"]
2046 pub const _0: Self = Self::new(0);
2047
2048 #[doc = "SD card removal interrupt request by the SDnDAT3 is masked"]
2049 pub const _1: Self = Self::new(1);
2050 }
2051 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2052 pub struct Sdcdinm_SPEC;
2053 pub type Sdcdinm = crate::EnumBitfieldStruct<u8, Sdcdinm_SPEC>;
2054 impl Sdcdinm {
2055 #[doc = "Card insertion interrupt request by the SDnCD is not masked"]
2056 pub const _0: Self = Self::new(0);
2057
2058 #[doc = "Card insertion interrupt request by the SDnCD is masked"]
2059 pub const _1: Self = Self::new(1);
2060 }
2061 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2062 pub struct Sdcdrmm_SPEC;
2063 pub type Sdcdrmm = crate::EnumBitfieldStruct<u8, Sdcdrmm_SPEC>;
2064 impl Sdcdrmm {
2065 #[doc = "Card removal interrupt request by the by the SDnCD is not masked"]
2066 pub const _0: Self = Self::new(0);
2067
2068 #[doc = "Card removal interrupt request by the by the SDnCD is masked"]
2069 pub const _1: Self = Self::new(1);
2070 }
2071 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2072 pub struct Acendm_SPEC;
2073 pub type Acendm = crate::EnumBitfieldStruct<u8, Acendm_SPEC>;
2074 impl Acendm {
2075 #[doc = "Access end interrupt request is not masked"]
2076 pub const _0: Self = Self::new(0);
2077
2078 #[doc = "Access end interrupt request is masked"]
2079 pub const _1: Self = Self::new(1);
2080 }
2081 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2082 pub struct Rspendm_SPEC;
2083 pub type Rspendm = crate::EnumBitfieldStruct<u8, Rspendm_SPEC>;
2084 impl Rspendm {
2085 #[doc = "Response end interrupt request is not masked"]
2086 pub const _0: Self = Self::new(0);
2087
2088 #[doc = "Response end interrupt request is masked"]
2089 pub const _1: Self = Self::new(1);
2090 }
2091}
2092#[doc(hidden)]
2093#[derive(Copy, Clone, Eq, PartialEq)]
2094pub struct SdInfo2Mask_SPEC;
2095impl crate::sealed::RegSpec for SdInfo2Mask_SPEC {
2096 type DataType = u32;
2097}
2098
2099#[doc = "SD_INFO2 Interrupt Mask Register"]
2100pub type SdInfo2Mask = crate::RegValueT<SdInfo2Mask_SPEC>;
2101
2102impl SdInfo2Mask {
2103 #[doc = "Illegal Access Error Interrupt Request Mask"]
2104 #[inline(always)]
2105 pub fn ilam(
2106 self,
2107 ) -> crate::common::RegisterField<
2108 15,
2109 0x1,
2110 1,
2111 0,
2112 sd_info2_mask::Ilam,
2113 sd_info2_mask::Ilam,
2114 SdInfo2Mask_SPEC,
2115 crate::common::RW,
2116 > {
2117 crate::common::RegisterField::<
2118 15,
2119 0x1,
2120 1,
2121 0,
2122 sd_info2_mask::Ilam,
2123 sd_info2_mask::Ilam,
2124 SdInfo2Mask_SPEC,
2125 crate::common::RW,
2126 >::from_register(self, 0)
2127 }
2128
2129 #[doc = "BWE Interrupt Request Mask"]
2130 #[inline(always)]
2131 pub fn bwem(
2132 self,
2133 ) -> crate::common::RegisterField<
2134 9,
2135 0x1,
2136 1,
2137 0,
2138 sd_info2_mask::Bwem,
2139 sd_info2_mask::Bwem,
2140 SdInfo2Mask_SPEC,
2141 crate::common::RW,
2142 > {
2143 crate::common::RegisterField::<
2144 9,
2145 0x1,
2146 1,
2147 0,
2148 sd_info2_mask::Bwem,
2149 sd_info2_mask::Bwem,
2150 SdInfo2Mask_SPEC,
2151 crate::common::RW,
2152 >::from_register(self, 0)
2153 }
2154
2155 #[doc = "BRE Interrupt Request Mask"]
2156 #[inline(always)]
2157 pub fn brem(
2158 self,
2159 ) -> crate::common::RegisterField<
2160 8,
2161 0x1,
2162 1,
2163 0,
2164 sd_info2_mask::Brem,
2165 sd_info2_mask::Brem,
2166 SdInfo2Mask_SPEC,
2167 crate::common::RW,
2168 > {
2169 crate::common::RegisterField::<
2170 8,
2171 0x1,
2172 1,
2173 0,
2174 sd_info2_mask::Brem,
2175 sd_info2_mask::Brem,
2176 SdInfo2Mask_SPEC,
2177 crate::common::RW,
2178 >::from_register(self, 0)
2179 }
2180
2181 #[doc = "Response Timeout Interrupt Request Mask"]
2182 #[inline(always)]
2183 pub fn rsptom(
2184 self,
2185 ) -> crate::common::RegisterField<
2186 6,
2187 0x1,
2188 1,
2189 0,
2190 sd_info2_mask::Rsptom,
2191 sd_info2_mask::Rsptom,
2192 SdInfo2Mask_SPEC,
2193 crate::common::RW,
2194 > {
2195 crate::common::RegisterField::<
2196 6,
2197 0x1,
2198 1,
2199 0,
2200 sd_info2_mask::Rsptom,
2201 sd_info2_mask::Rsptom,
2202 SdInfo2Mask_SPEC,
2203 crate::common::RW,
2204 >::from_register(self, 0)
2205 }
2206
2207 #[doc = "SD_BUF Register Illegal Read Interrupt Request Mask"]
2208 #[inline(always)]
2209 pub fn ilrm(
2210 self,
2211 ) -> crate::common::RegisterField<
2212 5,
2213 0x1,
2214 1,
2215 0,
2216 sd_info2_mask::Ilrm,
2217 sd_info2_mask::Ilrm,
2218 SdInfo2Mask_SPEC,
2219 crate::common::RW,
2220 > {
2221 crate::common::RegisterField::<
2222 5,
2223 0x1,
2224 1,
2225 0,
2226 sd_info2_mask::Ilrm,
2227 sd_info2_mask::Ilrm,
2228 SdInfo2Mask_SPEC,
2229 crate::common::RW,
2230 >::from_register(self, 0)
2231 }
2232
2233 #[doc = "SD_BUF Register Illegal Write Interrupt Request Mask"]
2234 #[inline(always)]
2235 pub fn ilwm(
2236 self,
2237 ) -> crate::common::RegisterField<
2238 4,
2239 0x1,
2240 1,
2241 0,
2242 sd_info2_mask::Ilwm,
2243 sd_info2_mask::Ilwm,
2244 SdInfo2Mask_SPEC,
2245 crate::common::RW,
2246 > {
2247 crate::common::RegisterField::<
2248 4,
2249 0x1,
2250 1,
2251 0,
2252 sd_info2_mask::Ilwm,
2253 sd_info2_mask::Ilwm,
2254 SdInfo2Mask_SPEC,
2255 crate::common::RW,
2256 >::from_register(self, 0)
2257 }
2258
2259 #[doc = "Data Timeout Interrupt Request Mask"]
2260 #[inline(always)]
2261 pub fn dtom(
2262 self,
2263 ) -> crate::common::RegisterField<
2264 3,
2265 0x1,
2266 1,
2267 0,
2268 sd_info2_mask::Dtom,
2269 sd_info2_mask::Dtom,
2270 SdInfo2Mask_SPEC,
2271 crate::common::RW,
2272 > {
2273 crate::common::RegisterField::<
2274 3,
2275 0x1,
2276 1,
2277 0,
2278 sd_info2_mask::Dtom,
2279 sd_info2_mask::Dtom,
2280 SdInfo2Mask_SPEC,
2281 crate::common::RW,
2282 >::from_register(self, 0)
2283 }
2284
2285 #[doc = "End Bit Error Interrupt Request Mask"]
2286 #[inline(always)]
2287 pub fn endem(
2288 self,
2289 ) -> crate::common::RegisterField<
2290 2,
2291 0x1,
2292 1,
2293 0,
2294 sd_info2_mask::Endem,
2295 sd_info2_mask::Endem,
2296 SdInfo2Mask_SPEC,
2297 crate::common::RW,
2298 > {
2299 crate::common::RegisterField::<
2300 2,
2301 0x1,
2302 1,
2303 0,
2304 sd_info2_mask::Endem,
2305 sd_info2_mask::Endem,
2306 SdInfo2Mask_SPEC,
2307 crate::common::RW,
2308 >::from_register(self, 0)
2309 }
2310
2311 #[doc = "CRC Error Interrupt Request Mask"]
2312 #[inline(always)]
2313 pub fn crcem(
2314 self,
2315 ) -> crate::common::RegisterField<
2316 1,
2317 0x1,
2318 1,
2319 0,
2320 sd_info2_mask::Crcem,
2321 sd_info2_mask::Crcem,
2322 SdInfo2Mask_SPEC,
2323 crate::common::RW,
2324 > {
2325 crate::common::RegisterField::<
2326 1,
2327 0x1,
2328 1,
2329 0,
2330 sd_info2_mask::Crcem,
2331 sd_info2_mask::Crcem,
2332 SdInfo2Mask_SPEC,
2333 crate::common::RW,
2334 >::from_register(self, 0)
2335 }
2336
2337 #[doc = "Command Error Interrupt Request Mask"]
2338 #[inline(always)]
2339 pub fn cmdem(
2340 self,
2341 ) -> crate::common::RegisterField<
2342 0,
2343 0x1,
2344 1,
2345 0,
2346 sd_info2_mask::Cmdem,
2347 sd_info2_mask::Cmdem,
2348 SdInfo2Mask_SPEC,
2349 crate::common::RW,
2350 > {
2351 crate::common::RegisterField::<
2352 0,
2353 0x1,
2354 1,
2355 0,
2356 sd_info2_mask::Cmdem,
2357 sd_info2_mask::Cmdem,
2358 SdInfo2Mask_SPEC,
2359 crate::common::RW,
2360 >::from_register(self, 0)
2361 }
2362}
2363impl ::core::default::Default for SdInfo2Mask {
2364 #[inline(always)]
2365 fn default() -> SdInfo2Mask {
2366 <crate::RegValueT<SdInfo2Mask_SPEC> as RegisterValue<_>>::new(35711)
2367 }
2368}
2369pub mod sd_info2_mask {
2370
2371 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2372 pub struct Ilam_SPEC;
2373 pub type Ilam = crate::EnumBitfieldStruct<u8, Ilam_SPEC>;
2374 impl Ilam {
2375 #[doc = "Illegal access error interrupt request not masked"]
2376 pub const _0: Self = Self::new(0);
2377
2378 #[doc = "Illegal access error interrupt request masked"]
2379 pub const _1: Self = Self::new(1);
2380 }
2381 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2382 pub struct Bwem_SPEC;
2383 pub type Bwem = crate::EnumBitfieldStruct<u8, Bwem_SPEC>;
2384 impl Bwem {
2385 #[doc = "Write enable interrupt request for the SD_BUF register not masked"]
2386 pub const _0: Self = Self::new(0);
2387
2388 #[doc = "Write enable interrupt request for the SD_BUF register masked"]
2389 pub const _1: Self = Self::new(1);
2390 }
2391 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2392 pub struct Brem_SPEC;
2393 pub type Brem = crate::EnumBitfieldStruct<u8, Brem_SPEC>;
2394 impl Brem {
2395 #[doc = "Read enable interrupt request for the SD buffer not masked"]
2396 pub const _0: Self = Self::new(0);
2397
2398 #[doc = "Read enable interrupt request for the SD buffer masked"]
2399 pub const _1: Self = Self::new(1);
2400 }
2401 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2402 pub struct Rsptom_SPEC;
2403 pub type Rsptom = crate::EnumBitfieldStruct<u8, Rsptom_SPEC>;
2404 impl Rsptom {
2405 #[doc = "Response timeout interrupt request not masked"]
2406 pub const _0: Self = Self::new(0);
2407
2408 #[doc = "Response timeout interrupt request masked"]
2409 pub const _1: Self = Self::new(1);
2410 }
2411 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2412 pub struct Ilrm_SPEC;
2413 pub type Ilrm = crate::EnumBitfieldStruct<u8, Ilrm_SPEC>;
2414 impl Ilrm {
2415 #[doc = "Illegal read detection interrupt request for the SD_BUF register not masked"]
2416 pub const _0: Self = Self::new(0);
2417
2418 #[doc = "Illegal read detection interrupt request for the SD_BUF register masked"]
2419 pub const _1: Self = Self::new(1);
2420 }
2421 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2422 pub struct Ilwm_SPEC;
2423 pub type Ilwm = crate::EnumBitfieldStruct<u8, Ilwm_SPEC>;
2424 impl Ilwm {
2425 #[doc = "Illegal write detection interrupt request for the SD_BUF register not masked"]
2426 pub const _0: Self = Self::new(0);
2427
2428 #[doc = "Illegal write detection interrupt request for the SD_BUF register masked"]
2429 pub const _1: Self = Self::new(1);
2430 }
2431 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2432 pub struct Dtom_SPEC;
2433 pub type Dtom = crate::EnumBitfieldStruct<u8, Dtom_SPEC>;
2434 impl Dtom {
2435 #[doc = "Data timeout interrupt request not masked"]
2436 pub const _0: Self = Self::new(0);
2437
2438 #[doc = "Data timeout interrupt request masked"]
2439 pub const _1: Self = Self::new(1);
2440 }
2441 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2442 pub struct Endem_SPEC;
2443 pub type Endem = crate::EnumBitfieldStruct<u8, Endem_SPEC>;
2444 impl Endem {
2445 #[doc = "End bit detection error interrupt request not masked"]
2446 pub const _0: Self = Self::new(0);
2447
2448 #[doc = "End bit detection error interrupt request masked"]
2449 pub const _1: Self = Self::new(1);
2450 }
2451 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2452 pub struct Crcem_SPEC;
2453 pub type Crcem = crate::EnumBitfieldStruct<u8, Crcem_SPEC>;
2454 impl Crcem {
2455 #[doc = "CRC error interrupt request not masked"]
2456 pub const _0: Self = Self::new(0);
2457
2458 #[doc = "CRC error interrupt request masked"]
2459 pub const _1: Self = Self::new(1);
2460 }
2461 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2462 pub struct Cmdem_SPEC;
2463 pub type Cmdem = crate::EnumBitfieldStruct<u8, Cmdem_SPEC>;
2464 impl Cmdem {
2465 #[doc = "Command error interrupt request not masked"]
2466 pub const _0: Self = Self::new(0);
2467
2468 #[doc = "Command error interrupt request masked"]
2469 pub const _1: Self = Self::new(1);
2470 }
2471}
2472#[doc(hidden)]
2473#[derive(Copy, Clone, Eq, PartialEq)]
2474pub struct SdClkCtrl_SPEC;
2475impl crate::sealed::RegSpec for SdClkCtrl_SPEC {
2476 type DataType = u32;
2477}
2478
2479#[doc = "SD Clock Control Register"]
2480pub type SdClkCtrl = crate::RegValueT<SdClkCtrl_SPEC>;
2481
2482impl SdClkCtrl {
2483 #[doc = "SD/MMC Clock Output Automatic Control Enable"]
2484 #[inline(always)]
2485 pub fn clkctrlen(
2486 self,
2487 ) -> crate::common::RegisterField<
2488 9,
2489 0x1,
2490 1,
2491 0,
2492 sd_clk_ctrl::Clkctrlen,
2493 sd_clk_ctrl::Clkctrlen,
2494 SdClkCtrl_SPEC,
2495 crate::common::RW,
2496 > {
2497 crate::common::RegisterField::<
2498 9,
2499 0x1,
2500 1,
2501 0,
2502 sd_clk_ctrl::Clkctrlen,
2503 sd_clk_ctrl::Clkctrlen,
2504 SdClkCtrl_SPEC,
2505 crate::common::RW,
2506 >::from_register(self, 0)
2507 }
2508
2509 #[doc = "SD/MMC Clock Output Control Enable"]
2510 #[inline(always)]
2511 pub fn clken(
2512 self,
2513 ) -> crate::common::RegisterField<
2514 8,
2515 0x1,
2516 1,
2517 0,
2518 sd_clk_ctrl::Clken,
2519 sd_clk_ctrl::Clken,
2520 SdClkCtrl_SPEC,
2521 crate::common::RW,
2522 > {
2523 crate::common::RegisterField::<
2524 8,
2525 0x1,
2526 1,
2527 0,
2528 sd_clk_ctrl::Clken,
2529 sd_clk_ctrl::Clken,
2530 SdClkCtrl_SPEC,
2531 crate::common::RW,
2532 >::from_register(self, 0)
2533 }
2534
2535 #[doc = "SDHI Clock Frequency Select"]
2536 #[inline(always)]
2537 pub fn clksel(
2538 self,
2539 ) -> crate::common::RegisterField<
2540 0,
2541 0xff,
2542 1,
2543 0,
2544 sd_clk_ctrl::Clksel,
2545 sd_clk_ctrl::Clksel,
2546 SdClkCtrl_SPEC,
2547 crate::common::RW,
2548 > {
2549 crate::common::RegisterField::<
2550 0,
2551 0xff,
2552 1,
2553 0,
2554 sd_clk_ctrl::Clksel,
2555 sd_clk_ctrl::Clksel,
2556 SdClkCtrl_SPEC,
2557 crate::common::RW,
2558 >::from_register(self, 0)
2559 }
2560}
2561impl ::core::default::Default for SdClkCtrl {
2562 #[inline(always)]
2563 fn default() -> SdClkCtrl {
2564 <crate::RegValueT<SdClkCtrl_SPEC> as RegisterValue<_>>::new(32)
2565 }
2566}
2567pub mod sd_clk_ctrl {
2568
2569 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2570 pub struct Clkctrlen_SPEC;
2571 pub type Clkctrlen = crate::EnumBitfieldStruct<u8, Clkctrlen_SPEC>;
2572 impl Clkctrlen {
2573 #[doc = "Automatic control for SD/MMC Clock output is disabled."]
2574 pub const _0: Self = Self::new(0);
2575
2576 #[doc = "Automatic control for SD/MMC Clock output is enabled."]
2577 pub const _1: Self = Self::new(1);
2578 }
2579 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2580 pub struct Clken_SPEC;
2581 pub type Clken = crate::EnumBitfieldStruct<u8, Clken_SPEC>;
2582 impl Clken {
2583 #[doc = "SD/MMC Clock output is disabled. The SDCLK signal is fixed 0."]
2584 pub const _0: Self = Self::new(0);
2585
2586 #[doc = "SD/MMC Clock output is enabled."]
2587 pub const _1: Self = Self::new(1);
2588 }
2589 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2590 pub struct Clksel_SPEC;
2591 pub type Clksel = crate::EnumBitfieldStruct<u8, Clksel_SPEC>;
2592 impl Clksel {
2593 #[doc = "PCLKA divided by 2"]
2594 pub const _0_X_00: Self = Self::new(0);
2595
2596 #[doc = "PCLKA divided by 4"]
2597 pub const _0_X_01: Self = Self::new(1);
2598
2599 #[doc = "PCLKA divided by 8"]
2600 pub const _0_X_02: Self = Self::new(2);
2601
2602 #[doc = "PCLKA divided by 16"]
2603 pub const _0_X_04: Self = Self::new(4);
2604
2605 #[doc = "PCLKA divided by 32"]
2606 pub const _0_X_08: Self = Self::new(8);
2607
2608 #[doc = "PCLKA divided by 64"]
2609 pub const _0_X_10: Self = Self::new(16);
2610
2611 #[doc = "PCLKA divided by 128"]
2612 pub const _0_X_20: Self = Self::new(32);
2613
2614 #[doc = "PCLKA divided by 256"]
2615 pub const _0_X_40: Self = Self::new(64);
2616
2617 #[doc = "PCLKA divided by 512"]
2618 pub const _0_X_80: Self = Self::new(128);
2619 }
2620}
2621#[doc(hidden)]
2622#[derive(Copy, Clone, Eq, PartialEq)]
2623pub struct SdSize_SPEC;
2624impl crate::sealed::RegSpec for SdSize_SPEC {
2625 type DataType = u32;
2626}
2627
2628#[doc = "Transfer Data Length Register"]
2629pub type SdSize = crate::RegValueT<SdSize_SPEC>;
2630
2631impl SdSize {
2632 #[doc = "Transfer Data SizeThese bits specify a size between 1 and 512 bytes for the transfer of single blocks.In cases of multiple block transfer with automatic issuing of CMD12 (CMD18 and CMD25), the only specifiable transfer data size is 512 bytes. Furthermore, in cases of multiple block transfer without automatic issuing of CMD12, as well as 512 bytes, 32, 64, 128, and 256 bytes are specifiable. However, in the reading of 32, 64, 128, and 256 bytes for the transfer of multiple blocks, this is restricted to multiple block transfer by CMD53.Additionally, if a command accompanies data transfer, do not set these bits to 0."]
2633 #[inline(always)]
2634 pub fn len(
2635 self,
2636 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, SdSize_SPEC, crate::common::RW>
2637 {
2638 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,SdSize_SPEC,crate::common::RW>::from_register(self,0)
2639 }
2640}
2641impl ::core::default::Default for SdSize {
2642 #[inline(always)]
2643 fn default() -> SdSize {
2644 <crate::RegValueT<SdSize_SPEC> as RegisterValue<_>>::new(512)
2645 }
2646}
2647
2648#[doc(hidden)]
2649#[derive(Copy, Clone, Eq, PartialEq)]
2650pub struct SdOption_SPEC;
2651impl crate::sealed::RegSpec for SdOption_SPEC {
2652 type DataType = u32;
2653}
2654
2655#[doc = "SD Card Access Control Option Register"]
2656pub type SdOption = crate::RegValueT<SdOption_SPEC>;
2657
2658impl SdOption {
2659 #[doc = "Bus WidthNOTE: The initial value is applied at a reset and when the SOFT_RST.SDRST flag is 0."]
2660 #[inline(always)]
2661 pub fn width(
2662 self,
2663 ) -> crate::common::RegisterField<
2664 15,
2665 0x1,
2666 1,
2667 0,
2668 sd_option::Width,
2669 sd_option::Width,
2670 SdOption_SPEC,
2671 crate::common::RW,
2672 > {
2673 crate::common::RegisterField::<
2674 15,
2675 0x1,
2676 1,
2677 0,
2678 sd_option::Width,
2679 sd_option::Width,
2680 SdOption_SPEC,
2681 crate::common::RW,
2682 >::from_register(self, 0)
2683 }
2684
2685 #[doc = "Bus Widthsee b15, WIDTH bit"]
2686 #[inline(always)]
2687 pub fn width8(
2688 self,
2689 ) -> crate::common::RegisterFieldBool<13, 1, 0, SdOption_SPEC, crate::common::RW> {
2690 crate::common::RegisterFieldBool::<13,1,0,SdOption_SPEC,crate::common::RW>::from_register(self,0)
2691 }
2692
2693 #[doc = "Timeout MASKWhen timeout occurs in case of inactivating timeout, software reset should be executed to terminate command sequence."]
2694 #[inline(always)]
2695 pub fn toutmask(
2696 self,
2697 ) -> crate::common::RegisterField<
2698 8,
2699 0x1,
2700 1,
2701 0,
2702 sd_option::Toutmask,
2703 sd_option::Toutmask,
2704 SdOption_SPEC,
2705 crate::common::RW,
2706 > {
2707 crate::common::RegisterField::<
2708 8,
2709 0x1,
2710 1,
2711 0,
2712 sd_option::Toutmask,
2713 sd_option::Toutmask,
2714 SdOption_SPEC,
2715 crate::common::RW,
2716 >::from_register(self, 0)
2717 }
2718
2719 #[doc = "Timeout Counter"]
2720 #[inline(always)]
2721 pub fn top(
2722 self,
2723 ) -> crate::common::RegisterField<
2724 4,
2725 0xf,
2726 1,
2727 0,
2728 sd_option::Top,
2729 sd_option::Top,
2730 SdOption_SPEC,
2731 crate::common::RW,
2732 > {
2733 crate::common::RegisterField::<
2734 4,
2735 0xf,
2736 1,
2737 0,
2738 sd_option::Top,
2739 sd_option::Top,
2740 SdOption_SPEC,
2741 crate::common::RW,
2742 >::from_register(self, 0)
2743 }
2744
2745 #[doc = "Card Detect Time Counter"]
2746 #[inline(always)]
2747 pub fn ctop(
2748 self,
2749 ) -> crate::common::RegisterField<
2750 0,
2751 0xf,
2752 1,
2753 0,
2754 sd_option::Ctop,
2755 sd_option::Ctop,
2756 SdOption_SPEC,
2757 crate::common::RW,
2758 > {
2759 crate::common::RegisterField::<
2760 0,
2761 0xf,
2762 1,
2763 0,
2764 sd_option::Ctop,
2765 sd_option::Ctop,
2766 SdOption_SPEC,
2767 crate::common::RW,
2768 >::from_register(self, 0)
2769 }
2770}
2771impl ::core::default::Default for SdOption {
2772 #[inline(always)]
2773 fn default() -> SdOption {
2774 <crate::RegValueT<SdOption_SPEC> as RegisterValue<_>>::new(16622)
2775 }
2776}
2777pub mod sd_option {
2778
2779 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2780 pub struct Width_SPEC;
2781 pub type Width = crate::EnumBitfieldStruct<u8, Width_SPEC>;
2782 impl Width {
2783 #[doc = "4-bit width (WIDTH8=0) / 8-bit width (WIDTH8=1)"]
2784 pub const _0: Self = Self::new(0);
2785
2786 #[doc = "1-bit width (WIDTH8=0 or 1 )"]
2787 pub const _1: Self = Self::new(1);
2788 }
2789 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2790 pub struct Toutmask_SPEC;
2791 pub type Toutmask = crate::EnumBitfieldStruct<u8, Toutmask_SPEC>;
2792 impl Toutmask {
2793 #[doc = "Activate Timeout"]
2794 pub const _0: Self = Self::new(0);
2795
2796 #[doc = "Inactivate Timeout(RSPTO bit and DTO bit of SD_INFO2 and SD_ERR_STS2 won\'t be set)"]
2797 pub const _1: Self = Self::new(1);
2798 }
2799 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2800 pub struct Top_SPEC;
2801 pub type Top = crate::EnumBitfieldStruct<u8, Top_SPEC>;
2802 impl Top {
2803 #[doc = "Setting prohibited"]
2804 pub const _1111: Self = Self::new(15);
2805 }
2806 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2807 pub struct Ctop_SPEC;
2808 pub type Ctop = crate::EnumBitfieldStruct<u8, Ctop_SPEC>;
2809 impl Ctop {
2810 #[doc = "Setting prohibited"]
2811 pub const _1111: Self = Self::new(15);
2812 }
2813}
2814#[doc(hidden)]
2815#[derive(Copy, Clone, Eq, PartialEq)]
2816pub struct SdErrSts1_SPEC;
2817impl crate::sealed::RegSpec for SdErrSts1_SPEC {
2818 type DataType = u32;
2819}
2820
2821#[doc = "SD Error Status Register 1"]
2822pub type SdErrSts1 = crate::RegValueT<SdErrSts1_SPEC>;
2823
2824impl SdErrSts1 {
2825 #[doc = "CRC Status TokenStore the CRC status token value (normal value is 010b)"]
2826 #[inline(always)]
2827 pub fn crctk(
2828 self,
2829 ) -> crate::common::RegisterField<12, 0x7, 1, 0, u8, u8, SdErrSts1_SPEC, crate::common::R> {
2830 crate::common::RegisterField::<12,0x7,1,0,u8,u8,SdErrSts1_SPEC,crate::common::R>::from_register(self,0)
2831 }
2832
2833 #[doc = "CRC Status Token Error"]
2834 #[inline(always)]
2835 pub fn crctke(
2836 self,
2837 ) -> crate::common::RegisterField<
2838 11,
2839 0x1,
2840 1,
2841 0,
2842 sd_err_sts1::Crctke,
2843 sd_err_sts1::Crctke,
2844 SdErrSts1_SPEC,
2845 crate::common::R,
2846 > {
2847 crate::common::RegisterField::<
2848 11,
2849 0x1,
2850 1,
2851 0,
2852 sd_err_sts1::Crctke,
2853 sd_err_sts1::Crctke,
2854 SdErrSts1_SPEC,
2855 crate::common::R,
2856 >::from_register(self, 0)
2857 }
2858
2859 #[doc = "Read Data CRC Error"]
2860 #[inline(always)]
2861 pub fn rdcrce(
2862 self,
2863 ) -> crate::common::RegisterField<
2864 10,
2865 0x1,
2866 1,
2867 0,
2868 sd_err_sts1::Rdcrce,
2869 sd_err_sts1::Rdcrce,
2870 SdErrSts1_SPEC,
2871 crate::common::R,
2872 > {
2873 crate::common::RegisterField::<
2874 10,
2875 0x1,
2876 1,
2877 0,
2878 sd_err_sts1::Rdcrce,
2879 sd_err_sts1::Rdcrce,
2880 SdErrSts1_SPEC,
2881 crate::common::R,
2882 >::from_register(self, 0)
2883 }
2884
2885 #[doc = "Response CRC Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD, this is indicated in RSPCRCE0."]
2886 #[inline(always)]
2887 pub fn rspcrce1(
2888 self,
2889 ) -> crate::common::RegisterField<
2890 9,
2891 0x1,
2892 1,
2893 0,
2894 sd_err_sts1::Rspcrce1,
2895 sd_err_sts1::Rspcrce1,
2896 SdErrSts1_SPEC,
2897 crate::common::R,
2898 > {
2899 crate::common::RegisterField::<
2900 9,
2901 0x1,
2902 1,
2903 0,
2904 sd_err_sts1::Rspcrce1,
2905 sd_err_sts1::Rspcrce1,
2906 SdErrSts1_SPEC,
2907 crate::common::R,
2908 >::from_register(self, 0)
2909 }
2910
2911 #[doc = "Response CRC Error 0NOTE: other than a response to a command issued within a command sequence"]
2912 #[inline(always)]
2913 pub fn rspcrce0(
2914 self,
2915 ) -> crate::common::RegisterField<
2916 8,
2917 0x1,
2918 1,
2919 0,
2920 sd_err_sts1::Rspcrce0,
2921 sd_err_sts1::Rspcrce0,
2922 SdErrSts1_SPEC,
2923 crate::common::R,
2924 > {
2925 crate::common::RegisterField::<
2926 8,
2927 0x1,
2928 1,
2929 0,
2930 sd_err_sts1::Rspcrce0,
2931 sd_err_sts1::Rspcrce0,
2932 SdErrSts1_SPEC,
2933 crate::common::R,
2934 >::from_register(self, 0)
2935 }
2936
2937 #[doc = "CRC Status Token Length Error"]
2938 #[inline(always)]
2939 pub fn crclene(
2940 self,
2941 ) -> crate::common::RegisterField<
2942 5,
2943 0x1,
2944 1,
2945 0,
2946 sd_err_sts1::Crclene,
2947 sd_err_sts1::Crclene,
2948 SdErrSts1_SPEC,
2949 crate::common::R,
2950 > {
2951 crate::common::RegisterField::<
2952 5,
2953 0x1,
2954 1,
2955 0,
2956 sd_err_sts1::Crclene,
2957 sd_err_sts1::Crclene,
2958 SdErrSts1_SPEC,
2959 crate::common::R,
2960 >::from_register(self, 0)
2961 }
2962
2963 #[doc = "Read Data Length Error"]
2964 #[inline(always)]
2965 pub fn rdlene(
2966 self,
2967 ) -> crate::common::RegisterField<
2968 4,
2969 0x1,
2970 1,
2971 0,
2972 sd_err_sts1::Rdlene,
2973 sd_err_sts1::Rdlene,
2974 SdErrSts1_SPEC,
2975 crate::common::R,
2976 > {
2977 crate::common::RegisterField::<
2978 4,
2979 0x1,
2980 1,
2981 0,
2982 sd_err_sts1::Rdlene,
2983 sd_err_sts1::Rdlene,
2984 SdErrSts1_SPEC,
2985 crate::common::R,
2986 >::from_register(self, 0)
2987 }
2988
2989 #[doc = "Response Length Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD, this is indicated in RSPLENE0."]
2990 #[inline(always)]
2991 pub fn rsplene1(
2992 self,
2993 ) -> crate::common::RegisterField<
2994 3,
2995 0x1,
2996 1,
2997 0,
2998 sd_err_sts1::Rsplene1,
2999 sd_err_sts1::Rsplene1,
3000 SdErrSts1_SPEC,
3001 crate::common::R,
3002 > {
3003 crate::common::RegisterField::<
3004 3,
3005 0x1,
3006 1,
3007 0,
3008 sd_err_sts1::Rsplene1,
3009 sd_err_sts1::Rsplene1,
3010 SdErrSts1_SPEC,
3011 crate::common::R,
3012 >::from_register(self, 0)
3013 }
3014
3015 #[doc = "Response Length Error 0NOTE: other than a response to a command issued within a command sequence"]
3016 #[inline(always)]
3017 pub fn rsplene0(
3018 self,
3019 ) -> crate::common::RegisterField<
3020 2,
3021 0x1,
3022 1,
3023 0,
3024 sd_err_sts1::Rsplene0,
3025 sd_err_sts1::Rsplene0,
3026 SdErrSts1_SPEC,
3027 crate::common::R,
3028 > {
3029 crate::common::RegisterField::<
3030 2,
3031 0x1,
3032 1,
3033 0,
3034 sd_err_sts1::Rsplene0,
3035 sd_err_sts1::Rsplene0,
3036 SdErrSts1_SPEC,
3037 crate::common::R,
3038 >::from_register(self, 0)
3039 }
3040
3041 #[doc = "Command Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD, this is Indicated in CMDE0."]
3042 #[inline(always)]
3043 pub fn cmde1(
3044 self,
3045 ) -> crate::common::RegisterField<
3046 1,
3047 0x1,
3048 1,
3049 0,
3050 sd_err_sts1::Cmde1,
3051 sd_err_sts1::Cmde1,
3052 SdErrSts1_SPEC,
3053 crate::common::R,
3054 > {
3055 crate::common::RegisterField::<
3056 1,
3057 0x1,
3058 1,
3059 0,
3060 sd_err_sts1::Cmde1,
3061 sd_err_sts1::Cmde1,
3062 SdErrSts1_SPEC,
3063 crate::common::R,
3064 >::from_register(self, 0)
3065 }
3066
3067 #[doc = "Command Error 0NOTE: other than a response to a command issued within a command sequence"]
3068 #[inline(always)]
3069 pub fn cmde0(
3070 self,
3071 ) -> crate::common::RegisterField<
3072 0,
3073 0x1,
3074 1,
3075 0,
3076 sd_err_sts1::Cmde0,
3077 sd_err_sts1::Cmde0,
3078 SdErrSts1_SPEC,
3079 crate::common::R,
3080 > {
3081 crate::common::RegisterField::<
3082 0,
3083 0x1,
3084 1,
3085 0,
3086 sd_err_sts1::Cmde0,
3087 sd_err_sts1::Cmde0,
3088 SdErrSts1_SPEC,
3089 crate::common::R,
3090 >::from_register(self, 0)
3091 }
3092}
3093impl ::core::default::Default for SdErrSts1 {
3094 #[inline(always)]
3095 fn default() -> SdErrSts1 {
3096 <crate::RegValueT<SdErrSts1_SPEC> as RegisterValue<_>>::new(8192)
3097 }
3098}
3099pub mod sd_err_sts1 {
3100
3101 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3102 pub struct Crctke_SPEC;
3103 pub type Crctke = crate::EnumBitfieldStruct<u8, Crctke_SPEC>;
3104 impl Crctke {
3105 #[doc = "An error has not occured in the CRC status."]
3106 pub const _0: Self = Self::new(0);
3107
3108 #[doc = "An error has occured in the CRC status."]
3109 pub const _1: Self = Self::new(1);
3110 }
3111 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3112 pub struct Rdcrce_SPEC;
3113 pub type Rdcrce = crate::EnumBitfieldStruct<u8, Rdcrce_SPEC>;
3114 impl Rdcrce {
3115 #[doc = "CRC error has detected in read data"]
3116 pub const _0: Self = Self::new(0);
3117
3118 #[doc = "CRC error has not detected in read data"]
3119 pub const _1: Self = Self::new(1);
3120 }
3121 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3122 pub struct Rspcrce1_SPEC;
3123 pub type Rspcrce1 = crate::EnumBitfieldStruct<u8, Rspcrce1_SPEC>;
3124 impl Rspcrce1 {
3125 #[doc = "CRC error has not occured."]
3126 pub const _0: Self = Self::new(0);
3127
3128 #[doc = "CRC error has occured in the response to a command issued within a command sequence."]
3129 pub const _1: Self = Self::new(1);
3130 }
3131 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3132 pub struct Rspcrce0_SPEC;
3133 pub type Rspcrce0 = crate::EnumBitfieldStruct<u8, Rspcrce0_SPEC>;
3134 impl Rspcrce0 {
3135 #[doc = "A CRC error has not occur in a response"]
3136 pub const _0: Self = Self::new(0);
3137
3138 #[doc = "A CRC error has occured in a response"]
3139 pub const _1: Self = Self::new(1);
3140 }
3141 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3142 pub struct Crclene_SPEC;
3143 pub type Crclene = crate::EnumBitfieldStruct<u8, Crclene_SPEC>;
3144 impl Crclene {
3145 #[doc = "An error has not occured in the CRC status length."]
3146 pub const _0: Self = Self::new(0);
3147
3148 #[doc = "An error has occured in the CRC status length (and the end bit has not been detected)"]
3149 pub const _1: Self = Self::new(1);
3150 }
3151 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3152 pub struct Rdlene_SPEC;
3153 pub type Rdlene = crate::EnumBitfieldStruct<u8, Rdlene_SPEC>;
3154 impl Rdlene {
3155 #[doc = "An error has occurred not in the read data length."]
3156 pub const _0: Self = Self::new(0);
3157
3158 #[doc = "An error has occured in the read data length (and the end bit has not been detected among the valid bits)."]
3159 pub const _1: Self = Self::new(1);
3160 }
3161 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3162 pub struct Rsplene1_SPEC;
3163 pub type Rsplene1 = crate::EnumBitfieldStruct<u8, Rsplene1_SPEC>;
3164 impl Rsplene1 {
3165 #[doc = "An error has not occurred in the response length to a command issued within a command sequence."]
3166 pub const _0: Self = Self::new(0);
3167
3168 #[doc = "An error has occured in the response length to a command issued within a command sequence."]
3169 pub const _1: Self = Self::new(1);
3170 }
3171 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3172 pub struct Rsplene0_SPEC;
3173 pub type Rsplene0 = crate::EnumBitfieldStruct<u8, Rsplene0_SPEC>;
3174 impl Rsplene0 {
3175 #[doc = "An error has not occured in the response length"]
3176 pub const _0: Self = Self::new(0);
3177
3178 #[doc = "An error has occured in the response length"]
3179 pub const _1: Self = Self::new(1);
3180 }
3181 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3182 pub struct Cmde1_SPEC;
3183 pub type Cmde1 = crate::EnumBitfieldStruct<u8, Cmde1_SPEC>;
3184 impl Cmde1 {
3185 #[doc = "An error has not occurs in the command index of the response to a command issued within a command sequence."]
3186 pub const _0: Self = Self::new(0);
3187
3188 #[doc = "An error has occured in the command index of the response to a command issued within a command sequence."]
3189 pub const _1: Self = Self::new(1);
3190 }
3191 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3192 pub struct Cmde0_SPEC;
3193 pub type Cmde0 = crate::EnumBitfieldStruct<u8, Cmde0_SPEC>;
3194 impl Cmde0 {
3195 #[doc = "An error has not occured in the command index of a response."]
3196 pub const _0: Self = Self::new(0);
3197
3198 #[doc = "An error has occured in the command index of a response."]
3199 pub const _1: Self = Self::new(1);
3200 }
3201}
3202#[doc(hidden)]
3203#[derive(Copy, Clone, Eq, PartialEq)]
3204pub struct SdErrSts2_SPEC;
3205impl crate::sealed::RegSpec for SdErrSts2_SPEC {
3206 type DataType = u32;
3207}
3208
3209#[doc = "SD Error Status Register 2"]
3210pub type SdErrSts2 = crate::RegValueT<SdErrSts2_SPEC>;
3211
3212impl SdErrSts2 {
3213 #[doc = "CRC Status Token Busy Timeout"]
3214 #[inline(always)]
3215 pub fn crcbsyto(
3216 self,
3217 ) -> crate::common::RegisterField<
3218 6,
3219 0x1,
3220 1,
3221 0,
3222 sd_err_sts2::Crcbsyto,
3223 sd_err_sts2::Crcbsyto,
3224 SdErrSts2_SPEC,
3225 crate::common::R,
3226 > {
3227 crate::common::RegisterField::<
3228 6,
3229 0x1,
3230 1,
3231 0,
3232 sd_err_sts2::Crcbsyto,
3233 sd_err_sts2::Crcbsyto,
3234 SdErrSts2_SPEC,
3235 crate::common::R,
3236 >::from_register(self, 0)
3237 }
3238
3239 #[doc = "CRC Status Token Timeout"]
3240 #[inline(always)]
3241 pub fn crcto(
3242 self,
3243 ) -> crate::common::RegisterField<
3244 5,
3245 0x1,
3246 1,
3247 0,
3248 sd_err_sts2::Crcto,
3249 sd_err_sts2::Crcto,
3250 SdErrSts2_SPEC,
3251 crate::common::R,
3252 > {
3253 crate::common::RegisterField::<
3254 5,
3255 0x1,
3256 1,
3257 0,
3258 sd_err_sts2::Crcto,
3259 sd_err_sts2::Crcto,
3260 SdErrSts2_SPEC,
3261 crate::common::R,
3262 >::from_register(self, 0)
3263 }
3264
3265 #[doc = "Read Data Timeout"]
3266 #[inline(always)]
3267 pub fn rdto(
3268 self,
3269 ) -> crate::common::RegisterField<
3270 4,
3271 0x1,
3272 1,
3273 0,
3274 sd_err_sts2::Rdto,
3275 sd_err_sts2::Rdto,
3276 SdErrSts2_SPEC,
3277 crate::common::R,
3278 > {
3279 crate::common::RegisterField::<
3280 4,
3281 0x1,
3282 1,
3283 0,
3284 sd_err_sts2::Rdto,
3285 sd_err_sts2::Rdto,
3286 SdErrSts2_SPEC,
3287 crate::common::R,
3288 >::from_register(self, 0)
3289 }
3290
3291 #[doc = "Busy Timeout 1"]
3292 #[inline(always)]
3293 pub fn bsyto1(
3294 self,
3295 ) -> crate::common::RegisterField<
3296 3,
3297 0x1,
3298 1,
3299 0,
3300 sd_err_sts2::Bsyto1,
3301 sd_err_sts2::Bsyto1,
3302 SdErrSts2_SPEC,
3303 crate::common::R,
3304 > {
3305 crate::common::RegisterField::<
3306 3,
3307 0x1,
3308 1,
3309 0,
3310 sd_err_sts2::Bsyto1,
3311 sd_err_sts2::Bsyto1,
3312 SdErrSts2_SPEC,
3313 crate::common::R,
3314 >::from_register(self, 0)
3315 }
3316
3317 #[doc = "Busy Timeout 0"]
3318 #[inline(always)]
3319 pub fn bsyto0(
3320 self,
3321 ) -> crate::common::RegisterField<
3322 2,
3323 0x1,
3324 1,
3325 0,
3326 sd_err_sts2::Bsyto0,
3327 sd_err_sts2::Bsyto0,
3328 SdErrSts2_SPEC,
3329 crate::common::R,
3330 > {
3331 crate::common::RegisterField::<
3332 2,
3333 0x1,
3334 1,
3335 0,
3336 sd_err_sts2::Bsyto0,
3337 sd_err_sts2::Bsyto0,
3338 SdErrSts2_SPEC,
3339 crate::common::R,
3340 >::from_register(self, 0)
3341 }
3342
3343 #[doc = "Response Timeout 1"]
3344 #[inline(always)]
3345 pub fn rspto1(
3346 self,
3347 ) -> crate::common::RegisterField<
3348 1,
3349 0x1,
3350 1,
3351 0,
3352 sd_err_sts2::Rspto1,
3353 sd_err_sts2::Rspto1,
3354 SdErrSts2_SPEC,
3355 crate::common::R,
3356 > {
3357 crate::common::RegisterField::<
3358 1,
3359 0x1,
3360 1,
3361 0,
3362 sd_err_sts2::Rspto1,
3363 sd_err_sts2::Rspto1,
3364 SdErrSts2_SPEC,
3365 crate::common::R,
3366 >::from_register(self, 0)
3367 }
3368
3369 #[doc = "Response Timeout 0"]
3370 #[inline(always)]
3371 pub fn rspto0(
3372 self,
3373 ) -> crate::common::RegisterField<
3374 0,
3375 0x1,
3376 1,
3377 0,
3378 sd_err_sts2::Rspto0,
3379 sd_err_sts2::Rspto0,
3380 SdErrSts2_SPEC,
3381 crate::common::R,
3382 > {
3383 crate::common::RegisterField::<
3384 0,
3385 0x1,
3386 1,
3387 0,
3388 sd_err_sts2::Rspto0,
3389 sd_err_sts2::Rspto0,
3390 SdErrSts2_SPEC,
3391 crate::common::R,
3392 >::from_register(self, 0)
3393 }
3394}
3395impl ::core::default::Default for SdErrSts2 {
3396 #[inline(always)]
3397 fn default() -> SdErrSts2 {
3398 <crate::RegValueT<SdErrSts2_SPEC> as RegisterValue<_>>::new(0)
3399 }
3400}
3401pub mod sd_err_sts2 {
3402
3403 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3404 pub struct Crcbsyto_SPEC;
3405 pub type Crcbsyto = crate::EnumBitfieldStruct<u8, Crcbsyto_SPEC>;
3406 impl Crcbsyto {
3407 #[doc = "Not timeout"]
3408 pub const _0: Self = Self::new(0);
3409
3410 #[doc = "The busy state continues for longer than N-cycle after the CRC status"]
3411 pub const _1: Self = Self::new(1);
3412 }
3413 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3414 pub struct Crcto_SPEC;
3415 pub type Crcto = crate::EnumBitfieldStruct<u8, Crcto_SPEC>;
3416 impl Crcto {
3417 #[doc = "Not timeout"]
3418 pub const _0: Self = Self::new(0);
3419
3420 #[doc = "The CRC status is not received though a longer time than N-cycle has elapsed after data writing."]
3421 pub const _1: Self = Self::new(1);
3422 }
3423 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3424 pub struct Rdto_SPEC;
3425 pub type Rdto = crate::EnumBitfieldStruct<u8, Rdto_SPEC>;
3426 impl Rdto {
3427 #[doc = "Not timeout"]
3428 pub const _0: Self = Self::new(0);
3429
3430 #[doc = "The read data is not received though a longer time than N-cycle has elapsed after read command. / The read data for the next block are not received though a longer time than N-cycle has elapsed after the reception of read data. / The read data for the next block are not received though a longer time than N-cycle has elapsed after release of the read wait state."]
3431 pub const _1: Self = Self::new(1);
3432 }
3433 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3434 pub struct Bsyto1_SPEC;
3435 pub type Bsyto1 = crate::EnumBitfieldStruct<u8, Bsyto1_SPEC>;
3436 impl Bsyto1 {
3437 #[doc = "Not timeout."]
3438 pub const _0: Self = Self::new(0);
3439
3440 #[doc = "The busy state for longer than N-cycle continues after CMD12 has been issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD, this is indicated in BSYTO0."]
3441 pub const _1: Self = Self::new(1);
3442 }
3443 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3444 pub struct Bsyto0_SPEC;
3445 pub type Bsyto0 = crate::EnumBitfieldStruct<u8, Bsyto0_SPEC>;
3446 impl Bsyto0 {
3447 #[doc = "Not timeout."]
3448 pub const _0: Self = Self::new(0);
3449
3450 #[doc = "The busy state for longer than N-cycle continues after R1b response."]
3451 pub const _1: Self = Self::new(1);
3452 }
3453 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3454 pub struct Rspto1_SPEC;
3455 pub type Rspto1 = crate::EnumBitfieldStruct<u8, Rspto1_SPEC>;
3456 impl Rspto1 {
3457 #[doc = "Not timeout."]
3458 pub const _0: Self = Self::new(0);
3459
3460 #[doc = "The response to a command issued within a command sequence*2 is not received though a longer time than 640 cycles of SD/MMC clock has elapsed. In cases where CMD12 is issued by setting a command index in SD_CMD, this is indicated in RSPTO0."]
3461 pub const _1: Self = Self::new(1);
3462 }
3463 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3464 pub struct Rspto0_SPEC;
3465 pub type Rspto0 = crate::EnumBitfieldStruct<u8, Rspto0_SPEC>;
3466 impl Rspto0 {
3467 #[doc = "Not timeout."]
3468 pub const _0: Self = Self::new(0);
3469
3470 #[doc = "The response (other than a response to a command issued within a command sequence) is not received though a longer time than 640 cycles of SD/MMC clock has elapsed."]
3471 pub const _1: Self = Self::new(1);
3472 }
3473}
3474#[doc(hidden)]
3475#[derive(Copy, Clone, Eq, PartialEq)]
3476pub struct SdBuf0_SPEC;
3477impl crate::sealed::RegSpec for SdBuf0_SPEC {
3478 type DataType = u32;
3479}
3480
3481#[doc = "SD Buffer Register"]
3482pub type SdBuf0 = crate::RegValueT<SdBuf0_SPEC>;
3483
3484impl SdBuf0 {
3485 #[doc = "SD Buffer RegisterWhen writing to the SD card, the write data is written to this register. When reading from the SD card, the read data is read from this register. This register is internally connected to two 512-byte buffers.If both buffers are not empty when executing multiple block read, SD/MMC clock is stopped to suspend receiving data. When one of buffers is empty, SD/MMC clock is supplied to resume receiving data."]
3486 #[inline(always)]
3487 pub fn sd_buf(
3488 self,
3489 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, SdBuf0_SPEC, crate::common::RW>
3490 {
3491 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,SdBuf0_SPEC,crate::common::RW>::from_register(self,0)
3492 }
3493}
3494impl ::core::default::Default for SdBuf0 {
3495 #[inline(always)]
3496 fn default() -> SdBuf0 {
3497 <crate::RegValueT<SdBuf0_SPEC> as RegisterValue<_>>::new(0)
3498 }
3499}
3500
3501#[doc(hidden)]
3502#[derive(Copy, Clone, Eq, PartialEq)]
3503pub struct SdioMode_SPEC;
3504impl crate::sealed::RegSpec for SdioMode_SPEC {
3505 type DataType = u32;
3506}
3507
3508#[doc = "SDIO Mode Control Register"]
3509pub type SdioMode = crate::RegValueT<SdioMode_SPEC>;
3510
3511impl SdioMode {
3512 #[doc = "SDIO None AbortNOTE: See manual"]
3513 #[inline(always)]
3514 pub fn c52pub(
3515 self,
3516 ) -> crate::common::RegisterFieldBool<9, 1, 0, SdioMode_SPEC, crate::common::RW> {
3517 crate::common::RegisterFieldBool::<9, 1, 0, SdioMode_SPEC, crate::common::RW>::from_register(
3518 self, 0,
3519 )
3520 }
3521
3522 #[doc = "SDIO AbortNOTE: See manual"]
3523 #[inline(always)]
3524 pub fn ioabt(
3525 self,
3526 ) -> crate::common::RegisterFieldBool<8, 1, 0, SdioMode_SPEC, crate::common::RW> {
3527 crate::common::RegisterFieldBool::<8, 1, 0, SdioMode_SPEC, crate::common::RW>::from_register(
3528 self, 0,
3529 )
3530 }
3531
3532 #[doc = "Read Wait Request"]
3533 #[inline(always)]
3534 pub fn rwreq(
3535 self,
3536 ) -> crate::common::RegisterField<
3537 2,
3538 0x1,
3539 1,
3540 0,
3541 sdio_mode::Rwreq,
3542 sdio_mode::Rwreq,
3543 SdioMode_SPEC,
3544 crate::common::RW,
3545 > {
3546 crate::common::RegisterField::<
3547 2,
3548 0x1,
3549 1,
3550 0,
3551 sdio_mode::Rwreq,
3552 sdio_mode::Rwreq,
3553 SdioMode_SPEC,
3554 crate::common::RW,
3555 >::from_register(self, 0)
3556 }
3557
3558 #[doc = "SDIO Mode"]
3559 #[inline(always)]
3560 pub fn inten(
3561 self,
3562 ) -> crate::common::RegisterField<
3563 0,
3564 0x1,
3565 1,
3566 0,
3567 sdio_mode::Inten,
3568 sdio_mode::Inten,
3569 SdioMode_SPEC,
3570 crate::common::RW,
3571 > {
3572 crate::common::RegisterField::<
3573 0,
3574 0x1,
3575 1,
3576 0,
3577 sdio_mode::Inten,
3578 sdio_mode::Inten,
3579 SdioMode_SPEC,
3580 crate::common::RW,
3581 >::from_register(self, 0)
3582 }
3583}
3584impl ::core::default::Default for SdioMode {
3585 #[inline(always)]
3586 fn default() -> SdioMode {
3587 <crate::RegValueT<SdioMode_SPEC> as RegisterValue<_>>::new(0)
3588 }
3589}
3590pub mod sdio_mode {
3591
3592 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3593 pub struct Rwreq_SPEC;
3594 pub type Rwreq = crate::EnumBitfieldStruct<u8, Rwreq_SPEC>;
3595 impl Rwreq {
3596 #[doc = "Allow SD/MMC to exit read wait state"]
3597 pub const _0: Self = Self::new(0);
3598
3599 #[doc = "Request for SD/MMC to enter read wait state."]
3600 pub const _1: Self = Self::new(1);
3601 }
3602 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3603 pub struct Inten_SPEC;
3604 pub type Inten = crate::EnumBitfieldStruct<u8, Inten_SPEC>;
3605 impl Inten {
3606 #[doc = "Enables the SD host interface to receive SDIO interrupt from the SDIO card"]
3607 pub const _1: Self = Self::new(1);
3608
3609 #[doc = "Disables the SD host interface to receive SDIO interrupt from the SDIO card"]
3610 pub const _0: Self = Self::new(0);
3611 }
3612}
3613#[doc(hidden)]
3614#[derive(Copy, Clone, Eq, PartialEq)]
3615pub struct SdioInfo1_SPEC;
3616impl crate::sealed::RegSpec for SdioInfo1_SPEC {
3617 type DataType = u32;
3618}
3619
3620#[doc = "SDIO Interrupt Flag Register 1"]
3621pub type SdioInfo1 = crate::RegValueT<SdioInfo1_SPEC>;
3622
3623impl SdioInfo1 {
3624 #[doc = "EXWT Status FlagNOTE: See manual"]
3625 #[inline(always)]
3626 pub fn exwt(
3627 self,
3628 ) -> crate::common::RegisterFieldBool<15, 1, 0, SdioInfo1_SPEC, crate::common::RW> {
3629 crate::common::RegisterFieldBool::<15,1,0,SdioInfo1_SPEC,crate::common::RW>::from_register(self,0)
3630 }
3631
3632 #[doc = "EXPUB52 Status FlagNOTE: See manual"]
3633 #[inline(always)]
3634 pub fn expub52(
3635 self,
3636 ) -> crate::common::RegisterFieldBool<14, 1, 0, SdioInfo1_SPEC, crate::common::RW> {
3637 crate::common::RegisterFieldBool::<14,1,0,SdioInfo1_SPEC,crate::common::RW>::from_register(self,0)
3638 }
3639
3640 #[doc = "SDIO Interrupt Status"]
3641 #[inline(always)]
3642 pub fn ioirq(
3643 self,
3644 ) -> crate::common::RegisterField<
3645 0,
3646 0x1,
3647 1,
3648 0,
3649 sdio_info1::Ioirq,
3650 sdio_info1::Ioirq,
3651 SdioInfo1_SPEC,
3652 crate::common::RW,
3653 > {
3654 crate::common::RegisterField::<
3655 0,
3656 0x1,
3657 1,
3658 0,
3659 sdio_info1::Ioirq,
3660 sdio_info1::Ioirq,
3661 SdioInfo1_SPEC,
3662 crate::common::RW,
3663 >::from_register(self, 0)
3664 }
3665}
3666impl ::core::default::Default for SdioInfo1 {
3667 #[inline(always)]
3668 fn default() -> SdioInfo1 {
3669 <crate::RegValueT<SdioInfo1_SPEC> as RegisterValue<_>>::new(0)
3670 }
3671}
3672pub mod sdio_info1 {
3673
3674 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3675 pub struct Ioirq_SPEC;
3676 pub type Ioirq = crate::EnumBitfieldStruct<u8, Ioirq_SPEC>;
3677 impl Ioirq {
3678 #[doc = "SDIO interrupt not accepted"]
3679 pub const _0: Self = Self::new(0);
3680
3681 #[doc = "SDIO interrupt accepted"]
3682 pub const _1: Self = Self::new(1);
3683 }
3684}
3685#[doc(hidden)]
3686#[derive(Copy, Clone, Eq, PartialEq)]
3687pub struct SdioInfo1Mask_SPEC;
3688impl crate::sealed::RegSpec for SdioInfo1Mask_SPEC {
3689 type DataType = u32;
3690}
3691
3692#[doc = "SDIO_INFO1 Interrupt Mask Register"]
3693pub type SdioInfo1Mask = crate::RegValueT<SdioInfo1Mask_SPEC>;
3694
3695impl SdioInfo1Mask {
3696 #[doc = "EXWT Interrupt Request Mask Control"]
3697 #[inline(always)]
3698 pub fn exwtm(
3699 self,
3700 ) -> crate::common::RegisterField<
3701 15,
3702 0x1,
3703 1,
3704 0,
3705 sdio_info1_mask::Exwtm,
3706 sdio_info1_mask::Exwtm,
3707 SdioInfo1Mask_SPEC,
3708 crate::common::RW,
3709 > {
3710 crate::common::RegisterField::<
3711 15,
3712 0x1,
3713 1,
3714 0,
3715 sdio_info1_mask::Exwtm,
3716 sdio_info1_mask::Exwtm,
3717 SdioInfo1Mask_SPEC,
3718 crate::common::RW,
3719 >::from_register(self, 0)
3720 }
3721
3722 #[doc = "EXPUB52 Interrupt Request Mask Control"]
3723 #[inline(always)]
3724 pub fn expub52m(
3725 self,
3726 ) -> crate::common::RegisterField<
3727 14,
3728 0x1,
3729 1,
3730 0,
3731 sdio_info1_mask::Expub52M,
3732 sdio_info1_mask::Expub52M,
3733 SdioInfo1Mask_SPEC,
3734 crate::common::RW,
3735 > {
3736 crate::common::RegisterField::<
3737 14,
3738 0x1,
3739 1,
3740 0,
3741 sdio_info1_mask::Expub52M,
3742 sdio_info1_mask::Expub52M,
3743 SdioInfo1Mask_SPEC,
3744 crate::common::RW,
3745 >::from_register(self, 0)
3746 }
3747
3748 #[doc = "IOIRQ Interrupt Mask Control"]
3749 #[inline(always)]
3750 pub fn ioirqm(
3751 self,
3752 ) -> crate::common::RegisterField<
3753 0,
3754 0x1,
3755 1,
3756 0,
3757 sdio_info1_mask::Ioirqm,
3758 sdio_info1_mask::Ioirqm,
3759 SdioInfo1Mask_SPEC,
3760 crate::common::RW,
3761 > {
3762 crate::common::RegisterField::<
3763 0,
3764 0x1,
3765 1,
3766 0,
3767 sdio_info1_mask::Ioirqm,
3768 sdio_info1_mask::Ioirqm,
3769 SdioInfo1Mask_SPEC,
3770 crate::common::RW,
3771 >::from_register(self, 0)
3772 }
3773}
3774impl ::core::default::Default for SdioInfo1Mask {
3775 #[inline(always)]
3776 fn default() -> SdioInfo1Mask {
3777 <crate::RegValueT<SdioInfo1Mask_SPEC> as RegisterValue<_>>::new(49159)
3778 }
3779}
3780pub mod sdio_info1_mask {
3781
3782 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3783 pub struct Exwtm_SPEC;
3784 pub type Exwtm = crate::EnumBitfieldStruct<u8, Exwtm_SPEC>;
3785 impl Exwtm {
3786 #[doc = "EXWT interrupt request not masked"]
3787 pub const _0: Self = Self::new(0);
3788
3789 #[doc = "EXWT interrupt request masked"]
3790 pub const _1: Self = Self::new(1);
3791 }
3792 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3793 pub struct Expub52M_SPEC;
3794 pub type Expub52M = crate::EnumBitfieldStruct<u8, Expub52M_SPEC>;
3795 impl Expub52M {
3796 #[doc = "EXPUB52 interrupt request not masked"]
3797 pub const _0: Self = Self::new(0);
3798
3799 #[doc = "EXPUB52 interrupt request masked"]
3800 pub const _1: Self = Self::new(1);
3801 }
3802 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3803 pub struct Ioirqm_SPEC;
3804 pub type Ioirqm = crate::EnumBitfieldStruct<u8, Ioirqm_SPEC>;
3805 impl Ioirqm {
3806 #[doc = "IOIRQ interrupt not masked"]
3807 pub const _0: Self = Self::new(0);
3808
3809 #[doc = "IOIRQ interrupt masked"]
3810 pub const _1: Self = Self::new(1);
3811 }
3812}
3813#[doc(hidden)]
3814#[derive(Copy, Clone, Eq, PartialEq)]
3815pub struct SdDmaen_SPEC;
3816impl crate::sealed::RegSpec for SdDmaen_SPEC {
3817 type DataType = u32;
3818}
3819
3820#[doc = "DMA Mode Enable Register"]
3821pub type SdDmaen = crate::RegValueT<SdDmaen_SPEC>;
3822
3823impl SdDmaen {
3824 #[doc = "SD_BUF Read/Write DMA Transfer"]
3825 #[inline(always)]
3826 pub fn dmaen(
3827 self,
3828 ) -> crate::common::RegisterField<
3829 1,
3830 0x1,
3831 1,
3832 0,
3833 sd_dmaen::Dmaen,
3834 sd_dmaen::Dmaen,
3835 SdDmaen_SPEC,
3836 crate::common::RW,
3837 > {
3838 crate::common::RegisterField::<
3839 1,
3840 0x1,
3841 1,
3842 0,
3843 sd_dmaen::Dmaen,
3844 sd_dmaen::Dmaen,
3845 SdDmaen_SPEC,
3846 crate::common::RW,
3847 >::from_register(self, 0)
3848 }
3849}
3850impl ::core::default::Default for SdDmaen {
3851 #[inline(always)]
3852 fn default() -> SdDmaen {
3853 <crate::RegValueT<SdDmaen_SPEC> as RegisterValue<_>>::new(4112)
3854 }
3855}
3856pub mod sd_dmaen {
3857
3858 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3859 pub struct Dmaen_SPEC;
3860 pub type Dmaen = crate::EnumBitfieldStruct<u8, Dmaen_SPEC>;
3861 impl Dmaen {
3862 #[doc = "The SD_BUF read/write DMA transfer is disabled."]
3863 pub const _0: Self = Self::new(0);
3864
3865 #[doc = "The SD_BUF read/write DMA transfer is enabled."]
3866 pub const _1: Self = Self::new(1);
3867 }
3868}
3869#[doc(hidden)]
3870#[derive(Copy, Clone, Eq, PartialEq)]
3871pub struct SoftRst_SPEC;
3872impl crate::sealed::RegSpec for SoftRst_SPEC {
3873 type DataType = u32;
3874}
3875
3876#[doc = "Software Reset Register"]
3877pub type SoftRst = crate::RegValueT<SoftRst_SPEC>;
3878
3879impl SoftRst {
3880 #[doc = "Software Reset of SD I/F Unit"]
3881 #[inline(always)]
3882 pub fn sdrst(
3883 self,
3884 ) -> crate::common::RegisterField<
3885 0,
3886 0x1,
3887 1,
3888 0,
3889 soft_rst::Sdrst,
3890 soft_rst::Sdrst,
3891 SoftRst_SPEC,
3892 crate::common::RW,
3893 > {
3894 crate::common::RegisterField::<
3895 0,
3896 0x1,
3897 1,
3898 0,
3899 soft_rst::Sdrst,
3900 soft_rst::Sdrst,
3901 SoftRst_SPEC,
3902 crate::common::RW,
3903 >::from_register(self, 0)
3904 }
3905}
3906impl ::core::default::Default for SoftRst {
3907 #[inline(always)]
3908 fn default() -> SoftRst {
3909 <crate::RegValueT<SoftRst_SPEC> as RegisterValue<_>>::new(7)
3910 }
3911}
3912pub mod soft_rst {
3913
3914 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3915 pub struct Sdrst_SPEC;
3916 pub type Sdrst = crate::EnumBitfieldStruct<u8, Sdrst_SPEC>;
3917 impl Sdrst {
3918 #[doc = "Reset"]
3919 pub const _0: Self = Self::new(0);
3920
3921 #[doc = "Reset released"]
3922 pub const _1: Self = Self::new(1);
3923 }
3924}
3925#[doc(hidden)]
3926#[derive(Copy, Clone, Eq, PartialEq)]
3927pub struct SdifMode_SPEC;
3928impl crate::sealed::RegSpec for SdifMode_SPEC {
3929 type DataType = u32;
3930}
3931
3932#[doc = "SD Interface Mode Setting Register"]
3933pub type SdifMode = crate::RegValueT<SdifMode_SPEC>;
3934
3935impl SdifMode {
3936 #[doc = "CRC Check Mask (for MMC test commands)"]
3937 #[inline(always)]
3938 pub fn nochkcr(
3939 self,
3940 ) -> crate::common::RegisterField<
3941 8,
3942 0x1,
3943 1,
3944 0,
3945 sdif_mode::Nochkcr,
3946 sdif_mode::Nochkcr,
3947 SdifMode_SPEC,
3948 crate::common::RW,
3949 > {
3950 crate::common::RegisterField::<
3951 8,
3952 0x1,
3953 1,
3954 0,
3955 sdif_mode::Nochkcr,
3956 sdif_mode::Nochkcr,
3957 SdifMode_SPEC,
3958 crate::common::RW,
3959 >::from_register(self, 0)
3960 }
3961}
3962impl ::core::default::Default for SdifMode {
3963 #[inline(always)]
3964 fn default() -> SdifMode {
3965 <crate::RegValueT<SdifMode_SPEC> as RegisterValue<_>>::new(0)
3966 }
3967}
3968pub mod sdif_mode {
3969
3970 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3971 pub struct Nochkcr_SPEC;
3972 pub type Nochkcr = crate::EnumBitfieldStruct<u8, Nochkcr_SPEC>;
3973 impl Nochkcr {
3974 #[doc = "CRC check is valid"]
3975 pub const _0: Self = Self::new(0);
3976
3977 #[doc = "CRC check is invalid(CRC16 value is ignored when read and CRC Status value is ignored when write)"]
3978 pub const _1: Self = Self::new(1);
3979 }
3980}
3981#[doc(hidden)]
3982#[derive(Copy, Clone, Eq, PartialEq)]
3983pub struct ExtSwap_SPEC;
3984impl crate::sealed::RegSpec for ExtSwap_SPEC {
3985 type DataType = u32;
3986}
3987
3988#[doc = "Swap Control Register"]
3989pub type ExtSwap = crate::RegValueT<ExtSwap_SPEC>;
3990
3991impl ExtSwap {
3992 #[doc = "SD_BUF0 Swap Read"]
3993 #[inline(always)]
3994 pub fn brswp(
3995 self,
3996 ) -> crate::common::RegisterField<
3997 7,
3998 0x1,
3999 1,
4000 0,
4001 ext_swap::Brswp,
4002 ext_swap::Brswp,
4003 ExtSwap_SPEC,
4004 crate::common::RW,
4005 > {
4006 crate::common::RegisterField::<
4007 7,
4008 0x1,
4009 1,
4010 0,
4011 ext_swap::Brswp,
4012 ext_swap::Brswp,
4013 ExtSwap_SPEC,
4014 crate::common::RW,
4015 >::from_register(self, 0)
4016 }
4017
4018 #[doc = "SD_BUF0 Swap Write"]
4019 #[inline(always)]
4020 pub fn bwswp(
4021 self,
4022 ) -> crate::common::RegisterField<
4023 6,
4024 0x1,
4025 1,
4026 0,
4027 ext_swap::Bwswp,
4028 ext_swap::Bwswp,
4029 ExtSwap_SPEC,
4030 crate::common::RW,
4031 > {
4032 crate::common::RegisterField::<
4033 6,
4034 0x1,
4035 1,
4036 0,
4037 ext_swap::Bwswp,
4038 ext_swap::Bwswp,
4039 ExtSwap_SPEC,
4040 crate::common::RW,
4041 >::from_register(self, 0)
4042 }
4043}
4044impl ::core::default::Default for ExtSwap {
4045 #[inline(always)]
4046 fn default() -> ExtSwap {
4047 <crate::RegValueT<ExtSwap_SPEC> as RegisterValue<_>>::new(0)
4048 }
4049}
4050pub mod ext_swap {
4051
4052 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4053 pub struct Brswp_SPEC;
4054 pub type Brswp = crate::EnumBitfieldStruct<u8, Brswp_SPEC>;
4055 impl Brswp {
4056 #[doc = "The current data are read without swapping."]
4057 pub const _0: Self = Self::new(0);
4058
4059 #[doc = "Swapping of the positions of the higher- and lower-order bytes of data for reading proceeds."]
4060 pub const _1: Self = Self::new(1);
4061 }
4062 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4063 pub struct Bwswp_SPEC;
4064 pub type Bwswp = crate::EnumBitfieldStruct<u8, Bwswp_SPEC>;
4065 impl Bwswp {
4066 #[doc = "The current data are written without swapping."]
4067 pub const _0: Self = Self::new(0);
4068
4069 #[doc = "Swapping of the positions of the higher- and lower-order bytes of data for writing proceeds."]
4070 pub const _1: Self = Self::new(1);
4071 }
4072}