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ra6m2_pac/
pfs.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:11:44 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Pmn Pin Function Control Register"]
28unsafe impl ::core::marker::Send for super::Pfs {}
29unsafe impl ::core::marker::Sync for super::Pfs {}
30impl super::Pfs {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "P000 Pin Function Control Register"]
38    #[inline(always)]
39    pub const fn p000pfs(
40        &self,
41    ) -> &'static crate::common::Reg<self::P000Pfs_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::P000Pfs_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "P000 Pin Function Control Register"]
50    #[inline(always)]
51    pub const fn p000pfs_ha(
52        &self,
53    ) -> &'static crate::common::Reg<self::P000PfsHa_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::P000PfsHa_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(2usize),
57            )
58        }
59    }
60
61    #[doc = "P000 Pin Function Control Register"]
62    #[inline(always)]
63    pub const fn p000pfs_by(
64        &self,
65    ) -> &'static crate::common::Reg<self::P000PfsBy_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::P000PfsBy_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(3usize),
69            )
70        }
71    }
72
73    #[doc = "P00%s Pin Function Control Register"]
74    #[inline(always)]
75    pub const fn p00pfs(
76        &self,
77    ) -> &'static crate::common::ClusterRegisterArray<
78        crate::common::Reg<self::P00Pfs_SPEC, crate::common::RW>,
79        2,
80        0x4,
81    > {
82        unsafe {
83            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x20usize))
84        }
85    }
86    #[inline(always)]
87    pub const fn p008pfs(
88        &self,
89    ) -> &'static crate::common::Reg<self::P00Pfs_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::P00Pfs_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(0x20usize),
93            )
94        }
95    }
96    #[inline(always)]
97    pub const fn p009pfs(
98        &self,
99    ) -> &'static crate::common::Reg<self::P00Pfs_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::P00Pfs_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(0x24usize),
103            )
104        }
105    }
106
107    #[doc = "P00%s Pin Function Control Register"]
108    #[inline(always)]
109    pub const fn p00pfs_ha(
110        &self,
111    ) -> &'static crate::common::ClusterRegisterArray<
112        crate::common::Reg<self::P00PfsHa_SPEC, crate::common::RW>,
113        2,
114        0x4,
115    > {
116        unsafe {
117            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x22usize))
118        }
119    }
120    #[inline(always)]
121    pub const fn p008pfs_ha(
122        &self,
123    ) -> &'static crate::common::Reg<self::P00PfsHa_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::P00PfsHa_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(0x22usize),
127            )
128        }
129    }
130    #[inline(always)]
131    pub const fn p009pfs_ha(
132        &self,
133    ) -> &'static crate::common::Reg<self::P00PfsHa_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::P00PfsHa_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(0x26usize),
137            )
138        }
139    }
140
141    #[doc = "P00%s Pin Function Control Register"]
142    #[inline(always)]
143    pub const fn p00pfs_by(
144        &self,
145    ) -> &'static crate::common::ClusterRegisterArray<
146        crate::common::Reg<self::P00PfsBy_SPEC, crate::common::RW>,
147        2,
148        0x4,
149    > {
150        unsafe {
151            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x23usize))
152        }
153    }
154    #[inline(always)]
155    pub const fn p008pfs_by(
156        &self,
157    ) -> &'static crate::common::Reg<self::P00PfsBy_SPEC, crate::common::RW> {
158        unsafe {
159            crate::common::Reg::<self::P00PfsBy_SPEC, crate::common::RW>::from_ptr(
160                self._svd2pac_as_ptr().add(0x23usize),
161            )
162        }
163    }
164    #[inline(always)]
165    pub const fn p009pfs_by(
166        &self,
167    ) -> &'static crate::common::Reg<self::P00PfsBy_SPEC, crate::common::RW> {
168        unsafe {
169            crate::common::Reg::<self::P00PfsBy_SPEC, crate::common::RW>::from_ptr(
170                self._svd2pac_as_ptr().add(0x27usize),
171            )
172        }
173    }
174
175    #[doc = "P0%s Pin Function Control Register"]
176    #[inline(always)]
177    pub const fn p0pfs(
178        &self,
179    ) -> &'static crate::common::ClusterRegisterArray<
180        crate::common::Reg<self::P0Pfs_SPEC, crate::common::RW>,
181        2,
182        0x4,
183    > {
184        unsafe {
185            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x38usize))
186        }
187    }
188    #[inline(always)]
189    pub const fn p014pfs(
190        &self,
191    ) -> &'static crate::common::Reg<self::P0Pfs_SPEC, crate::common::RW> {
192        unsafe {
193            crate::common::Reg::<self::P0Pfs_SPEC, crate::common::RW>::from_ptr(
194                self._svd2pac_as_ptr().add(0x38usize),
195            )
196        }
197    }
198    #[inline(always)]
199    pub const fn p015pfs(
200        &self,
201    ) -> &'static crate::common::Reg<self::P0Pfs_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::P0Pfs_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(0x3cusize),
205            )
206        }
207    }
208
209    #[doc = "P0%s Pin Function Control Register"]
210    #[inline(always)]
211    pub const fn p0pfs_ha(
212        &self,
213    ) -> &'static crate::common::ClusterRegisterArray<
214        crate::common::Reg<self::P0PfsHa_SPEC, crate::common::RW>,
215        2,
216        0x4,
217    > {
218        unsafe {
219            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x3ausize))
220        }
221    }
222    #[inline(always)]
223    pub const fn p014pfs_ha(
224        &self,
225    ) -> &'static crate::common::Reg<self::P0PfsHa_SPEC, crate::common::RW> {
226        unsafe {
227            crate::common::Reg::<self::P0PfsHa_SPEC, crate::common::RW>::from_ptr(
228                self._svd2pac_as_ptr().add(0x3ausize),
229            )
230        }
231    }
232    #[inline(always)]
233    pub const fn p015pfs_ha(
234        &self,
235    ) -> &'static crate::common::Reg<self::P0PfsHa_SPEC, crate::common::RW> {
236        unsafe {
237            crate::common::Reg::<self::P0PfsHa_SPEC, crate::common::RW>::from_ptr(
238                self._svd2pac_as_ptr().add(0x3eusize),
239            )
240        }
241    }
242
243    #[doc = "P0%s Pin Function Control Register"]
244    #[inline(always)]
245    pub const fn p0pfs_by(
246        &self,
247    ) -> &'static crate::common::ClusterRegisterArray<
248        crate::common::Reg<self::P0PfsBy_SPEC, crate::common::RW>,
249        2,
250        0x4,
251    > {
252        unsafe {
253            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x3busize))
254        }
255    }
256    #[inline(always)]
257    pub const fn p014pfs_by(
258        &self,
259    ) -> &'static crate::common::Reg<self::P0PfsBy_SPEC, crate::common::RW> {
260        unsafe {
261            crate::common::Reg::<self::P0PfsBy_SPEC, crate::common::RW>::from_ptr(
262                self._svd2pac_as_ptr().add(0x3busize),
263            )
264        }
265    }
266    #[inline(always)]
267    pub const fn p015pfs_by(
268        &self,
269    ) -> &'static crate::common::Reg<self::P0PfsBy_SPEC, crate::common::RW> {
270        unsafe {
271            crate::common::Reg::<self::P0PfsBy_SPEC, crate::common::RW>::from_ptr(
272                self._svd2pac_as_ptr().add(0x3fusize),
273            )
274        }
275    }
276
277    #[doc = "P100 Pin Function Control Register"]
278    #[inline(always)]
279    pub const fn p100pfs(
280        &self,
281    ) -> &'static crate::common::Reg<self::P100Pfs_SPEC, crate::common::RW> {
282        unsafe {
283            crate::common::Reg::<self::P100Pfs_SPEC, crate::common::RW>::from_ptr(
284                self._svd2pac_as_ptr().add(64usize),
285            )
286        }
287    }
288
289    #[doc = "P100 Pin Function Control Register"]
290    #[inline(always)]
291    pub const fn p100pfs_ha(
292        &self,
293    ) -> &'static crate::common::Reg<self::P100PfsHa_SPEC, crate::common::RW> {
294        unsafe {
295            crate::common::Reg::<self::P100PfsHa_SPEC, crate::common::RW>::from_ptr(
296                self._svd2pac_as_ptr().add(66usize),
297            )
298        }
299    }
300
301    #[doc = "P100 Pin Function Control Register"]
302    #[inline(always)]
303    pub const fn p100pfs_by(
304        &self,
305    ) -> &'static crate::common::Reg<self::P100PfsBy_SPEC, crate::common::RW> {
306        unsafe {
307            crate::common::Reg::<self::P100PfsBy_SPEC, crate::common::RW>::from_ptr(
308                self._svd2pac_as_ptr().add(67usize),
309            )
310        }
311    }
312
313    #[doc = "P10%s Pin Function Control Register"]
314    #[inline(always)]
315    pub const fn p10pfs(
316        &self,
317    ) -> &'static crate::common::ClusterRegisterArray<
318        crate::common::Reg<self::P10Pfs_SPEC, crate::common::RW>,
319        7,
320        0x4,
321    > {
322        unsafe {
323            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x44usize))
324        }
325    }
326    #[inline(always)]
327    pub const fn p101pfs(
328        &self,
329    ) -> &'static crate::common::Reg<self::P10Pfs_SPEC, crate::common::RW> {
330        unsafe {
331            crate::common::Reg::<self::P10Pfs_SPEC, crate::common::RW>::from_ptr(
332                self._svd2pac_as_ptr().add(0x44usize),
333            )
334        }
335    }
336    #[inline(always)]
337    pub const fn p102pfs(
338        &self,
339    ) -> &'static crate::common::Reg<self::P10Pfs_SPEC, crate::common::RW> {
340        unsafe {
341            crate::common::Reg::<self::P10Pfs_SPEC, crate::common::RW>::from_ptr(
342                self._svd2pac_as_ptr().add(0x48usize),
343            )
344        }
345    }
346    #[inline(always)]
347    pub const fn p103pfs(
348        &self,
349    ) -> &'static crate::common::Reg<self::P10Pfs_SPEC, crate::common::RW> {
350        unsafe {
351            crate::common::Reg::<self::P10Pfs_SPEC, crate::common::RW>::from_ptr(
352                self._svd2pac_as_ptr().add(0x4cusize),
353            )
354        }
355    }
356    #[inline(always)]
357    pub const fn p104pfs(
358        &self,
359    ) -> &'static crate::common::Reg<self::P10Pfs_SPEC, crate::common::RW> {
360        unsafe {
361            crate::common::Reg::<self::P10Pfs_SPEC, crate::common::RW>::from_ptr(
362                self._svd2pac_as_ptr().add(0x50usize),
363            )
364        }
365    }
366    #[inline(always)]
367    pub const fn p105pfs(
368        &self,
369    ) -> &'static crate::common::Reg<self::P10Pfs_SPEC, crate::common::RW> {
370        unsafe {
371            crate::common::Reg::<self::P10Pfs_SPEC, crate::common::RW>::from_ptr(
372                self._svd2pac_as_ptr().add(0x54usize),
373            )
374        }
375    }
376    #[inline(always)]
377    pub const fn p106pfs(
378        &self,
379    ) -> &'static crate::common::Reg<self::P10Pfs_SPEC, crate::common::RW> {
380        unsafe {
381            crate::common::Reg::<self::P10Pfs_SPEC, crate::common::RW>::from_ptr(
382                self._svd2pac_as_ptr().add(0x58usize),
383            )
384        }
385    }
386    #[inline(always)]
387    pub const fn p107pfs(
388        &self,
389    ) -> &'static crate::common::Reg<self::P10Pfs_SPEC, crate::common::RW> {
390        unsafe {
391            crate::common::Reg::<self::P10Pfs_SPEC, crate::common::RW>::from_ptr(
392                self._svd2pac_as_ptr().add(0x5cusize),
393            )
394        }
395    }
396
397    #[doc = "P10%s Pin Function Control Register"]
398    #[inline(always)]
399    pub const fn p10pfs_ha(
400        &self,
401    ) -> &'static crate::common::ClusterRegisterArray<
402        crate::common::Reg<self::P10PfsHa_SPEC, crate::common::RW>,
403        7,
404        0x4,
405    > {
406        unsafe {
407            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x46usize))
408        }
409    }
410    #[inline(always)]
411    pub const fn p101pfs_ha(
412        &self,
413    ) -> &'static crate::common::Reg<self::P10PfsHa_SPEC, crate::common::RW> {
414        unsafe {
415            crate::common::Reg::<self::P10PfsHa_SPEC, crate::common::RW>::from_ptr(
416                self._svd2pac_as_ptr().add(0x46usize),
417            )
418        }
419    }
420    #[inline(always)]
421    pub const fn p102pfs_ha(
422        &self,
423    ) -> &'static crate::common::Reg<self::P10PfsHa_SPEC, crate::common::RW> {
424        unsafe {
425            crate::common::Reg::<self::P10PfsHa_SPEC, crate::common::RW>::from_ptr(
426                self._svd2pac_as_ptr().add(0x4ausize),
427            )
428        }
429    }
430    #[inline(always)]
431    pub const fn p103pfs_ha(
432        &self,
433    ) -> &'static crate::common::Reg<self::P10PfsHa_SPEC, crate::common::RW> {
434        unsafe {
435            crate::common::Reg::<self::P10PfsHa_SPEC, crate::common::RW>::from_ptr(
436                self._svd2pac_as_ptr().add(0x4eusize),
437            )
438        }
439    }
440    #[inline(always)]
441    pub const fn p104pfs_ha(
442        &self,
443    ) -> &'static crate::common::Reg<self::P10PfsHa_SPEC, crate::common::RW> {
444        unsafe {
445            crate::common::Reg::<self::P10PfsHa_SPEC, crate::common::RW>::from_ptr(
446                self._svd2pac_as_ptr().add(0x52usize),
447            )
448        }
449    }
450    #[inline(always)]
451    pub const fn p105pfs_ha(
452        &self,
453    ) -> &'static crate::common::Reg<self::P10PfsHa_SPEC, crate::common::RW> {
454        unsafe {
455            crate::common::Reg::<self::P10PfsHa_SPEC, crate::common::RW>::from_ptr(
456                self._svd2pac_as_ptr().add(0x56usize),
457            )
458        }
459    }
460    #[inline(always)]
461    pub const fn p106pfs_ha(
462        &self,
463    ) -> &'static crate::common::Reg<self::P10PfsHa_SPEC, crate::common::RW> {
464        unsafe {
465            crate::common::Reg::<self::P10PfsHa_SPEC, crate::common::RW>::from_ptr(
466                self._svd2pac_as_ptr().add(0x5ausize),
467            )
468        }
469    }
470    #[inline(always)]
471    pub const fn p107pfs_ha(
472        &self,
473    ) -> &'static crate::common::Reg<self::P10PfsHa_SPEC, crate::common::RW> {
474        unsafe {
475            crate::common::Reg::<self::P10PfsHa_SPEC, crate::common::RW>::from_ptr(
476                self._svd2pac_as_ptr().add(0x5eusize),
477            )
478        }
479    }
480
481    #[doc = "P10%s Pin Function Control Register"]
482    #[inline(always)]
483    pub const fn p10pfs_by(
484        &self,
485    ) -> &'static crate::common::ClusterRegisterArray<
486        crate::common::Reg<self::P10PfsBy_SPEC, crate::common::RW>,
487        7,
488        0x4,
489    > {
490        unsafe {
491            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x47usize))
492        }
493    }
494    #[inline(always)]
495    pub const fn p101pfs_by(
496        &self,
497    ) -> &'static crate::common::Reg<self::P10PfsBy_SPEC, crate::common::RW> {
498        unsafe {
499            crate::common::Reg::<self::P10PfsBy_SPEC, crate::common::RW>::from_ptr(
500                self._svd2pac_as_ptr().add(0x47usize),
501            )
502        }
503    }
504    #[inline(always)]
505    pub const fn p102pfs_by(
506        &self,
507    ) -> &'static crate::common::Reg<self::P10PfsBy_SPEC, crate::common::RW> {
508        unsafe {
509            crate::common::Reg::<self::P10PfsBy_SPEC, crate::common::RW>::from_ptr(
510                self._svd2pac_as_ptr().add(0x4busize),
511            )
512        }
513    }
514    #[inline(always)]
515    pub const fn p103pfs_by(
516        &self,
517    ) -> &'static crate::common::Reg<self::P10PfsBy_SPEC, crate::common::RW> {
518        unsafe {
519            crate::common::Reg::<self::P10PfsBy_SPEC, crate::common::RW>::from_ptr(
520                self._svd2pac_as_ptr().add(0x4fusize),
521            )
522        }
523    }
524    #[inline(always)]
525    pub const fn p104pfs_by(
526        &self,
527    ) -> &'static crate::common::Reg<self::P10PfsBy_SPEC, crate::common::RW> {
528        unsafe {
529            crate::common::Reg::<self::P10PfsBy_SPEC, crate::common::RW>::from_ptr(
530                self._svd2pac_as_ptr().add(0x53usize),
531            )
532        }
533    }
534    #[inline(always)]
535    pub const fn p105pfs_by(
536        &self,
537    ) -> &'static crate::common::Reg<self::P10PfsBy_SPEC, crate::common::RW> {
538        unsafe {
539            crate::common::Reg::<self::P10PfsBy_SPEC, crate::common::RW>::from_ptr(
540                self._svd2pac_as_ptr().add(0x57usize),
541            )
542        }
543    }
544    #[inline(always)]
545    pub const fn p106pfs_by(
546        &self,
547    ) -> &'static crate::common::Reg<self::P10PfsBy_SPEC, crate::common::RW> {
548        unsafe {
549            crate::common::Reg::<self::P10PfsBy_SPEC, crate::common::RW>::from_ptr(
550                self._svd2pac_as_ptr().add(0x5busize),
551            )
552        }
553    }
554    #[inline(always)]
555    pub const fn p107pfs_by(
556        &self,
557    ) -> &'static crate::common::Reg<self::P10PfsBy_SPEC, crate::common::RW> {
558        unsafe {
559            crate::common::Reg::<self::P10PfsBy_SPEC, crate::common::RW>::from_ptr(
560                self._svd2pac_as_ptr().add(0x5fusize),
561            )
562        }
563    }
564
565    #[doc = "P108 Pin Function Control Register"]
566    #[inline(always)]
567    pub const fn p108pfs(
568        &self,
569    ) -> &'static crate::common::Reg<self::P108Pfs_SPEC, crate::common::RW> {
570        unsafe {
571            crate::common::Reg::<self::P108Pfs_SPEC, crate::common::RW>::from_ptr(
572                self._svd2pac_as_ptr().add(96usize),
573            )
574        }
575    }
576
577    #[doc = "P108 Pin Function Control Register"]
578    #[inline(always)]
579    pub const fn p108pfs_ha(
580        &self,
581    ) -> &'static crate::common::Reg<self::P108PfsHa_SPEC, crate::common::RW> {
582        unsafe {
583            crate::common::Reg::<self::P108PfsHa_SPEC, crate::common::RW>::from_ptr(
584                self._svd2pac_as_ptr().add(98usize),
585            )
586        }
587    }
588
589    #[doc = "P108 Pin Function Control Register"]
590    #[inline(always)]
591    pub const fn p108pfs_by(
592        &self,
593    ) -> &'static crate::common::Reg<self::P108PfsBy_SPEC, crate::common::RW> {
594        unsafe {
595            crate::common::Reg::<self::P108PfsBy_SPEC, crate::common::RW>::from_ptr(
596                self._svd2pac_as_ptr().add(99usize),
597            )
598        }
599    }
600
601    #[doc = "P109 Pin Function Control Register"]
602    #[inline(always)]
603    pub const fn p109pfs(
604        &self,
605    ) -> &'static crate::common::Reg<self::P109Pfs_SPEC, crate::common::RW> {
606        unsafe {
607            crate::common::Reg::<self::P109Pfs_SPEC, crate::common::RW>::from_ptr(
608                self._svd2pac_as_ptr().add(100usize),
609            )
610        }
611    }
612
613    #[doc = "P109 Pin Function Control Register"]
614    #[inline(always)]
615    pub const fn p109pfs_ha(
616        &self,
617    ) -> &'static crate::common::Reg<self::P109PfsHa_SPEC, crate::common::RW> {
618        unsafe {
619            crate::common::Reg::<self::P109PfsHa_SPEC, crate::common::RW>::from_ptr(
620                self._svd2pac_as_ptr().add(102usize),
621            )
622        }
623    }
624
625    #[doc = "P109 Pin Function Control Register"]
626    #[inline(always)]
627    pub const fn p109pfs_by(
628        &self,
629    ) -> &'static crate::common::Reg<self::P109PfsBy_SPEC, crate::common::RW> {
630        unsafe {
631            crate::common::Reg::<self::P109PfsBy_SPEC, crate::common::RW>::from_ptr(
632                self._svd2pac_as_ptr().add(103usize),
633            )
634        }
635    }
636
637    #[doc = "P110 Pin Function Control Register"]
638    #[inline(always)]
639    pub const fn p110pfs(
640        &self,
641    ) -> &'static crate::common::Reg<self::P110Pfs_SPEC, crate::common::RW> {
642        unsafe {
643            crate::common::Reg::<self::P110Pfs_SPEC, crate::common::RW>::from_ptr(
644                self._svd2pac_as_ptr().add(104usize),
645            )
646        }
647    }
648
649    #[doc = "P110 Pin Function Control Register"]
650    #[inline(always)]
651    pub const fn p110pfs_ha(
652        &self,
653    ) -> &'static crate::common::Reg<self::P110PfsHa_SPEC, crate::common::RW> {
654        unsafe {
655            crate::common::Reg::<self::P110PfsHa_SPEC, crate::common::RW>::from_ptr(
656                self._svd2pac_as_ptr().add(106usize),
657            )
658        }
659    }
660
661    #[doc = "P110 Pin Function Control Register"]
662    #[inline(always)]
663    pub const fn p110pfs_by(
664        &self,
665    ) -> &'static crate::common::Reg<self::P110PfsBy_SPEC, crate::common::RW> {
666        unsafe {
667            crate::common::Reg::<self::P110PfsBy_SPEC, crate::common::RW>::from_ptr(
668                self._svd2pac_as_ptr().add(107usize),
669            )
670        }
671    }
672
673    #[doc = "P1%s Pin Function Control Register"]
674    #[inline(always)]
675    pub const fn p1pfs(
676        &self,
677    ) -> &'static crate::common::ClusterRegisterArray<
678        crate::common::Reg<self::P1Pfs_SPEC, crate::common::RW>,
679        5,
680        0x4,
681    > {
682        unsafe {
683            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x6cusize))
684        }
685    }
686    #[inline(always)]
687    pub const fn p111pfs(
688        &self,
689    ) -> &'static crate::common::Reg<self::P1Pfs_SPEC, crate::common::RW> {
690        unsafe {
691            crate::common::Reg::<self::P1Pfs_SPEC, crate::common::RW>::from_ptr(
692                self._svd2pac_as_ptr().add(0x6cusize),
693            )
694        }
695    }
696    #[inline(always)]
697    pub const fn p112pfs(
698        &self,
699    ) -> &'static crate::common::Reg<self::P1Pfs_SPEC, crate::common::RW> {
700        unsafe {
701            crate::common::Reg::<self::P1Pfs_SPEC, crate::common::RW>::from_ptr(
702                self._svd2pac_as_ptr().add(0x70usize),
703            )
704        }
705    }
706    #[inline(always)]
707    pub const fn p113pfs(
708        &self,
709    ) -> &'static crate::common::Reg<self::P1Pfs_SPEC, crate::common::RW> {
710        unsafe {
711            crate::common::Reg::<self::P1Pfs_SPEC, crate::common::RW>::from_ptr(
712                self._svd2pac_as_ptr().add(0x74usize),
713            )
714        }
715    }
716    #[inline(always)]
717    pub const fn p114pfs(
718        &self,
719    ) -> &'static crate::common::Reg<self::P1Pfs_SPEC, crate::common::RW> {
720        unsafe {
721            crate::common::Reg::<self::P1Pfs_SPEC, crate::common::RW>::from_ptr(
722                self._svd2pac_as_ptr().add(0x78usize),
723            )
724        }
725    }
726    #[inline(always)]
727    pub const fn p115pfs(
728        &self,
729    ) -> &'static crate::common::Reg<self::P1Pfs_SPEC, crate::common::RW> {
730        unsafe {
731            crate::common::Reg::<self::P1Pfs_SPEC, crate::common::RW>::from_ptr(
732                self._svd2pac_as_ptr().add(0x7cusize),
733            )
734        }
735    }
736
737    #[doc = "P1%s Pin Function Control Register"]
738    #[inline(always)]
739    pub const fn p1pfs_ha(
740        &self,
741    ) -> &'static crate::common::ClusterRegisterArray<
742        crate::common::Reg<self::P1PfsHa_SPEC, crate::common::RW>,
743        5,
744        0x4,
745    > {
746        unsafe {
747            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x6eusize))
748        }
749    }
750    #[inline(always)]
751    pub const fn p111pfs_ha(
752        &self,
753    ) -> &'static crate::common::Reg<self::P1PfsHa_SPEC, crate::common::RW> {
754        unsafe {
755            crate::common::Reg::<self::P1PfsHa_SPEC, crate::common::RW>::from_ptr(
756                self._svd2pac_as_ptr().add(0x6eusize),
757            )
758        }
759    }
760    #[inline(always)]
761    pub const fn p112pfs_ha(
762        &self,
763    ) -> &'static crate::common::Reg<self::P1PfsHa_SPEC, crate::common::RW> {
764        unsafe {
765            crate::common::Reg::<self::P1PfsHa_SPEC, crate::common::RW>::from_ptr(
766                self._svd2pac_as_ptr().add(0x72usize),
767            )
768        }
769    }
770    #[inline(always)]
771    pub const fn p113pfs_ha(
772        &self,
773    ) -> &'static crate::common::Reg<self::P1PfsHa_SPEC, crate::common::RW> {
774        unsafe {
775            crate::common::Reg::<self::P1PfsHa_SPEC, crate::common::RW>::from_ptr(
776                self._svd2pac_as_ptr().add(0x76usize),
777            )
778        }
779    }
780    #[inline(always)]
781    pub const fn p114pfs_ha(
782        &self,
783    ) -> &'static crate::common::Reg<self::P1PfsHa_SPEC, crate::common::RW> {
784        unsafe {
785            crate::common::Reg::<self::P1PfsHa_SPEC, crate::common::RW>::from_ptr(
786                self._svd2pac_as_ptr().add(0x7ausize),
787            )
788        }
789    }
790    #[inline(always)]
791    pub const fn p115pfs_ha(
792        &self,
793    ) -> &'static crate::common::Reg<self::P1PfsHa_SPEC, crate::common::RW> {
794        unsafe {
795            crate::common::Reg::<self::P1PfsHa_SPEC, crate::common::RW>::from_ptr(
796                self._svd2pac_as_ptr().add(0x7eusize),
797            )
798        }
799    }
800
801    #[doc = "P1%s Pin Function Control Register"]
802    #[inline(always)]
803    pub const fn p1pfs_by(
804        &self,
805    ) -> &'static crate::common::ClusterRegisterArray<
806        crate::common::Reg<self::P1PfsBy_SPEC, crate::common::RW>,
807        5,
808        0x4,
809    > {
810        unsafe {
811            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x6fusize))
812        }
813    }
814    #[inline(always)]
815    pub const fn p111pfs_by(
816        &self,
817    ) -> &'static crate::common::Reg<self::P1PfsBy_SPEC, crate::common::RW> {
818        unsafe {
819            crate::common::Reg::<self::P1PfsBy_SPEC, crate::common::RW>::from_ptr(
820                self._svd2pac_as_ptr().add(0x6fusize),
821            )
822        }
823    }
824    #[inline(always)]
825    pub const fn p112pfs_by(
826        &self,
827    ) -> &'static crate::common::Reg<self::P1PfsBy_SPEC, crate::common::RW> {
828        unsafe {
829            crate::common::Reg::<self::P1PfsBy_SPEC, crate::common::RW>::from_ptr(
830                self._svd2pac_as_ptr().add(0x73usize),
831            )
832        }
833    }
834    #[inline(always)]
835    pub const fn p113pfs_by(
836        &self,
837    ) -> &'static crate::common::Reg<self::P1PfsBy_SPEC, crate::common::RW> {
838        unsafe {
839            crate::common::Reg::<self::P1PfsBy_SPEC, crate::common::RW>::from_ptr(
840                self._svd2pac_as_ptr().add(0x77usize),
841            )
842        }
843    }
844    #[inline(always)]
845    pub const fn p114pfs_by(
846        &self,
847    ) -> &'static crate::common::Reg<self::P1PfsBy_SPEC, crate::common::RW> {
848        unsafe {
849            crate::common::Reg::<self::P1PfsBy_SPEC, crate::common::RW>::from_ptr(
850                self._svd2pac_as_ptr().add(0x7busize),
851            )
852        }
853    }
854    #[inline(always)]
855    pub const fn p115pfs_by(
856        &self,
857    ) -> &'static crate::common::Reg<self::P1PfsBy_SPEC, crate::common::RW> {
858        unsafe {
859            crate::common::Reg::<self::P1PfsBy_SPEC, crate::common::RW>::from_ptr(
860                self._svd2pac_as_ptr().add(0x7fusize),
861            )
862        }
863    }
864
865    #[doc = "P200 Pin Function Control Register"]
866    #[inline(always)]
867    pub const fn p200pfs(
868        &self,
869    ) -> &'static crate::common::Reg<self::P200Pfs_SPEC, crate::common::RW> {
870        unsafe {
871            crate::common::Reg::<self::P200Pfs_SPEC, crate::common::RW>::from_ptr(
872                self._svd2pac_as_ptr().add(128usize),
873            )
874        }
875    }
876
877    #[doc = "P200 Pin Function Control Register"]
878    #[inline(always)]
879    pub const fn p200pfs_ha(
880        &self,
881    ) -> &'static crate::common::Reg<self::P200PfsHa_SPEC, crate::common::RW> {
882        unsafe {
883            crate::common::Reg::<self::P200PfsHa_SPEC, crate::common::RW>::from_ptr(
884                self._svd2pac_as_ptr().add(130usize),
885            )
886        }
887    }
888
889    #[doc = "P200 Pin Function Control Register"]
890    #[inline(always)]
891    pub const fn p200pfs_by(
892        &self,
893    ) -> &'static crate::common::Reg<self::P200PfsBy_SPEC, crate::common::RW> {
894        unsafe {
895            crate::common::Reg::<self::P200PfsBy_SPEC, crate::common::RW>::from_ptr(
896                self._svd2pac_as_ptr().add(131usize),
897            )
898        }
899    }
900
901    #[doc = "P201 Pin Function Control Register"]
902    #[inline(always)]
903    pub const fn p201pfs(
904        &self,
905    ) -> &'static crate::common::Reg<self::P201Pfs_SPEC, crate::common::RW> {
906        unsafe {
907            crate::common::Reg::<self::P201Pfs_SPEC, crate::common::RW>::from_ptr(
908                self._svd2pac_as_ptr().add(132usize),
909            )
910        }
911    }
912
913    #[doc = "P201 Pin Function Control Register"]
914    #[inline(always)]
915    pub const fn p201pfs_ha(
916        &self,
917    ) -> &'static crate::common::Reg<self::P201PfsHa_SPEC, crate::common::RW> {
918        unsafe {
919            crate::common::Reg::<self::P201PfsHa_SPEC, crate::common::RW>::from_ptr(
920                self._svd2pac_as_ptr().add(134usize),
921            )
922        }
923    }
924
925    #[doc = "P201 Pin Function Control Register"]
926    #[inline(always)]
927    pub const fn p201pfs_by(
928        &self,
929    ) -> &'static crate::common::Reg<self::P201PfsBy_SPEC, crate::common::RW> {
930        unsafe {
931            crate::common::Reg::<self::P201PfsBy_SPEC, crate::common::RW>::from_ptr(
932                self._svd2pac_as_ptr().add(135usize),
933            )
934        }
935    }
936
937    #[doc = "P20%s Pin Function Control Register"]
938    #[inline(always)]
939    pub const fn p20pfs(
940        &self,
941    ) -> &'static crate::common::ClusterRegisterArray<
942        crate::common::Reg<self::P20Pfs_SPEC, crate::common::RW>,
943        8,
944        0x4,
945    > {
946        unsafe {
947            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x88usize))
948        }
949    }
950    #[inline(always)]
951    pub const fn p202pfs(
952        &self,
953    ) -> &'static crate::common::Reg<self::P20Pfs_SPEC, crate::common::RW> {
954        unsafe {
955            crate::common::Reg::<self::P20Pfs_SPEC, crate::common::RW>::from_ptr(
956                self._svd2pac_as_ptr().add(0x88usize),
957            )
958        }
959    }
960    #[inline(always)]
961    pub const fn p203pfs(
962        &self,
963    ) -> &'static crate::common::Reg<self::P20Pfs_SPEC, crate::common::RW> {
964        unsafe {
965            crate::common::Reg::<self::P20Pfs_SPEC, crate::common::RW>::from_ptr(
966                self._svd2pac_as_ptr().add(0x8cusize),
967            )
968        }
969    }
970    #[inline(always)]
971    pub const fn p204pfs(
972        &self,
973    ) -> &'static crate::common::Reg<self::P20Pfs_SPEC, crate::common::RW> {
974        unsafe {
975            crate::common::Reg::<self::P20Pfs_SPEC, crate::common::RW>::from_ptr(
976                self._svd2pac_as_ptr().add(0x90usize),
977            )
978        }
979    }
980    #[inline(always)]
981    pub const fn p205pfs(
982        &self,
983    ) -> &'static crate::common::Reg<self::P20Pfs_SPEC, crate::common::RW> {
984        unsafe {
985            crate::common::Reg::<self::P20Pfs_SPEC, crate::common::RW>::from_ptr(
986                self._svd2pac_as_ptr().add(0x94usize),
987            )
988        }
989    }
990    #[inline(always)]
991    pub const fn p206pfs(
992        &self,
993    ) -> &'static crate::common::Reg<self::P20Pfs_SPEC, crate::common::RW> {
994        unsafe {
995            crate::common::Reg::<self::P20Pfs_SPEC, crate::common::RW>::from_ptr(
996                self._svd2pac_as_ptr().add(0x98usize),
997            )
998        }
999    }
1000    #[inline(always)]
1001    pub const fn p207pfs(
1002        &self,
1003    ) -> &'static crate::common::Reg<self::P20Pfs_SPEC, crate::common::RW> {
1004        unsafe {
1005            crate::common::Reg::<self::P20Pfs_SPEC, crate::common::RW>::from_ptr(
1006                self._svd2pac_as_ptr().add(0x9cusize),
1007            )
1008        }
1009    }
1010    #[inline(always)]
1011    pub const fn p208pfs(
1012        &self,
1013    ) -> &'static crate::common::Reg<self::P20Pfs_SPEC, crate::common::RW> {
1014        unsafe {
1015            crate::common::Reg::<self::P20Pfs_SPEC, crate::common::RW>::from_ptr(
1016                self._svd2pac_as_ptr().add(0xa0usize),
1017            )
1018        }
1019    }
1020    #[inline(always)]
1021    pub const fn p209pfs(
1022        &self,
1023    ) -> &'static crate::common::Reg<self::P20Pfs_SPEC, crate::common::RW> {
1024        unsafe {
1025            crate::common::Reg::<self::P20Pfs_SPEC, crate::common::RW>::from_ptr(
1026                self._svd2pac_as_ptr().add(0xa4usize),
1027            )
1028        }
1029    }
1030
1031    #[doc = "P20%s Pin Function Control Register"]
1032    #[inline(always)]
1033    pub const fn p20pfs_ha(
1034        &self,
1035    ) -> &'static crate::common::ClusterRegisterArray<
1036        crate::common::Reg<self::P20PfsHa_SPEC, crate::common::RW>,
1037        8,
1038        0x4,
1039    > {
1040        unsafe {
1041            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x8ausize))
1042        }
1043    }
1044    #[inline(always)]
1045    pub const fn p202pfs_ha(
1046        &self,
1047    ) -> &'static crate::common::Reg<self::P20PfsHa_SPEC, crate::common::RW> {
1048        unsafe {
1049            crate::common::Reg::<self::P20PfsHa_SPEC, crate::common::RW>::from_ptr(
1050                self._svd2pac_as_ptr().add(0x8ausize),
1051            )
1052        }
1053    }
1054    #[inline(always)]
1055    pub const fn p203pfs_ha(
1056        &self,
1057    ) -> &'static crate::common::Reg<self::P20PfsHa_SPEC, crate::common::RW> {
1058        unsafe {
1059            crate::common::Reg::<self::P20PfsHa_SPEC, crate::common::RW>::from_ptr(
1060                self._svd2pac_as_ptr().add(0x8eusize),
1061            )
1062        }
1063    }
1064    #[inline(always)]
1065    pub const fn p204pfs_ha(
1066        &self,
1067    ) -> &'static crate::common::Reg<self::P20PfsHa_SPEC, crate::common::RW> {
1068        unsafe {
1069            crate::common::Reg::<self::P20PfsHa_SPEC, crate::common::RW>::from_ptr(
1070                self._svd2pac_as_ptr().add(0x92usize),
1071            )
1072        }
1073    }
1074    #[inline(always)]
1075    pub const fn p205pfs_ha(
1076        &self,
1077    ) -> &'static crate::common::Reg<self::P20PfsHa_SPEC, crate::common::RW> {
1078        unsafe {
1079            crate::common::Reg::<self::P20PfsHa_SPEC, crate::common::RW>::from_ptr(
1080                self._svd2pac_as_ptr().add(0x96usize),
1081            )
1082        }
1083    }
1084    #[inline(always)]
1085    pub const fn p206pfs_ha(
1086        &self,
1087    ) -> &'static crate::common::Reg<self::P20PfsHa_SPEC, crate::common::RW> {
1088        unsafe {
1089            crate::common::Reg::<self::P20PfsHa_SPEC, crate::common::RW>::from_ptr(
1090                self._svd2pac_as_ptr().add(0x9ausize),
1091            )
1092        }
1093    }
1094    #[inline(always)]
1095    pub const fn p207pfs_ha(
1096        &self,
1097    ) -> &'static crate::common::Reg<self::P20PfsHa_SPEC, crate::common::RW> {
1098        unsafe {
1099            crate::common::Reg::<self::P20PfsHa_SPEC, crate::common::RW>::from_ptr(
1100                self._svd2pac_as_ptr().add(0x9eusize),
1101            )
1102        }
1103    }
1104    #[inline(always)]
1105    pub const fn p208pfs_ha(
1106        &self,
1107    ) -> &'static crate::common::Reg<self::P20PfsHa_SPEC, crate::common::RW> {
1108        unsafe {
1109            crate::common::Reg::<self::P20PfsHa_SPEC, crate::common::RW>::from_ptr(
1110                self._svd2pac_as_ptr().add(0xa2usize),
1111            )
1112        }
1113    }
1114    #[inline(always)]
1115    pub const fn p209pfs_ha(
1116        &self,
1117    ) -> &'static crate::common::Reg<self::P20PfsHa_SPEC, crate::common::RW> {
1118        unsafe {
1119            crate::common::Reg::<self::P20PfsHa_SPEC, crate::common::RW>::from_ptr(
1120                self._svd2pac_as_ptr().add(0xa6usize),
1121            )
1122        }
1123    }
1124
1125    #[doc = "P20%s Pin Function Control Register"]
1126    #[inline(always)]
1127    pub const fn p20pfs_by(
1128        &self,
1129    ) -> &'static crate::common::ClusterRegisterArray<
1130        crate::common::Reg<self::P20PfsBy_SPEC, crate::common::RW>,
1131        8,
1132        0x4,
1133    > {
1134        unsafe {
1135            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x8busize))
1136        }
1137    }
1138    #[inline(always)]
1139    pub const fn p202pfs_by(
1140        &self,
1141    ) -> &'static crate::common::Reg<self::P20PfsBy_SPEC, crate::common::RW> {
1142        unsafe {
1143            crate::common::Reg::<self::P20PfsBy_SPEC, crate::common::RW>::from_ptr(
1144                self._svd2pac_as_ptr().add(0x8busize),
1145            )
1146        }
1147    }
1148    #[inline(always)]
1149    pub const fn p203pfs_by(
1150        &self,
1151    ) -> &'static crate::common::Reg<self::P20PfsBy_SPEC, crate::common::RW> {
1152        unsafe {
1153            crate::common::Reg::<self::P20PfsBy_SPEC, crate::common::RW>::from_ptr(
1154                self._svd2pac_as_ptr().add(0x8fusize),
1155            )
1156        }
1157    }
1158    #[inline(always)]
1159    pub const fn p204pfs_by(
1160        &self,
1161    ) -> &'static crate::common::Reg<self::P20PfsBy_SPEC, crate::common::RW> {
1162        unsafe {
1163            crate::common::Reg::<self::P20PfsBy_SPEC, crate::common::RW>::from_ptr(
1164                self._svd2pac_as_ptr().add(0x93usize),
1165            )
1166        }
1167    }
1168    #[inline(always)]
1169    pub const fn p205pfs_by(
1170        &self,
1171    ) -> &'static crate::common::Reg<self::P20PfsBy_SPEC, crate::common::RW> {
1172        unsafe {
1173            crate::common::Reg::<self::P20PfsBy_SPEC, crate::common::RW>::from_ptr(
1174                self._svd2pac_as_ptr().add(0x97usize),
1175            )
1176        }
1177    }
1178    #[inline(always)]
1179    pub const fn p206pfs_by(
1180        &self,
1181    ) -> &'static crate::common::Reg<self::P20PfsBy_SPEC, crate::common::RW> {
1182        unsafe {
1183            crate::common::Reg::<self::P20PfsBy_SPEC, crate::common::RW>::from_ptr(
1184                self._svd2pac_as_ptr().add(0x9busize),
1185            )
1186        }
1187    }
1188    #[inline(always)]
1189    pub const fn p207pfs_by(
1190        &self,
1191    ) -> &'static crate::common::Reg<self::P20PfsBy_SPEC, crate::common::RW> {
1192        unsafe {
1193            crate::common::Reg::<self::P20PfsBy_SPEC, crate::common::RW>::from_ptr(
1194                self._svd2pac_as_ptr().add(0x9fusize),
1195            )
1196        }
1197    }
1198    #[inline(always)]
1199    pub const fn p208pfs_by(
1200        &self,
1201    ) -> &'static crate::common::Reg<self::P20PfsBy_SPEC, crate::common::RW> {
1202        unsafe {
1203            crate::common::Reg::<self::P20PfsBy_SPEC, crate::common::RW>::from_ptr(
1204                self._svd2pac_as_ptr().add(0xa3usize),
1205            )
1206        }
1207    }
1208    #[inline(always)]
1209    pub const fn p209pfs_by(
1210        &self,
1211    ) -> &'static crate::common::Reg<self::P20PfsBy_SPEC, crate::common::RW> {
1212        unsafe {
1213            crate::common::Reg::<self::P20PfsBy_SPEC, crate::common::RW>::from_ptr(
1214                self._svd2pac_as_ptr().add(0xa7usize),
1215            )
1216        }
1217    }
1218
1219    #[doc = "P2%s Pin Function Control Register"]
1220    #[inline(always)]
1221    pub const fn p2pfs(
1222        &self,
1223    ) -> &'static crate::common::ClusterRegisterArray<
1224        crate::common::Reg<self::P2Pfs_SPEC, crate::common::RW>,
1225        5,
1226        0x4,
1227    > {
1228        unsafe {
1229            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xa8usize))
1230        }
1231    }
1232    #[inline(always)]
1233    pub const fn p210pfs(
1234        &self,
1235    ) -> &'static crate::common::Reg<self::P2Pfs_SPEC, crate::common::RW> {
1236        unsafe {
1237            crate::common::Reg::<self::P2Pfs_SPEC, crate::common::RW>::from_ptr(
1238                self._svd2pac_as_ptr().add(0xa8usize),
1239            )
1240        }
1241    }
1242    #[inline(always)]
1243    pub const fn p211pfs(
1244        &self,
1245    ) -> &'static crate::common::Reg<self::P2Pfs_SPEC, crate::common::RW> {
1246        unsafe {
1247            crate::common::Reg::<self::P2Pfs_SPEC, crate::common::RW>::from_ptr(
1248                self._svd2pac_as_ptr().add(0xacusize),
1249            )
1250        }
1251    }
1252    #[inline(always)]
1253    pub const fn p212pfs(
1254        &self,
1255    ) -> &'static crate::common::Reg<self::P2Pfs_SPEC, crate::common::RW> {
1256        unsafe {
1257            crate::common::Reg::<self::P2Pfs_SPEC, crate::common::RW>::from_ptr(
1258                self._svd2pac_as_ptr().add(0xb0usize),
1259            )
1260        }
1261    }
1262    #[inline(always)]
1263    pub const fn p213pfs(
1264        &self,
1265    ) -> &'static crate::common::Reg<self::P2Pfs_SPEC, crate::common::RW> {
1266        unsafe {
1267            crate::common::Reg::<self::P2Pfs_SPEC, crate::common::RW>::from_ptr(
1268                self._svd2pac_as_ptr().add(0xb4usize),
1269            )
1270        }
1271    }
1272    #[inline(always)]
1273    pub const fn p214pfs(
1274        &self,
1275    ) -> &'static crate::common::Reg<self::P2Pfs_SPEC, crate::common::RW> {
1276        unsafe {
1277            crate::common::Reg::<self::P2Pfs_SPEC, crate::common::RW>::from_ptr(
1278                self._svd2pac_as_ptr().add(0xb8usize),
1279            )
1280        }
1281    }
1282
1283    #[doc = "P2%s Pin Function Control Register"]
1284    #[inline(always)]
1285    pub const fn p2pfs_ha(
1286        &self,
1287    ) -> &'static crate::common::ClusterRegisterArray<
1288        crate::common::Reg<self::P2PfsHa_SPEC, crate::common::RW>,
1289        5,
1290        0x4,
1291    > {
1292        unsafe {
1293            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xaausize))
1294        }
1295    }
1296    #[inline(always)]
1297    pub const fn p210pfs_ha(
1298        &self,
1299    ) -> &'static crate::common::Reg<self::P2PfsHa_SPEC, crate::common::RW> {
1300        unsafe {
1301            crate::common::Reg::<self::P2PfsHa_SPEC, crate::common::RW>::from_ptr(
1302                self._svd2pac_as_ptr().add(0xaausize),
1303            )
1304        }
1305    }
1306    #[inline(always)]
1307    pub const fn p211pfs_ha(
1308        &self,
1309    ) -> &'static crate::common::Reg<self::P2PfsHa_SPEC, crate::common::RW> {
1310        unsafe {
1311            crate::common::Reg::<self::P2PfsHa_SPEC, crate::common::RW>::from_ptr(
1312                self._svd2pac_as_ptr().add(0xaeusize),
1313            )
1314        }
1315    }
1316    #[inline(always)]
1317    pub const fn p212pfs_ha(
1318        &self,
1319    ) -> &'static crate::common::Reg<self::P2PfsHa_SPEC, crate::common::RW> {
1320        unsafe {
1321            crate::common::Reg::<self::P2PfsHa_SPEC, crate::common::RW>::from_ptr(
1322                self._svd2pac_as_ptr().add(0xb2usize),
1323            )
1324        }
1325    }
1326    #[inline(always)]
1327    pub const fn p213pfs_ha(
1328        &self,
1329    ) -> &'static crate::common::Reg<self::P2PfsHa_SPEC, crate::common::RW> {
1330        unsafe {
1331            crate::common::Reg::<self::P2PfsHa_SPEC, crate::common::RW>::from_ptr(
1332                self._svd2pac_as_ptr().add(0xb6usize),
1333            )
1334        }
1335    }
1336    #[inline(always)]
1337    pub const fn p214pfs_ha(
1338        &self,
1339    ) -> &'static crate::common::Reg<self::P2PfsHa_SPEC, crate::common::RW> {
1340        unsafe {
1341            crate::common::Reg::<self::P2PfsHa_SPEC, crate::common::RW>::from_ptr(
1342                self._svd2pac_as_ptr().add(0xbausize),
1343            )
1344        }
1345    }
1346
1347    #[doc = "P2%s Pin Function Control Register"]
1348    #[inline(always)]
1349    pub const fn p2pfs_by(
1350        &self,
1351    ) -> &'static crate::common::ClusterRegisterArray<
1352        crate::common::Reg<self::P2PfsBy_SPEC, crate::common::RW>,
1353        5,
1354        0x4,
1355    > {
1356        unsafe {
1357            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xabusize))
1358        }
1359    }
1360    #[inline(always)]
1361    pub const fn p210pfs_by(
1362        &self,
1363    ) -> &'static crate::common::Reg<self::P2PfsBy_SPEC, crate::common::RW> {
1364        unsafe {
1365            crate::common::Reg::<self::P2PfsBy_SPEC, crate::common::RW>::from_ptr(
1366                self._svd2pac_as_ptr().add(0xabusize),
1367            )
1368        }
1369    }
1370    #[inline(always)]
1371    pub const fn p211pfs_by(
1372        &self,
1373    ) -> &'static crate::common::Reg<self::P2PfsBy_SPEC, crate::common::RW> {
1374        unsafe {
1375            crate::common::Reg::<self::P2PfsBy_SPEC, crate::common::RW>::from_ptr(
1376                self._svd2pac_as_ptr().add(0xafusize),
1377            )
1378        }
1379    }
1380    #[inline(always)]
1381    pub const fn p212pfs_by(
1382        &self,
1383    ) -> &'static crate::common::Reg<self::P2PfsBy_SPEC, crate::common::RW> {
1384        unsafe {
1385            crate::common::Reg::<self::P2PfsBy_SPEC, crate::common::RW>::from_ptr(
1386                self._svd2pac_as_ptr().add(0xb3usize),
1387            )
1388        }
1389    }
1390    #[inline(always)]
1391    pub const fn p213pfs_by(
1392        &self,
1393    ) -> &'static crate::common::Reg<self::P2PfsBy_SPEC, crate::common::RW> {
1394        unsafe {
1395            crate::common::Reg::<self::P2PfsBy_SPEC, crate::common::RW>::from_ptr(
1396                self._svd2pac_as_ptr().add(0xb7usize),
1397            )
1398        }
1399    }
1400    #[inline(always)]
1401    pub const fn p214pfs_by(
1402        &self,
1403    ) -> &'static crate::common::Reg<self::P2PfsBy_SPEC, crate::common::RW> {
1404        unsafe {
1405            crate::common::Reg::<self::P2PfsBy_SPEC, crate::common::RW>::from_ptr(
1406                self._svd2pac_as_ptr().add(0xbbusize),
1407            )
1408        }
1409    }
1410
1411    #[doc = "P300 Pin Function Control Register"]
1412    #[inline(always)]
1413    pub const fn p300pfs(
1414        &self,
1415    ) -> &'static crate::common::Reg<self::P300Pfs_SPEC, crate::common::RW> {
1416        unsafe {
1417            crate::common::Reg::<self::P300Pfs_SPEC, crate::common::RW>::from_ptr(
1418                self._svd2pac_as_ptr().add(192usize),
1419            )
1420        }
1421    }
1422
1423    #[doc = "P300 Pin Function Control Register"]
1424    #[inline(always)]
1425    pub const fn p300pfs_ha(
1426        &self,
1427    ) -> &'static crate::common::Reg<self::P300PfsHa_SPEC, crate::common::RW> {
1428        unsafe {
1429            crate::common::Reg::<self::P300PfsHa_SPEC, crate::common::RW>::from_ptr(
1430                self._svd2pac_as_ptr().add(194usize),
1431            )
1432        }
1433    }
1434
1435    #[doc = "P300 Pin Function Control Register"]
1436    #[inline(always)]
1437    pub const fn p300pfs_by(
1438        &self,
1439    ) -> &'static crate::common::Reg<self::P300PfsBy_SPEC, crate::common::RW> {
1440        unsafe {
1441            crate::common::Reg::<self::P300PfsBy_SPEC, crate::common::RW>::from_ptr(
1442                self._svd2pac_as_ptr().add(195usize),
1443            )
1444        }
1445    }
1446
1447    #[doc = "P30%s Pin Function Control Register"]
1448    #[inline(always)]
1449    pub const fn p30pfs(
1450        &self,
1451    ) -> &'static crate::common::ClusterRegisterArray<
1452        crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW>,
1453        9,
1454        0x4,
1455    > {
1456        unsafe {
1457            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xc4usize))
1458        }
1459    }
1460    #[inline(always)]
1461    pub const fn p301pfs(
1462        &self,
1463    ) -> &'static crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW> {
1464        unsafe {
1465            crate::common::Reg::<self::P30Pfs_SPEC, crate::common::RW>::from_ptr(
1466                self._svd2pac_as_ptr().add(0xc4usize),
1467            )
1468        }
1469    }
1470    #[inline(always)]
1471    pub const fn p302pfs(
1472        &self,
1473    ) -> &'static crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW> {
1474        unsafe {
1475            crate::common::Reg::<self::P30Pfs_SPEC, crate::common::RW>::from_ptr(
1476                self._svd2pac_as_ptr().add(0xc8usize),
1477            )
1478        }
1479    }
1480    #[inline(always)]
1481    pub const fn p303pfs(
1482        &self,
1483    ) -> &'static crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW> {
1484        unsafe {
1485            crate::common::Reg::<self::P30Pfs_SPEC, crate::common::RW>::from_ptr(
1486                self._svd2pac_as_ptr().add(0xccusize),
1487            )
1488        }
1489    }
1490    #[inline(always)]
1491    pub const fn p304pfs(
1492        &self,
1493    ) -> &'static crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW> {
1494        unsafe {
1495            crate::common::Reg::<self::P30Pfs_SPEC, crate::common::RW>::from_ptr(
1496                self._svd2pac_as_ptr().add(0xd0usize),
1497            )
1498        }
1499    }
1500    #[inline(always)]
1501    pub const fn p305pfs(
1502        &self,
1503    ) -> &'static crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW> {
1504        unsafe {
1505            crate::common::Reg::<self::P30Pfs_SPEC, crate::common::RW>::from_ptr(
1506                self._svd2pac_as_ptr().add(0xd4usize),
1507            )
1508        }
1509    }
1510    #[inline(always)]
1511    pub const fn p306pfs(
1512        &self,
1513    ) -> &'static crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW> {
1514        unsafe {
1515            crate::common::Reg::<self::P30Pfs_SPEC, crate::common::RW>::from_ptr(
1516                self._svd2pac_as_ptr().add(0xd8usize),
1517            )
1518        }
1519    }
1520    #[inline(always)]
1521    pub const fn p307pfs(
1522        &self,
1523    ) -> &'static crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW> {
1524        unsafe {
1525            crate::common::Reg::<self::P30Pfs_SPEC, crate::common::RW>::from_ptr(
1526                self._svd2pac_as_ptr().add(0xdcusize),
1527            )
1528        }
1529    }
1530    #[inline(always)]
1531    pub const fn p308pfs(
1532        &self,
1533    ) -> &'static crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW> {
1534        unsafe {
1535            crate::common::Reg::<self::P30Pfs_SPEC, crate::common::RW>::from_ptr(
1536                self._svd2pac_as_ptr().add(0xe0usize),
1537            )
1538        }
1539    }
1540    #[inline(always)]
1541    pub const fn p309pfs(
1542        &self,
1543    ) -> &'static crate::common::Reg<self::P30Pfs_SPEC, crate::common::RW> {
1544        unsafe {
1545            crate::common::Reg::<self::P30Pfs_SPEC, crate::common::RW>::from_ptr(
1546                self._svd2pac_as_ptr().add(0xe4usize),
1547            )
1548        }
1549    }
1550
1551    #[doc = "P30%s Pin Function Control Register"]
1552    #[inline(always)]
1553    pub const fn p30pfs_ha(
1554        &self,
1555    ) -> &'static crate::common::ClusterRegisterArray<
1556        crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW>,
1557        9,
1558        0x4,
1559    > {
1560        unsafe {
1561            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xc6usize))
1562        }
1563    }
1564    #[inline(always)]
1565    pub const fn p301pfs_ha(
1566        &self,
1567    ) -> &'static crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW> {
1568        unsafe {
1569            crate::common::Reg::<self::P30PfsHa_SPEC, crate::common::RW>::from_ptr(
1570                self._svd2pac_as_ptr().add(0xc6usize),
1571            )
1572        }
1573    }
1574    #[inline(always)]
1575    pub const fn p302pfs_ha(
1576        &self,
1577    ) -> &'static crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW> {
1578        unsafe {
1579            crate::common::Reg::<self::P30PfsHa_SPEC, crate::common::RW>::from_ptr(
1580                self._svd2pac_as_ptr().add(0xcausize),
1581            )
1582        }
1583    }
1584    #[inline(always)]
1585    pub const fn p303pfs_ha(
1586        &self,
1587    ) -> &'static crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW> {
1588        unsafe {
1589            crate::common::Reg::<self::P30PfsHa_SPEC, crate::common::RW>::from_ptr(
1590                self._svd2pac_as_ptr().add(0xceusize),
1591            )
1592        }
1593    }
1594    #[inline(always)]
1595    pub const fn p304pfs_ha(
1596        &self,
1597    ) -> &'static crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW> {
1598        unsafe {
1599            crate::common::Reg::<self::P30PfsHa_SPEC, crate::common::RW>::from_ptr(
1600                self._svd2pac_as_ptr().add(0xd2usize),
1601            )
1602        }
1603    }
1604    #[inline(always)]
1605    pub const fn p305pfs_ha(
1606        &self,
1607    ) -> &'static crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW> {
1608        unsafe {
1609            crate::common::Reg::<self::P30PfsHa_SPEC, crate::common::RW>::from_ptr(
1610                self._svd2pac_as_ptr().add(0xd6usize),
1611            )
1612        }
1613    }
1614    #[inline(always)]
1615    pub const fn p306pfs_ha(
1616        &self,
1617    ) -> &'static crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW> {
1618        unsafe {
1619            crate::common::Reg::<self::P30PfsHa_SPEC, crate::common::RW>::from_ptr(
1620                self._svd2pac_as_ptr().add(0xdausize),
1621            )
1622        }
1623    }
1624    #[inline(always)]
1625    pub const fn p307pfs_ha(
1626        &self,
1627    ) -> &'static crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW> {
1628        unsafe {
1629            crate::common::Reg::<self::P30PfsHa_SPEC, crate::common::RW>::from_ptr(
1630                self._svd2pac_as_ptr().add(0xdeusize),
1631            )
1632        }
1633    }
1634    #[inline(always)]
1635    pub const fn p308pfs_ha(
1636        &self,
1637    ) -> &'static crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW> {
1638        unsafe {
1639            crate::common::Reg::<self::P30PfsHa_SPEC, crate::common::RW>::from_ptr(
1640                self._svd2pac_as_ptr().add(0xe2usize),
1641            )
1642        }
1643    }
1644    #[inline(always)]
1645    pub const fn p309pfs_ha(
1646        &self,
1647    ) -> &'static crate::common::Reg<self::P30PfsHa_SPEC, crate::common::RW> {
1648        unsafe {
1649            crate::common::Reg::<self::P30PfsHa_SPEC, crate::common::RW>::from_ptr(
1650                self._svd2pac_as_ptr().add(0xe6usize),
1651            )
1652        }
1653    }
1654
1655    #[doc = "P30%s Pin Function Control Register"]
1656    #[inline(always)]
1657    pub const fn p30pfs_by(
1658        &self,
1659    ) -> &'static crate::common::ClusterRegisterArray<
1660        crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW>,
1661        9,
1662        0x4,
1663    > {
1664        unsafe {
1665            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xc7usize))
1666        }
1667    }
1668    #[inline(always)]
1669    pub const fn p301pfs_by(
1670        &self,
1671    ) -> &'static crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW> {
1672        unsafe {
1673            crate::common::Reg::<self::P30PfsBy_SPEC, crate::common::RW>::from_ptr(
1674                self._svd2pac_as_ptr().add(0xc7usize),
1675            )
1676        }
1677    }
1678    #[inline(always)]
1679    pub const fn p302pfs_by(
1680        &self,
1681    ) -> &'static crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW> {
1682        unsafe {
1683            crate::common::Reg::<self::P30PfsBy_SPEC, crate::common::RW>::from_ptr(
1684                self._svd2pac_as_ptr().add(0xcbusize),
1685            )
1686        }
1687    }
1688    #[inline(always)]
1689    pub const fn p303pfs_by(
1690        &self,
1691    ) -> &'static crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW> {
1692        unsafe {
1693            crate::common::Reg::<self::P30PfsBy_SPEC, crate::common::RW>::from_ptr(
1694                self._svd2pac_as_ptr().add(0xcfusize),
1695            )
1696        }
1697    }
1698    #[inline(always)]
1699    pub const fn p304pfs_by(
1700        &self,
1701    ) -> &'static crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW> {
1702        unsafe {
1703            crate::common::Reg::<self::P30PfsBy_SPEC, crate::common::RW>::from_ptr(
1704                self._svd2pac_as_ptr().add(0xd3usize),
1705            )
1706        }
1707    }
1708    #[inline(always)]
1709    pub const fn p305pfs_by(
1710        &self,
1711    ) -> &'static crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW> {
1712        unsafe {
1713            crate::common::Reg::<self::P30PfsBy_SPEC, crate::common::RW>::from_ptr(
1714                self._svd2pac_as_ptr().add(0xd7usize),
1715            )
1716        }
1717    }
1718    #[inline(always)]
1719    pub const fn p306pfs_by(
1720        &self,
1721    ) -> &'static crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW> {
1722        unsafe {
1723            crate::common::Reg::<self::P30PfsBy_SPEC, crate::common::RW>::from_ptr(
1724                self._svd2pac_as_ptr().add(0xdbusize),
1725            )
1726        }
1727    }
1728    #[inline(always)]
1729    pub const fn p307pfs_by(
1730        &self,
1731    ) -> &'static crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW> {
1732        unsafe {
1733            crate::common::Reg::<self::P30PfsBy_SPEC, crate::common::RW>::from_ptr(
1734                self._svd2pac_as_ptr().add(0xdfusize),
1735            )
1736        }
1737    }
1738    #[inline(always)]
1739    pub const fn p308pfs_by(
1740        &self,
1741    ) -> &'static crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW> {
1742        unsafe {
1743            crate::common::Reg::<self::P30PfsBy_SPEC, crate::common::RW>::from_ptr(
1744                self._svd2pac_as_ptr().add(0xe3usize),
1745            )
1746        }
1747    }
1748    #[inline(always)]
1749    pub const fn p309pfs_by(
1750        &self,
1751    ) -> &'static crate::common::Reg<self::P30PfsBy_SPEC, crate::common::RW> {
1752        unsafe {
1753            crate::common::Reg::<self::P30PfsBy_SPEC, crate::common::RW>::from_ptr(
1754                self._svd2pac_as_ptr().add(0xe7usize),
1755            )
1756        }
1757    }
1758
1759    #[doc = "P3%s Pin Function Control Register"]
1760    #[inline(always)]
1761    pub const fn p3pfs(
1762        &self,
1763    ) -> &'static crate::common::ClusterRegisterArray<
1764        crate::common::Reg<self::P3Pfs_SPEC, crate::common::RW>,
1765        6,
1766        0x4,
1767    > {
1768        unsafe {
1769            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xe8usize))
1770        }
1771    }
1772    #[inline(always)]
1773    pub const fn p310pfs(
1774        &self,
1775    ) -> &'static crate::common::Reg<self::P3Pfs_SPEC, crate::common::RW> {
1776        unsafe {
1777            crate::common::Reg::<self::P3Pfs_SPEC, crate::common::RW>::from_ptr(
1778                self._svd2pac_as_ptr().add(0xe8usize),
1779            )
1780        }
1781    }
1782    #[inline(always)]
1783    pub const fn p311pfs(
1784        &self,
1785    ) -> &'static crate::common::Reg<self::P3Pfs_SPEC, crate::common::RW> {
1786        unsafe {
1787            crate::common::Reg::<self::P3Pfs_SPEC, crate::common::RW>::from_ptr(
1788                self._svd2pac_as_ptr().add(0xecusize),
1789            )
1790        }
1791    }
1792    #[inline(always)]
1793    pub const fn p312pfs(
1794        &self,
1795    ) -> &'static crate::common::Reg<self::P3Pfs_SPEC, crate::common::RW> {
1796        unsafe {
1797            crate::common::Reg::<self::P3Pfs_SPEC, crate::common::RW>::from_ptr(
1798                self._svd2pac_as_ptr().add(0xf0usize),
1799            )
1800        }
1801    }
1802    #[inline(always)]
1803    pub const fn p313pfs(
1804        &self,
1805    ) -> &'static crate::common::Reg<self::P3Pfs_SPEC, crate::common::RW> {
1806        unsafe {
1807            crate::common::Reg::<self::P3Pfs_SPEC, crate::common::RW>::from_ptr(
1808                self._svd2pac_as_ptr().add(0xf4usize),
1809            )
1810        }
1811    }
1812    #[inline(always)]
1813    pub const fn p314pfs(
1814        &self,
1815    ) -> &'static crate::common::Reg<self::P3Pfs_SPEC, crate::common::RW> {
1816        unsafe {
1817            crate::common::Reg::<self::P3Pfs_SPEC, crate::common::RW>::from_ptr(
1818                self._svd2pac_as_ptr().add(0xf8usize),
1819            )
1820        }
1821    }
1822    #[inline(always)]
1823    pub const fn p315pfs(
1824        &self,
1825    ) -> &'static crate::common::Reg<self::P3Pfs_SPEC, crate::common::RW> {
1826        unsafe {
1827            crate::common::Reg::<self::P3Pfs_SPEC, crate::common::RW>::from_ptr(
1828                self._svd2pac_as_ptr().add(0xfcusize),
1829            )
1830        }
1831    }
1832
1833    #[doc = "P30%s Pin Function Control Register"]
1834    #[inline(always)]
1835    pub const fn p3pfs_ha(
1836        &self,
1837    ) -> &'static crate::common::ClusterRegisterArray<
1838        crate::common::Reg<self::P3PfsHa_SPEC, crate::common::RW>,
1839        6,
1840        0x4,
1841    > {
1842        unsafe {
1843            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xeausize))
1844        }
1845    }
1846    #[inline(always)]
1847    pub const fn p310pfs_ha(
1848        &self,
1849    ) -> &'static crate::common::Reg<self::P3PfsHa_SPEC, crate::common::RW> {
1850        unsafe {
1851            crate::common::Reg::<self::P3PfsHa_SPEC, crate::common::RW>::from_ptr(
1852                self._svd2pac_as_ptr().add(0xeausize),
1853            )
1854        }
1855    }
1856    #[inline(always)]
1857    pub const fn p311pfs_ha(
1858        &self,
1859    ) -> &'static crate::common::Reg<self::P3PfsHa_SPEC, crate::common::RW> {
1860        unsafe {
1861            crate::common::Reg::<self::P3PfsHa_SPEC, crate::common::RW>::from_ptr(
1862                self._svd2pac_as_ptr().add(0xeeusize),
1863            )
1864        }
1865    }
1866    #[inline(always)]
1867    pub const fn p312pfs_ha(
1868        &self,
1869    ) -> &'static crate::common::Reg<self::P3PfsHa_SPEC, crate::common::RW> {
1870        unsafe {
1871            crate::common::Reg::<self::P3PfsHa_SPEC, crate::common::RW>::from_ptr(
1872                self._svd2pac_as_ptr().add(0xf2usize),
1873            )
1874        }
1875    }
1876    #[inline(always)]
1877    pub const fn p313pfs_ha(
1878        &self,
1879    ) -> &'static crate::common::Reg<self::P3PfsHa_SPEC, crate::common::RW> {
1880        unsafe {
1881            crate::common::Reg::<self::P3PfsHa_SPEC, crate::common::RW>::from_ptr(
1882                self._svd2pac_as_ptr().add(0xf6usize),
1883            )
1884        }
1885    }
1886    #[inline(always)]
1887    pub const fn p314pfs_ha(
1888        &self,
1889    ) -> &'static crate::common::Reg<self::P3PfsHa_SPEC, crate::common::RW> {
1890        unsafe {
1891            crate::common::Reg::<self::P3PfsHa_SPEC, crate::common::RW>::from_ptr(
1892                self._svd2pac_as_ptr().add(0xfausize),
1893            )
1894        }
1895    }
1896    #[inline(always)]
1897    pub const fn p315pfs_ha(
1898        &self,
1899    ) -> &'static crate::common::Reg<self::P3PfsHa_SPEC, crate::common::RW> {
1900        unsafe {
1901            crate::common::Reg::<self::P3PfsHa_SPEC, crate::common::RW>::from_ptr(
1902                self._svd2pac_as_ptr().add(0xfeusize),
1903            )
1904        }
1905    }
1906
1907    #[doc = "P30%s Pin Function Control Register"]
1908    #[inline(always)]
1909    pub const fn p3pfs_by(
1910        &self,
1911    ) -> &'static crate::common::ClusterRegisterArray<
1912        crate::common::Reg<self::P3PfsBy_SPEC, crate::common::RW>,
1913        6,
1914        0x4,
1915    > {
1916        unsafe {
1917            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xebusize))
1918        }
1919    }
1920    #[inline(always)]
1921    pub const fn p310pfs_by(
1922        &self,
1923    ) -> &'static crate::common::Reg<self::P3PfsBy_SPEC, crate::common::RW> {
1924        unsafe {
1925            crate::common::Reg::<self::P3PfsBy_SPEC, crate::common::RW>::from_ptr(
1926                self._svd2pac_as_ptr().add(0xebusize),
1927            )
1928        }
1929    }
1930    #[inline(always)]
1931    pub const fn p311pfs_by(
1932        &self,
1933    ) -> &'static crate::common::Reg<self::P3PfsBy_SPEC, crate::common::RW> {
1934        unsafe {
1935            crate::common::Reg::<self::P3PfsBy_SPEC, crate::common::RW>::from_ptr(
1936                self._svd2pac_as_ptr().add(0xefusize),
1937            )
1938        }
1939    }
1940    #[inline(always)]
1941    pub const fn p312pfs_by(
1942        &self,
1943    ) -> &'static crate::common::Reg<self::P3PfsBy_SPEC, crate::common::RW> {
1944        unsafe {
1945            crate::common::Reg::<self::P3PfsBy_SPEC, crate::common::RW>::from_ptr(
1946                self._svd2pac_as_ptr().add(0xf3usize),
1947            )
1948        }
1949    }
1950    #[inline(always)]
1951    pub const fn p313pfs_by(
1952        &self,
1953    ) -> &'static crate::common::Reg<self::P3PfsBy_SPEC, crate::common::RW> {
1954        unsafe {
1955            crate::common::Reg::<self::P3PfsBy_SPEC, crate::common::RW>::from_ptr(
1956                self._svd2pac_as_ptr().add(0xf7usize),
1957            )
1958        }
1959    }
1960    #[inline(always)]
1961    pub const fn p314pfs_by(
1962        &self,
1963    ) -> &'static crate::common::Reg<self::P3PfsBy_SPEC, crate::common::RW> {
1964        unsafe {
1965            crate::common::Reg::<self::P3PfsBy_SPEC, crate::common::RW>::from_ptr(
1966                self._svd2pac_as_ptr().add(0xfbusize),
1967            )
1968        }
1969    }
1970    #[inline(always)]
1971    pub const fn p315pfs_by(
1972        &self,
1973    ) -> &'static crate::common::Reg<self::P3PfsBy_SPEC, crate::common::RW> {
1974        unsafe {
1975            crate::common::Reg::<self::P3PfsBy_SPEC, crate::common::RW>::from_ptr(
1976                self._svd2pac_as_ptr().add(0xffusize),
1977            )
1978        }
1979    }
1980
1981    #[doc = "P40%s Pin Function Control Register"]
1982    #[inline(always)]
1983    pub const fn p40pfs(
1984        &self,
1985    ) -> &'static crate::common::ClusterRegisterArray<
1986        crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW>,
1987        10,
1988        0x4,
1989    > {
1990        unsafe {
1991            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x100usize))
1992        }
1993    }
1994    #[inline(always)]
1995    pub const fn p400pfs(
1996        &self,
1997    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
1998        unsafe {
1999            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2000                self._svd2pac_as_ptr().add(0x100usize),
2001            )
2002        }
2003    }
2004    #[inline(always)]
2005    pub const fn p401pfs(
2006        &self,
2007    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
2008        unsafe {
2009            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2010                self._svd2pac_as_ptr().add(0x104usize),
2011            )
2012        }
2013    }
2014    #[inline(always)]
2015    pub const fn p402pfs(
2016        &self,
2017    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
2018        unsafe {
2019            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2020                self._svd2pac_as_ptr().add(0x108usize),
2021            )
2022        }
2023    }
2024    #[inline(always)]
2025    pub const fn p403pfs(
2026        &self,
2027    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
2028        unsafe {
2029            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2030                self._svd2pac_as_ptr().add(0x10cusize),
2031            )
2032        }
2033    }
2034    #[inline(always)]
2035    pub const fn p404pfs(
2036        &self,
2037    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
2038        unsafe {
2039            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2040                self._svd2pac_as_ptr().add(0x110usize),
2041            )
2042        }
2043    }
2044    #[inline(always)]
2045    pub const fn p405pfs(
2046        &self,
2047    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
2048        unsafe {
2049            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2050                self._svd2pac_as_ptr().add(0x114usize),
2051            )
2052        }
2053    }
2054    #[inline(always)]
2055    pub const fn p406pfs(
2056        &self,
2057    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
2058        unsafe {
2059            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2060                self._svd2pac_as_ptr().add(0x118usize),
2061            )
2062        }
2063    }
2064    #[inline(always)]
2065    pub const fn p407pfs(
2066        &self,
2067    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
2068        unsafe {
2069            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2070                self._svd2pac_as_ptr().add(0x11cusize),
2071            )
2072        }
2073    }
2074    #[inline(always)]
2075    pub const fn p408pfs(
2076        &self,
2077    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
2078        unsafe {
2079            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2080                self._svd2pac_as_ptr().add(0x120usize),
2081            )
2082        }
2083    }
2084    #[inline(always)]
2085    pub const fn p409pfs(
2086        &self,
2087    ) -> &'static crate::common::Reg<self::P40Pfs_SPEC, crate::common::RW> {
2088        unsafe {
2089            crate::common::Reg::<self::P40Pfs_SPEC, crate::common::RW>::from_ptr(
2090                self._svd2pac_as_ptr().add(0x124usize),
2091            )
2092        }
2093    }
2094
2095    #[doc = "P40%s Pin Function Control Register"]
2096    #[inline(always)]
2097    pub const fn p40pfs_ha(
2098        &self,
2099    ) -> &'static crate::common::ClusterRegisterArray<
2100        crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW>,
2101        10,
2102        0x4,
2103    > {
2104        unsafe {
2105            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x102usize))
2106        }
2107    }
2108    #[inline(always)]
2109    pub const fn p400pfs_ha(
2110        &self,
2111    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2112        unsafe {
2113            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2114                self._svd2pac_as_ptr().add(0x102usize),
2115            )
2116        }
2117    }
2118    #[inline(always)]
2119    pub const fn p401pfs_ha(
2120        &self,
2121    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2122        unsafe {
2123            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2124                self._svd2pac_as_ptr().add(0x106usize),
2125            )
2126        }
2127    }
2128    #[inline(always)]
2129    pub const fn p402pfs_ha(
2130        &self,
2131    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2132        unsafe {
2133            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2134                self._svd2pac_as_ptr().add(0x10ausize),
2135            )
2136        }
2137    }
2138    #[inline(always)]
2139    pub const fn p403pfs_ha(
2140        &self,
2141    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2142        unsafe {
2143            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2144                self._svd2pac_as_ptr().add(0x10eusize),
2145            )
2146        }
2147    }
2148    #[inline(always)]
2149    pub const fn p404pfs_ha(
2150        &self,
2151    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2152        unsafe {
2153            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2154                self._svd2pac_as_ptr().add(0x112usize),
2155            )
2156        }
2157    }
2158    #[inline(always)]
2159    pub const fn p405pfs_ha(
2160        &self,
2161    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2162        unsafe {
2163            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2164                self._svd2pac_as_ptr().add(0x116usize),
2165            )
2166        }
2167    }
2168    #[inline(always)]
2169    pub const fn p406pfs_ha(
2170        &self,
2171    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2172        unsafe {
2173            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2174                self._svd2pac_as_ptr().add(0x11ausize),
2175            )
2176        }
2177    }
2178    #[inline(always)]
2179    pub const fn p407pfs_ha(
2180        &self,
2181    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2182        unsafe {
2183            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2184                self._svd2pac_as_ptr().add(0x11eusize),
2185            )
2186        }
2187    }
2188    #[inline(always)]
2189    pub const fn p408pfs_ha(
2190        &self,
2191    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2192        unsafe {
2193            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2194                self._svd2pac_as_ptr().add(0x122usize),
2195            )
2196        }
2197    }
2198    #[inline(always)]
2199    pub const fn p409pfs_ha(
2200        &self,
2201    ) -> &'static crate::common::Reg<self::P40PfsHa_SPEC, crate::common::RW> {
2202        unsafe {
2203            crate::common::Reg::<self::P40PfsHa_SPEC, crate::common::RW>::from_ptr(
2204                self._svd2pac_as_ptr().add(0x126usize),
2205            )
2206        }
2207    }
2208
2209    #[doc = "P40%s Pin Function Control Register"]
2210    #[inline(always)]
2211    pub const fn p40pfs_by(
2212        &self,
2213    ) -> &'static crate::common::ClusterRegisterArray<
2214        crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW>,
2215        10,
2216        0x4,
2217    > {
2218        unsafe {
2219            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x103usize))
2220        }
2221    }
2222    #[inline(always)]
2223    pub const fn p400pfs_by(
2224        &self,
2225    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2226        unsafe {
2227            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2228                self._svd2pac_as_ptr().add(0x103usize),
2229            )
2230        }
2231    }
2232    #[inline(always)]
2233    pub const fn p401pfs_by(
2234        &self,
2235    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2236        unsafe {
2237            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2238                self._svd2pac_as_ptr().add(0x107usize),
2239            )
2240        }
2241    }
2242    #[inline(always)]
2243    pub const fn p402pfs_by(
2244        &self,
2245    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2246        unsafe {
2247            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2248                self._svd2pac_as_ptr().add(0x10busize),
2249            )
2250        }
2251    }
2252    #[inline(always)]
2253    pub const fn p403pfs_by(
2254        &self,
2255    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2256        unsafe {
2257            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2258                self._svd2pac_as_ptr().add(0x10fusize),
2259            )
2260        }
2261    }
2262    #[inline(always)]
2263    pub const fn p404pfs_by(
2264        &self,
2265    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2266        unsafe {
2267            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2268                self._svd2pac_as_ptr().add(0x113usize),
2269            )
2270        }
2271    }
2272    #[inline(always)]
2273    pub const fn p405pfs_by(
2274        &self,
2275    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2276        unsafe {
2277            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2278                self._svd2pac_as_ptr().add(0x117usize),
2279            )
2280        }
2281    }
2282    #[inline(always)]
2283    pub const fn p406pfs_by(
2284        &self,
2285    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2286        unsafe {
2287            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2288                self._svd2pac_as_ptr().add(0x11busize),
2289            )
2290        }
2291    }
2292    #[inline(always)]
2293    pub const fn p407pfs_by(
2294        &self,
2295    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2296        unsafe {
2297            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2298                self._svd2pac_as_ptr().add(0x11fusize),
2299            )
2300        }
2301    }
2302    #[inline(always)]
2303    pub const fn p408pfs_by(
2304        &self,
2305    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2306        unsafe {
2307            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2308                self._svd2pac_as_ptr().add(0x123usize),
2309            )
2310        }
2311    }
2312    #[inline(always)]
2313    pub const fn p409pfs_by(
2314        &self,
2315    ) -> &'static crate::common::Reg<self::P40PfsBy_SPEC, crate::common::RW> {
2316        unsafe {
2317            crate::common::Reg::<self::P40PfsBy_SPEC, crate::common::RW>::from_ptr(
2318                self._svd2pac_as_ptr().add(0x127usize),
2319            )
2320        }
2321    }
2322
2323    #[doc = "P4%s Pin Function Control Register"]
2324    #[inline(always)]
2325    pub const fn p4pfs(
2326        &self,
2327    ) -> &'static crate::common::ClusterRegisterArray<
2328        crate::common::Reg<self::P4Pfs_SPEC, crate::common::RW>,
2329        6,
2330        0x4,
2331    > {
2332        unsafe {
2333            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x128usize))
2334        }
2335    }
2336    #[inline(always)]
2337    pub const fn p410pfs(
2338        &self,
2339    ) -> &'static crate::common::Reg<self::P4Pfs_SPEC, crate::common::RW> {
2340        unsafe {
2341            crate::common::Reg::<self::P4Pfs_SPEC, crate::common::RW>::from_ptr(
2342                self._svd2pac_as_ptr().add(0x128usize),
2343            )
2344        }
2345    }
2346    #[inline(always)]
2347    pub const fn p411pfs(
2348        &self,
2349    ) -> &'static crate::common::Reg<self::P4Pfs_SPEC, crate::common::RW> {
2350        unsafe {
2351            crate::common::Reg::<self::P4Pfs_SPEC, crate::common::RW>::from_ptr(
2352                self._svd2pac_as_ptr().add(0x12cusize),
2353            )
2354        }
2355    }
2356    #[inline(always)]
2357    pub const fn p412pfs(
2358        &self,
2359    ) -> &'static crate::common::Reg<self::P4Pfs_SPEC, crate::common::RW> {
2360        unsafe {
2361            crate::common::Reg::<self::P4Pfs_SPEC, crate::common::RW>::from_ptr(
2362                self._svd2pac_as_ptr().add(0x130usize),
2363            )
2364        }
2365    }
2366    #[inline(always)]
2367    pub const fn p413pfs(
2368        &self,
2369    ) -> &'static crate::common::Reg<self::P4Pfs_SPEC, crate::common::RW> {
2370        unsafe {
2371            crate::common::Reg::<self::P4Pfs_SPEC, crate::common::RW>::from_ptr(
2372                self._svd2pac_as_ptr().add(0x134usize),
2373            )
2374        }
2375    }
2376    #[inline(always)]
2377    pub const fn p414pfs(
2378        &self,
2379    ) -> &'static crate::common::Reg<self::P4Pfs_SPEC, crate::common::RW> {
2380        unsafe {
2381            crate::common::Reg::<self::P4Pfs_SPEC, crate::common::RW>::from_ptr(
2382                self._svd2pac_as_ptr().add(0x138usize),
2383            )
2384        }
2385    }
2386    #[inline(always)]
2387    pub const fn p415pfs(
2388        &self,
2389    ) -> &'static crate::common::Reg<self::P4Pfs_SPEC, crate::common::RW> {
2390        unsafe {
2391            crate::common::Reg::<self::P4Pfs_SPEC, crate::common::RW>::from_ptr(
2392                self._svd2pac_as_ptr().add(0x13cusize),
2393            )
2394        }
2395    }
2396
2397    #[doc = "P4%s Pin Function Control Register"]
2398    #[inline(always)]
2399    pub const fn p4pfs_ha(
2400        &self,
2401    ) -> &'static crate::common::ClusterRegisterArray<
2402        crate::common::Reg<self::P4PfsHa_SPEC, crate::common::RW>,
2403        6,
2404        0x4,
2405    > {
2406        unsafe {
2407            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x12ausize))
2408        }
2409    }
2410    #[inline(always)]
2411    pub const fn p410pfs_ha(
2412        &self,
2413    ) -> &'static crate::common::Reg<self::P4PfsHa_SPEC, crate::common::RW> {
2414        unsafe {
2415            crate::common::Reg::<self::P4PfsHa_SPEC, crate::common::RW>::from_ptr(
2416                self._svd2pac_as_ptr().add(0x12ausize),
2417            )
2418        }
2419    }
2420    #[inline(always)]
2421    pub const fn p411pfs_ha(
2422        &self,
2423    ) -> &'static crate::common::Reg<self::P4PfsHa_SPEC, crate::common::RW> {
2424        unsafe {
2425            crate::common::Reg::<self::P4PfsHa_SPEC, crate::common::RW>::from_ptr(
2426                self._svd2pac_as_ptr().add(0x12eusize),
2427            )
2428        }
2429    }
2430    #[inline(always)]
2431    pub const fn p412pfs_ha(
2432        &self,
2433    ) -> &'static crate::common::Reg<self::P4PfsHa_SPEC, crate::common::RW> {
2434        unsafe {
2435            crate::common::Reg::<self::P4PfsHa_SPEC, crate::common::RW>::from_ptr(
2436                self._svd2pac_as_ptr().add(0x132usize),
2437            )
2438        }
2439    }
2440    #[inline(always)]
2441    pub const fn p413pfs_ha(
2442        &self,
2443    ) -> &'static crate::common::Reg<self::P4PfsHa_SPEC, crate::common::RW> {
2444        unsafe {
2445            crate::common::Reg::<self::P4PfsHa_SPEC, crate::common::RW>::from_ptr(
2446                self._svd2pac_as_ptr().add(0x136usize),
2447            )
2448        }
2449    }
2450    #[inline(always)]
2451    pub const fn p414pfs_ha(
2452        &self,
2453    ) -> &'static crate::common::Reg<self::P4PfsHa_SPEC, crate::common::RW> {
2454        unsafe {
2455            crate::common::Reg::<self::P4PfsHa_SPEC, crate::common::RW>::from_ptr(
2456                self._svd2pac_as_ptr().add(0x13ausize),
2457            )
2458        }
2459    }
2460    #[inline(always)]
2461    pub const fn p415pfs_ha(
2462        &self,
2463    ) -> &'static crate::common::Reg<self::P4PfsHa_SPEC, crate::common::RW> {
2464        unsafe {
2465            crate::common::Reg::<self::P4PfsHa_SPEC, crate::common::RW>::from_ptr(
2466                self._svd2pac_as_ptr().add(0x13eusize),
2467            )
2468        }
2469    }
2470
2471    #[doc = "P4%s Pin Function Control Register"]
2472    #[inline(always)]
2473    pub const fn p4pfs_by(
2474        &self,
2475    ) -> &'static crate::common::ClusterRegisterArray<
2476        crate::common::Reg<self::P4PfsBy_SPEC, crate::common::RW>,
2477        6,
2478        0x4,
2479    > {
2480        unsafe {
2481            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x12busize))
2482        }
2483    }
2484    #[inline(always)]
2485    pub const fn p410pfs_by(
2486        &self,
2487    ) -> &'static crate::common::Reg<self::P4PfsBy_SPEC, crate::common::RW> {
2488        unsafe {
2489            crate::common::Reg::<self::P4PfsBy_SPEC, crate::common::RW>::from_ptr(
2490                self._svd2pac_as_ptr().add(0x12busize),
2491            )
2492        }
2493    }
2494    #[inline(always)]
2495    pub const fn p411pfs_by(
2496        &self,
2497    ) -> &'static crate::common::Reg<self::P4PfsBy_SPEC, crate::common::RW> {
2498        unsafe {
2499            crate::common::Reg::<self::P4PfsBy_SPEC, crate::common::RW>::from_ptr(
2500                self._svd2pac_as_ptr().add(0x12fusize),
2501            )
2502        }
2503    }
2504    #[inline(always)]
2505    pub const fn p412pfs_by(
2506        &self,
2507    ) -> &'static crate::common::Reg<self::P4PfsBy_SPEC, crate::common::RW> {
2508        unsafe {
2509            crate::common::Reg::<self::P4PfsBy_SPEC, crate::common::RW>::from_ptr(
2510                self._svd2pac_as_ptr().add(0x133usize),
2511            )
2512        }
2513    }
2514    #[inline(always)]
2515    pub const fn p413pfs_by(
2516        &self,
2517    ) -> &'static crate::common::Reg<self::P4PfsBy_SPEC, crate::common::RW> {
2518        unsafe {
2519            crate::common::Reg::<self::P4PfsBy_SPEC, crate::common::RW>::from_ptr(
2520                self._svd2pac_as_ptr().add(0x137usize),
2521            )
2522        }
2523    }
2524    #[inline(always)]
2525    pub const fn p414pfs_by(
2526        &self,
2527    ) -> &'static crate::common::Reg<self::P4PfsBy_SPEC, crate::common::RW> {
2528        unsafe {
2529            crate::common::Reg::<self::P4PfsBy_SPEC, crate::common::RW>::from_ptr(
2530                self._svd2pac_as_ptr().add(0x13busize),
2531            )
2532        }
2533    }
2534    #[inline(always)]
2535    pub const fn p415pfs_by(
2536        &self,
2537    ) -> &'static crate::common::Reg<self::P4PfsBy_SPEC, crate::common::RW> {
2538        unsafe {
2539            crate::common::Reg::<self::P4PfsBy_SPEC, crate::common::RW>::from_ptr(
2540                self._svd2pac_as_ptr().add(0x13fusize),
2541            )
2542        }
2543    }
2544
2545    #[doc = "P50%s Pin Function Control Register"]
2546    #[inline(always)]
2547    pub const fn p50pfs(
2548        &self,
2549    ) -> &'static crate::common::ClusterRegisterArray<
2550        crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW>,
2551        9,
2552        0x4,
2553    > {
2554        unsafe {
2555            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x140usize))
2556        }
2557    }
2558    #[inline(always)]
2559    pub const fn p500pfs(
2560        &self,
2561    ) -> &'static crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW> {
2562        unsafe {
2563            crate::common::Reg::<self::P50Pfs_SPEC, crate::common::RW>::from_ptr(
2564                self._svd2pac_as_ptr().add(0x140usize),
2565            )
2566        }
2567    }
2568    #[inline(always)]
2569    pub const fn p501pfs(
2570        &self,
2571    ) -> &'static crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW> {
2572        unsafe {
2573            crate::common::Reg::<self::P50Pfs_SPEC, crate::common::RW>::from_ptr(
2574                self._svd2pac_as_ptr().add(0x144usize),
2575            )
2576        }
2577    }
2578    #[inline(always)]
2579    pub const fn p502pfs(
2580        &self,
2581    ) -> &'static crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW> {
2582        unsafe {
2583            crate::common::Reg::<self::P50Pfs_SPEC, crate::common::RW>::from_ptr(
2584                self._svd2pac_as_ptr().add(0x148usize),
2585            )
2586        }
2587    }
2588    #[inline(always)]
2589    pub const fn p503pfs(
2590        &self,
2591    ) -> &'static crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW> {
2592        unsafe {
2593            crate::common::Reg::<self::P50Pfs_SPEC, crate::common::RW>::from_ptr(
2594                self._svd2pac_as_ptr().add(0x14cusize),
2595            )
2596        }
2597    }
2598    #[inline(always)]
2599    pub const fn p504pfs(
2600        &self,
2601    ) -> &'static crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW> {
2602        unsafe {
2603            crate::common::Reg::<self::P50Pfs_SPEC, crate::common::RW>::from_ptr(
2604                self._svd2pac_as_ptr().add(0x150usize),
2605            )
2606        }
2607    }
2608    #[inline(always)]
2609    pub const fn p505pfs(
2610        &self,
2611    ) -> &'static crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW> {
2612        unsafe {
2613            crate::common::Reg::<self::P50Pfs_SPEC, crate::common::RW>::from_ptr(
2614                self._svd2pac_as_ptr().add(0x154usize),
2615            )
2616        }
2617    }
2618    #[inline(always)]
2619    pub const fn p506pfs(
2620        &self,
2621    ) -> &'static crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW> {
2622        unsafe {
2623            crate::common::Reg::<self::P50Pfs_SPEC, crate::common::RW>::from_ptr(
2624                self._svd2pac_as_ptr().add(0x158usize),
2625            )
2626        }
2627    }
2628    #[inline(always)]
2629    pub const fn p507pfs(
2630        &self,
2631    ) -> &'static crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW> {
2632        unsafe {
2633            crate::common::Reg::<self::P50Pfs_SPEC, crate::common::RW>::from_ptr(
2634                self._svd2pac_as_ptr().add(0x15cusize),
2635            )
2636        }
2637    }
2638    #[inline(always)]
2639    pub const fn p508pfs(
2640        &self,
2641    ) -> &'static crate::common::Reg<self::P50Pfs_SPEC, crate::common::RW> {
2642        unsafe {
2643            crate::common::Reg::<self::P50Pfs_SPEC, crate::common::RW>::from_ptr(
2644                self._svd2pac_as_ptr().add(0x160usize),
2645            )
2646        }
2647    }
2648
2649    #[doc = "P50%s Pin Function Control Register"]
2650    #[inline(always)]
2651    pub const fn p50pfs_ha(
2652        &self,
2653    ) -> &'static crate::common::ClusterRegisterArray<
2654        crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW>,
2655        9,
2656        0x4,
2657    > {
2658        unsafe {
2659            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x142usize))
2660        }
2661    }
2662    #[inline(always)]
2663    pub const fn p500pfs_ha(
2664        &self,
2665    ) -> &'static crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW> {
2666        unsafe {
2667            crate::common::Reg::<self::P50PfsHa_SPEC, crate::common::RW>::from_ptr(
2668                self._svd2pac_as_ptr().add(0x142usize),
2669            )
2670        }
2671    }
2672    #[inline(always)]
2673    pub const fn p501pfs_ha(
2674        &self,
2675    ) -> &'static crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW> {
2676        unsafe {
2677            crate::common::Reg::<self::P50PfsHa_SPEC, crate::common::RW>::from_ptr(
2678                self._svd2pac_as_ptr().add(0x146usize),
2679            )
2680        }
2681    }
2682    #[inline(always)]
2683    pub const fn p502pfs_ha(
2684        &self,
2685    ) -> &'static crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW> {
2686        unsafe {
2687            crate::common::Reg::<self::P50PfsHa_SPEC, crate::common::RW>::from_ptr(
2688                self._svd2pac_as_ptr().add(0x14ausize),
2689            )
2690        }
2691    }
2692    #[inline(always)]
2693    pub const fn p503pfs_ha(
2694        &self,
2695    ) -> &'static crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW> {
2696        unsafe {
2697            crate::common::Reg::<self::P50PfsHa_SPEC, crate::common::RW>::from_ptr(
2698                self._svd2pac_as_ptr().add(0x14eusize),
2699            )
2700        }
2701    }
2702    #[inline(always)]
2703    pub const fn p504pfs_ha(
2704        &self,
2705    ) -> &'static crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW> {
2706        unsafe {
2707            crate::common::Reg::<self::P50PfsHa_SPEC, crate::common::RW>::from_ptr(
2708                self._svd2pac_as_ptr().add(0x152usize),
2709            )
2710        }
2711    }
2712    #[inline(always)]
2713    pub const fn p505pfs_ha(
2714        &self,
2715    ) -> &'static crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW> {
2716        unsafe {
2717            crate::common::Reg::<self::P50PfsHa_SPEC, crate::common::RW>::from_ptr(
2718                self._svd2pac_as_ptr().add(0x156usize),
2719            )
2720        }
2721    }
2722    #[inline(always)]
2723    pub const fn p506pfs_ha(
2724        &self,
2725    ) -> &'static crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW> {
2726        unsafe {
2727            crate::common::Reg::<self::P50PfsHa_SPEC, crate::common::RW>::from_ptr(
2728                self._svd2pac_as_ptr().add(0x15ausize),
2729            )
2730        }
2731    }
2732    #[inline(always)]
2733    pub const fn p507pfs_ha(
2734        &self,
2735    ) -> &'static crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW> {
2736        unsafe {
2737            crate::common::Reg::<self::P50PfsHa_SPEC, crate::common::RW>::from_ptr(
2738                self._svd2pac_as_ptr().add(0x15eusize),
2739            )
2740        }
2741    }
2742    #[inline(always)]
2743    pub const fn p508pfs_ha(
2744        &self,
2745    ) -> &'static crate::common::Reg<self::P50PfsHa_SPEC, crate::common::RW> {
2746        unsafe {
2747            crate::common::Reg::<self::P50PfsHa_SPEC, crate::common::RW>::from_ptr(
2748                self._svd2pac_as_ptr().add(0x162usize),
2749            )
2750        }
2751    }
2752
2753    #[doc = "P50%s Pin Function Control Register"]
2754    #[inline(always)]
2755    pub const fn p50pfs_by(
2756        &self,
2757    ) -> &'static crate::common::ClusterRegisterArray<
2758        crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW>,
2759        9,
2760        0x4,
2761    > {
2762        unsafe {
2763            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x143usize))
2764        }
2765    }
2766    #[inline(always)]
2767    pub const fn p500pfs_by(
2768        &self,
2769    ) -> &'static crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW> {
2770        unsafe {
2771            crate::common::Reg::<self::P50PfsBy_SPEC, crate::common::RW>::from_ptr(
2772                self._svd2pac_as_ptr().add(0x143usize),
2773            )
2774        }
2775    }
2776    #[inline(always)]
2777    pub const fn p501pfs_by(
2778        &self,
2779    ) -> &'static crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW> {
2780        unsafe {
2781            crate::common::Reg::<self::P50PfsBy_SPEC, crate::common::RW>::from_ptr(
2782                self._svd2pac_as_ptr().add(0x147usize),
2783            )
2784        }
2785    }
2786    #[inline(always)]
2787    pub const fn p502pfs_by(
2788        &self,
2789    ) -> &'static crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW> {
2790        unsafe {
2791            crate::common::Reg::<self::P50PfsBy_SPEC, crate::common::RW>::from_ptr(
2792                self._svd2pac_as_ptr().add(0x14busize),
2793            )
2794        }
2795    }
2796    #[inline(always)]
2797    pub const fn p503pfs_by(
2798        &self,
2799    ) -> &'static crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW> {
2800        unsafe {
2801            crate::common::Reg::<self::P50PfsBy_SPEC, crate::common::RW>::from_ptr(
2802                self._svd2pac_as_ptr().add(0x14fusize),
2803            )
2804        }
2805    }
2806    #[inline(always)]
2807    pub const fn p504pfs_by(
2808        &self,
2809    ) -> &'static crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW> {
2810        unsafe {
2811            crate::common::Reg::<self::P50PfsBy_SPEC, crate::common::RW>::from_ptr(
2812                self._svd2pac_as_ptr().add(0x153usize),
2813            )
2814        }
2815    }
2816    #[inline(always)]
2817    pub const fn p505pfs_by(
2818        &self,
2819    ) -> &'static crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW> {
2820        unsafe {
2821            crate::common::Reg::<self::P50PfsBy_SPEC, crate::common::RW>::from_ptr(
2822                self._svd2pac_as_ptr().add(0x157usize),
2823            )
2824        }
2825    }
2826    #[inline(always)]
2827    pub const fn p506pfs_by(
2828        &self,
2829    ) -> &'static crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW> {
2830        unsafe {
2831            crate::common::Reg::<self::P50PfsBy_SPEC, crate::common::RW>::from_ptr(
2832                self._svd2pac_as_ptr().add(0x15busize),
2833            )
2834        }
2835    }
2836    #[inline(always)]
2837    pub const fn p507pfs_by(
2838        &self,
2839    ) -> &'static crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW> {
2840        unsafe {
2841            crate::common::Reg::<self::P50PfsBy_SPEC, crate::common::RW>::from_ptr(
2842                self._svd2pac_as_ptr().add(0x15fusize),
2843            )
2844        }
2845    }
2846    #[inline(always)]
2847    pub const fn p508pfs_by(
2848        &self,
2849    ) -> &'static crate::common::Reg<self::P50PfsBy_SPEC, crate::common::RW> {
2850        unsafe {
2851            crate::common::Reg::<self::P50PfsBy_SPEC, crate::common::RW>::from_ptr(
2852                self._svd2pac_as_ptr().add(0x163usize),
2853            )
2854        }
2855    }
2856
2857    #[doc = "P5%s Pin Function Control Register"]
2858    #[inline(always)]
2859    pub const fn p5pfs(
2860        &self,
2861    ) -> &'static crate::common::ClusterRegisterArray<
2862        crate::common::Reg<self::P5Pfs_SPEC, crate::common::RW>,
2863        5,
2864        0x4,
2865    > {
2866        unsafe {
2867            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x16cusize))
2868        }
2869    }
2870    #[inline(always)]
2871    pub const fn p511pfs(
2872        &self,
2873    ) -> &'static crate::common::Reg<self::P5Pfs_SPEC, crate::common::RW> {
2874        unsafe {
2875            crate::common::Reg::<self::P5Pfs_SPEC, crate::common::RW>::from_ptr(
2876                self._svd2pac_as_ptr().add(0x16cusize),
2877            )
2878        }
2879    }
2880    #[inline(always)]
2881    pub const fn p512pfs(
2882        &self,
2883    ) -> &'static crate::common::Reg<self::P5Pfs_SPEC, crate::common::RW> {
2884        unsafe {
2885            crate::common::Reg::<self::P5Pfs_SPEC, crate::common::RW>::from_ptr(
2886                self._svd2pac_as_ptr().add(0x170usize),
2887            )
2888        }
2889    }
2890    #[inline(always)]
2891    pub const fn p513pfs(
2892        &self,
2893    ) -> &'static crate::common::Reg<self::P5Pfs_SPEC, crate::common::RW> {
2894        unsafe {
2895            crate::common::Reg::<self::P5Pfs_SPEC, crate::common::RW>::from_ptr(
2896                self._svd2pac_as_ptr().add(0x174usize),
2897            )
2898        }
2899    }
2900    #[inline(always)]
2901    pub const fn p514pfs(
2902        &self,
2903    ) -> &'static crate::common::Reg<self::P5Pfs_SPEC, crate::common::RW> {
2904        unsafe {
2905            crate::common::Reg::<self::P5Pfs_SPEC, crate::common::RW>::from_ptr(
2906                self._svd2pac_as_ptr().add(0x178usize),
2907            )
2908        }
2909    }
2910    #[inline(always)]
2911    pub const fn p515pfs(
2912        &self,
2913    ) -> &'static crate::common::Reg<self::P5Pfs_SPEC, crate::common::RW> {
2914        unsafe {
2915            crate::common::Reg::<self::P5Pfs_SPEC, crate::common::RW>::from_ptr(
2916                self._svd2pac_as_ptr().add(0x17cusize),
2917            )
2918        }
2919    }
2920
2921    #[doc = "P5%s Pin Function Control Register"]
2922    #[inline(always)]
2923    pub const fn p5pfs_ha(
2924        &self,
2925    ) -> &'static crate::common::ClusterRegisterArray<
2926        crate::common::Reg<self::P5PfsHa_SPEC, crate::common::RW>,
2927        5,
2928        0x4,
2929    > {
2930        unsafe {
2931            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x16eusize))
2932        }
2933    }
2934    #[inline(always)]
2935    pub const fn p511pfs_ha(
2936        &self,
2937    ) -> &'static crate::common::Reg<self::P5PfsHa_SPEC, crate::common::RW> {
2938        unsafe {
2939            crate::common::Reg::<self::P5PfsHa_SPEC, crate::common::RW>::from_ptr(
2940                self._svd2pac_as_ptr().add(0x16eusize),
2941            )
2942        }
2943    }
2944    #[inline(always)]
2945    pub const fn p512pfs_ha(
2946        &self,
2947    ) -> &'static crate::common::Reg<self::P5PfsHa_SPEC, crate::common::RW> {
2948        unsafe {
2949            crate::common::Reg::<self::P5PfsHa_SPEC, crate::common::RW>::from_ptr(
2950                self._svd2pac_as_ptr().add(0x172usize),
2951            )
2952        }
2953    }
2954    #[inline(always)]
2955    pub const fn p513pfs_ha(
2956        &self,
2957    ) -> &'static crate::common::Reg<self::P5PfsHa_SPEC, crate::common::RW> {
2958        unsafe {
2959            crate::common::Reg::<self::P5PfsHa_SPEC, crate::common::RW>::from_ptr(
2960                self._svd2pac_as_ptr().add(0x176usize),
2961            )
2962        }
2963    }
2964    #[inline(always)]
2965    pub const fn p514pfs_ha(
2966        &self,
2967    ) -> &'static crate::common::Reg<self::P5PfsHa_SPEC, crate::common::RW> {
2968        unsafe {
2969            crate::common::Reg::<self::P5PfsHa_SPEC, crate::common::RW>::from_ptr(
2970                self._svd2pac_as_ptr().add(0x17ausize),
2971            )
2972        }
2973    }
2974    #[inline(always)]
2975    pub const fn p515pfs_ha(
2976        &self,
2977    ) -> &'static crate::common::Reg<self::P5PfsHa_SPEC, crate::common::RW> {
2978        unsafe {
2979            crate::common::Reg::<self::P5PfsHa_SPEC, crate::common::RW>::from_ptr(
2980                self._svd2pac_as_ptr().add(0x17eusize),
2981            )
2982        }
2983    }
2984
2985    #[doc = "P5%s Pin Function Control Register"]
2986    #[inline(always)]
2987    pub const fn p5pfs_by(
2988        &self,
2989    ) -> &'static crate::common::ClusterRegisterArray<
2990        crate::common::Reg<self::P5PfsBy_SPEC, crate::common::RW>,
2991        5,
2992        0x4,
2993    > {
2994        unsafe {
2995            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x16fusize))
2996        }
2997    }
2998    #[inline(always)]
2999    pub const fn p511pfs_by(
3000        &self,
3001    ) -> &'static crate::common::Reg<self::P5PfsBy_SPEC, crate::common::RW> {
3002        unsafe {
3003            crate::common::Reg::<self::P5PfsBy_SPEC, crate::common::RW>::from_ptr(
3004                self._svd2pac_as_ptr().add(0x16fusize),
3005            )
3006        }
3007    }
3008    #[inline(always)]
3009    pub const fn p512pfs_by(
3010        &self,
3011    ) -> &'static crate::common::Reg<self::P5PfsBy_SPEC, crate::common::RW> {
3012        unsafe {
3013            crate::common::Reg::<self::P5PfsBy_SPEC, crate::common::RW>::from_ptr(
3014                self._svd2pac_as_ptr().add(0x173usize),
3015            )
3016        }
3017    }
3018    #[inline(always)]
3019    pub const fn p513pfs_by(
3020        &self,
3021    ) -> &'static crate::common::Reg<self::P5PfsBy_SPEC, crate::common::RW> {
3022        unsafe {
3023            crate::common::Reg::<self::P5PfsBy_SPEC, crate::common::RW>::from_ptr(
3024                self._svd2pac_as_ptr().add(0x177usize),
3025            )
3026        }
3027    }
3028    #[inline(always)]
3029    pub const fn p514pfs_by(
3030        &self,
3031    ) -> &'static crate::common::Reg<self::P5PfsBy_SPEC, crate::common::RW> {
3032        unsafe {
3033            crate::common::Reg::<self::P5PfsBy_SPEC, crate::common::RW>::from_ptr(
3034                self._svd2pac_as_ptr().add(0x17busize),
3035            )
3036        }
3037    }
3038    #[inline(always)]
3039    pub const fn p515pfs_by(
3040        &self,
3041    ) -> &'static crate::common::Reg<self::P5PfsBy_SPEC, crate::common::RW> {
3042        unsafe {
3043            crate::common::Reg::<self::P5PfsBy_SPEC, crate::common::RW>::from_ptr(
3044                self._svd2pac_as_ptr().add(0x17fusize),
3045            )
3046        }
3047    }
3048
3049    #[doc = "P60%s Pin Function Control Register"]
3050    #[inline(always)]
3051    pub const fn p60pfs(
3052        &self,
3053    ) -> &'static crate::common::ClusterRegisterArray<
3054        crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW>,
3055        10,
3056        0x4,
3057    > {
3058        unsafe {
3059            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x180usize))
3060        }
3061    }
3062    #[inline(always)]
3063    pub const fn p600pfs(
3064        &self,
3065    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3066        unsafe {
3067            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3068                self._svd2pac_as_ptr().add(0x180usize),
3069            )
3070        }
3071    }
3072    #[inline(always)]
3073    pub const fn p601pfs(
3074        &self,
3075    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3076        unsafe {
3077            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3078                self._svd2pac_as_ptr().add(0x184usize),
3079            )
3080        }
3081    }
3082    #[inline(always)]
3083    pub const fn p602pfs(
3084        &self,
3085    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3086        unsafe {
3087            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3088                self._svd2pac_as_ptr().add(0x188usize),
3089            )
3090        }
3091    }
3092    #[inline(always)]
3093    pub const fn p603pfs(
3094        &self,
3095    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3096        unsafe {
3097            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3098                self._svd2pac_as_ptr().add(0x18cusize),
3099            )
3100        }
3101    }
3102    #[inline(always)]
3103    pub const fn p604pfs(
3104        &self,
3105    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3106        unsafe {
3107            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3108                self._svd2pac_as_ptr().add(0x190usize),
3109            )
3110        }
3111    }
3112    #[inline(always)]
3113    pub const fn p605pfs(
3114        &self,
3115    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3116        unsafe {
3117            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3118                self._svd2pac_as_ptr().add(0x194usize),
3119            )
3120        }
3121    }
3122    #[inline(always)]
3123    pub const fn p606pfs(
3124        &self,
3125    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3126        unsafe {
3127            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3128                self._svd2pac_as_ptr().add(0x198usize),
3129            )
3130        }
3131    }
3132    #[inline(always)]
3133    pub const fn p607pfs(
3134        &self,
3135    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3136        unsafe {
3137            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3138                self._svd2pac_as_ptr().add(0x19cusize),
3139            )
3140        }
3141    }
3142    #[inline(always)]
3143    pub const fn p608pfs(
3144        &self,
3145    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3146        unsafe {
3147            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3148                self._svd2pac_as_ptr().add(0x1a0usize),
3149            )
3150        }
3151    }
3152    #[inline(always)]
3153    pub const fn p609pfs(
3154        &self,
3155    ) -> &'static crate::common::Reg<self::P60Pfs_SPEC, crate::common::RW> {
3156        unsafe {
3157            crate::common::Reg::<self::P60Pfs_SPEC, crate::common::RW>::from_ptr(
3158                self._svd2pac_as_ptr().add(0x1a4usize),
3159            )
3160        }
3161    }
3162
3163    #[doc = "P60%s Pin Function Control Register"]
3164    #[inline(always)]
3165    pub const fn p60pfs_ha(
3166        &self,
3167    ) -> &'static crate::common::ClusterRegisterArray<
3168        crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW>,
3169        10,
3170        0x4,
3171    > {
3172        unsafe {
3173            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x182usize))
3174        }
3175    }
3176    #[inline(always)]
3177    pub const fn p600pfs_ha(
3178        &self,
3179    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3180        unsafe {
3181            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3182                self._svd2pac_as_ptr().add(0x182usize),
3183            )
3184        }
3185    }
3186    #[inline(always)]
3187    pub const fn p601pfs_ha(
3188        &self,
3189    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3190        unsafe {
3191            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3192                self._svd2pac_as_ptr().add(0x186usize),
3193            )
3194        }
3195    }
3196    #[inline(always)]
3197    pub const fn p602pfs_ha(
3198        &self,
3199    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3200        unsafe {
3201            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3202                self._svd2pac_as_ptr().add(0x18ausize),
3203            )
3204        }
3205    }
3206    #[inline(always)]
3207    pub const fn p603pfs_ha(
3208        &self,
3209    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3210        unsafe {
3211            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3212                self._svd2pac_as_ptr().add(0x18eusize),
3213            )
3214        }
3215    }
3216    #[inline(always)]
3217    pub const fn p604pfs_ha(
3218        &self,
3219    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3220        unsafe {
3221            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3222                self._svd2pac_as_ptr().add(0x192usize),
3223            )
3224        }
3225    }
3226    #[inline(always)]
3227    pub const fn p605pfs_ha(
3228        &self,
3229    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3230        unsafe {
3231            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3232                self._svd2pac_as_ptr().add(0x196usize),
3233            )
3234        }
3235    }
3236    #[inline(always)]
3237    pub const fn p606pfs_ha(
3238        &self,
3239    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3240        unsafe {
3241            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3242                self._svd2pac_as_ptr().add(0x19ausize),
3243            )
3244        }
3245    }
3246    #[inline(always)]
3247    pub const fn p607pfs_ha(
3248        &self,
3249    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3250        unsafe {
3251            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3252                self._svd2pac_as_ptr().add(0x19eusize),
3253            )
3254        }
3255    }
3256    #[inline(always)]
3257    pub const fn p608pfs_ha(
3258        &self,
3259    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3260        unsafe {
3261            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3262                self._svd2pac_as_ptr().add(0x1a2usize),
3263            )
3264        }
3265    }
3266    #[inline(always)]
3267    pub const fn p609pfs_ha(
3268        &self,
3269    ) -> &'static crate::common::Reg<self::P60PfsHa_SPEC, crate::common::RW> {
3270        unsafe {
3271            crate::common::Reg::<self::P60PfsHa_SPEC, crate::common::RW>::from_ptr(
3272                self._svd2pac_as_ptr().add(0x1a6usize),
3273            )
3274        }
3275    }
3276
3277    #[doc = "P60%s Pin Function Control Register"]
3278    #[inline(always)]
3279    pub const fn p60pfs_by(
3280        &self,
3281    ) -> &'static crate::common::ClusterRegisterArray<
3282        crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW>,
3283        10,
3284        0x4,
3285    > {
3286        unsafe {
3287            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x183usize))
3288        }
3289    }
3290    #[inline(always)]
3291    pub const fn p600pfs_by(
3292        &self,
3293    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3294        unsafe {
3295            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3296                self._svd2pac_as_ptr().add(0x183usize),
3297            )
3298        }
3299    }
3300    #[inline(always)]
3301    pub const fn p601pfs_by(
3302        &self,
3303    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3304        unsafe {
3305            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3306                self._svd2pac_as_ptr().add(0x187usize),
3307            )
3308        }
3309    }
3310    #[inline(always)]
3311    pub const fn p602pfs_by(
3312        &self,
3313    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3314        unsafe {
3315            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3316                self._svd2pac_as_ptr().add(0x18busize),
3317            )
3318        }
3319    }
3320    #[inline(always)]
3321    pub const fn p603pfs_by(
3322        &self,
3323    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3324        unsafe {
3325            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3326                self._svd2pac_as_ptr().add(0x18fusize),
3327            )
3328        }
3329    }
3330    #[inline(always)]
3331    pub const fn p604pfs_by(
3332        &self,
3333    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3334        unsafe {
3335            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3336                self._svd2pac_as_ptr().add(0x193usize),
3337            )
3338        }
3339    }
3340    #[inline(always)]
3341    pub const fn p605pfs_by(
3342        &self,
3343    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3344        unsafe {
3345            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3346                self._svd2pac_as_ptr().add(0x197usize),
3347            )
3348        }
3349    }
3350    #[inline(always)]
3351    pub const fn p606pfs_by(
3352        &self,
3353    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3354        unsafe {
3355            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3356                self._svd2pac_as_ptr().add(0x19busize),
3357            )
3358        }
3359    }
3360    #[inline(always)]
3361    pub const fn p607pfs_by(
3362        &self,
3363    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3364        unsafe {
3365            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3366                self._svd2pac_as_ptr().add(0x19fusize),
3367            )
3368        }
3369    }
3370    #[inline(always)]
3371    pub const fn p608pfs_by(
3372        &self,
3373    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3374        unsafe {
3375            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3376                self._svd2pac_as_ptr().add(0x1a3usize),
3377            )
3378        }
3379    }
3380    #[inline(always)]
3381    pub const fn p609pfs_by(
3382        &self,
3383    ) -> &'static crate::common::Reg<self::P60PfsBy_SPEC, crate::common::RW> {
3384        unsafe {
3385            crate::common::Reg::<self::P60PfsBy_SPEC, crate::common::RW>::from_ptr(
3386                self._svd2pac_as_ptr().add(0x1a7usize),
3387            )
3388        }
3389    }
3390
3391    #[doc = "P6%s Pin Function Control Register"]
3392    #[inline(always)]
3393    pub const fn p6pfs(
3394        &self,
3395    ) -> &'static crate::common::ClusterRegisterArray<
3396        crate::common::Reg<self::P6Pfs_SPEC, crate::common::RW>,
3397        6,
3398        0x4,
3399    > {
3400        unsafe {
3401            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a8usize))
3402        }
3403    }
3404    #[inline(always)]
3405    pub const fn p610pfs(
3406        &self,
3407    ) -> &'static crate::common::Reg<self::P6Pfs_SPEC, crate::common::RW> {
3408        unsafe {
3409            crate::common::Reg::<self::P6Pfs_SPEC, crate::common::RW>::from_ptr(
3410                self._svd2pac_as_ptr().add(0x1a8usize),
3411            )
3412        }
3413    }
3414    #[inline(always)]
3415    pub const fn p611pfs(
3416        &self,
3417    ) -> &'static crate::common::Reg<self::P6Pfs_SPEC, crate::common::RW> {
3418        unsafe {
3419            crate::common::Reg::<self::P6Pfs_SPEC, crate::common::RW>::from_ptr(
3420                self._svd2pac_as_ptr().add(0x1acusize),
3421            )
3422        }
3423    }
3424    #[inline(always)]
3425    pub const fn p612pfs(
3426        &self,
3427    ) -> &'static crate::common::Reg<self::P6Pfs_SPEC, crate::common::RW> {
3428        unsafe {
3429            crate::common::Reg::<self::P6Pfs_SPEC, crate::common::RW>::from_ptr(
3430                self._svd2pac_as_ptr().add(0x1b0usize),
3431            )
3432        }
3433    }
3434    #[inline(always)]
3435    pub const fn p613pfs(
3436        &self,
3437    ) -> &'static crate::common::Reg<self::P6Pfs_SPEC, crate::common::RW> {
3438        unsafe {
3439            crate::common::Reg::<self::P6Pfs_SPEC, crate::common::RW>::from_ptr(
3440                self._svd2pac_as_ptr().add(0x1b4usize),
3441            )
3442        }
3443    }
3444    #[inline(always)]
3445    pub const fn p614pfs(
3446        &self,
3447    ) -> &'static crate::common::Reg<self::P6Pfs_SPEC, crate::common::RW> {
3448        unsafe {
3449            crate::common::Reg::<self::P6Pfs_SPEC, crate::common::RW>::from_ptr(
3450                self._svd2pac_as_ptr().add(0x1b8usize),
3451            )
3452        }
3453    }
3454    #[inline(always)]
3455    pub const fn p615pfs(
3456        &self,
3457    ) -> &'static crate::common::Reg<self::P6Pfs_SPEC, crate::common::RW> {
3458        unsafe {
3459            crate::common::Reg::<self::P6Pfs_SPEC, crate::common::RW>::from_ptr(
3460                self._svd2pac_as_ptr().add(0x1bcusize),
3461            )
3462        }
3463    }
3464
3465    #[doc = "P6%s Pin Function Control Register"]
3466    #[inline(always)]
3467    pub const fn p6pfs_ha(
3468        &self,
3469    ) -> &'static crate::common::ClusterRegisterArray<
3470        crate::common::Reg<self::P6PfsHa_SPEC, crate::common::RW>,
3471        6,
3472        0x4,
3473    > {
3474        unsafe {
3475            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1aausize))
3476        }
3477    }
3478    #[inline(always)]
3479    pub const fn p610pfs_ha(
3480        &self,
3481    ) -> &'static crate::common::Reg<self::P6PfsHa_SPEC, crate::common::RW> {
3482        unsafe {
3483            crate::common::Reg::<self::P6PfsHa_SPEC, crate::common::RW>::from_ptr(
3484                self._svd2pac_as_ptr().add(0x1aausize),
3485            )
3486        }
3487    }
3488    #[inline(always)]
3489    pub const fn p611pfs_ha(
3490        &self,
3491    ) -> &'static crate::common::Reg<self::P6PfsHa_SPEC, crate::common::RW> {
3492        unsafe {
3493            crate::common::Reg::<self::P6PfsHa_SPEC, crate::common::RW>::from_ptr(
3494                self._svd2pac_as_ptr().add(0x1aeusize),
3495            )
3496        }
3497    }
3498    #[inline(always)]
3499    pub const fn p612pfs_ha(
3500        &self,
3501    ) -> &'static crate::common::Reg<self::P6PfsHa_SPEC, crate::common::RW> {
3502        unsafe {
3503            crate::common::Reg::<self::P6PfsHa_SPEC, crate::common::RW>::from_ptr(
3504                self._svd2pac_as_ptr().add(0x1b2usize),
3505            )
3506        }
3507    }
3508    #[inline(always)]
3509    pub const fn p613pfs_ha(
3510        &self,
3511    ) -> &'static crate::common::Reg<self::P6PfsHa_SPEC, crate::common::RW> {
3512        unsafe {
3513            crate::common::Reg::<self::P6PfsHa_SPEC, crate::common::RW>::from_ptr(
3514                self._svd2pac_as_ptr().add(0x1b6usize),
3515            )
3516        }
3517    }
3518    #[inline(always)]
3519    pub const fn p614pfs_ha(
3520        &self,
3521    ) -> &'static crate::common::Reg<self::P6PfsHa_SPEC, crate::common::RW> {
3522        unsafe {
3523            crate::common::Reg::<self::P6PfsHa_SPEC, crate::common::RW>::from_ptr(
3524                self._svd2pac_as_ptr().add(0x1bausize),
3525            )
3526        }
3527    }
3528    #[inline(always)]
3529    pub const fn p615pfs_ha(
3530        &self,
3531    ) -> &'static crate::common::Reg<self::P6PfsHa_SPEC, crate::common::RW> {
3532        unsafe {
3533            crate::common::Reg::<self::P6PfsHa_SPEC, crate::common::RW>::from_ptr(
3534                self._svd2pac_as_ptr().add(0x1beusize),
3535            )
3536        }
3537    }
3538
3539    #[doc = "P6%s Pin Function Control Register"]
3540    #[inline(always)]
3541    pub const fn p6pfs_by(
3542        &self,
3543    ) -> &'static crate::common::ClusterRegisterArray<
3544        crate::common::Reg<self::P6PfsBy_SPEC, crate::common::RW>,
3545        6,
3546        0x4,
3547    > {
3548        unsafe {
3549            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1abusize))
3550        }
3551    }
3552    #[inline(always)]
3553    pub const fn p610pfs_by(
3554        &self,
3555    ) -> &'static crate::common::Reg<self::P6PfsBy_SPEC, crate::common::RW> {
3556        unsafe {
3557            crate::common::Reg::<self::P6PfsBy_SPEC, crate::common::RW>::from_ptr(
3558                self._svd2pac_as_ptr().add(0x1abusize),
3559            )
3560        }
3561    }
3562    #[inline(always)]
3563    pub const fn p611pfs_by(
3564        &self,
3565    ) -> &'static crate::common::Reg<self::P6PfsBy_SPEC, crate::common::RW> {
3566        unsafe {
3567            crate::common::Reg::<self::P6PfsBy_SPEC, crate::common::RW>::from_ptr(
3568                self._svd2pac_as_ptr().add(0x1afusize),
3569            )
3570        }
3571    }
3572    #[inline(always)]
3573    pub const fn p612pfs_by(
3574        &self,
3575    ) -> &'static crate::common::Reg<self::P6PfsBy_SPEC, crate::common::RW> {
3576        unsafe {
3577            crate::common::Reg::<self::P6PfsBy_SPEC, crate::common::RW>::from_ptr(
3578                self._svd2pac_as_ptr().add(0x1b3usize),
3579            )
3580        }
3581    }
3582    #[inline(always)]
3583    pub const fn p613pfs_by(
3584        &self,
3585    ) -> &'static crate::common::Reg<self::P6PfsBy_SPEC, crate::common::RW> {
3586        unsafe {
3587            crate::common::Reg::<self::P6PfsBy_SPEC, crate::common::RW>::from_ptr(
3588                self._svd2pac_as_ptr().add(0x1b7usize),
3589            )
3590        }
3591    }
3592    #[inline(always)]
3593    pub const fn p614pfs_by(
3594        &self,
3595    ) -> &'static crate::common::Reg<self::P6PfsBy_SPEC, crate::common::RW> {
3596        unsafe {
3597            crate::common::Reg::<self::P6PfsBy_SPEC, crate::common::RW>::from_ptr(
3598                self._svd2pac_as_ptr().add(0x1bbusize),
3599            )
3600        }
3601    }
3602    #[inline(always)]
3603    pub const fn p615pfs_by(
3604        &self,
3605    ) -> &'static crate::common::Reg<self::P6PfsBy_SPEC, crate::common::RW> {
3606        unsafe {
3607            crate::common::Reg::<self::P6PfsBy_SPEC, crate::common::RW>::from_ptr(
3608                self._svd2pac_as_ptr().add(0x1bfusize),
3609            )
3610        }
3611    }
3612
3613    #[doc = "P70%s Pin Function Control Register"]
3614    #[inline(always)]
3615    pub const fn p70pfs(
3616        &self,
3617    ) -> &'static crate::common::ClusterRegisterArray<
3618        crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW>,
3619        9,
3620        0x4,
3621    > {
3622        unsafe {
3623            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1c0usize))
3624        }
3625    }
3626    #[inline(always)]
3627    pub const fn p700pfs(
3628        &self,
3629    ) -> &'static crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW> {
3630        unsafe {
3631            crate::common::Reg::<self::P70Pfs_SPEC, crate::common::RW>::from_ptr(
3632                self._svd2pac_as_ptr().add(0x1c0usize),
3633            )
3634        }
3635    }
3636    #[inline(always)]
3637    pub const fn p701pfs(
3638        &self,
3639    ) -> &'static crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW> {
3640        unsafe {
3641            crate::common::Reg::<self::P70Pfs_SPEC, crate::common::RW>::from_ptr(
3642                self._svd2pac_as_ptr().add(0x1c4usize),
3643            )
3644        }
3645    }
3646    #[inline(always)]
3647    pub const fn p702pfs(
3648        &self,
3649    ) -> &'static crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW> {
3650        unsafe {
3651            crate::common::Reg::<self::P70Pfs_SPEC, crate::common::RW>::from_ptr(
3652                self._svd2pac_as_ptr().add(0x1c8usize),
3653            )
3654        }
3655    }
3656    #[inline(always)]
3657    pub const fn p703pfs(
3658        &self,
3659    ) -> &'static crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW> {
3660        unsafe {
3661            crate::common::Reg::<self::P70Pfs_SPEC, crate::common::RW>::from_ptr(
3662                self._svd2pac_as_ptr().add(0x1ccusize),
3663            )
3664        }
3665    }
3666    #[inline(always)]
3667    pub const fn p704pfs(
3668        &self,
3669    ) -> &'static crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW> {
3670        unsafe {
3671            crate::common::Reg::<self::P70Pfs_SPEC, crate::common::RW>::from_ptr(
3672                self._svd2pac_as_ptr().add(0x1d0usize),
3673            )
3674        }
3675    }
3676    #[inline(always)]
3677    pub const fn p705pfs(
3678        &self,
3679    ) -> &'static crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW> {
3680        unsafe {
3681            crate::common::Reg::<self::P70Pfs_SPEC, crate::common::RW>::from_ptr(
3682                self._svd2pac_as_ptr().add(0x1d4usize),
3683            )
3684        }
3685    }
3686    #[inline(always)]
3687    pub const fn p706pfs(
3688        &self,
3689    ) -> &'static crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW> {
3690        unsafe {
3691            crate::common::Reg::<self::P70Pfs_SPEC, crate::common::RW>::from_ptr(
3692                self._svd2pac_as_ptr().add(0x1d8usize),
3693            )
3694        }
3695    }
3696    #[inline(always)]
3697    pub const fn p707pfs(
3698        &self,
3699    ) -> &'static crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW> {
3700        unsafe {
3701            crate::common::Reg::<self::P70Pfs_SPEC, crate::common::RW>::from_ptr(
3702                self._svd2pac_as_ptr().add(0x1dcusize),
3703            )
3704        }
3705    }
3706    #[inline(always)]
3707    pub const fn p708pfs(
3708        &self,
3709    ) -> &'static crate::common::Reg<self::P70Pfs_SPEC, crate::common::RW> {
3710        unsafe {
3711            crate::common::Reg::<self::P70Pfs_SPEC, crate::common::RW>::from_ptr(
3712                self._svd2pac_as_ptr().add(0x1e0usize),
3713            )
3714        }
3715    }
3716
3717    #[doc = "P70%s Pin Function Control Register"]
3718    #[inline(always)]
3719    pub const fn p70pfs_ha(
3720        &self,
3721    ) -> &'static crate::common::ClusterRegisterArray<
3722        crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW>,
3723        9,
3724        0x4,
3725    > {
3726        unsafe {
3727            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1c2usize))
3728        }
3729    }
3730    #[inline(always)]
3731    pub const fn p700pfs_ha(
3732        &self,
3733    ) -> &'static crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW> {
3734        unsafe {
3735            crate::common::Reg::<self::P70PfsHa_SPEC, crate::common::RW>::from_ptr(
3736                self._svd2pac_as_ptr().add(0x1c2usize),
3737            )
3738        }
3739    }
3740    #[inline(always)]
3741    pub const fn p701pfs_ha(
3742        &self,
3743    ) -> &'static crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW> {
3744        unsafe {
3745            crate::common::Reg::<self::P70PfsHa_SPEC, crate::common::RW>::from_ptr(
3746                self._svd2pac_as_ptr().add(0x1c6usize),
3747            )
3748        }
3749    }
3750    #[inline(always)]
3751    pub const fn p702pfs_ha(
3752        &self,
3753    ) -> &'static crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW> {
3754        unsafe {
3755            crate::common::Reg::<self::P70PfsHa_SPEC, crate::common::RW>::from_ptr(
3756                self._svd2pac_as_ptr().add(0x1causize),
3757            )
3758        }
3759    }
3760    #[inline(always)]
3761    pub const fn p703pfs_ha(
3762        &self,
3763    ) -> &'static crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW> {
3764        unsafe {
3765            crate::common::Reg::<self::P70PfsHa_SPEC, crate::common::RW>::from_ptr(
3766                self._svd2pac_as_ptr().add(0x1ceusize),
3767            )
3768        }
3769    }
3770    #[inline(always)]
3771    pub const fn p704pfs_ha(
3772        &self,
3773    ) -> &'static crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW> {
3774        unsafe {
3775            crate::common::Reg::<self::P70PfsHa_SPEC, crate::common::RW>::from_ptr(
3776                self._svd2pac_as_ptr().add(0x1d2usize),
3777            )
3778        }
3779    }
3780    #[inline(always)]
3781    pub const fn p705pfs_ha(
3782        &self,
3783    ) -> &'static crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW> {
3784        unsafe {
3785            crate::common::Reg::<self::P70PfsHa_SPEC, crate::common::RW>::from_ptr(
3786                self._svd2pac_as_ptr().add(0x1d6usize),
3787            )
3788        }
3789    }
3790    #[inline(always)]
3791    pub const fn p706pfs_ha(
3792        &self,
3793    ) -> &'static crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW> {
3794        unsafe {
3795            crate::common::Reg::<self::P70PfsHa_SPEC, crate::common::RW>::from_ptr(
3796                self._svd2pac_as_ptr().add(0x1dausize),
3797            )
3798        }
3799    }
3800    #[inline(always)]
3801    pub const fn p707pfs_ha(
3802        &self,
3803    ) -> &'static crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW> {
3804        unsafe {
3805            crate::common::Reg::<self::P70PfsHa_SPEC, crate::common::RW>::from_ptr(
3806                self._svd2pac_as_ptr().add(0x1deusize),
3807            )
3808        }
3809    }
3810    #[inline(always)]
3811    pub const fn p708pfs_ha(
3812        &self,
3813    ) -> &'static crate::common::Reg<self::P70PfsHa_SPEC, crate::common::RW> {
3814        unsafe {
3815            crate::common::Reg::<self::P70PfsHa_SPEC, crate::common::RW>::from_ptr(
3816                self._svd2pac_as_ptr().add(0x1e2usize),
3817            )
3818        }
3819    }
3820
3821    #[doc = "P70%s Pin Function Control Register"]
3822    #[inline(always)]
3823    pub const fn p70pfs_by(
3824        &self,
3825    ) -> &'static crate::common::ClusterRegisterArray<
3826        crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW>,
3827        9,
3828        0x4,
3829    > {
3830        unsafe {
3831            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1c3usize))
3832        }
3833    }
3834    #[inline(always)]
3835    pub const fn p700pfs_by(
3836        &self,
3837    ) -> &'static crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW> {
3838        unsafe {
3839            crate::common::Reg::<self::P70PfsBy_SPEC, crate::common::RW>::from_ptr(
3840                self._svd2pac_as_ptr().add(0x1c3usize),
3841            )
3842        }
3843    }
3844    #[inline(always)]
3845    pub const fn p701pfs_by(
3846        &self,
3847    ) -> &'static crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW> {
3848        unsafe {
3849            crate::common::Reg::<self::P70PfsBy_SPEC, crate::common::RW>::from_ptr(
3850                self._svd2pac_as_ptr().add(0x1c7usize),
3851            )
3852        }
3853    }
3854    #[inline(always)]
3855    pub const fn p702pfs_by(
3856        &self,
3857    ) -> &'static crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW> {
3858        unsafe {
3859            crate::common::Reg::<self::P70PfsBy_SPEC, crate::common::RW>::from_ptr(
3860                self._svd2pac_as_ptr().add(0x1cbusize),
3861            )
3862        }
3863    }
3864    #[inline(always)]
3865    pub const fn p703pfs_by(
3866        &self,
3867    ) -> &'static crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW> {
3868        unsafe {
3869            crate::common::Reg::<self::P70PfsBy_SPEC, crate::common::RW>::from_ptr(
3870                self._svd2pac_as_ptr().add(0x1cfusize),
3871            )
3872        }
3873    }
3874    #[inline(always)]
3875    pub const fn p704pfs_by(
3876        &self,
3877    ) -> &'static crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW> {
3878        unsafe {
3879            crate::common::Reg::<self::P70PfsBy_SPEC, crate::common::RW>::from_ptr(
3880                self._svd2pac_as_ptr().add(0x1d3usize),
3881            )
3882        }
3883    }
3884    #[inline(always)]
3885    pub const fn p705pfs_by(
3886        &self,
3887    ) -> &'static crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW> {
3888        unsafe {
3889            crate::common::Reg::<self::P70PfsBy_SPEC, crate::common::RW>::from_ptr(
3890                self._svd2pac_as_ptr().add(0x1d7usize),
3891            )
3892        }
3893    }
3894    #[inline(always)]
3895    pub const fn p706pfs_by(
3896        &self,
3897    ) -> &'static crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW> {
3898        unsafe {
3899            crate::common::Reg::<self::P70PfsBy_SPEC, crate::common::RW>::from_ptr(
3900                self._svd2pac_as_ptr().add(0x1dbusize),
3901            )
3902        }
3903    }
3904    #[inline(always)]
3905    pub const fn p707pfs_by(
3906        &self,
3907    ) -> &'static crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW> {
3908        unsafe {
3909            crate::common::Reg::<self::P70PfsBy_SPEC, crate::common::RW>::from_ptr(
3910                self._svd2pac_as_ptr().add(0x1dfusize),
3911            )
3912        }
3913    }
3914    #[inline(always)]
3915    pub const fn p708pfs_by(
3916        &self,
3917    ) -> &'static crate::common::Reg<self::P70PfsBy_SPEC, crate::common::RW> {
3918        unsafe {
3919            crate::common::Reg::<self::P70PfsBy_SPEC, crate::common::RW>::from_ptr(
3920                self._svd2pac_as_ptr().add(0x1e3usize),
3921            )
3922        }
3923    }
3924
3925    #[doc = "P80%s Pin Function Control Register"]
3926    #[inline(always)]
3927    pub const fn p80pfs(
3928        &self,
3929    ) -> &'static crate::common::ClusterRegisterArray<
3930        crate::common::Reg<self::P80Pfs_SPEC, crate::common::RW>,
3931        7,
3932        0x4,
3933    > {
3934        unsafe {
3935            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x200usize))
3936        }
3937    }
3938    #[inline(always)]
3939    pub const fn p800pfs(
3940        &self,
3941    ) -> &'static crate::common::Reg<self::P80Pfs_SPEC, crate::common::RW> {
3942        unsafe {
3943            crate::common::Reg::<self::P80Pfs_SPEC, crate::common::RW>::from_ptr(
3944                self._svd2pac_as_ptr().add(0x200usize),
3945            )
3946        }
3947    }
3948    #[inline(always)]
3949    pub const fn p801pfs(
3950        &self,
3951    ) -> &'static crate::common::Reg<self::P80Pfs_SPEC, crate::common::RW> {
3952        unsafe {
3953            crate::common::Reg::<self::P80Pfs_SPEC, crate::common::RW>::from_ptr(
3954                self._svd2pac_as_ptr().add(0x204usize),
3955            )
3956        }
3957    }
3958    #[inline(always)]
3959    pub const fn p802pfs(
3960        &self,
3961    ) -> &'static crate::common::Reg<self::P80Pfs_SPEC, crate::common::RW> {
3962        unsafe {
3963            crate::common::Reg::<self::P80Pfs_SPEC, crate::common::RW>::from_ptr(
3964                self._svd2pac_as_ptr().add(0x208usize),
3965            )
3966        }
3967    }
3968    #[inline(always)]
3969    pub const fn p803pfs(
3970        &self,
3971    ) -> &'static crate::common::Reg<self::P80Pfs_SPEC, crate::common::RW> {
3972        unsafe {
3973            crate::common::Reg::<self::P80Pfs_SPEC, crate::common::RW>::from_ptr(
3974                self._svd2pac_as_ptr().add(0x20cusize),
3975            )
3976        }
3977    }
3978    #[inline(always)]
3979    pub const fn p804pfs(
3980        &self,
3981    ) -> &'static crate::common::Reg<self::P80Pfs_SPEC, crate::common::RW> {
3982        unsafe {
3983            crate::common::Reg::<self::P80Pfs_SPEC, crate::common::RW>::from_ptr(
3984                self._svd2pac_as_ptr().add(0x210usize),
3985            )
3986        }
3987    }
3988    #[inline(always)]
3989    pub const fn p805pfs(
3990        &self,
3991    ) -> &'static crate::common::Reg<self::P80Pfs_SPEC, crate::common::RW> {
3992        unsafe {
3993            crate::common::Reg::<self::P80Pfs_SPEC, crate::common::RW>::from_ptr(
3994                self._svd2pac_as_ptr().add(0x214usize),
3995            )
3996        }
3997    }
3998    #[inline(always)]
3999    pub const fn p806pfs(
4000        &self,
4001    ) -> &'static crate::common::Reg<self::P80Pfs_SPEC, crate::common::RW> {
4002        unsafe {
4003            crate::common::Reg::<self::P80Pfs_SPEC, crate::common::RW>::from_ptr(
4004                self._svd2pac_as_ptr().add(0x218usize),
4005            )
4006        }
4007    }
4008
4009    #[doc = "P80%s Pin Function Control Register"]
4010    #[inline(always)]
4011    pub const fn p80pfs_ha(
4012        &self,
4013    ) -> &'static crate::common::ClusterRegisterArray<
4014        crate::common::Reg<self::P80PfsHa_SPEC, crate::common::RW>,
4015        7,
4016        0x4,
4017    > {
4018        unsafe {
4019            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x202usize))
4020        }
4021    }
4022    #[inline(always)]
4023    pub const fn p800pfs_ha(
4024        &self,
4025    ) -> &'static crate::common::Reg<self::P80PfsHa_SPEC, crate::common::RW> {
4026        unsafe {
4027            crate::common::Reg::<self::P80PfsHa_SPEC, crate::common::RW>::from_ptr(
4028                self._svd2pac_as_ptr().add(0x202usize),
4029            )
4030        }
4031    }
4032    #[inline(always)]
4033    pub const fn p801pfs_ha(
4034        &self,
4035    ) -> &'static crate::common::Reg<self::P80PfsHa_SPEC, crate::common::RW> {
4036        unsafe {
4037            crate::common::Reg::<self::P80PfsHa_SPEC, crate::common::RW>::from_ptr(
4038                self._svd2pac_as_ptr().add(0x206usize),
4039            )
4040        }
4041    }
4042    #[inline(always)]
4043    pub const fn p802pfs_ha(
4044        &self,
4045    ) -> &'static crate::common::Reg<self::P80PfsHa_SPEC, crate::common::RW> {
4046        unsafe {
4047            crate::common::Reg::<self::P80PfsHa_SPEC, crate::common::RW>::from_ptr(
4048                self._svd2pac_as_ptr().add(0x20ausize),
4049            )
4050        }
4051    }
4052    #[inline(always)]
4053    pub const fn p803pfs_ha(
4054        &self,
4055    ) -> &'static crate::common::Reg<self::P80PfsHa_SPEC, crate::common::RW> {
4056        unsafe {
4057            crate::common::Reg::<self::P80PfsHa_SPEC, crate::common::RW>::from_ptr(
4058                self._svd2pac_as_ptr().add(0x20eusize),
4059            )
4060        }
4061    }
4062    #[inline(always)]
4063    pub const fn p804pfs_ha(
4064        &self,
4065    ) -> &'static crate::common::Reg<self::P80PfsHa_SPEC, crate::common::RW> {
4066        unsafe {
4067            crate::common::Reg::<self::P80PfsHa_SPEC, crate::common::RW>::from_ptr(
4068                self._svd2pac_as_ptr().add(0x212usize),
4069            )
4070        }
4071    }
4072    #[inline(always)]
4073    pub const fn p805pfs_ha(
4074        &self,
4075    ) -> &'static crate::common::Reg<self::P80PfsHa_SPEC, crate::common::RW> {
4076        unsafe {
4077            crate::common::Reg::<self::P80PfsHa_SPEC, crate::common::RW>::from_ptr(
4078                self._svd2pac_as_ptr().add(0x216usize),
4079            )
4080        }
4081    }
4082    #[inline(always)]
4083    pub const fn p806pfs_ha(
4084        &self,
4085    ) -> &'static crate::common::Reg<self::P80PfsHa_SPEC, crate::common::RW> {
4086        unsafe {
4087            crate::common::Reg::<self::P80PfsHa_SPEC, crate::common::RW>::from_ptr(
4088                self._svd2pac_as_ptr().add(0x21ausize),
4089            )
4090        }
4091    }
4092
4093    #[doc = "P80%s Pin Function Control Register"]
4094    #[inline(always)]
4095    pub const fn p80pfs_by(
4096        &self,
4097    ) -> &'static crate::common::ClusterRegisterArray<
4098        crate::common::Reg<self::P80PfsBy_SPEC, crate::common::RW>,
4099        7,
4100        0x4,
4101    > {
4102        unsafe {
4103            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x203usize))
4104        }
4105    }
4106    #[inline(always)]
4107    pub const fn p800pfs_by(
4108        &self,
4109    ) -> &'static crate::common::Reg<self::P80PfsBy_SPEC, crate::common::RW> {
4110        unsafe {
4111            crate::common::Reg::<self::P80PfsBy_SPEC, crate::common::RW>::from_ptr(
4112                self._svd2pac_as_ptr().add(0x203usize),
4113            )
4114        }
4115    }
4116    #[inline(always)]
4117    pub const fn p801pfs_by(
4118        &self,
4119    ) -> &'static crate::common::Reg<self::P80PfsBy_SPEC, crate::common::RW> {
4120        unsafe {
4121            crate::common::Reg::<self::P80PfsBy_SPEC, crate::common::RW>::from_ptr(
4122                self._svd2pac_as_ptr().add(0x207usize),
4123            )
4124        }
4125    }
4126    #[inline(always)]
4127    pub const fn p802pfs_by(
4128        &self,
4129    ) -> &'static crate::common::Reg<self::P80PfsBy_SPEC, crate::common::RW> {
4130        unsafe {
4131            crate::common::Reg::<self::P80PfsBy_SPEC, crate::common::RW>::from_ptr(
4132                self._svd2pac_as_ptr().add(0x20busize),
4133            )
4134        }
4135    }
4136    #[inline(always)]
4137    pub const fn p803pfs_by(
4138        &self,
4139    ) -> &'static crate::common::Reg<self::P80PfsBy_SPEC, crate::common::RW> {
4140        unsafe {
4141            crate::common::Reg::<self::P80PfsBy_SPEC, crate::common::RW>::from_ptr(
4142                self._svd2pac_as_ptr().add(0x20fusize),
4143            )
4144        }
4145    }
4146    #[inline(always)]
4147    pub const fn p804pfs_by(
4148        &self,
4149    ) -> &'static crate::common::Reg<self::P80PfsBy_SPEC, crate::common::RW> {
4150        unsafe {
4151            crate::common::Reg::<self::P80PfsBy_SPEC, crate::common::RW>::from_ptr(
4152                self._svd2pac_as_ptr().add(0x213usize),
4153            )
4154        }
4155    }
4156    #[inline(always)]
4157    pub const fn p805pfs_by(
4158        &self,
4159    ) -> &'static crate::common::Reg<self::P80PfsBy_SPEC, crate::common::RW> {
4160        unsafe {
4161            crate::common::Reg::<self::P80PfsBy_SPEC, crate::common::RW>::from_ptr(
4162                self._svd2pac_as_ptr().add(0x217usize),
4163            )
4164        }
4165    }
4166    #[inline(always)]
4167    pub const fn p806pfs_by(
4168        &self,
4169    ) -> &'static crate::common::Reg<self::P80PfsBy_SPEC, crate::common::RW> {
4170        unsafe {
4171            crate::common::Reg::<self::P80PfsBy_SPEC, crate::common::RW>::from_ptr(
4172                self._svd2pac_as_ptr().add(0x21busize),
4173            )
4174        }
4175    }
4176
4177    #[doc = "P90%s Pin Function Control Register"]
4178    #[inline(always)]
4179    pub const fn p90pfs(
4180        &self,
4181    ) -> &'static crate::common::ClusterRegisterArray<
4182        crate::common::Reg<self::P90Pfs_SPEC, crate::common::RW>,
4183        4,
4184        0x4,
4185    > {
4186        unsafe {
4187            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x254usize))
4188        }
4189    }
4190    #[inline(always)]
4191    pub const fn p905pfs(
4192        &self,
4193    ) -> &'static crate::common::Reg<self::P90Pfs_SPEC, crate::common::RW> {
4194        unsafe {
4195            crate::common::Reg::<self::P90Pfs_SPEC, crate::common::RW>::from_ptr(
4196                self._svd2pac_as_ptr().add(0x254usize),
4197            )
4198        }
4199    }
4200    #[inline(always)]
4201    pub const fn p906pfs(
4202        &self,
4203    ) -> &'static crate::common::Reg<self::P90Pfs_SPEC, crate::common::RW> {
4204        unsafe {
4205            crate::common::Reg::<self::P90Pfs_SPEC, crate::common::RW>::from_ptr(
4206                self._svd2pac_as_ptr().add(0x258usize),
4207            )
4208        }
4209    }
4210    #[inline(always)]
4211    pub const fn p907pfs(
4212        &self,
4213    ) -> &'static crate::common::Reg<self::P90Pfs_SPEC, crate::common::RW> {
4214        unsafe {
4215            crate::common::Reg::<self::P90Pfs_SPEC, crate::common::RW>::from_ptr(
4216                self._svd2pac_as_ptr().add(0x25cusize),
4217            )
4218        }
4219    }
4220    #[inline(always)]
4221    pub const fn p908pfs(
4222        &self,
4223    ) -> &'static crate::common::Reg<self::P90Pfs_SPEC, crate::common::RW> {
4224        unsafe {
4225            crate::common::Reg::<self::P90Pfs_SPEC, crate::common::RW>::from_ptr(
4226                self._svd2pac_as_ptr().add(0x260usize),
4227            )
4228        }
4229    }
4230
4231    #[doc = "P90%s Pin Function Control Register"]
4232    #[inline(always)]
4233    pub const fn p90pfs_ha(
4234        &self,
4235    ) -> &'static crate::common::ClusterRegisterArray<
4236        crate::common::Reg<self::P90PfsHa_SPEC, crate::common::RW>,
4237        4,
4238        0x4,
4239    > {
4240        unsafe {
4241            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x256usize))
4242        }
4243    }
4244    #[inline(always)]
4245    pub const fn p905pfs_ha(
4246        &self,
4247    ) -> &'static crate::common::Reg<self::P90PfsHa_SPEC, crate::common::RW> {
4248        unsafe {
4249            crate::common::Reg::<self::P90PfsHa_SPEC, crate::common::RW>::from_ptr(
4250                self._svd2pac_as_ptr().add(0x256usize),
4251            )
4252        }
4253    }
4254    #[inline(always)]
4255    pub const fn p906pfs_ha(
4256        &self,
4257    ) -> &'static crate::common::Reg<self::P90PfsHa_SPEC, crate::common::RW> {
4258        unsafe {
4259            crate::common::Reg::<self::P90PfsHa_SPEC, crate::common::RW>::from_ptr(
4260                self._svd2pac_as_ptr().add(0x25ausize),
4261            )
4262        }
4263    }
4264    #[inline(always)]
4265    pub const fn p907pfs_ha(
4266        &self,
4267    ) -> &'static crate::common::Reg<self::P90PfsHa_SPEC, crate::common::RW> {
4268        unsafe {
4269            crate::common::Reg::<self::P90PfsHa_SPEC, crate::common::RW>::from_ptr(
4270                self._svd2pac_as_ptr().add(0x25eusize),
4271            )
4272        }
4273    }
4274    #[inline(always)]
4275    pub const fn p908pfs_ha(
4276        &self,
4277    ) -> &'static crate::common::Reg<self::P90PfsHa_SPEC, crate::common::RW> {
4278        unsafe {
4279            crate::common::Reg::<self::P90PfsHa_SPEC, crate::common::RW>::from_ptr(
4280                self._svd2pac_as_ptr().add(0x262usize),
4281            )
4282        }
4283    }
4284
4285    #[doc = "P90%s Pin Function Control Register"]
4286    #[inline(always)]
4287    pub const fn p90pfs_by(
4288        &self,
4289    ) -> &'static crate::common::ClusterRegisterArray<
4290        crate::common::Reg<self::P90PfsBy_SPEC, crate::common::RW>,
4291        4,
4292        0x4,
4293    > {
4294        unsafe {
4295            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x257usize))
4296        }
4297    }
4298    #[inline(always)]
4299    pub const fn p905pfs_by(
4300        &self,
4301    ) -> &'static crate::common::Reg<self::P90PfsBy_SPEC, crate::common::RW> {
4302        unsafe {
4303            crate::common::Reg::<self::P90PfsBy_SPEC, crate::common::RW>::from_ptr(
4304                self._svd2pac_as_ptr().add(0x257usize),
4305            )
4306        }
4307    }
4308    #[inline(always)]
4309    pub const fn p906pfs_by(
4310        &self,
4311    ) -> &'static crate::common::Reg<self::P90PfsBy_SPEC, crate::common::RW> {
4312        unsafe {
4313            crate::common::Reg::<self::P90PfsBy_SPEC, crate::common::RW>::from_ptr(
4314                self._svd2pac_as_ptr().add(0x25busize),
4315            )
4316        }
4317    }
4318    #[inline(always)]
4319    pub const fn p907pfs_by(
4320        &self,
4321    ) -> &'static crate::common::Reg<self::P90PfsBy_SPEC, crate::common::RW> {
4322        unsafe {
4323            crate::common::Reg::<self::P90PfsBy_SPEC, crate::common::RW>::from_ptr(
4324                self._svd2pac_as_ptr().add(0x25fusize),
4325            )
4326        }
4327    }
4328    #[inline(always)]
4329    pub const fn p908pfs_by(
4330        &self,
4331    ) -> &'static crate::common::Reg<self::P90PfsBy_SPEC, crate::common::RW> {
4332        unsafe {
4333            crate::common::Reg::<self::P90PfsBy_SPEC, crate::common::RW>::from_ptr(
4334                self._svd2pac_as_ptr().add(0x263usize),
4335            )
4336        }
4337    }
4338
4339    #[doc = "PA0%s Pin Function Control Register"]
4340    #[inline(always)]
4341    pub const fn pa0pfs(
4342        &self,
4343    ) -> &'static crate::common::ClusterRegisterArray<
4344        crate::common::Reg<self::Pa0Pfs_SPEC, crate::common::RW>,
4345        2,
4346        0x4,
4347    > {
4348        unsafe {
4349            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2a0usize))
4350        }
4351    }
4352    #[inline(always)]
4353    pub const fn pa08pfs(
4354        &self,
4355    ) -> &'static crate::common::Reg<self::Pa0Pfs_SPEC, crate::common::RW> {
4356        unsafe {
4357            crate::common::Reg::<self::Pa0Pfs_SPEC, crate::common::RW>::from_ptr(
4358                self._svd2pac_as_ptr().add(0x2a0usize),
4359            )
4360        }
4361    }
4362    #[inline(always)]
4363    pub const fn pa09pfs(
4364        &self,
4365    ) -> &'static crate::common::Reg<self::Pa0Pfs_SPEC, crate::common::RW> {
4366        unsafe {
4367            crate::common::Reg::<self::Pa0Pfs_SPEC, crate::common::RW>::from_ptr(
4368                self._svd2pac_as_ptr().add(0x2a4usize),
4369            )
4370        }
4371    }
4372
4373    #[doc = "PA0%s Pin Function Control Register"]
4374    #[inline(always)]
4375    pub const fn pa0pfs_ha(
4376        &self,
4377    ) -> &'static crate::common::ClusterRegisterArray<
4378        crate::common::Reg<self::Pa0PfsHa_SPEC, crate::common::RW>,
4379        2,
4380        0x4,
4381    > {
4382        unsafe {
4383            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2a2usize))
4384        }
4385    }
4386    #[inline(always)]
4387    pub const fn pa08pfs_ha(
4388        &self,
4389    ) -> &'static crate::common::Reg<self::Pa0PfsHa_SPEC, crate::common::RW> {
4390        unsafe {
4391            crate::common::Reg::<self::Pa0PfsHa_SPEC, crate::common::RW>::from_ptr(
4392                self._svd2pac_as_ptr().add(0x2a2usize),
4393            )
4394        }
4395    }
4396    #[inline(always)]
4397    pub const fn pa09pfs_ha(
4398        &self,
4399    ) -> &'static crate::common::Reg<self::Pa0PfsHa_SPEC, crate::common::RW> {
4400        unsafe {
4401            crate::common::Reg::<self::Pa0PfsHa_SPEC, crate::common::RW>::from_ptr(
4402                self._svd2pac_as_ptr().add(0x2a6usize),
4403            )
4404        }
4405    }
4406
4407    #[doc = "PA0%s Pin Function Control Register"]
4408    #[inline(always)]
4409    pub const fn pa0pfs_by(
4410        &self,
4411    ) -> &'static crate::common::ClusterRegisterArray<
4412        crate::common::Reg<self::Pa0PfsBy_SPEC, crate::common::RW>,
4413        2,
4414        0x4,
4415    > {
4416        unsafe {
4417            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2a3usize))
4418        }
4419    }
4420    #[inline(always)]
4421    pub const fn pa08pfs_by(
4422        &self,
4423    ) -> &'static crate::common::Reg<self::Pa0PfsBy_SPEC, crate::common::RW> {
4424        unsafe {
4425            crate::common::Reg::<self::Pa0PfsBy_SPEC, crate::common::RW>::from_ptr(
4426                self._svd2pac_as_ptr().add(0x2a3usize),
4427            )
4428        }
4429    }
4430    #[inline(always)]
4431    pub const fn pa09pfs_by(
4432        &self,
4433    ) -> &'static crate::common::Reg<self::Pa0PfsBy_SPEC, crate::common::RW> {
4434        unsafe {
4435            crate::common::Reg::<self::Pa0PfsBy_SPEC, crate::common::RW>::from_ptr(
4436                self._svd2pac_as_ptr().add(0x2a7usize),
4437            )
4438        }
4439    }
4440
4441    #[doc = "PA10 Pin Function Control Register"]
4442    #[inline(always)]
4443    pub const fn pa10pfs(
4444        &self,
4445    ) -> &'static crate::common::Reg<self::Pa10Pfs_SPEC, crate::common::RW> {
4446        unsafe {
4447            crate::common::Reg::<self::Pa10Pfs_SPEC, crate::common::RW>::from_ptr(
4448                self._svd2pac_as_ptr().add(680usize),
4449            )
4450        }
4451    }
4452
4453    #[doc = "PA10 Pin Function Control Register"]
4454    #[inline(always)]
4455    pub const fn pa10pfs_ha(
4456        &self,
4457    ) -> &'static crate::common::Reg<self::Pa10PfsHa_SPEC, crate::common::RW> {
4458        unsafe {
4459            crate::common::Reg::<self::Pa10PfsHa_SPEC, crate::common::RW>::from_ptr(
4460                self._svd2pac_as_ptr().add(682usize),
4461            )
4462        }
4463    }
4464
4465    #[doc = "PA10 Pin Function Control Register"]
4466    #[inline(always)]
4467    pub const fn pa10pfs_by(
4468        &self,
4469    ) -> &'static crate::common::Reg<self::Pa10PfsBy_SPEC, crate::common::RW> {
4470        unsafe {
4471            crate::common::Reg::<self::Pa10PfsBy_SPEC, crate::common::RW>::from_ptr(
4472                self._svd2pac_as_ptr().add(683usize),
4473            )
4474        }
4475    }
4476
4477    #[doc = "PB0%s Pin Function Control Register"]
4478    #[inline(always)]
4479    pub const fn pb0pfs(
4480        &self,
4481    ) -> &'static crate::common::ClusterRegisterArray<
4482        crate::common::Reg<self::Pb0Pfs_SPEC, crate::common::RW>,
4483        2,
4484        0x4,
4485    > {
4486        unsafe {
4487            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2c0usize))
4488        }
4489    }
4490    #[inline(always)]
4491    pub const fn pb00pfs(
4492        &self,
4493    ) -> &'static crate::common::Reg<self::Pb0Pfs_SPEC, crate::common::RW> {
4494        unsafe {
4495            crate::common::Reg::<self::Pb0Pfs_SPEC, crate::common::RW>::from_ptr(
4496                self._svd2pac_as_ptr().add(0x2c0usize),
4497            )
4498        }
4499    }
4500    #[inline(always)]
4501    pub const fn pb01pfs(
4502        &self,
4503    ) -> &'static crate::common::Reg<self::Pb0Pfs_SPEC, crate::common::RW> {
4504        unsafe {
4505            crate::common::Reg::<self::Pb0Pfs_SPEC, crate::common::RW>::from_ptr(
4506                self._svd2pac_as_ptr().add(0x2c4usize),
4507            )
4508        }
4509    }
4510
4511    #[doc = "PB0%s Pin Function Control Register"]
4512    #[inline(always)]
4513    pub const fn pb0pfs_ha(
4514        &self,
4515    ) -> &'static crate::common::ClusterRegisterArray<
4516        crate::common::Reg<self::Pb0PfsHa_SPEC, crate::common::RW>,
4517        2,
4518        0x4,
4519    > {
4520        unsafe {
4521            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2c2usize))
4522        }
4523    }
4524    #[inline(always)]
4525    pub const fn pb00pfs_ha(
4526        &self,
4527    ) -> &'static crate::common::Reg<self::Pb0PfsHa_SPEC, crate::common::RW> {
4528        unsafe {
4529            crate::common::Reg::<self::Pb0PfsHa_SPEC, crate::common::RW>::from_ptr(
4530                self._svd2pac_as_ptr().add(0x2c2usize),
4531            )
4532        }
4533    }
4534    #[inline(always)]
4535    pub const fn pb01pfs_ha(
4536        &self,
4537    ) -> &'static crate::common::Reg<self::Pb0PfsHa_SPEC, crate::common::RW> {
4538        unsafe {
4539            crate::common::Reg::<self::Pb0PfsHa_SPEC, crate::common::RW>::from_ptr(
4540                self._svd2pac_as_ptr().add(0x2c6usize),
4541            )
4542        }
4543    }
4544
4545    #[doc = "PB0%s Pin Function Control Register"]
4546    #[inline(always)]
4547    pub const fn pb0pfs_by(
4548        &self,
4549    ) -> &'static crate::common::ClusterRegisterArray<
4550        crate::common::Reg<self::Pb0PfsBy_SPEC, crate::common::RW>,
4551        2,
4552        0x4,
4553    > {
4554        unsafe {
4555            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2c3usize))
4556        }
4557    }
4558    #[inline(always)]
4559    pub const fn pb00pfs_by(
4560        &self,
4561    ) -> &'static crate::common::Reg<self::Pb0PfsBy_SPEC, crate::common::RW> {
4562        unsafe {
4563            crate::common::Reg::<self::Pb0PfsBy_SPEC, crate::common::RW>::from_ptr(
4564                self._svd2pac_as_ptr().add(0x2c3usize),
4565            )
4566        }
4567    }
4568    #[inline(always)]
4569    pub const fn pb01pfs_by(
4570        &self,
4571    ) -> &'static crate::common::Reg<self::Pb0PfsBy_SPEC, crate::common::RW> {
4572        unsafe {
4573            crate::common::Reg::<self::Pb0PfsBy_SPEC, crate::common::RW>::from_ptr(
4574                self._svd2pac_as_ptr().add(0x2c7usize),
4575            )
4576        }
4577    }
4578}
4579#[doc(hidden)]
4580#[derive(Copy, Clone, Eq, PartialEq)]
4581pub struct P000Pfs_SPEC;
4582impl crate::sealed::RegSpec for P000Pfs_SPEC {
4583    type DataType = u32;
4584}
4585
4586#[doc = "P000 Pin Function Control Register"]
4587pub type P000Pfs = crate::RegValueT<P000Pfs_SPEC>;
4588
4589impl P000Pfs {
4590    #[doc = "Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table"]
4591    #[inline(always)]
4592    pub fn psel(
4593        self,
4594    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, P000Pfs_SPEC, crate::common::RW> {
4595        crate::common::RegisterField::<24,0x1f,1,0,u8,u8,P000Pfs_SPEC,crate::common::RW>::from_register(self,0)
4596    }
4597
4598    #[doc = "Port Mode Control"]
4599    #[inline(always)]
4600    pub fn pmr(
4601        self,
4602    ) -> crate::common::RegisterField<
4603        16,
4604        0x1,
4605        1,
4606        0,
4607        p000pfs::Pmr,
4608        p000pfs::Pmr,
4609        P000Pfs_SPEC,
4610        crate::common::RW,
4611    > {
4612        crate::common::RegisterField::<
4613            16,
4614            0x1,
4615            1,
4616            0,
4617            p000pfs::Pmr,
4618            p000pfs::Pmr,
4619            P000Pfs_SPEC,
4620            crate::common::RW,
4621        >::from_register(self, 0)
4622    }
4623
4624    #[doc = "Analog Input enable"]
4625    #[inline(always)]
4626    pub fn asel(
4627        self,
4628    ) -> crate::common::RegisterField<
4629        15,
4630        0x1,
4631        1,
4632        0,
4633        p000pfs::Asel,
4634        p000pfs::Asel,
4635        P000Pfs_SPEC,
4636        crate::common::RW,
4637    > {
4638        crate::common::RegisterField::<
4639            15,
4640            0x1,
4641            1,
4642            0,
4643            p000pfs::Asel,
4644            p000pfs::Asel,
4645            P000Pfs_SPEC,
4646            crate::common::RW,
4647        >::from_register(self, 0)
4648    }
4649
4650    #[doc = "IRQ input enable"]
4651    #[inline(always)]
4652    pub fn isel(
4653        self,
4654    ) -> crate::common::RegisterField<
4655        14,
4656        0x1,
4657        1,
4658        0,
4659        p000pfs::Isel,
4660        p000pfs::Isel,
4661        P000Pfs_SPEC,
4662        crate::common::RW,
4663    > {
4664        crate::common::RegisterField::<
4665            14,
4666            0x1,
4667            1,
4668            0,
4669            p000pfs::Isel,
4670            p000pfs::Isel,
4671            P000Pfs_SPEC,
4672            crate::common::RW,
4673        >::from_register(self, 0)
4674    }
4675
4676    #[doc = "Drive Strength Control Register"]
4677    #[inline(always)]
4678    pub fn dscr(
4679        self,
4680    ) -> crate::common::RegisterField<
4681        10,
4682        0x3,
4683        1,
4684        0,
4685        p000pfs::Dscr,
4686        p000pfs::Dscr,
4687        P000Pfs_SPEC,
4688        crate::common::RW,
4689    > {
4690        crate::common::RegisterField::<
4691            10,
4692            0x3,
4693            1,
4694            0,
4695            p000pfs::Dscr,
4696            p000pfs::Dscr,
4697            P000Pfs_SPEC,
4698            crate::common::RW,
4699        >::from_register(self, 0)
4700    }
4701
4702    #[doc = "N-Channel Open Drain Control"]
4703    #[inline(always)]
4704    pub fn ncodr(
4705        self,
4706    ) -> crate::common::RegisterField<
4707        6,
4708        0x1,
4709        1,
4710        0,
4711        p000pfs::Ncodr,
4712        p000pfs::Ncodr,
4713        P000Pfs_SPEC,
4714        crate::common::RW,
4715    > {
4716        crate::common::RegisterField::<
4717            6,
4718            0x1,
4719            1,
4720            0,
4721            p000pfs::Ncodr,
4722            p000pfs::Ncodr,
4723            P000Pfs_SPEC,
4724            crate::common::RW,
4725        >::from_register(self, 0)
4726    }
4727
4728    #[doc = "Pull-up Control"]
4729    #[inline(always)]
4730    pub fn pcr(
4731        self,
4732    ) -> crate::common::RegisterField<
4733        4,
4734        0x1,
4735        1,
4736        0,
4737        p000pfs::Pcr,
4738        p000pfs::Pcr,
4739        P000Pfs_SPEC,
4740        crate::common::RW,
4741    > {
4742        crate::common::RegisterField::<
4743            4,
4744            0x1,
4745            1,
4746            0,
4747            p000pfs::Pcr,
4748            p000pfs::Pcr,
4749            P000Pfs_SPEC,
4750            crate::common::RW,
4751        >::from_register(self, 0)
4752    }
4753
4754    #[doc = "Port Direction"]
4755    #[inline(always)]
4756    pub fn pdr(
4757        self,
4758    ) -> crate::common::RegisterField<
4759        2,
4760        0x1,
4761        1,
4762        0,
4763        p000pfs::Pdr,
4764        p000pfs::Pdr,
4765        P000Pfs_SPEC,
4766        crate::common::RW,
4767    > {
4768        crate::common::RegisterField::<
4769            2,
4770            0x1,
4771            1,
4772            0,
4773            p000pfs::Pdr,
4774            p000pfs::Pdr,
4775            P000Pfs_SPEC,
4776            crate::common::RW,
4777        >::from_register(self, 0)
4778    }
4779
4780    #[doc = "Port Input Data"]
4781    #[inline(always)]
4782    pub fn pidr(
4783        self,
4784    ) -> crate::common::RegisterField<
4785        1,
4786        0x1,
4787        1,
4788        0,
4789        p000pfs::Pidr,
4790        p000pfs::Pidr,
4791        P000Pfs_SPEC,
4792        crate::common::R,
4793    > {
4794        crate::common::RegisterField::<
4795            1,
4796            0x1,
4797            1,
4798            0,
4799            p000pfs::Pidr,
4800            p000pfs::Pidr,
4801            P000Pfs_SPEC,
4802            crate::common::R,
4803        >::from_register(self, 0)
4804    }
4805
4806    #[doc = "Port Output Data"]
4807    #[inline(always)]
4808    pub fn podr(
4809        self,
4810    ) -> crate::common::RegisterField<
4811        0,
4812        0x1,
4813        1,
4814        0,
4815        p000pfs::Podr,
4816        p000pfs::Podr,
4817        P000Pfs_SPEC,
4818        crate::common::RW,
4819    > {
4820        crate::common::RegisterField::<
4821            0,
4822            0x1,
4823            1,
4824            0,
4825            p000pfs::Podr,
4826            p000pfs::Podr,
4827            P000Pfs_SPEC,
4828            crate::common::RW,
4829        >::from_register(self, 0)
4830    }
4831}
4832impl ::core::default::Default for P000Pfs {
4833    #[inline(always)]
4834    fn default() -> P000Pfs {
4835        <crate::RegValueT<P000Pfs_SPEC> as RegisterValue<_>>::new(32768)
4836    }
4837}
4838pub mod p000pfs {
4839
4840    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4841    pub struct Pmr_SPEC;
4842    pub type Pmr = crate::EnumBitfieldStruct<u8, Pmr_SPEC>;
4843    impl Pmr {
4844        #[doc = "Uses the pin as a general I/O pin."]
4845        pub const _0: Self = Self::new(0);
4846
4847        #[doc = "Uses the pin as an I/O port for peripheral functions."]
4848        pub const _1: Self = Self::new(1);
4849    }
4850    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4851    pub struct Asel_SPEC;
4852    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
4853    impl Asel {
4854        #[doc = "Used other than as analog pin"]
4855        pub const _0: Self = Self::new(0);
4856
4857        #[doc = "Used as analog pin"]
4858        pub const _1: Self = Self::new(1);
4859    }
4860    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4861    pub struct Isel_SPEC;
4862    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
4863    impl Isel {
4864        #[doc = "Not used as IRQn input pin"]
4865        pub const _0: Self = Self::new(0);
4866
4867        #[doc = "Used as IRQn input pin"]
4868        pub const _1: Self = Self::new(1);
4869    }
4870    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4871    pub struct Dscr_SPEC;
4872    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
4873    impl Dscr {
4874        #[doc = "Normal drive output"]
4875        pub const _00: Self = Self::new(0);
4876
4877        #[doc = "Middle drive output"]
4878        pub const _01: Self = Self::new(1);
4879
4880        #[doc = "Setting prohibited"]
4881        pub const _10: Self = Self::new(2);
4882
4883        #[doc = "High-drive output"]
4884        pub const _11: Self = Self::new(3);
4885    }
4886    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4887    pub struct Ncodr_SPEC;
4888    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
4889    impl Ncodr {
4890        #[doc = "CMOS output"]
4891        pub const _0: Self = Self::new(0);
4892
4893        #[doc = "NMOS open-drain output"]
4894        pub const _1: Self = Self::new(1);
4895    }
4896    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4897    pub struct Pcr_SPEC;
4898    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
4899    impl Pcr {
4900        #[doc = "Disables an input pull-up."]
4901        pub const _0: Self = Self::new(0);
4902
4903        #[doc = "Enables an input pull-up."]
4904        pub const _1: Self = Self::new(1);
4905    }
4906    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4907    pub struct Pdr_SPEC;
4908    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
4909    impl Pdr {
4910        #[doc = "Input (Functions as an input pin.)"]
4911        pub const _0: Self = Self::new(0);
4912
4913        #[doc = "Output (Functions as an output pin.)"]
4914        pub const _1: Self = Self::new(1);
4915    }
4916    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4917    pub struct Pidr_SPEC;
4918    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
4919    impl Pidr {
4920        #[doc = "Low input"]
4921        pub const _0: Self = Self::new(0);
4922
4923        #[doc = "High input"]
4924        pub const _1: Self = Self::new(1);
4925    }
4926    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4927    pub struct Podr_SPEC;
4928    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
4929    impl Podr {
4930        #[doc = "Low output"]
4931        pub const _0: Self = Self::new(0);
4932
4933        #[doc = "High output"]
4934        pub const _1: Self = Self::new(1);
4935    }
4936}
4937#[doc(hidden)]
4938#[derive(Copy, Clone, Eq, PartialEq)]
4939pub struct P000PfsHa_SPEC;
4940impl crate::sealed::RegSpec for P000PfsHa_SPEC {
4941    type DataType = u16;
4942}
4943
4944#[doc = "P000 Pin Function Control Register"]
4945pub type P000PfsHa = crate::RegValueT<P000PfsHa_SPEC>;
4946
4947impl P000PfsHa {
4948    #[doc = "Analog Input enable"]
4949    #[inline(always)]
4950    pub fn asel(
4951        self,
4952    ) -> crate::common::RegisterField<
4953        15,
4954        0x1,
4955        1,
4956        0,
4957        p000pfs_ha::Asel,
4958        p000pfs_ha::Asel,
4959        P000PfsHa_SPEC,
4960        crate::common::RW,
4961    > {
4962        crate::common::RegisterField::<
4963            15,
4964            0x1,
4965            1,
4966            0,
4967            p000pfs_ha::Asel,
4968            p000pfs_ha::Asel,
4969            P000PfsHa_SPEC,
4970            crate::common::RW,
4971        >::from_register(self, 0)
4972    }
4973
4974    #[doc = "IRQ input enable"]
4975    #[inline(always)]
4976    pub fn isel(
4977        self,
4978    ) -> crate::common::RegisterField<
4979        14,
4980        0x1,
4981        1,
4982        0,
4983        p000pfs_ha::Isel,
4984        p000pfs_ha::Isel,
4985        P000PfsHa_SPEC,
4986        crate::common::RW,
4987    > {
4988        crate::common::RegisterField::<
4989            14,
4990            0x1,
4991            1,
4992            0,
4993            p000pfs_ha::Isel,
4994            p000pfs_ha::Isel,
4995            P000PfsHa_SPEC,
4996            crate::common::RW,
4997        >::from_register(self, 0)
4998    }
4999
5000    #[doc = "Drive Strength Control Register"]
5001    #[inline(always)]
5002    pub fn dscr(
5003        self,
5004    ) -> crate::common::RegisterField<
5005        10,
5006        0x3,
5007        1,
5008        0,
5009        p000pfs_ha::Dscr,
5010        p000pfs_ha::Dscr,
5011        P000PfsHa_SPEC,
5012        crate::common::RW,
5013    > {
5014        crate::common::RegisterField::<
5015            10,
5016            0x3,
5017            1,
5018            0,
5019            p000pfs_ha::Dscr,
5020            p000pfs_ha::Dscr,
5021            P000PfsHa_SPEC,
5022            crate::common::RW,
5023        >::from_register(self, 0)
5024    }
5025
5026    #[doc = "N-Channel Open Drain Control"]
5027    #[inline(always)]
5028    pub fn ncodr(
5029        self,
5030    ) -> crate::common::RegisterField<
5031        6,
5032        0x1,
5033        1,
5034        0,
5035        p000pfs_ha::Ncodr,
5036        p000pfs_ha::Ncodr,
5037        P000PfsHa_SPEC,
5038        crate::common::RW,
5039    > {
5040        crate::common::RegisterField::<
5041            6,
5042            0x1,
5043            1,
5044            0,
5045            p000pfs_ha::Ncodr,
5046            p000pfs_ha::Ncodr,
5047            P000PfsHa_SPEC,
5048            crate::common::RW,
5049        >::from_register(self, 0)
5050    }
5051
5052    #[doc = "Pull-up Control"]
5053    #[inline(always)]
5054    pub fn pcr(
5055        self,
5056    ) -> crate::common::RegisterField<
5057        4,
5058        0x1,
5059        1,
5060        0,
5061        p000pfs_ha::Pcr,
5062        p000pfs_ha::Pcr,
5063        P000PfsHa_SPEC,
5064        crate::common::RW,
5065    > {
5066        crate::common::RegisterField::<
5067            4,
5068            0x1,
5069            1,
5070            0,
5071            p000pfs_ha::Pcr,
5072            p000pfs_ha::Pcr,
5073            P000PfsHa_SPEC,
5074            crate::common::RW,
5075        >::from_register(self, 0)
5076    }
5077
5078    #[doc = "Port Direction"]
5079    #[inline(always)]
5080    pub fn pdr(
5081        self,
5082    ) -> crate::common::RegisterField<
5083        2,
5084        0x1,
5085        1,
5086        0,
5087        p000pfs_ha::Pdr,
5088        p000pfs_ha::Pdr,
5089        P000PfsHa_SPEC,
5090        crate::common::RW,
5091    > {
5092        crate::common::RegisterField::<
5093            2,
5094            0x1,
5095            1,
5096            0,
5097            p000pfs_ha::Pdr,
5098            p000pfs_ha::Pdr,
5099            P000PfsHa_SPEC,
5100            crate::common::RW,
5101        >::from_register(self, 0)
5102    }
5103
5104    #[doc = "Port Input Data"]
5105    #[inline(always)]
5106    pub fn pidr(
5107        self,
5108    ) -> crate::common::RegisterField<
5109        1,
5110        0x1,
5111        1,
5112        0,
5113        p000pfs_ha::Pidr,
5114        p000pfs_ha::Pidr,
5115        P000PfsHa_SPEC,
5116        crate::common::R,
5117    > {
5118        crate::common::RegisterField::<
5119            1,
5120            0x1,
5121            1,
5122            0,
5123            p000pfs_ha::Pidr,
5124            p000pfs_ha::Pidr,
5125            P000PfsHa_SPEC,
5126            crate::common::R,
5127        >::from_register(self, 0)
5128    }
5129
5130    #[doc = "Port Output Data"]
5131    #[inline(always)]
5132    pub fn podr(
5133        self,
5134    ) -> crate::common::RegisterField<
5135        0,
5136        0x1,
5137        1,
5138        0,
5139        p000pfs_ha::Podr,
5140        p000pfs_ha::Podr,
5141        P000PfsHa_SPEC,
5142        crate::common::RW,
5143    > {
5144        crate::common::RegisterField::<
5145            0,
5146            0x1,
5147            1,
5148            0,
5149            p000pfs_ha::Podr,
5150            p000pfs_ha::Podr,
5151            P000PfsHa_SPEC,
5152            crate::common::RW,
5153        >::from_register(self, 0)
5154    }
5155}
5156impl ::core::default::Default for P000PfsHa {
5157    #[inline(always)]
5158    fn default() -> P000PfsHa {
5159        <crate::RegValueT<P000PfsHa_SPEC> as RegisterValue<_>>::new(32768)
5160    }
5161}
5162pub mod p000pfs_ha {
5163
5164    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5165    pub struct Asel_SPEC;
5166    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
5167    impl Asel {
5168        #[doc = "Used other than as analog pin"]
5169        pub const _0: Self = Self::new(0);
5170
5171        #[doc = "Used as analog pin"]
5172        pub const _1: Self = Self::new(1);
5173    }
5174    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5175    pub struct Isel_SPEC;
5176    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
5177    impl Isel {
5178        #[doc = "Not used as IRQn input pin"]
5179        pub const _0: Self = Self::new(0);
5180
5181        #[doc = "Used as IRQn input pin"]
5182        pub const _1: Self = Self::new(1);
5183    }
5184    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5185    pub struct Dscr_SPEC;
5186    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
5187    impl Dscr {
5188        #[doc = "Normal drive output"]
5189        pub const _00: Self = Self::new(0);
5190
5191        #[doc = "Middle drive output"]
5192        pub const _01: Self = Self::new(1);
5193
5194        #[doc = "Setting prohibited"]
5195        pub const _10: Self = Self::new(2);
5196
5197        #[doc = "High-drive output"]
5198        pub const _11: Self = Self::new(3);
5199    }
5200    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5201    pub struct Ncodr_SPEC;
5202    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
5203    impl Ncodr {
5204        #[doc = "CMOS output"]
5205        pub const _0: Self = Self::new(0);
5206
5207        #[doc = "NMOS open-drain output"]
5208        pub const _1: Self = Self::new(1);
5209    }
5210    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5211    pub struct Pcr_SPEC;
5212    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
5213    impl Pcr {
5214        #[doc = "Disables an input pull-up."]
5215        pub const _0: Self = Self::new(0);
5216
5217        #[doc = "Enables an input pull-up."]
5218        pub const _1: Self = Self::new(1);
5219    }
5220    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5221    pub struct Pdr_SPEC;
5222    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
5223    impl Pdr {
5224        #[doc = "Input (Functions as an input pin.)"]
5225        pub const _0: Self = Self::new(0);
5226
5227        #[doc = "Output (Functions as an output pin.)"]
5228        pub const _1: Self = Self::new(1);
5229    }
5230    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5231    pub struct Pidr_SPEC;
5232    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
5233    impl Pidr {
5234        #[doc = "Low input"]
5235        pub const _0: Self = Self::new(0);
5236
5237        #[doc = "High input"]
5238        pub const _1: Self = Self::new(1);
5239    }
5240    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5241    pub struct Podr_SPEC;
5242    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
5243    impl Podr {
5244        #[doc = "Low output"]
5245        pub const _0: Self = Self::new(0);
5246
5247        #[doc = "High output"]
5248        pub const _1: Self = Self::new(1);
5249    }
5250}
5251#[doc(hidden)]
5252#[derive(Copy, Clone, Eq, PartialEq)]
5253pub struct P000PfsBy_SPEC;
5254impl crate::sealed::RegSpec for P000PfsBy_SPEC {
5255    type DataType = u8;
5256}
5257
5258#[doc = "P000 Pin Function Control Register"]
5259pub type P000PfsBy = crate::RegValueT<P000PfsBy_SPEC>;
5260
5261impl P000PfsBy {
5262    #[doc = "N-Channel Open Drain Control"]
5263    #[inline(always)]
5264    pub fn ncodr(
5265        self,
5266    ) -> crate::common::RegisterField<
5267        6,
5268        0x1,
5269        1,
5270        0,
5271        p000pfs_by::Ncodr,
5272        p000pfs_by::Ncodr,
5273        P000PfsBy_SPEC,
5274        crate::common::RW,
5275    > {
5276        crate::common::RegisterField::<
5277            6,
5278            0x1,
5279            1,
5280            0,
5281            p000pfs_by::Ncodr,
5282            p000pfs_by::Ncodr,
5283            P000PfsBy_SPEC,
5284            crate::common::RW,
5285        >::from_register(self, 0)
5286    }
5287
5288    #[doc = "Pull-up Control"]
5289    #[inline(always)]
5290    pub fn pcr(
5291        self,
5292    ) -> crate::common::RegisterField<
5293        4,
5294        0x1,
5295        1,
5296        0,
5297        p000pfs_by::Pcr,
5298        p000pfs_by::Pcr,
5299        P000PfsBy_SPEC,
5300        crate::common::RW,
5301    > {
5302        crate::common::RegisterField::<
5303            4,
5304            0x1,
5305            1,
5306            0,
5307            p000pfs_by::Pcr,
5308            p000pfs_by::Pcr,
5309            P000PfsBy_SPEC,
5310            crate::common::RW,
5311        >::from_register(self, 0)
5312    }
5313
5314    #[doc = "Port Direction"]
5315    #[inline(always)]
5316    pub fn pdr(
5317        self,
5318    ) -> crate::common::RegisterField<
5319        2,
5320        0x1,
5321        1,
5322        0,
5323        p000pfs_by::Pdr,
5324        p000pfs_by::Pdr,
5325        P000PfsBy_SPEC,
5326        crate::common::RW,
5327    > {
5328        crate::common::RegisterField::<
5329            2,
5330            0x1,
5331            1,
5332            0,
5333            p000pfs_by::Pdr,
5334            p000pfs_by::Pdr,
5335            P000PfsBy_SPEC,
5336            crate::common::RW,
5337        >::from_register(self, 0)
5338    }
5339
5340    #[doc = "Port Input Data"]
5341    #[inline(always)]
5342    pub fn pidr(
5343        self,
5344    ) -> crate::common::RegisterField<
5345        1,
5346        0x1,
5347        1,
5348        0,
5349        p000pfs_by::Pidr,
5350        p000pfs_by::Pidr,
5351        P000PfsBy_SPEC,
5352        crate::common::R,
5353    > {
5354        crate::common::RegisterField::<
5355            1,
5356            0x1,
5357            1,
5358            0,
5359            p000pfs_by::Pidr,
5360            p000pfs_by::Pidr,
5361            P000PfsBy_SPEC,
5362            crate::common::R,
5363        >::from_register(self, 0)
5364    }
5365
5366    #[doc = "Port Output Data"]
5367    #[inline(always)]
5368    pub fn podr(
5369        self,
5370    ) -> crate::common::RegisterField<
5371        0,
5372        0x1,
5373        1,
5374        0,
5375        p000pfs_by::Podr,
5376        p000pfs_by::Podr,
5377        P000PfsBy_SPEC,
5378        crate::common::RW,
5379    > {
5380        crate::common::RegisterField::<
5381            0,
5382            0x1,
5383            1,
5384            0,
5385            p000pfs_by::Podr,
5386            p000pfs_by::Podr,
5387            P000PfsBy_SPEC,
5388            crate::common::RW,
5389        >::from_register(self, 0)
5390    }
5391}
5392impl ::core::default::Default for P000PfsBy {
5393    #[inline(always)]
5394    fn default() -> P000PfsBy {
5395        <crate::RegValueT<P000PfsBy_SPEC> as RegisterValue<_>>::new(0)
5396    }
5397}
5398pub mod p000pfs_by {
5399
5400    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5401    pub struct Ncodr_SPEC;
5402    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
5403    impl Ncodr {
5404        #[doc = "CMOS output"]
5405        pub const _0: Self = Self::new(0);
5406
5407        #[doc = "NMOS open-drain output"]
5408        pub const _1: Self = Self::new(1);
5409    }
5410    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5411    pub struct Pcr_SPEC;
5412    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
5413    impl Pcr {
5414        #[doc = "Disables an input pull-up."]
5415        pub const _0: Self = Self::new(0);
5416
5417        #[doc = "Enables an input pull-up."]
5418        pub const _1: Self = Self::new(1);
5419    }
5420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5421    pub struct Pdr_SPEC;
5422    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
5423    impl Pdr {
5424        #[doc = "Input (Functions as an input pin.)"]
5425        pub const _0: Self = Self::new(0);
5426
5427        #[doc = "Output (Functions as an output pin.)"]
5428        pub const _1: Self = Self::new(1);
5429    }
5430    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5431    pub struct Pidr_SPEC;
5432    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
5433    impl Pidr {
5434        #[doc = "Low input"]
5435        pub const _0: Self = Self::new(0);
5436
5437        #[doc = "High input"]
5438        pub const _1: Self = Self::new(1);
5439    }
5440    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5441    pub struct Podr_SPEC;
5442    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
5443    impl Podr {
5444        #[doc = "Low output"]
5445        pub const _0: Self = Self::new(0);
5446
5447        #[doc = "High output"]
5448        pub const _1: Self = Self::new(1);
5449    }
5450}
5451#[doc(hidden)]
5452#[derive(Copy, Clone, Eq, PartialEq)]
5453pub struct P00Pfs_SPEC;
5454impl crate::sealed::RegSpec for P00Pfs_SPEC {
5455    type DataType = u32;
5456}
5457
5458#[doc = "P00%s Pin Function Control Register"]
5459pub type P00Pfs = crate::RegValueT<P00Pfs_SPEC>;
5460
5461impl NoBitfieldReg<P00Pfs_SPEC> for P00Pfs {}
5462impl ::core::default::Default for P00Pfs {
5463    #[inline(always)]
5464    fn default() -> P00Pfs {
5465        <crate::RegValueT<P00Pfs_SPEC> as RegisterValue<_>>::new(0)
5466    }
5467}
5468
5469#[doc(hidden)]
5470#[derive(Copy, Clone, Eq, PartialEq)]
5471pub struct P00PfsHa_SPEC;
5472impl crate::sealed::RegSpec for P00PfsHa_SPEC {
5473    type DataType = u16;
5474}
5475
5476#[doc = "P00%s Pin Function Control Register"]
5477pub type P00PfsHa = crate::RegValueT<P00PfsHa_SPEC>;
5478
5479impl NoBitfieldReg<P00PfsHa_SPEC> for P00PfsHa {}
5480impl ::core::default::Default for P00PfsHa {
5481    #[inline(always)]
5482    fn default() -> P00PfsHa {
5483        <crate::RegValueT<P00PfsHa_SPEC> as RegisterValue<_>>::new(0)
5484    }
5485}
5486
5487#[doc(hidden)]
5488#[derive(Copy, Clone, Eq, PartialEq)]
5489pub struct P00PfsBy_SPEC;
5490impl crate::sealed::RegSpec for P00PfsBy_SPEC {
5491    type DataType = u8;
5492}
5493
5494#[doc = "P00%s Pin Function Control Register"]
5495pub type P00PfsBy = crate::RegValueT<P00PfsBy_SPEC>;
5496
5497impl NoBitfieldReg<P00PfsBy_SPEC> for P00PfsBy {}
5498impl ::core::default::Default for P00PfsBy {
5499    #[inline(always)]
5500    fn default() -> P00PfsBy {
5501        <crate::RegValueT<P00PfsBy_SPEC> as RegisterValue<_>>::new(0)
5502    }
5503}
5504
5505#[doc(hidden)]
5506#[derive(Copy, Clone, Eq, PartialEq)]
5507pub struct P0Pfs_SPEC;
5508impl crate::sealed::RegSpec for P0Pfs_SPEC {
5509    type DataType = u32;
5510}
5511
5512#[doc = "P0%s Pin Function Control Register"]
5513pub type P0Pfs = crate::RegValueT<P0Pfs_SPEC>;
5514
5515impl NoBitfieldReg<P0Pfs_SPEC> for P0Pfs {}
5516impl ::core::default::Default for P0Pfs {
5517    #[inline(always)]
5518    fn default() -> P0Pfs {
5519        <crate::RegValueT<P0Pfs_SPEC> as RegisterValue<_>>::new(0)
5520    }
5521}
5522
5523#[doc(hidden)]
5524#[derive(Copy, Clone, Eq, PartialEq)]
5525pub struct P0PfsHa_SPEC;
5526impl crate::sealed::RegSpec for P0PfsHa_SPEC {
5527    type DataType = u16;
5528}
5529
5530#[doc = "P0%s Pin Function Control Register"]
5531pub type P0PfsHa = crate::RegValueT<P0PfsHa_SPEC>;
5532
5533impl NoBitfieldReg<P0PfsHa_SPEC> for P0PfsHa {}
5534impl ::core::default::Default for P0PfsHa {
5535    #[inline(always)]
5536    fn default() -> P0PfsHa {
5537        <crate::RegValueT<P0PfsHa_SPEC> as RegisterValue<_>>::new(0)
5538    }
5539}
5540
5541#[doc(hidden)]
5542#[derive(Copy, Clone, Eq, PartialEq)]
5543pub struct P0PfsBy_SPEC;
5544impl crate::sealed::RegSpec for P0PfsBy_SPEC {
5545    type DataType = u8;
5546}
5547
5548#[doc = "P0%s Pin Function Control Register"]
5549pub type P0PfsBy = crate::RegValueT<P0PfsBy_SPEC>;
5550
5551impl NoBitfieldReg<P0PfsBy_SPEC> for P0PfsBy {}
5552impl ::core::default::Default for P0PfsBy {
5553    #[inline(always)]
5554    fn default() -> P0PfsBy {
5555        <crate::RegValueT<P0PfsBy_SPEC> as RegisterValue<_>>::new(0)
5556    }
5557}
5558
5559#[doc(hidden)]
5560#[derive(Copy, Clone, Eq, PartialEq)]
5561pub struct P100Pfs_SPEC;
5562impl crate::sealed::RegSpec for P100Pfs_SPEC {
5563    type DataType = u32;
5564}
5565
5566#[doc = "P100 Pin Function Control Register"]
5567pub type P100Pfs = crate::RegValueT<P100Pfs_SPEC>;
5568
5569impl P100Pfs {
5570    #[doc = "Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table"]
5571    #[inline(always)]
5572    pub fn psel(
5573        self,
5574    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, P100Pfs_SPEC, crate::common::RW> {
5575        crate::common::RegisterField::<24,0x1f,1,0,u8,u8,P100Pfs_SPEC,crate::common::RW>::from_register(self,0)
5576    }
5577
5578    #[doc = "Port Mode Control"]
5579    #[inline(always)]
5580    pub fn pmr(
5581        self,
5582    ) -> crate::common::RegisterField<
5583        16,
5584        0x1,
5585        1,
5586        0,
5587        p100pfs::Pmr,
5588        p100pfs::Pmr,
5589        P100Pfs_SPEC,
5590        crate::common::RW,
5591    > {
5592        crate::common::RegisterField::<
5593            16,
5594            0x1,
5595            1,
5596            0,
5597            p100pfs::Pmr,
5598            p100pfs::Pmr,
5599            P100Pfs_SPEC,
5600            crate::common::RW,
5601        >::from_register(self, 0)
5602    }
5603
5604    #[doc = "Analog Input enable"]
5605    #[inline(always)]
5606    pub fn asel(
5607        self,
5608    ) -> crate::common::RegisterField<
5609        15,
5610        0x1,
5611        1,
5612        0,
5613        p100pfs::Asel,
5614        p100pfs::Asel,
5615        P100Pfs_SPEC,
5616        crate::common::RW,
5617    > {
5618        crate::common::RegisterField::<
5619            15,
5620            0x1,
5621            1,
5622            0,
5623            p100pfs::Asel,
5624            p100pfs::Asel,
5625            P100Pfs_SPEC,
5626            crate::common::RW,
5627        >::from_register(self, 0)
5628    }
5629
5630    #[doc = "IRQ input enable"]
5631    #[inline(always)]
5632    pub fn isel(
5633        self,
5634    ) -> crate::common::RegisterField<
5635        14,
5636        0x1,
5637        1,
5638        0,
5639        p100pfs::Isel,
5640        p100pfs::Isel,
5641        P100Pfs_SPEC,
5642        crate::common::RW,
5643    > {
5644        crate::common::RegisterField::<
5645            14,
5646            0x1,
5647            1,
5648            0,
5649            p100pfs::Isel,
5650            p100pfs::Isel,
5651            P100Pfs_SPEC,
5652            crate::common::RW,
5653        >::from_register(self, 0)
5654    }
5655
5656    #[doc = "Event on Falling"]
5657    #[inline(always)]
5658    pub fn eof(
5659        self,
5660    ) -> crate::common::RegisterField<
5661        13,
5662        0x1,
5663        1,
5664        0,
5665        p100pfs::Eof,
5666        p100pfs::Eof,
5667        P100Pfs_SPEC,
5668        crate::common::RW,
5669    > {
5670        crate::common::RegisterField::<
5671            13,
5672            0x1,
5673            1,
5674            0,
5675            p100pfs::Eof,
5676            p100pfs::Eof,
5677            P100Pfs_SPEC,
5678            crate::common::RW,
5679        >::from_register(self, 0)
5680    }
5681
5682    #[doc = "Event on Rising"]
5683    #[inline(always)]
5684    pub fn eor(
5685        self,
5686    ) -> crate::common::RegisterField<
5687        12,
5688        0x1,
5689        1,
5690        0,
5691        p100pfs::Eor,
5692        p100pfs::Eor,
5693        P100Pfs_SPEC,
5694        crate::common::RW,
5695    > {
5696        crate::common::RegisterField::<
5697            12,
5698            0x1,
5699            1,
5700            0,
5701            p100pfs::Eor,
5702            p100pfs::Eor,
5703            P100Pfs_SPEC,
5704            crate::common::RW,
5705        >::from_register(self, 0)
5706    }
5707
5708    #[doc = "Drive Strength Control Register"]
5709    #[inline(always)]
5710    pub fn dscr(
5711        self,
5712    ) -> crate::common::RegisterField<
5713        10,
5714        0x3,
5715        1,
5716        0,
5717        p100pfs::Dscr,
5718        p100pfs::Dscr,
5719        P100Pfs_SPEC,
5720        crate::common::RW,
5721    > {
5722        crate::common::RegisterField::<
5723            10,
5724            0x3,
5725            1,
5726            0,
5727            p100pfs::Dscr,
5728            p100pfs::Dscr,
5729            P100Pfs_SPEC,
5730            crate::common::RW,
5731        >::from_register(self, 0)
5732    }
5733
5734    #[doc = "N-Channel Open Drain Control"]
5735    #[inline(always)]
5736    pub fn ncodr(
5737        self,
5738    ) -> crate::common::RegisterField<
5739        6,
5740        0x1,
5741        1,
5742        0,
5743        p100pfs::Ncodr,
5744        p100pfs::Ncodr,
5745        P100Pfs_SPEC,
5746        crate::common::RW,
5747    > {
5748        crate::common::RegisterField::<
5749            6,
5750            0x1,
5751            1,
5752            0,
5753            p100pfs::Ncodr,
5754            p100pfs::Ncodr,
5755            P100Pfs_SPEC,
5756            crate::common::RW,
5757        >::from_register(self, 0)
5758    }
5759
5760    #[doc = "Pull-up Control"]
5761    #[inline(always)]
5762    pub fn pcr(
5763        self,
5764    ) -> crate::common::RegisterField<
5765        4,
5766        0x1,
5767        1,
5768        0,
5769        p100pfs::Pcr,
5770        p100pfs::Pcr,
5771        P100Pfs_SPEC,
5772        crate::common::RW,
5773    > {
5774        crate::common::RegisterField::<
5775            4,
5776            0x1,
5777            1,
5778            0,
5779            p100pfs::Pcr,
5780            p100pfs::Pcr,
5781            P100Pfs_SPEC,
5782            crate::common::RW,
5783        >::from_register(self, 0)
5784    }
5785
5786    #[doc = "Port Direction"]
5787    #[inline(always)]
5788    pub fn pdr(
5789        self,
5790    ) -> crate::common::RegisterField<
5791        2,
5792        0x1,
5793        1,
5794        0,
5795        p100pfs::Pdr,
5796        p100pfs::Pdr,
5797        P100Pfs_SPEC,
5798        crate::common::RW,
5799    > {
5800        crate::common::RegisterField::<
5801            2,
5802            0x1,
5803            1,
5804            0,
5805            p100pfs::Pdr,
5806            p100pfs::Pdr,
5807            P100Pfs_SPEC,
5808            crate::common::RW,
5809        >::from_register(self, 0)
5810    }
5811
5812    #[doc = "Port Input Data"]
5813    #[inline(always)]
5814    pub fn pidr(
5815        self,
5816    ) -> crate::common::RegisterField<
5817        1,
5818        0x1,
5819        1,
5820        0,
5821        p100pfs::Pidr,
5822        p100pfs::Pidr,
5823        P100Pfs_SPEC,
5824        crate::common::R,
5825    > {
5826        crate::common::RegisterField::<
5827            1,
5828            0x1,
5829            1,
5830            0,
5831            p100pfs::Pidr,
5832            p100pfs::Pidr,
5833            P100Pfs_SPEC,
5834            crate::common::R,
5835        >::from_register(self, 0)
5836    }
5837
5838    #[doc = "Port Output Data"]
5839    #[inline(always)]
5840    pub fn podr(
5841        self,
5842    ) -> crate::common::RegisterField<
5843        0,
5844        0x1,
5845        1,
5846        0,
5847        p100pfs::Podr,
5848        p100pfs::Podr,
5849        P100Pfs_SPEC,
5850        crate::common::RW,
5851    > {
5852        crate::common::RegisterField::<
5853            0,
5854            0x1,
5855            1,
5856            0,
5857            p100pfs::Podr,
5858            p100pfs::Podr,
5859            P100Pfs_SPEC,
5860            crate::common::RW,
5861        >::from_register(self, 0)
5862    }
5863}
5864impl ::core::default::Default for P100Pfs {
5865    #[inline(always)]
5866    fn default() -> P100Pfs {
5867        <crate::RegValueT<P100Pfs_SPEC> as RegisterValue<_>>::new(0)
5868    }
5869}
5870pub mod p100pfs {
5871
5872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5873    pub struct Pmr_SPEC;
5874    pub type Pmr = crate::EnumBitfieldStruct<u8, Pmr_SPEC>;
5875    impl Pmr {
5876        #[doc = "Uses the pin as a general I/O pin."]
5877        pub const _0: Self = Self::new(0);
5878
5879        #[doc = "Uses the pin as an I/O port for peripheral functions."]
5880        pub const _1: Self = Self::new(1);
5881    }
5882    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5883    pub struct Asel_SPEC;
5884    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
5885    impl Asel {
5886        #[doc = "Used other than as analog pin"]
5887        pub const _0: Self = Self::new(0);
5888
5889        #[doc = "Used as analog pin"]
5890        pub const _1: Self = Self::new(1);
5891    }
5892    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5893    pub struct Isel_SPEC;
5894    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
5895    impl Isel {
5896        #[doc = "Not used as IRQn input pin"]
5897        pub const _0: Self = Self::new(0);
5898
5899        #[doc = "Used as IRQn input pin"]
5900        pub const _1: Self = Self::new(1);
5901    }
5902    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5903    pub struct Eof_SPEC;
5904    pub type Eof = crate::EnumBitfieldStruct<u8, Eof_SPEC>;
5905    impl Eof {
5906        #[doc = "Do not care"]
5907        pub const _0: Self = Self::new(0);
5908
5909        #[doc = "Detect falling edge"]
5910        pub const _1: Self = Self::new(1);
5911    }
5912    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5913    pub struct Eor_SPEC;
5914    pub type Eor = crate::EnumBitfieldStruct<u8, Eor_SPEC>;
5915    impl Eor {
5916        #[doc = "Do not care"]
5917        pub const _0: Self = Self::new(0);
5918
5919        #[doc = "Detect rising edge"]
5920        pub const _1: Self = Self::new(1);
5921    }
5922    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5923    pub struct Dscr_SPEC;
5924    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
5925    impl Dscr {
5926        #[doc = "Normal drive output"]
5927        pub const _00: Self = Self::new(0);
5928
5929        #[doc = "Middle drive output"]
5930        pub const _01: Self = Self::new(1);
5931
5932        #[doc = "Setting prohibited"]
5933        pub const _10: Self = Self::new(2);
5934
5935        #[doc = "High-drive output"]
5936        pub const _11: Self = Self::new(3);
5937    }
5938    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5939    pub struct Ncodr_SPEC;
5940    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
5941    impl Ncodr {
5942        #[doc = "CMOS output"]
5943        pub const _0: Self = Self::new(0);
5944
5945        #[doc = "NMOS open-drain output"]
5946        pub const _1: Self = Self::new(1);
5947    }
5948    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5949    pub struct Pcr_SPEC;
5950    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
5951    impl Pcr {
5952        #[doc = "Disables an input pull-up."]
5953        pub const _0: Self = Self::new(0);
5954
5955        #[doc = "Enables an input pull-up."]
5956        pub const _1: Self = Self::new(1);
5957    }
5958    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5959    pub struct Pdr_SPEC;
5960    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
5961    impl Pdr {
5962        #[doc = "Input (Functions as an input pin.)"]
5963        pub const _0: Self = Self::new(0);
5964
5965        #[doc = "Output (Functions as an output pin.)"]
5966        pub const _1: Self = Self::new(1);
5967    }
5968    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5969    pub struct Pidr_SPEC;
5970    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
5971    impl Pidr {
5972        #[doc = "Low input"]
5973        pub const _0: Self = Self::new(0);
5974
5975        #[doc = "High input"]
5976        pub const _1: Self = Self::new(1);
5977    }
5978    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5979    pub struct Podr_SPEC;
5980    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
5981    impl Podr {
5982        #[doc = "Low output"]
5983        pub const _0: Self = Self::new(0);
5984
5985        #[doc = "High output"]
5986        pub const _1: Self = Self::new(1);
5987    }
5988}
5989#[doc(hidden)]
5990#[derive(Copy, Clone, Eq, PartialEq)]
5991pub struct P100PfsHa_SPEC;
5992impl crate::sealed::RegSpec for P100PfsHa_SPEC {
5993    type DataType = u16;
5994}
5995
5996#[doc = "P100 Pin Function Control Register"]
5997pub type P100PfsHa = crate::RegValueT<P100PfsHa_SPEC>;
5998
5999impl P100PfsHa {
6000    #[doc = "Analog Input enable"]
6001    #[inline(always)]
6002    pub fn asel(
6003        self,
6004    ) -> crate::common::RegisterField<
6005        15,
6006        0x1,
6007        1,
6008        0,
6009        p100pfs_ha::Asel,
6010        p100pfs_ha::Asel,
6011        P100PfsHa_SPEC,
6012        crate::common::RW,
6013    > {
6014        crate::common::RegisterField::<
6015            15,
6016            0x1,
6017            1,
6018            0,
6019            p100pfs_ha::Asel,
6020            p100pfs_ha::Asel,
6021            P100PfsHa_SPEC,
6022            crate::common::RW,
6023        >::from_register(self, 0)
6024    }
6025
6026    #[doc = "IRQ input enable"]
6027    #[inline(always)]
6028    pub fn isel(
6029        self,
6030    ) -> crate::common::RegisterField<
6031        14,
6032        0x1,
6033        1,
6034        0,
6035        p100pfs_ha::Isel,
6036        p100pfs_ha::Isel,
6037        P100PfsHa_SPEC,
6038        crate::common::RW,
6039    > {
6040        crate::common::RegisterField::<
6041            14,
6042            0x1,
6043            1,
6044            0,
6045            p100pfs_ha::Isel,
6046            p100pfs_ha::Isel,
6047            P100PfsHa_SPEC,
6048            crate::common::RW,
6049        >::from_register(self, 0)
6050    }
6051
6052    #[doc = "Event on Falling"]
6053    #[inline(always)]
6054    pub fn eof(
6055        self,
6056    ) -> crate::common::RegisterField<
6057        13,
6058        0x1,
6059        1,
6060        0,
6061        p100pfs_ha::Eof,
6062        p100pfs_ha::Eof,
6063        P100PfsHa_SPEC,
6064        crate::common::RW,
6065    > {
6066        crate::common::RegisterField::<
6067            13,
6068            0x1,
6069            1,
6070            0,
6071            p100pfs_ha::Eof,
6072            p100pfs_ha::Eof,
6073            P100PfsHa_SPEC,
6074            crate::common::RW,
6075        >::from_register(self, 0)
6076    }
6077
6078    #[doc = "Event on Rising"]
6079    #[inline(always)]
6080    pub fn eor(
6081        self,
6082    ) -> crate::common::RegisterField<
6083        12,
6084        0x1,
6085        1,
6086        0,
6087        p100pfs_ha::Eor,
6088        p100pfs_ha::Eor,
6089        P100PfsHa_SPEC,
6090        crate::common::RW,
6091    > {
6092        crate::common::RegisterField::<
6093            12,
6094            0x1,
6095            1,
6096            0,
6097            p100pfs_ha::Eor,
6098            p100pfs_ha::Eor,
6099            P100PfsHa_SPEC,
6100            crate::common::RW,
6101        >::from_register(self, 0)
6102    }
6103
6104    #[doc = "Drive Strength Control Register"]
6105    #[inline(always)]
6106    pub fn dscr(
6107        self,
6108    ) -> crate::common::RegisterField<
6109        10,
6110        0x3,
6111        1,
6112        0,
6113        p100pfs_ha::Dscr,
6114        p100pfs_ha::Dscr,
6115        P100PfsHa_SPEC,
6116        crate::common::RW,
6117    > {
6118        crate::common::RegisterField::<
6119            10,
6120            0x3,
6121            1,
6122            0,
6123            p100pfs_ha::Dscr,
6124            p100pfs_ha::Dscr,
6125            P100PfsHa_SPEC,
6126            crate::common::RW,
6127        >::from_register(self, 0)
6128    }
6129
6130    #[doc = "N-Channel Open Drain Control"]
6131    #[inline(always)]
6132    pub fn ncodr(
6133        self,
6134    ) -> crate::common::RegisterField<
6135        6,
6136        0x1,
6137        1,
6138        0,
6139        p100pfs_ha::Ncodr,
6140        p100pfs_ha::Ncodr,
6141        P100PfsHa_SPEC,
6142        crate::common::RW,
6143    > {
6144        crate::common::RegisterField::<
6145            6,
6146            0x1,
6147            1,
6148            0,
6149            p100pfs_ha::Ncodr,
6150            p100pfs_ha::Ncodr,
6151            P100PfsHa_SPEC,
6152            crate::common::RW,
6153        >::from_register(self, 0)
6154    }
6155
6156    #[doc = "Pull-up Control"]
6157    #[inline(always)]
6158    pub fn pcr(
6159        self,
6160    ) -> crate::common::RegisterField<
6161        4,
6162        0x1,
6163        1,
6164        0,
6165        p100pfs_ha::Pcr,
6166        p100pfs_ha::Pcr,
6167        P100PfsHa_SPEC,
6168        crate::common::RW,
6169    > {
6170        crate::common::RegisterField::<
6171            4,
6172            0x1,
6173            1,
6174            0,
6175            p100pfs_ha::Pcr,
6176            p100pfs_ha::Pcr,
6177            P100PfsHa_SPEC,
6178            crate::common::RW,
6179        >::from_register(self, 0)
6180    }
6181
6182    #[doc = "Port Direction"]
6183    #[inline(always)]
6184    pub fn pdr(
6185        self,
6186    ) -> crate::common::RegisterField<
6187        2,
6188        0x1,
6189        1,
6190        0,
6191        p100pfs_ha::Pdr,
6192        p100pfs_ha::Pdr,
6193        P100PfsHa_SPEC,
6194        crate::common::RW,
6195    > {
6196        crate::common::RegisterField::<
6197            2,
6198            0x1,
6199            1,
6200            0,
6201            p100pfs_ha::Pdr,
6202            p100pfs_ha::Pdr,
6203            P100PfsHa_SPEC,
6204            crate::common::RW,
6205        >::from_register(self, 0)
6206    }
6207
6208    #[doc = "Port Input Data"]
6209    #[inline(always)]
6210    pub fn pidr(
6211        self,
6212    ) -> crate::common::RegisterField<
6213        1,
6214        0x1,
6215        1,
6216        0,
6217        p100pfs_ha::Pidr,
6218        p100pfs_ha::Pidr,
6219        P100PfsHa_SPEC,
6220        crate::common::R,
6221    > {
6222        crate::common::RegisterField::<
6223            1,
6224            0x1,
6225            1,
6226            0,
6227            p100pfs_ha::Pidr,
6228            p100pfs_ha::Pidr,
6229            P100PfsHa_SPEC,
6230            crate::common::R,
6231        >::from_register(self, 0)
6232    }
6233
6234    #[doc = "Port Output Data"]
6235    #[inline(always)]
6236    pub fn podr(
6237        self,
6238    ) -> crate::common::RegisterField<
6239        0,
6240        0x1,
6241        1,
6242        0,
6243        p100pfs_ha::Podr,
6244        p100pfs_ha::Podr,
6245        P100PfsHa_SPEC,
6246        crate::common::RW,
6247    > {
6248        crate::common::RegisterField::<
6249            0,
6250            0x1,
6251            1,
6252            0,
6253            p100pfs_ha::Podr,
6254            p100pfs_ha::Podr,
6255            P100PfsHa_SPEC,
6256            crate::common::RW,
6257        >::from_register(self, 0)
6258    }
6259}
6260impl ::core::default::Default for P100PfsHa {
6261    #[inline(always)]
6262    fn default() -> P100PfsHa {
6263        <crate::RegValueT<P100PfsHa_SPEC> as RegisterValue<_>>::new(0)
6264    }
6265}
6266pub mod p100pfs_ha {
6267
6268    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6269    pub struct Asel_SPEC;
6270    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
6271    impl Asel {
6272        #[doc = "Used other than as analog pin"]
6273        pub const _0: Self = Self::new(0);
6274
6275        #[doc = "Used as analog pin"]
6276        pub const _1: Self = Self::new(1);
6277    }
6278    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6279    pub struct Isel_SPEC;
6280    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
6281    impl Isel {
6282        #[doc = "Not used as IRQn input pin"]
6283        pub const _0: Self = Self::new(0);
6284
6285        #[doc = "Used as IRQn input pin"]
6286        pub const _1: Self = Self::new(1);
6287    }
6288    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6289    pub struct Eof_SPEC;
6290    pub type Eof = crate::EnumBitfieldStruct<u8, Eof_SPEC>;
6291    impl Eof {
6292        #[doc = "Do not care"]
6293        pub const _0: Self = Self::new(0);
6294
6295        #[doc = "Detect falling edge"]
6296        pub const _1: Self = Self::new(1);
6297    }
6298    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6299    pub struct Eor_SPEC;
6300    pub type Eor = crate::EnumBitfieldStruct<u8, Eor_SPEC>;
6301    impl Eor {
6302        #[doc = "Do not care"]
6303        pub const _0: Self = Self::new(0);
6304
6305        #[doc = "Detect rising edge"]
6306        pub const _1: Self = Self::new(1);
6307    }
6308    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6309    pub struct Dscr_SPEC;
6310    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
6311    impl Dscr {
6312        #[doc = "Normal drive output"]
6313        pub const _00: Self = Self::new(0);
6314
6315        #[doc = "Middle drive output"]
6316        pub const _01: Self = Self::new(1);
6317
6318        #[doc = "Setting prohibited"]
6319        pub const _10: Self = Self::new(2);
6320
6321        #[doc = "High-drive output"]
6322        pub const _11: Self = Self::new(3);
6323    }
6324    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6325    pub struct Ncodr_SPEC;
6326    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
6327    impl Ncodr {
6328        #[doc = "CMOS output"]
6329        pub const _0: Self = Self::new(0);
6330
6331        #[doc = "NMOS open-drain output"]
6332        pub const _1: Self = Self::new(1);
6333    }
6334    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6335    pub struct Pcr_SPEC;
6336    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
6337    impl Pcr {
6338        #[doc = "Disables an input pull-up."]
6339        pub const _0: Self = Self::new(0);
6340
6341        #[doc = "Enables an input pull-up."]
6342        pub const _1: Self = Self::new(1);
6343    }
6344    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6345    pub struct Pdr_SPEC;
6346    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
6347    impl Pdr {
6348        #[doc = "Input (Functions as an input pin.)"]
6349        pub const _0: Self = Self::new(0);
6350
6351        #[doc = "Output (Functions as an output pin.)"]
6352        pub const _1: Self = Self::new(1);
6353    }
6354    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6355    pub struct Pidr_SPEC;
6356    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
6357    impl Pidr {
6358        #[doc = "Low input"]
6359        pub const _0: Self = Self::new(0);
6360
6361        #[doc = "High input"]
6362        pub const _1: Self = Self::new(1);
6363    }
6364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6365    pub struct Podr_SPEC;
6366    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
6367    impl Podr {
6368        #[doc = "Low output"]
6369        pub const _0: Self = Self::new(0);
6370
6371        #[doc = "High output"]
6372        pub const _1: Self = Self::new(1);
6373    }
6374}
6375#[doc(hidden)]
6376#[derive(Copy, Clone, Eq, PartialEq)]
6377pub struct P100PfsBy_SPEC;
6378impl crate::sealed::RegSpec for P100PfsBy_SPEC {
6379    type DataType = u8;
6380}
6381
6382#[doc = "P100 Pin Function Control Register"]
6383pub type P100PfsBy = crate::RegValueT<P100PfsBy_SPEC>;
6384
6385impl P100PfsBy {
6386    #[doc = "N-Channel Open Drain Control"]
6387    #[inline(always)]
6388    pub fn ncodr(
6389        self,
6390    ) -> crate::common::RegisterField<
6391        6,
6392        0x1,
6393        1,
6394        0,
6395        p100pfs_by::Ncodr,
6396        p100pfs_by::Ncodr,
6397        P100PfsBy_SPEC,
6398        crate::common::RW,
6399    > {
6400        crate::common::RegisterField::<
6401            6,
6402            0x1,
6403            1,
6404            0,
6405            p100pfs_by::Ncodr,
6406            p100pfs_by::Ncodr,
6407            P100PfsBy_SPEC,
6408            crate::common::RW,
6409        >::from_register(self, 0)
6410    }
6411
6412    #[doc = "Pull-up Control"]
6413    #[inline(always)]
6414    pub fn pcr(
6415        self,
6416    ) -> crate::common::RegisterField<
6417        4,
6418        0x1,
6419        1,
6420        0,
6421        p100pfs_by::Pcr,
6422        p100pfs_by::Pcr,
6423        P100PfsBy_SPEC,
6424        crate::common::RW,
6425    > {
6426        crate::common::RegisterField::<
6427            4,
6428            0x1,
6429            1,
6430            0,
6431            p100pfs_by::Pcr,
6432            p100pfs_by::Pcr,
6433            P100PfsBy_SPEC,
6434            crate::common::RW,
6435        >::from_register(self, 0)
6436    }
6437
6438    #[doc = "Port Direction"]
6439    #[inline(always)]
6440    pub fn pdr(
6441        self,
6442    ) -> crate::common::RegisterField<
6443        2,
6444        0x1,
6445        1,
6446        0,
6447        p100pfs_by::Pdr,
6448        p100pfs_by::Pdr,
6449        P100PfsBy_SPEC,
6450        crate::common::RW,
6451    > {
6452        crate::common::RegisterField::<
6453            2,
6454            0x1,
6455            1,
6456            0,
6457            p100pfs_by::Pdr,
6458            p100pfs_by::Pdr,
6459            P100PfsBy_SPEC,
6460            crate::common::RW,
6461        >::from_register(self, 0)
6462    }
6463
6464    #[doc = "Port Input Data"]
6465    #[inline(always)]
6466    pub fn pidr(
6467        self,
6468    ) -> crate::common::RegisterField<
6469        1,
6470        0x1,
6471        1,
6472        0,
6473        p100pfs_by::Pidr,
6474        p100pfs_by::Pidr,
6475        P100PfsBy_SPEC,
6476        crate::common::R,
6477    > {
6478        crate::common::RegisterField::<
6479            1,
6480            0x1,
6481            1,
6482            0,
6483            p100pfs_by::Pidr,
6484            p100pfs_by::Pidr,
6485            P100PfsBy_SPEC,
6486            crate::common::R,
6487        >::from_register(self, 0)
6488    }
6489
6490    #[doc = "Port Output Data"]
6491    #[inline(always)]
6492    pub fn podr(
6493        self,
6494    ) -> crate::common::RegisterField<
6495        0,
6496        0x1,
6497        1,
6498        0,
6499        p100pfs_by::Podr,
6500        p100pfs_by::Podr,
6501        P100PfsBy_SPEC,
6502        crate::common::RW,
6503    > {
6504        crate::common::RegisterField::<
6505            0,
6506            0x1,
6507            1,
6508            0,
6509            p100pfs_by::Podr,
6510            p100pfs_by::Podr,
6511            P100PfsBy_SPEC,
6512            crate::common::RW,
6513        >::from_register(self, 0)
6514    }
6515}
6516impl ::core::default::Default for P100PfsBy {
6517    #[inline(always)]
6518    fn default() -> P100PfsBy {
6519        <crate::RegValueT<P100PfsBy_SPEC> as RegisterValue<_>>::new(0)
6520    }
6521}
6522pub mod p100pfs_by {
6523
6524    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6525    pub struct Ncodr_SPEC;
6526    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
6527    impl Ncodr {
6528        #[doc = "CMOS output"]
6529        pub const _0: Self = Self::new(0);
6530
6531        #[doc = "NMOS open-drain output"]
6532        pub const _1: Self = Self::new(1);
6533    }
6534    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6535    pub struct Pcr_SPEC;
6536    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
6537    impl Pcr {
6538        #[doc = "Disables an input pull-up."]
6539        pub const _0: Self = Self::new(0);
6540
6541        #[doc = "Enables an input pull-up."]
6542        pub const _1: Self = Self::new(1);
6543    }
6544    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6545    pub struct Pdr_SPEC;
6546    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
6547    impl Pdr {
6548        #[doc = "Input (Functions as an input pin.)"]
6549        pub const _0: Self = Self::new(0);
6550
6551        #[doc = "Output (Functions as an output pin.)"]
6552        pub const _1: Self = Self::new(1);
6553    }
6554    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6555    pub struct Pidr_SPEC;
6556    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
6557    impl Pidr {
6558        #[doc = "Low input"]
6559        pub const _0: Self = Self::new(0);
6560
6561        #[doc = "High input"]
6562        pub const _1: Self = Self::new(1);
6563    }
6564    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6565    pub struct Podr_SPEC;
6566    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
6567    impl Podr {
6568        #[doc = "Low output"]
6569        pub const _0: Self = Self::new(0);
6570
6571        #[doc = "High output"]
6572        pub const _1: Self = Self::new(1);
6573    }
6574}
6575#[doc(hidden)]
6576#[derive(Copy, Clone, Eq, PartialEq)]
6577pub struct P10Pfs_SPEC;
6578impl crate::sealed::RegSpec for P10Pfs_SPEC {
6579    type DataType = u32;
6580}
6581
6582#[doc = "P10%s Pin Function Control Register"]
6583pub type P10Pfs = crate::RegValueT<P10Pfs_SPEC>;
6584
6585impl NoBitfieldReg<P10Pfs_SPEC> for P10Pfs {}
6586impl ::core::default::Default for P10Pfs {
6587    #[inline(always)]
6588    fn default() -> P10Pfs {
6589        <crate::RegValueT<P10Pfs_SPEC> as RegisterValue<_>>::new(0)
6590    }
6591}
6592
6593#[doc(hidden)]
6594#[derive(Copy, Clone, Eq, PartialEq)]
6595pub struct P10PfsHa_SPEC;
6596impl crate::sealed::RegSpec for P10PfsHa_SPEC {
6597    type DataType = u16;
6598}
6599
6600#[doc = "P10%s Pin Function Control Register"]
6601pub type P10PfsHa = crate::RegValueT<P10PfsHa_SPEC>;
6602
6603impl NoBitfieldReg<P10PfsHa_SPEC> for P10PfsHa {}
6604impl ::core::default::Default for P10PfsHa {
6605    #[inline(always)]
6606    fn default() -> P10PfsHa {
6607        <crate::RegValueT<P10PfsHa_SPEC> as RegisterValue<_>>::new(0)
6608    }
6609}
6610
6611#[doc(hidden)]
6612#[derive(Copy, Clone, Eq, PartialEq)]
6613pub struct P10PfsBy_SPEC;
6614impl crate::sealed::RegSpec for P10PfsBy_SPEC {
6615    type DataType = u8;
6616}
6617
6618#[doc = "P10%s Pin Function Control Register"]
6619pub type P10PfsBy = crate::RegValueT<P10PfsBy_SPEC>;
6620
6621impl NoBitfieldReg<P10PfsBy_SPEC> for P10PfsBy {}
6622impl ::core::default::Default for P10PfsBy {
6623    #[inline(always)]
6624    fn default() -> P10PfsBy {
6625        <crate::RegValueT<P10PfsBy_SPEC> as RegisterValue<_>>::new(0)
6626    }
6627}
6628
6629#[doc(hidden)]
6630#[derive(Copy, Clone, Eq, PartialEq)]
6631pub struct P108Pfs_SPEC;
6632impl crate::sealed::RegSpec for P108Pfs_SPEC {
6633    type DataType = u32;
6634}
6635
6636#[doc = "P108 Pin Function Control Register"]
6637pub type P108Pfs = crate::RegValueT<P108Pfs_SPEC>;
6638
6639impl P108Pfs {
6640    #[doc = "Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table"]
6641    #[inline(always)]
6642    pub fn psel(
6643        self,
6644    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, P108Pfs_SPEC, crate::common::RW> {
6645        crate::common::RegisterField::<24,0x1f,1,0,u8,u8,P108Pfs_SPEC,crate::common::RW>::from_register(self,0)
6646    }
6647
6648    #[doc = "Port Mode Control"]
6649    #[inline(always)]
6650    pub fn pmr(
6651        self,
6652    ) -> crate::common::RegisterField<
6653        16,
6654        0x1,
6655        1,
6656        0,
6657        p108pfs::Pmr,
6658        p108pfs::Pmr,
6659        P108Pfs_SPEC,
6660        crate::common::RW,
6661    > {
6662        crate::common::RegisterField::<
6663            16,
6664            0x1,
6665            1,
6666            0,
6667            p108pfs::Pmr,
6668            p108pfs::Pmr,
6669            P108Pfs_SPEC,
6670            crate::common::RW,
6671        >::from_register(self, 0)
6672    }
6673
6674    #[doc = "Analog Input enable"]
6675    #[inline(always)]
6676    pub fn asel(
6677        self,
6678    ) -> crate::common::RegisterField<
6679        15,
6680        0x1,
6681        1,
6682        0,
6683        p108pfs::Asel,
6684        p108pfs::Asel,
6685        P108Pfs_SPEC,
6686        crate::common::RW,
6687    > {
6688        crate::common::RegisterField::<
6689            15,
6690            0x1,
6691            1,
6692            0,
6693            p108pfs::Asel,
6694            p108pfs::Asel,
6695            P108Pfs_SPEC,
6696            crate::common::RW,
6697        >::from_register(self, 0)
6698    }
6699
6700    #[doc = "IRQ input enable"]
6701    #[inline(always)]
6702    pub fn isel(
6703        self,
6704    ) -> crate::common::RegisterField<
6705        14,
6706        0x1,
6707        1,
6708        0,
6709        p108pfs::Isel,
6710        p108pfs::Isel,
6711        P108Pfs_SPEC,
6712        crate::common::RW,
6713    > {
6714        crate::common::RegisterField::<
6715            14,
6716            0x1,
6717            1,
6718            0,
6719            p108pfs::Isel,
6720            p108pfs::Isel,
6721            P108Pfs_SPEC,
6722            crate::common::RW,
6723        >::from_register(self, 0)
6724    }
6725
6726    #[doc = "Event on Falling"]
6727    #[inline(always)]
6728    pub fn eof(
6729        self,
6730    ) -> crate::common::RegisterField<
6731        13,
6732        0x1,
6733        1,
6734        0,
6735        p108pfs::Eof,
6736        p108pfs::Eof,
6737        P108Pfs_SPEC,
6738        crate::common::RW,
6739    > {
6740        crate::common::RegisterField::<
6741            13,
6742            0x1,
6743            1,
6744            0,
6745            p108pfs::Eof,
6746            p108pfs::Eof,
6747            P108Pfs_SPEC,
6748            crate::common::RW,
6749        >::from_register(self, 0)
6750    }
6751
6752    #[doc = "Event on Rising"]
6753    #[inline(always)]
6754    pub fn eor(
6755        self,
6756    ) -> crate::common::RegisterField<
6757        12,
6758        0x1,
6759        1,
6760        0,
6761        p108pfs::Eor,
6762        p108pfs::Eor,
6763        P108Pfs_SPEC,
6764        crate::common::RW,
6765    > {
6766        crate::common::RegisterField::<
6767            12,
6768            0x1,
6769            1,
6770            0,
6771            p108pfs::Eor,
6772            p108pfs::Eor,
6773            P108Pfs_SPEC,
6774            crate::common::RW,
6775        >::from_register(self, 0)
6776    }
6777
6778    #[doc = "Drive Strength Control Register"]
6779    #[inline(always)]
6780    pub fn dscr(
6781        self,
6782    ) -> crate::common::RegisterField<
6783        10,
6784        0x3,
6785        1,
6786        0,
6787        p108pfs::Dscr,
6788        p108pfs::Dscr,
6789        P108Pfs_SPEC,
6790        crate::common::RW,
6791    > {
6792        crate::common::RegisterField::<
6793            10,
6794            0x3,
6795            1,
6796            0,
6797            p108pfs::Dscr,
6798            p108pfs::Dscr,
6799            P108Pfs_SPEC,
6800            crate::common::RW,
6801        >::from_register(self, 0)
6802    }
6803
6804    #[doc = "N-Channel Open Drain Control"]
6805    #[inline(always)]
6806    pub fn ncodr(
6807        self,
6808    ) -> crate::common::RegisterField<
6809        6,
6810        0x1,
6811        1,
6812        0,
6813        p108pfs::Ncodr,
6814        p108pfs::Ncodr,
6815        P108Pfs_SPEC,
6816        crate::common::RW,
6817    > {
6818        crate::common::RegisterField::<
6819            6,
6820            0x1,
6821            1,
6822            0,
6823            p108pfs::Ncodr,
6824            p108pfs::Ncodr,
6825            P108Pfs_SPEC,
6826            crate::common::RW,
6827        >::from_register(self, 0)
6828    }
6829
6830    #[doc = "Pull-up Control"]
6831    #[inline(always)]
6832    pub fn pcr(
6833        self,
6834    ) -> crate::common::RegisterField<
6835        4,
6836        0x1,
6837        1,
6838        0,
6839        p108pfs::Pcr,
6840        p108pfs::Pcr,
6841        P108Pfs_SPEC,
6842        crate::common::RW,
6843    > {
6844        crate::common::RegisterField::<
6845            4,
6846            0x1,
6847            1,
6848            0,
6849            p108pfs::Pcr,
6850            p108pfs::Pcr,
6851            P108Pfs_SPEC,
6852            crate::common::RW,
6853        >::from_register(self, 0)
6854    }
6855
6856    #[doc = "Port Direction"]
6857    #[inline(always)]
6858    pub fn pdr(
6859        self,
6860    ) -> crate::common::RegisterField<
6861        2,
6862        0x1,
6863        1,
6864        0,
6865        p108pfs::Pdr,
6866        p108pfs::Pdr,
6867        P108Pfs_SPEC,
6868        crate::common::RW,
6869    > {
6870        crate::common::RegisterField::<
6871            2,
6872            0x1,
6873            1,
6874            0,
6875            p108pfs::Pdr,
6876            p108pfs::Pdr,
6877            P108Pfs_SPEC,
6878            crate::common::RW,
6879        >::from_register(self, 0)
6880    }
6881
6882    #[doc = "Port Input Data"]
6883    #[inline(always)]
6884    pub fn pidr(
6885        self,
6886    ) -> crate::common::RegisterField<
6887        1,
6888        0x1,
6889        1,
6890        0,
6891        p108pfs::Pidr,
6892        p108pfs::Pidr,
6893        P108Pfs_SPEC,
6894        crate::common::R,
6895    > {
6896        crate::common::RegisterField::<
6897            1,
6898            0x1,
6899            1,
6900            0,
6901            p108pfs::Pidr,
6902            p108pfs::Pidr,
6903            P108Pfs_SPEC,
6904            crate::common::R,
6905        >::from_register(self, 0)
6906    }
6907
6908    #[doc = "Port Output Data"]
6909    #[inline(always)]
6910    pub fn podr(
6911        self,
6912    ) -> crate::common::RegisterField<
6913        0,
6914        0x1,
6915        1,
6916        0,
6917        p108pfs::Podr,
6918        p108pfs::Podr,
6919        P108Pfs_SPEC,
6920        crate::common::RW,
6921    > {
6922        crate::common::RegisterField::<
6923            0,
6924            0x1,
6925            1,
6926            0,
6927            p108pfs::Podr,
6928            p108pfs::Podr,
6929            P108Pfs_SPEC,
6930            crate::common::RW,
6931        >::from_register(self, 0)
6932    }
6933}
6934impl ::core::default::Default for P108Pfs {
6935    #[inline(always)]
6936    fn default() -> P108Pfs {
6937        <crate::RegValueT<P108Pfs_SPEC> as RegisterValue<_>>::new(66576)
6938    }
6939}
6940pub mod p108pfs {
6941
6942    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6943    pub struct Pmr_SPEC;
6944    pub type Pmr = crate::EnumBitfieldStruct<u8, Pmr_SPEC>;
6945    impl Pmr {
6946        #[doc = "Uses the pin as a general I/O pin."]
6947        pub const _0: Self = Self::new(0);
6948
6949        #[doc = "Uses the pin as an I/O port for peripheral functions."]
6950        pub const _1: Self = Self::new(1);
6951    }
6952    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6953    pub struct Asel_SPEC;
6954    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
6955    impl Asel {
6956        #[doc = "Used other than as analog pin"]
6957        pub const _0: Self = Self::new(0);
6958
6959        #[doc = "Used as analog pin"]
6960        pub const _1: Self = Self::new(1);
6961    }
6962    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6963    pub struct Isel_SPEC;
6964    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
6965    impl Isel {
6966        #[doc = "Not used as IRQn input pin"]
6967        pub const _0: Self = Self::new(0);
6968
6969        #[doc = "Used as IRQn input pin"]
6970        pub const _1: Self = Self::new(1);
6971    }
6972    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6973    pub struct Eof_SPEC;
6974    pub type Eof = crate::EnumBitfieldStruct<u8, Eof_SPEC>;
6975    impl Eof {
6976        #[doc = "Do not care"]
6977        pub const _0: Self = Self::new(0);
6978
6979        #[doc = "Detect falling edge"]
6980        pub const _1: Self = Self::new(1);
6981    }
6982    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6983    pub struct Eor_SPEC;
6984    pub type Eor = crate::EnumBitfieldStruct<u8, Eor_SPEC>;
6985    impl Eor {
6986        #[doc = "Do not care"]
6987        pub const _0: Self = Self::new(0);
6988
6989        #[doc = "Detect rising edge"]
6990        pub const _1: Self = Self::new(1);
6991    }
6992    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6993    pub struct Dscr_SPEC;
6994    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
6995    impl Dscr {
6996        #[doc = "Normal drive output"]
6997        pub const _00: Self = Self::new(0);
6998
6999        #[doc = "Middle drive output"]
7000        pub const _01: Self = Self::new(1);
7001
7002        #[doc = "Setting prohibited"]
7003        pub const _10: Self = Self::new(2);
7004
7005        #[doc = "High-drive output"]
7006        pub const _11: Self = Self::new(3);
7007    }
7008    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7009    pub struct Ncodr_SPEC;
7010    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
7011    impl Ncodr {
7012        #[doc = "CMOS output"]
7013        pub const _0: Self = Self::new(0);
7014
7015        #[doc = "NMOS open-drain output"]
7016        pub const _1: Self = Self::new(1);
7017    }
7018    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7019    pub struct Pcr_SPEC;
7020    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
7021    impl Pcr {
7022        #[doc = "Disables an input pull-up."]
7023        pub const _0: Self = Self::new(0);
7024
7025        #[doc = "Enables an input pull-up."]
7026        pub const _1: Self = Self::new(1);
7027    }
7028    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7029    pub struct Pdr_SPEC;
7030    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
7031    impl Pdr {
7032        #[doc = "Input (Functions as an input pin.)"]
7033        pub const _0: Self = Self::new(0);
7034
7035        #[doc = "Output (Functions as an output pin.)"]
7036        pub const _1: Self = Self::new(1);
7037    }
7038    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7039    pub struct Pidr_SPEC;
7040    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
7041    impl Pidr {
7042        #[doc = "Low input"]
7043        pub const _0: Self = Self::new(0);
7044
7045        #[doc = "High input"]
7046        pub const _1: Self = Self::new(1);
7047    }
7048    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7049    pub struct Podr_SPEC;
7050    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
7051    impl Podr {
7052        #[doc = "Low output"]
7053        pub const _0: Self = Self::new(0);
7054
7055        #[doc = "High output"]
7056        pub const _1: Self = Self::new(1);
7057    }
7058}
7059#[doc(hidden)]
7060#[derive(Copy, Clone, Eq, PartialEq)]
7061pub struct P108PfsHa_SPEC;
7062impl crate::sealed::RegSpec for P108PfsHa_SPEC {
7063    type DataType = u16;
7064}
7065
7066#[doc = "P108 Pin Function Control Register"]
7067pub type P108PfsHa = crate::RegValueT<P108PfsHa_SPEC>;
7068
7069impl P108PfsHa {
7070    #[doc = "Analog Input enable"]
7071    #[inline(always)]
7072    pub fn asel(
7073        self,
7074    ) -> crate::common::RegisterField<
7075        15,
7076        0x1,
7077        1,
7078        0,
7079        p108pfs_ha::Asel,
7080        p108pfs_ha::Asel,
7081        P108PfsHa_SPEC,
7082        crate::common::RW,
7083    > {
7084        crate::common::RegisterField::<
7085            15,
7086            0x1,
7087            1,
7088            0,
7089            p108pfs_ha::Asel,
7090            p108pfs_ha::Asel,
7091            P108PfsHa_SPEC,
7092            crate::common::RW,
7093        >::from_register(self, 0)
7094    }
7095
7096    #[doc = "IRQ input enable"]
7097    #[inline(always)]
7098    pub fn isel(
7099        self,
7100    ) -> crate::common::RegisterField<
7101        14,
7102        0x1,
7103        1,
7104        0,
7105        p108pfs_ha::Isel,
7106        p108pfs_ha::Isel,
7107        P108PfsHa_SPEC,
7108        crate::common::RW,
7109    > {
7110        crate::common::RegisterField::<
7111            14,
7112            0x1,
7113            1,
7114            0,
7115            p108pfs_ha::Isel,
7116            p108pfs_ha::Isel,
7117            P108PfsHa_SPEC,
7118            crate::common::RW,
7119        >::from_register(self, 0)
7120    }
7121
7122    #[doc = "Event on Falling"]
7123    #[inline(always)]
7124    pub fn eof(
7125        self,
7126    ) -> crate::common::RegisterField<
7127        13,
7128        0x1,
7129        1,
7130        0,
7131        p108pfs_ha::Eof,
7132        p108pfs_ha::Eof,
7133        P108PfsHa_SPEC,
7134        crate::common::RW,
7135    > {
7136        crate::common::RegisterField::<
7137            13,
7138            0x1,
7139            1,
7140            0,
7141            p108pfs_ha::Eof,
7142            p108pfs_ha::Eof,
7143            P108PfsHa_SPEC,
7144            crate::common::RW,
7145        >::from_register(self, 0)
7146    }
7147
7148    #[doc = "Event on Rising"]
7149    #[inline(always)]
7150    pub fn eor(
7151        self,
7152    ) -> crate::common::RegisterField<
7153        12,
7154        0x1,
7155        1,
7156        0,
7157        p108pfs_ha::Eor,
7158        p108pfs_ha::Eor,
7159        P108PfsHa_SPEC,
7160        crate::common::RW,
7161    > {
7162        crate::common::RegisterField::<
7163            12,
7164            0x1,
7165            1,
7166            0,
7167            p108pfs_ha::Eor,
7168            p108pfs_ha::Eor,
7169            P108PfsHa_SPEC,
7170            crate::common::RW,
7171        >::from_register(self, 0)
7172    }
7173
7174    #[doc = "Drive Strength Control Register"]
7175    #[inline(always)]
7176    pub fn dscr(
7177        self,
7178    ) -> crate::common::RegisterField<
7179        10,
7180        0x3,
7181        1,
7182        0,
7183        p108pfs_ha::Dscr,
7184        p108pfs_ha::Dscr,
7185        P108PfsHa_SPEC,
7186        crate::common::RW,
7187    > {
7188        crate::common::RegisterField::<
7189            10,
7190            0x3,
7191            1,
7192            0,
7193            p108pfs_ha::Dscr,
7194            p108pfs_ha::Dscr,
7195            P108PfsHa_SPEC,
7196            crate::common::RW,
7197        >::from_register(self, 0)
7198    }
7199
7200    #[doc = "N-Channel Open Drain Control"]
7201    #[inline(always)]
7202    pub fn ncodr(
7203        self,
7204    ) -> crate::common::RegisterField<
7205        6,
7206        0x1,
7207        1,
7208        0,
7209        p108pfs_ha::Ncodr,
7210        p108pfs_ha::Ncodr,
7211        P108PfsHa_SPEC,
7212        crate::common::RW,
7213    > {
7214        crate::common::RegisterField::<
7215            6,
7216            0x1,
7217            1,
7218            0,
7219            p108pfs_ha::Ncodr,
7220            p108pfs_ha::Ncodr,
7221            P108PfsHa_SPEC,
7222            crate::common::RW,
7223        >::from_register(self, 0)
7224    }
7225
7226    #[doc = "Pull-up Control"]
7227    #[inline(always)]
7228    pub fn pcr(
7229        self,
7230    ) -> crate::common::RegisterField<
7231        4,
7232        0x1,
7233        1,
7234        0,
7235        p108pfs_ha::Pcr,
7236        p108pfs_ha::Pcr,
7237        P108PfsHa_SPEC,
7238        crate::common::RW,
7239    > {
7240        crate::common::RegisterField::<
7241            4,
7242            0x1,
7243            1,
7244            0,
7245            p108pfs_ha::Pcr,
7246            p108pfs_ha::Pcr,
7247            P108PfsHa_SPEC,
7248            crate::common::RW,
7249        >::from_register(self, 0)
7250    }
7251
7252    #[doc = "Port Direction"]
7253    #[inline(always)]
7254    pub fn pdr(
7255        self,
7256    ) -> crate::common::RegisterField<
7257        2,
7258        0x1,
7259        1,
7260        0,
7261        p108pfs_ha::Pdr,
7262        p108pfs_ha::Pdr,
7263        P108PfsHa_SPEC,
7264        crate::common::RW,
7265    > {
7266        crate::common::RegisterField::<
7267            2,
7268            0x1,
7269            1,
7270            0,
7271            p108pfs_ha::Pdr,
7272            p108pfs_ha::Pdr,
7273            P108PfsHa_SPEC,
7274            crate::common::RW,
7275        >::from_register(self, 0)
7276    }
7277
7278    #[doc = "Port Input Data"]
7279    #[inline(always)]
7280    pub fn pidr(
7281        self,
7282    ) -> crate::common::RegisterField<
7283        1,
7284        0x1,
7285        1,
7286        0,
7287        p108pfs_ha::Pidr,
7288        p108pfs_ha::Pidr,
7289        P108PfsHa_SPEC,
7290        crate::common::R,
7291    > {
7292        crate::common::RegisterField::<
7293            1,
7294            0x1,
7295            1,
7296            0,
7297            p108pfs_ha::Pidr,
7298            p108pfs_ha::Pidr,
7299            P108PfsHa_SPEC,
7300            crate::common::R,
7301        >::from_register(self, 0)
7302    }
7303
7304    #[doc = "Port Output Data"]
7305    #[inline(always)]
7306    pub fn podr(
7307        self,
7308    ) -> crate::common::RegisterField<
7309        0,
7310        0x1,
7311        1,
7312        0,
7313        p108pfs_ha::Podr,
7314        p108pfs_ha::Podr,
7315        P108PfsHa_SPEC,
7316        crate::common::RW,
7317    > {
7318        crate::common::RegisterField::<
7319            0,
7320            0x1,
7321            1,
7322            0,
7323            p108pfs_ha::Podr,
7324            p108pfs_ha::Podr,
7325            P108PfsHa_SPEC,
7326            crate::common::RW,
7327        >::from_register(self, 0)
7328    }
7329}
7330impl ::core::default::Default for P108PfsHa {
7331    #[inline(always)]
7332    fn default() -> P108PfsHa {
7333        <crate::RegValueT<P108PfsHa_SPEC> as RegisterValue<_>>::new(1040)
7334    }
7335}
7336pub mod p108pfs_ha {
7337
7338    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7339    pub struct Asel_SPEC;
7340    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
7341    impl Asel {
7342        #[doc = "Used other than as analog pin"]
7343        pub const _0: Self = Self::new(0);
7344
7345        #[doc = "Used as analog pin"]
7346        pub const _1: Self = Self::new(1);
7347    }
7348    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7349    pub struct Isel_SPEC;
7350    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
7351    impl Isel {
7352        #[doc = "Not used as IRQn input pin"]
7353        pub const _0: Self = Self::new(0);
7354
7355        #[doc = "Used as IRQn input pin"]
7356        pub const _1: Self = Self::new(1);
7357    }
7358    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7359    pub struct Eof_SPEC;
7360    pub type Eof = crate::EnumBitfieldStruct<u8, Eof_SPEC>;
7361    impl Eof {
7362        #[doc = "Do not care"]
7363        pub const _0: Self = Self::new(0);
7364
7365        #[doc = "Detect falling edge"]
7366        pub const _1: Self = Self::new(1);
7367    }
7368    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7369    pub struct Eor_SPEC;
7370    pub type Eor = crate::EnumBitfieldStruct<u8, Eor_SPEC>;
7371    impl Eor {
7372        #[doc = "Do not care"]
7373        pub const _0: Self = Self::new(0);
7374
7375        #[doc = "Detect rising edge"]
7376        pub const _1: Self = Self::new(1);
7377    }
7378    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7379    pub struct Dscr_SPEC;
7380    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
7381    impl Dscr {
7382        #[doc = "Normal drive output"]
7383        pub const _00: Self = Self::new(0);
7384
7385        #[doc = "Middle drive output"]
7386        pub const _01: Self = Self::new(1);
7387
7388        #[doc = "Setting prohibited"]
7389        pub const _10: Self = Self::new(2);
7390
7391        #[doc = "High-drive output"]
7392        pub const _11: Self = Self::new(3);
7393    }
7394    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7395    pub struct Ncodr_SPEC;
7396    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
7397    impl Ncodr {
7398        #[doc = "CMOS output"]
7399        pub const _0: Self = Self::new(0);
7400
7401        #[doc = "NMOS open-drain output"]
7402        pub const _1: Self = Self::new(1);
7403    }
7404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7405    pub struct Pcr_SPEC;
7406    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
7407    impl Pcr {
7408        #[doc = "Disables an input pull-up."]
7409        pub const _0: Self = Self::new(0);
7410
7411        #[doc = "Enables an input pull-up."]
7412        pub const _1: Self = Self::new(1);
7413    }
7414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7415    pub struct Pdr_SPEC;
7416    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
7417    impl Pdr {
7418        #[doc = "Input (Functions as an input pin.)"]
7419        pub const _0: Self = Self::new(0);
7420
7421        #[doc = "Output (Functions as an output pin.)"]
7422        pub const _1: Self = Self::new(1);
7423    }
7424    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7425    pub struct Pidr_SPEC;
7426    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
7427    impl Pidr {
7428        #[doc = "Low input"]
7429        pub const _0: Self = Self::new(0);
7430
7431        #[doc = "High input"]
7432        pub const _1: Self = Self::new(1);
7433    }
7434    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7435    pub struct Podr_SPEC;
7436    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
7437    impl Podr {
7438        #[doc = "Low output"]
7439        pub const _0: Self = Self::new(0);
7440
7441        #[doc = "High output"]
7442        pub const _1: Self = Self::new(1);
7443    }
7444}
7445#[doc(hidden)]
7446#[derive(Copy, Clone, Eq, PartialEq)]
7447pub struct P108PfsBy_SPEC;
7448impl crate::sealed::RegSpec for P108PfsBy_SPEC {
7449    type DataType = u8;
7450}
7451
7452#[doc = "P108 Pin Function Control Register"]
7453pub type P108PfsBy = crate::RegValueT<P108PfsBy_SPEC>;
7454
7455impl P108PfsBy {
7456    #[doc = "N-Channel Open Drain Control"]
7457    #[inline(always)]
7458    pub fn ncodr(
7459        self,
7460    ) -> crate::common::RegisterField<
7461        6,
7462        0x1,
7463        1,
7464        0,
7465        p108pfs_by::Ncodr,
7466        p108pfs_by::Ncodr,
7467        P108PfsBy_SPEC,
7468        crate::common::RW,
7469    > {
7470        crate::common::RegisterField::<
7471            6,
7472            0x1,
7473            1,
7474            0,
7475            p108pfs_by::Ncodr,
7476            p108pfs_by::Ncodr,
7477            P108PfsBy_SPEC,
7478            crate::common::RW,
7479        >::from_register(self, 0)
7480    }
7481
7482    #[doc = "Pull-up Control"]
7483    #[inline(always)]
7484    pub fn pcr(
7485        self,
7486    ) -> crate::common::RegisterField<
7487        4,
7488        0x1,
7489        1,
7490        0,
7491        p108pfs_by::Pcr,
7492        p108pfs_by::Pcr,
7493        P108PfsBy_SPEC,
7494        crate::common::RW,
7495    > {
7496        crate::common::RegisterField::<
7497            4,
7498            0x1,
7499            1,
7500            0,
7501            p108pfs_by::Pcr,
7502            p108pfs_by::Pcr,
7503            P108PfsBy_SPEC,
7504            crate::common::RW,
7505        >::from_register(self, 0)
7506    }
7507
7508    #[doc = "Port Direction"]
7509    #[inline(always)]
7510    pub fn pdr(
7511        self,
7512    ) -> crate::common::RegisterField<
7513        2,
7514        0x1,
7515        1,
7516        0,
7517        p108pfs_by::Pdr,
7518        p108pfs_by::Pdr,
7519        P108PfsBy_SPEC,
7520        crate::common::RW,
7521    > {
7522        crate::common::RegisterField::<
7523            2,
7524            0x1,
7525            1,
7526            0,
7527            p108pfs_by::Pdr,
7528            p108pfs_by::Pdr,
7529            P108PfsBy_SPEC,
7530            crate::common::RW,
7531        >::from_register(self, 0)
7532    }
7533
7534    #[doc = "Port Input Data"]
7535    #[inline(always)]
7536    pub fn pidr(
7537        self,
7538    ) -> crate::common::RegisterField<
7539        1,
7540        0x1,
7541        1,
7542        0,
7543        p108pfs_by::Pidr,
7544        p108pfs_by::Pidr,
7545        P108PfsBy_SPEC,
7546        crate::common::R,
7547    > {
7548        crate::common::RegisterField::<
7549            1,
7550            0x1,
7551            1,
7552            0,
7553            p108pfs_by::Pidr,
7554            p108pfs_by::Pidr,
7555            P108PfsBy_SPEC,
7556            crate::common::R,
7557        >::from_register(self, 0)
7558    }
7559
7560    #[doc = "Port Output Data"]
7561    #[inline(always)]
7562    pub fn podr(
7563        self,
7564    ) -> crate::common::RegisterField<
7565        0,
7566        0x1,
7567        1,
7568        0,
7569        p108pfs_by::Podr,
7570        p108pfs_by::Podr,
7571        P108PfsBy_SPEC,
7572        crate::common::RW,
7573    > {
7574        crate::common::RegisterField::<
7575            0,
7576            0x1,
7577            1,
7578            0,
7579            p108pfs_by::Podr,
7580            p108pfs_by::Podr,
7581            P108PfsBy_SPEC,
7582            crate::common::RW,
7583        >::from_register(self, 0)
7584    }
7585}
7586impl ::core::default::Default for P108PfsBy {
7587    #[inline(always)]
7588    fn default() -> P108PfsBy {
7589        <crate::RegValueT<P108PfsBy_SPEC> as RegisterValue<_>>::new(16)
7590    }
7591}
7592pub mod p108pfs_by {
7593
7594    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7595    pub struct Ncodr_SPEC;
7596    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
7597    impl Ncodr {
7598        #[doc = "CMOS output"]
7599        pub const _0: Self = Self::new(0);
7600
7601        #[doc = "NMOS open-drain output"]
7602        pub const _1: Self = Self::new(1);
7603    }
7604    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7605    pub struct Pcr_SPEC;
7606    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
7607    impl Pcr {
7608        #[doc = "Disables an input pull-up."]
7609        pub const _0: Self = Self::new(0);
7610
7611        #[doc = "Enables an input pull-up."]
7612        pub const _1: Self = Self::new(1);
7613    }
7614    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7615    pub struct Pdr_SPEC;
7616    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
7617    impl Pdr {
7618        #[doc = "Input (Functions as an input pin.)"]
7619        pub const _0: Self = Self::new(0);
7620
7621        #[doc = "Output (Functions as an output pin.)"]
7622        pub const _1: Self = Self::new(1);
7623    }
7624    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7625    pub struct Pidr_SPEC;
7626    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
7627    impl Pidr {
7628        #[doc = "Low input"]
7629        pub const _0: Self = Self::new(0);
7630
7631        #[doc = "High input"]
7632        pub const _1: Self = Self::new(1);
7633    }
7634    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7635    pub struct Podr_SPEC;
7636    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
7637    impl Podr {
7638        #[doc = "Low output"]
7639        pub const _0: Self = Self::new(0);
7640
7641        #[doc = "High output"]
7642        pub const _1: Self = Self::new(1);
7643    }
7644}
7645#[doc(hidden)]
7646#[derive(Copy, Clone, Eq, PartialEq)]
7647pub struct P109Pfs_SPEC;
7648impl crate::sealed::RegSpec for P109Pfs_SPEC {
7649    type DataType = u32;
7650}
7651
7652#[doc = "P109 Pin Function Control Register"]
7653pub type P109Pfs = crate::RegValueT<P109Pfs_SPEC>;
7654
7655impl NoBitfieldReg<P109Pfs_SPEC> for P109Pfs {}
7656impl ::core::default::Default for P109Pfs {
7657    #[inline(always)]
7658    fn default() -> P109Pfs {
7659        <crate::RegValueT<P109Pfs_SPEC> as RegisterValue<_>>::new(66576)
7660    }
7661}
7662
7663#[doc(hidden)]
7664#[derive(Copy, Clone, Eq, PartialEq)]
7665pub struct P109PfsHa_SPEC;
7666impl crate::sealed::RegSpec for P109PfsHa_SPEC {
7667    type DataType = u16;
7668}
7669
7670#[doc = "P109 Pin Function Control Register"]
7671pub type P109PfsHa = crate::RegValueT<P109PfsHa_SPEC>;
7672
7673impl NoBitfieldReg<P109PfsHa_SPEC> for P109PfsHa {}
7674impl ::core::default::Default for P109PfsHa {
7675    #[inline(always)]
7676    fn default() -> P109PfsHa {
7677        <crate::RegValueT<P109PfsHa_SPEC> as RegisterValue<_>>::new(1040)
7678    }
7679}
7680
7681#[doc(hidden)]
7682#[derive(Copy, Clone, Eq, PartialEq)]
7683pub struct P109PfsBy_SPEC;
7684impl crate::sealed::RegSpec for P109PfsBy_SPEC {
7685    type DataType = u8;
7686}
7687
7688#[doc = "P109 Pin Function Control Register"]
7689pub type P109PfsBy = crate::RegValueT<P109PfsBy_SPEC>;
7690
7691impl NoBitfieldReg<P109PfsBy_SPEC> for P109PfsBy {}
7692impl ::core::default::Default for P109PfsBy {
7693    #[inline(always)]
7694    fn default() -> P109PfsBy {
7695        <crate::RegValueT<P109PfsBy_SPEC> as RegisterValue<_>>::new(16)
7696    }
7697}
7698
7699#[doc(hidden)]
7700#[derive(Copy, Clone, Eq, PartialEq)]
7701pub struct P110Pfs_SPEC;
7702impl crate::sealed::RegSpec for P110Pfs_SPEC {
7703    type DataType = u32;
7704}
7705
7706#[doc = "P110 Pin Function Control Register"]
7707pub type P110Pfs = crate::RegValueT<P110Pfs_SPEC>;
7708
7709impl P110Pfs {
7710    #[doc = "Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table"]
7711    #[inline(always)]
7712    pub fn psel(
7713        self,
7714    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, P110Pfs_SPEC, crate::common::RW> {
7715        crate::common::RegisterField::<24,0x1f,1,0,u8,u8,P110Pfs_SPEC,crate::common::RW>::from_register(self,0)
7716    }
7717
7718    #[doc = "Port Mode Control"]
7719    #[inline(always)]
7720    pub fn pmr(
7721        self,
7722    ) -> crate::common::RegisterField<
7723        16,
7724        0x1,
7725        1,
7726        0,
7727        p110pfs::Pmr,
7728        p110pfs::Pmr,
7729        P110Pfs_SPEC,
7730        crate::common::RW,
7731    > {
7732        crate::common::RegisterField::<
7733            16,
7734            0x1,
7735            1,
7736            0,
7737            p110pfs::Pmr,
7738            p110pfs::Pmr,
7739            P110Pfs_SPEC,
7740            crate::common::RW,
7741        >::from_register(self, 0)
7742    }
7743
7744    #[doc = "Analog Input enable"]
7745    #[inline(always)]
7746    pub fn asel(
7747        self,
7748    ) -> crate::common::RegisterField<
7749        15,
7750        0x1,
7751        1,
7752        0,
7753        p110pfs::Asel,
7754        p110pfs::Asel,
7755        P110Pfs_SPEC,
7756        crate::common::RW,
7757    > {
7758        crate::common::RegisterField::<
7759            15,
7760            0x1,
7761            1,
7762            0,
7763            p110pfs::Asel,
7764            p110pfs::Asel,
7765            P110Pfs_SPEC,
7766            crate::common::RW,
7767        >::from_register(self, 0)
7768    }
7769
7770    #[doc = "IRQ input enable"]
7771    #[inline(always)]
7772    pub fn isel(
7773        self,
7774    ) -> crate::common::RegisterField<
7775        14,
7776        0x1,
7777        1,
7778        0,
7779        p110pfs::Isel,
7780        p110pfs::Isel,
7781        P110Pfs_SPEC,
7782        crate::common::RW,
7783    > {
7784        crate::common::RegisterField::<
7785            14,
7786            0x1,
7787            1,
7788            0,
7789            p110pfs::Isel,
7790            p110pfs::Isel,
7791            P110Pfs_SPEC,
7792            crate::common::RW,
7793        >::from_register(self, 0)
7794    }
7795
7796    #[doc = "Event on Falling"]
7797    #[inline(always)]
7798    pub fn eof(
7799        self,
7800    ) -> crate::common::RegisterField<
7801        13,
7802        0x1,
7803        1,
7804        0,
7805        p110pfs::Eof,
7806        p110pfs::Eof,
7807        P110Pfs_SPEC,
7808        crate::common::RW,
7809    > {
7810        crate::common::RegisterField::<
7811            13,
7812            0x1,
7813            1,
7814            0,
7815            p110pfs::Eof,
7816            p110pfs::Eof,
7817            P110Pfs_SPEC,
7818            crate::common::RW,
7819        >::from_register(self, 0)
7820    }
7821
7822    #[doc = "Event on Rising"]
7823    #[inline(always)]
7824    pub fn eor(
7825        self,
7826    ) -> crate::common::RegisterField<
7827        12,
7828        0x1,
7829        1,
7830        0,
7831        p110pfs::Eor,
7832        p110pfs::Eor,
7833        P110Pfs_SPEC,
7834        crate::common::RW,
7835    > {
7836        crate::common::RegisterField::<
7837            12,
7838            0x1,
7839            1,
7840            0,
7841            p110pfs::Eor,
7842            p110pfs::Eor,
7843            P110Pfs_SPEC,
7844            crate::common::RW,
7845        >::from_register(self, 0)
7846    }
7847
7848    #[doc = "Drive Strength Control Register"]
7849    #[inline(always)]
7850    pub fn dscr(
7851        self,
7852    ) -> crate::common::RegisterField<
7853        10,
7854        0x3,
7855        1,
7856        0,
7857        p110pfs::Dscr,
7858        p110pfs::Dscr,
7859        P110Pfs_SPEC,
7860        crate::common::RW,
7861    > {
7862        crate::common::RegisterField::<
7863            10,
7864            0x3,
7865            1,
7866            0,
7867            p110pfs::Dscr,
7868            p110pfs::Dscr,
7869            P110Pfs_SPEC,
7870            crate::common::RW,
7871        >::from_register(self, 0)
7872    }
7873
7874    #[doc = "N-Channel Open Drain Control"]
7875    #[inline(always)]
7876    pub fn ncodr(
7877        self,
7878    ) -> crate::common::RegisterField<
7879        6,
7880        0x1,
7881        1,
7882        0,
7883        p110pfs::Ncodr,
7884        p110pfs::Ncodr,
7885        P110Pfs_SPEC,
7886        crate::common::RW,
7887    > {
7888        crate::common::RegisterField::<
7889            6,
7890            0x1,
7891            1,
7892            0,
7893            p110pfs::Ncodr,
7894            p110pfs::Ncodr,
7895            P110Pfs_SPEC,
7896            crate::common::RW,
7897        >::from_register(self, 0)
7898    }
7899
7900    #[doc = "Pull-up Control"]
7901    #[inline(always)]
7902    pub fn pcr(
7903        self,
7904    ) -> crate::common::RegisterField<
7905        4,
7906        0x1,
7907        1,
7908        0,
7909        p110pfs::Pcr,
7910        p110pfs::Pcr,
7911        P110Pfs_SPEC,
7912        crate::common::RW,
7913    > {
7914        crate::common::RegisterField::<
7915            4,
7916            0x1,
7917            1,
7918            0,
7919            p110pfs::Pcr,
7920            p110pfs::Pcr,
7921            P110Pfs_SPEC,
7922            crate::common::RW,
7923        >::from_register(self, 0)
7924    }
7925
7926    #[doc = "Port Direction"]
7927    #[inline(always)]
7928    pub fn pdr(
7929        self,
7930    ) -> crate::common::RegisterField<
7931        2,
7932        0x1,
7933        1,
7934        0,
7935        p110pfs::Pdr,
7936        p110pfs::Pdr,
7937        P110Pfs_SPEC,
7938        crate::common::RW,
7939    > {
7940        crate::common::RegisterField::<
7941            2,
7942            0x1,
7943            1,
7944            0,
7945            p110pfs::Pdr,
7946            p110pfs::Pdr,
7947            P110Pfs_SPEC,
7948            crate::common::RW,
7949        >::from_register(self, 0)
7950    }
7951
7952    #[doc = "Port Input Data"]
7953    #[inline(always)]
7954    pub fn pidr(
7955        self,
7956    ) -> crate::common::RegisterField<
7957        1,
7958        0x1,
7959        1,
7960        0,
7961        p110pfs::Pidr,
7962        p110pfs::Pidr,
7963        P110Pfs_SPEC,
7964        crate::common::R,
7965    > {
7966        crate::common::RegisterField::<
7967            1,
7968            0x1,
7969            1,
7970            0,
7971            p110pfs::Pidr,
7972            p110pfs::Pidr,
7973            P110Pfs_SPEC,
7974            crate::common::R,
7975        >::from_register(self, 0)
7976    }
7977
7978    #[doc = "Port Output Data"]
7979    #[inline(always)]
7980    pub fn podr(
7981        self,
7982    ) -> crate::common::RegisterField<
7983        0,
7984        0x1,
7985        1,
7986        0,
7987        p110pfs::Podr,
7988        p110pfs::Podr,
7989        P110Pfs_SPEC,
7990        crate::common::RW,
7991    > {
7992        crate::common::RegisterField::<
7993            0,
7994            0x1,
7995            1,
7996            0,
7997            p110pfs::Podr,
7998            p110pfs::Podr,
7999            P110Pfs_SPEC,
8000            crate::common::RW,
8001        >::from_register(self, 0)
8002    }
8003}
8004impl ::core::default::Default for P110Pfs {
8005    #[inline(always)]
8006    fn default() -> P110Pfs {
8007        <crate::RegValueT<P110Pfs_SPEC> as RegisterValue<_>>::new(65552)
8008    }
8009}
8010pub mod p110pfs {
8011
8012    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8013    pub struct Pmr_SPEC;
8014    pub type Pmr = crate::EnumBitfieldStruct<u8, Pmr_SPEC>;
8015    impl Pmr {
8016        #[doc = "Uses the pin as a general I/O pin."]
8017        pub const _0: Self = Self::new(0);
8018
8019        #[doc = "Uses the pin as an I/O port for peripheral functions."]
8020        pub const _1: Self = Self::new(1);
8021    }
8022    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8023    pub struct Asel_SPEC;
8024    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
8025    impl Asel {
8026        #[doc = "Used other than as analog pin"]
8027        pub const _0: Self = Self::new(0);
8028
8029        #[doc = "Used as analog pin"]
8030        pub const _1: Self = Self::new(1);
8031    }
8032    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8033    pub struct Isel_SPEC;
8034    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
8035    impl Isel {
8036        #[doc = "Not used as IRQn input pin"]
8037        pub const _0: Self = Self::new(0);
8038
8039        #[doc = "Used as IRQn input pin"]
8040        pub const _1: Self = Self::new(1);
8041    }
8042    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8043    pub struct Eof_SPEC;
8044    pub type Eof = crate::EnumBitfieldStruct<u8, Eof_SPEC>;
8045    impl Eof {
8046        #[doc = "Do not care"]
8047        pub const _0: Self = Self::new(0);
8048
8049        #[doc = "Detect falling edge"]
8050        pub const _1: Self = Self::new(1);
8051    }
8052    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8053    pub struct Eor_SPEC;
8054    pub type Eor = crate::EnumBitfieldStruct<u8, Eor_SPEC>;
8055    impl Eor {
8056        #[doc = "Do not care"]
8057        pub const _0: Self = Self::new(0);
8058
8059        #[doc = "Detect rising edge"]
8060        pub const _1: Self = Self::new(1);
8061    }
8062    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8063    pub struct Dscr_SPEC;
8064    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
8065    impl Dscr {
8066        #[doc = "Normal drive output"]
8067        pub const _00: Self = Self::new(0);
8068
8069        #[doc = "Middle drive output"]
8070        pub const _01: Self = Self::new(1);
8071
8072        #[doc = "Setting prohibited"]
8073        pub const _10: Self = Self::new(2);
8074
8075        #[doc = "High-drive output"]
8076        pub const _11: Self = Self::new(3);
8077    }
8078    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8079    pub struct Ncodr_SPEC;
8080    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
8081    impl Ncodr {
8082        #[doc = "CMOS output"]
8083        pub const _0: Self = Self::new(0);
8084
8085        #[doc = "NMOS open-drain output"]
8086        pub const _1: Self = Self::new(1);
8087    }
8088    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8089    pub struct Pcr_SPEC;
8090    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
8091    impl Pcr {
8092        #[doc = "Disables an input pull-up."]
8093        pub const _0: Self = Self::new(0);
8094
8095        #[doc = "Enables an input pull-up."]
8096        pub const _1: Self = Self::new(1);
8097    }
8098    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8099    pub struct Pdr_SPEC;
8100    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
8101    impl Pdr {
8102        #[doc = "Input (Functions as an input pin.)"]
8103        pub const _0: Self = Self::new(0);
8104
8105        #[doc = "Output (Functions as an output pin.)"]
8106        pub const _1: Self = Self::new(1);
8107    }
8108    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8109    pub struct Pidr_SPEC;
8110    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
8111    impl Pidr {
8112        #[doc = "Low input"]
8113        pub const _0: Self = Self::new(0);
8114
8115        #[doc = "High input"]
8116        pub const _1: Self = Self::new(1);
8117    }
8118    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8119    pub struct Podr_SPEC;
8120    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
8121    impl Podr {
8122        #[doc = "Low output"]
8123        pub const _0: Self = Self::new(0);
8124
8125        #[doc = "High output"]
8126        pub const _1: Self = Self::new(1);
8127    }
8128}
8129#[doc(hidden)]
8130#[derive(Copy, Clone, Eq, PartialEq)]
8131pub struct P110PfsHa_SPEC;
8132impl crate::sealed::RegSpec for P110PfsHa_SPEC {
8133    type DataType = u16;
8134}
8135
8136#[doc = "P110 Pin Function Control Register"]
8137pub type P110PfsHa = crate::RegValueT<P110PfsHa_SPEC>;
8138
8139impl P110PfsHa {
8140    #[doc = "Analog Input enable"]
8141    #[inline(always)]
8142    pub fn asel(
8143        self,
8144    ) -> crate::common::RegisterField<
8145        15,
8146        0x1,
8147        1,
8148        0,
8149        p110pfs_ha::Asel,
8150        p110pfs_ha::Asel,
8151        P110PfsHa_SPEC,
8152        crate::common::RW,
8153    > {
8154        crate::common::RegisterField::<
8155            15,
8156            0x1,
8157            1,
8158            0,
8159            p110pfs_ha::Asel,
8160            p110pfs_ha::Asel,
8161            P110PfsHa_SPEC,
8162            crate::common::RW,
8163        >::from_register(self, 0)
8164    }
8165
8166    #[doc = "IRQ input enable"]
8167    #[inline(always)]
8168    pub fn isel(
8169        self,
8170    ) -> crate::common::RegisterField<
8171        14,
8172        0x1,
8173        1,
8174        0,
8175        p110pfs_ha::Isel,
8176        p110pfs_ha::Isel,
8177        P110PfsHa_SPEC,
8178        crate::common::RW,
8179    > {
8180        crate::common::RegisterField::<
8181            14,
8182            0x1,
8183            1,
8184            0,
8185            p110pfs_ha::Isel,
8186            p110pfs_ha::Isel,
8187            P110PfsHa_SPEC,
8188            crate::common::RW,
8189        >::from_register(self, 0)
8190    }
8191
8192    #[doc = "Event on Falling"]
8193    #[inline(always)]
8194    pub fn eof(
8195        self,
8196    ) -> crate::common::RegisterField<
8197        13,
8198        0x1,
8199        1,
8200        0,
8201        p110pfs_ha::Eof,
8202        p110pfs_ha::Eof,
8203        P110PfsHa_SPEC,
8204        crate::common::RW,
8205    > {
8206        crate::common::RegisterField::<
8207            13,
8208            0x1,
8209            1,
8210            0,
8211            p110pfs_ha::Eof,
8212            p110pfs_ha::Eof,
8213            P110PfsHa_SPEC,
8214            crate::common::RW,
8215        >::from_register(self, 0)
8216    }
8217
8218    #[doc = "Event on Rising"]
8219    #[inline(always)]
8220    pub fn eor(
8221        self,
8222    ) -> crate::common::RegisterField<
8223        12,
8224        0x1,
8225        1,
8226        0,
8227        p110pfs_ha::Eor,
8228        p110pfs_ha::Eor,
8229        P110PfsHa_SPEC,
8230        crate::common::RW,
8231    > {
8232        crate::common::RegisterField::<
8233            12,
8234            0x1,
8235            1,
8236            0,
8237            p110pfs_ha::Eor,
8238            p110pfs_ha::Eor,
8239            P110PfsHa_SPEC,
8240            crate::common::RW,
8241        >::from_register(self, 0)
8242    }
8243
8244    #[doc = "Drive Strength Control Register"]
8245    #[inline(always)]
8246    pub fn dscr(
8247        self,
8248    ) -> crate::common::RegisterField<
8249        10,
8250        0x3,
8251        1,
8252        0,
8253        p110pfs_ha::Dscr,
8254        p110pfs_ha::Dscr,
8255        P110PfsHa_SPEC,
8256        crate::common::RW,
8257    > {
8258        crate::common::RegisterField::<
8259            10,
8260            0x3,
8261            1,
8262            0,
8263            p110pfs_ha::Dscr,
8264            p110pfs_ha::Dscr,
8265            P110PfsHa_SPEC,
8266            crate::common::RW,
8267        >::from_register(self, 0)
8268    }
8269
8270    #[doc = "N-Channel Open Drain Control"]
8271    #[inline(always)]
8272    pub fn ncodr(
8273        self,
8274    ) -> crate::common::RegisterField<
8275        6,
8276        0x1,
8277        1,
8278        0,
8279        p110pfs_ha::Ncodr,
8280        p110pfs_ha::Ncodr,
8281        P110PfsHa_SPEC,
8282        crate::common::RW,
8283    > {
8284        crate::common::RegisterField::<
8285            6,
8286            0x1,
8287            1,
8288            0,
8289            p110pfs_ha::Ncodr,
8290            p110pfs_ha::Ncodr,
8291            P110PfsHa_SPEC,
8292            crate::common::RW,
8293        >::from_register(self, 0)
8294    }
8295
8296    #[doc = "Pull-up Control"]
8297    #[inline(always)]
8298    pub fn pcr(
8299        self,
8300    ) -> crate::common::RegisterField<
8301        4,
8302        0x1,
8303        1,
8304        0,
8305        p110pfs_ha::Pcr,
8306        p110pfs_ha::Pcr,
8307        P110PfsHa_SPEC,
8308        crate::common::RW,
8309    > {
8310        crate::common::RegisterField::<
8311            4,
8312            0x1,
8313            1,
8314            0,
8315            p110pfs_ha::Pcr,
8316            p110pfs_ha::Pcr,
8317            P110PfsHa_SPEC,
8318            crate::common::RW,
8319        >::from_register(self, 0)
8320    }
8321
8322    #[doc = "Port Direction"]
8323    #[inline(always)]
8324    pub fn pdr(
8325        self,
8326    ) -> crate::common::RegisterField<
8327        2,
8328        0x1,
8329        1,
8330        0,
8331        p110pfs_ha::Pdr,
8332        p110pfs_ha::Pdr,
8333        P110PfsHa_SPEC,
8334        crate::common::RW,
8335    > {
8336        crate::common::RegisterField::<
8337            2,
8338            0x1,
8339            1,
8340            0,
8341            p110pfs_ha::Pdr,
8342            p110pfs_ha::Pdr,
8343            P110PfsHa_SPEC,
8344            crate::common::RW,
8345        >::from_register(self, 0)
8346    }
8347
8348    #[doc = "Port Input Data"]
8349    #[inline(always)]
8350    pub fn pidr(
8351        self,
8352    ) -> crate::common::RegisterField<
8353        1,
8354        0x1,
8355        1,
8356        0,
8357        p110pfs_ha::Pidr,
8358        p110pfs_ha::Pidr,
8359        P110PfsHa_SPEC,
8360        crate::common::R,
8361    > {
8362        crate::common::RegisterField::<
8363            1,
8364            0x1,
8365            1,
8366            0,
8367            p110pfs_ha::Pidr,
8368            p110pfs_ha::Pidr,
8369            P110PfsHa_SPEC,
8370            crate::common::R,
8371        >::from_register(self, 0)
8372    }
8373
8374    #[doc = "Port Output Data"]
8375    #[inline(always)]
8376    pub fn podr(
8377        self,
8378    ) -> crate::common::RegisterField<
8379        0,
8380        0x1,
8381        1,
8382        0,
8383        p110pfs_ha::Podr,
8384        p110pfs_ha::Podr,
8385        P110PfsHa_SPEC,
8386        crate::common::RW,
8387    > {
8388        crate::common::RegisterField::<
8389            0,
8390            0x1,
8391            1,
8392            0,
8393            p110pfs_ha::Podr,
8394            p110pfs_ha::Podr,
8395            P110PfsHa_SPEC,
8396            crate::common::RW,
8397        >::from_register(self, 0)
8398    }
8399}
8400impl ::core::default::Default for P110PfsHa {
8401    #[inline(always)]
8402    fn default() -> P110PfsHa {
8403        <crate::RegValueT<P110PfsHa_SPEC> as RegisterValue<_>>::new(16)
8404    }
8405}
8406pub mod p110pfs_ha {
8407
8408    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8409    pub struct Asel_SPEC;
8410    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
8411    impl Asel {
8412        #[doc = "Used other than as analog pin"]
8413        pub const _0: Self = Self::new(0);
8414
8415        #[doc = "Used as analog pin"]
8416        pub const _1: Self = Self::new(1);
8417    }
8418    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8419    pub struct Isel_SPEC;
8420    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
8421    impl Isel {
8422        #[doc = "Not used as IRQn input pin"]
8423        pub const _0: Self = Self::new(0);
8424
8425        #[doc = "Used as IRQn input pin"]
8426        pub const _1: Self = Self::new(1);
8427    }
8428    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8429    pub struct Eof_SPEC;
8430    pub type Eof = crate::EnumBitfieldStruct<u8, Eof_SPEC>;
8431    impl Eof {
8432        #[doc = "Do not care"]
8433        pub const _0: Self = Self::new(0);
8434
8435        #[doc = "Detect falling edge"]
8436        pub const _1: Self = Self::new(1);
8437    }
8438    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8439    pub struct Eor_SPEC;
8440    pub type Eor = crate::EnumBitfieldStruct<u8, Eor_SPEC>;
8441    impl Eor {
8442        #[doc = "Do not care"]
8443        pub const _0: Self = Self::new(0);
8444
8445        #[doc = "Detect rising edge"]
8446        pub const _1: Self = Self::new(1);
8447    }
8448    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8449    pub struct Dscr_SPEC;
8450    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
8451    impl Dscr {
8452        #[doc = "Normal drive output"]
8453        pub const _00: Self = Self::new(0);
8454
8455        #[doc = "Middle drive output"]
8456        pub const _01: Self = Self::new(1);
8457
8458        #[doc = "Setting prohibited"]
8459        pub const _10: Self = Self::new(2);
8460
8461        #[doc = "High-drive output"]
8462        pub const _11: Self = Self::new(3);
8463    }
8464    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8465    pub struct Ncodr_SPEC;
8466    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
8467    impl Ncodr {
8468        #[doc = "CMOS output"]
8469        pub const _0: Self = Self::new(0);
8470
8471        #[doc = "NMOS open-drain output"]
8472        pub const _1: Self = Self::new(1);
8473    }
8474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8475    pub struct Pcr_SPEC;
8476    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
8477    impl Pcr {
8478        #[doc = "Disables an input pull-up."]
8479        pub const _0: Self = Self::new(0);
8480
8481        #[doc = "Enables an input pull-up."]
8482        pub const _1: Self = Self::new(1);
8483    }
8484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8485    pub struct Pdr_SPEC;
8486    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
8487    impl Pdr {
8488        #[doc = "Input (Functions as an input pin.)"]
8489        pub const _0: Self = Self::new(0);
8490
8491        #[doc = "Output (Functions as an output pin.)"]
8492        pub const _1: Self = Self::new(1);
8493    }
8494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8495    pub struct Pidr_SPEC;
8496    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
8497    impl Pidr {
8498        #[doc = "Low input"]
8499        pub const _0: Self = Self::new(0);
8500
8501        #[doc = "High input"]
8502        pub const _1: Self = Self::new(1);
8503    }
8504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8505    pub struct Podr_SPEC;
8506    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
8507    impl Podr {
8508        #[doc = "Low output"]
8509        pub const _0: Self = Self::new(0);
8510
8511        #[doc = "High output"]
8512        pub const _1: Self = Self::new(1);
8513    }
8514}
8515#[doc(hidden)]
8516#[derive(Copy, Clone, Eq, PartialEq)]
8517pub struct P110PfsBy_SPEC;
8518impl crate::sealed::RegSpec for P110PfsBy_SPEC {
8519    type DataType = u8;
8520}
8521
8522#[doc = "P110 Pin Function Control Register"]
8523pub type P110PfsBy = crate::RegValueT<P110PfsBy_SPEC>;
8524
8525impl P110PfsBy {
8526    #[doc = "N-Channel Open Drain Control"]
8527    #[inline(always)]
8528    pub fn ncodr(
8529        self,
8530    ) -> crate::common::RegisterField<
8531        6,
8532        0x1,
8533        1,
8534        0,
8535        p110pfs_by::Ncodr,
8536        p110pfs_by::Ncodr,
8537        P110PfsBy_SPEC,
8538        crate::common::RW,
8539    > {
8540        crate::common::RegisterField::<
8541            6,
8542            0x1,
8543            1,
8544            0,
8545            p110pfs_by::Ncodr,
8546            p110pfs_by::Ncodr,
8547            P110PfsBy_SPEC,
8548            crate::common::RW,
8549        >::from_register(self, 0)
8550    }
8551
8552    #[doc = "Pull-up Control"]
8553    #[inline(always)]
8554    pub fn pcr(
8555        self,
8556    ) -> crate::common::RegisterField<
8557        4,
8558        0x1,
8559        1,
8560        0,
8561        p110pfs_by::Pcr,
8562        p110pfs_by::Pcr,
8563        P110PfsBy_SPEC,
8564        crate::common::RW,
8565    > {
8566        crate::common::RegisterField::<
8567            4,
8568            0x1,
8569            1,
8570            0,
8571            p110pfs_by::Pcr,
8572            p110pfs_by::Pcr,
8573            P110PfsBy_SPEC,
8574            crate::common::RW,
8575        >::from_register(self, 0)
8576    }
8577
8578    #[doc = "Port Direction"]
8579    #[inline(always)]
8580    pub fn pdr(
8581        self,
8582    ) -> crate::common::RegisterField<
8583        2,
8584        0x1,
8585        1,
8586        0,
8587        p110pfs_by::Pdr,
8588        p110pfs_by::Pdr,
8589        P110PfsBy_SPEC,
8590        crate::common::RW,
8591    > {
8592        crate::common::RegisterField::<
8593            2,
8594            0x1,
8595            1,
8596            0,
8597            p110pfs_by::Pdr,
8598            p110pfs_by::Pdr,
8599            P110PfsBy_SPEC,
8600            crate::common::RW,
8601        >::from_register(self, 0)
8602    }
8603
8604    #[doc = "Port Input Data"]
8605    #[inline(always)]
8606    pub fn pidr(
8607        self,
8608    ) -> crate::common::RegisterField<
8609        1,
8610        0x1,
8611        1,
8612        0,
8613        p110pfs_by::Pidr,
8614        p110pfs_by::Pidr,
8615        P110PfsBy_SPEC,
8616        crate::common::R,
8617    > {
8618        crate::common::RegisterField::<
8619            1,
8620            0x1,
8621            1,
8622            0,
8623            p110pfs_by::Pidr,
8624            p110pfs_by::Pidr,
8625            P110PfsBy_SPEC,
8626            crate::common::R,
8627        >::from_register(self, 0)
8628    }
8629
8630    #[doc = "Port Output Data"]
8631    #[inline(always)]
8632    pub fn podr(
8633        self,
8634    ) -> crate::common::RegisterField<
8635        0,
8636        0x1,
8637        1,
8638        0,
8639        p110pfs_by::Podr,
8640        p110pfs_by::Podr,
8641        P110PfsBy_SPEC,
8642        crate::common::RW,
8643    > {
8644        crate::common::RegisterField::<
8645            0,
8646            0x1,
8647            1,
8648            0,
8649            p110pfs_by::Podr,
8650            p110pfs_by::Podr,
8651            P110PfsBy_SPEC,
8652            crate::common::RW,
8653        >::from_register(self, 0)
8654    }
8655}
8656impl ::core::default::Default for P110PfsBy {
8657    #[inline(always)]
8658    fn default() -> P110PfsBy {
8659        <crate::RegValueT<P110PfsBy_SPEC> as RegisterValue<_>>::new(16)
8660    }
8661}
8662pub mod p110pfs_by {
8663
8664    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8665    pub struct Ncodr_SPEC;
8666    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
8667    impl Ncodr {
8668        #[doc = "CMOS output"]
8669        pub const _0: Self = Self::new(0);
8670
8671        #[doc = "NMOS open-drain output"]
8672        pub const _1: Self = Self::new(1);
8673    }
8674    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8675    pub struct Pcr_SPEC;
8676    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
8677    impl Pcr {
8678        #[doc = "Disables an input pull-up."]
8679        pub const _0: Self = Self::new(0);
8680
8681        #[doc = "Enables an input pull-up."]
8682        pub const _1: Self = Self::new(1);
8683    }
8684    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8685    pub struct Pdr_SPEC;
8686    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
8687    impl Pdr {
8688        #[doc = "Input (Functions as an input pin.)"]
8689        pub const _0: Self = Self::new(0);
8690
8691        #[doc = "Output (Functions as an output pin.)"]
8692        pub const _1: Self = Self::new(1);
8693    }
8694    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8695    pub struct Pidr_SPEC;
8696    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
8697    impl Pidr {
8698        #[doc = "Low input"]
8699        pub const _0: Self = Self::new(0);
8700
8701        #[doc = "High input"]
8702        pub const _1: Self = Self::new(1);
8703    }
8704    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8705    pub struct Podr_SPEC;
8706    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
8707    impl Podr {
8708        #[doc = "Low output"]
8709        pub const _0: Self = Self::new(0);
8710
8711        #[doc = "High output"]
8712        pub const _1: Self = Self::new(1);
8713    }
8714}
8715#[doc(hidden)]
8716#[derive(Copy, Clone, Eq, PartialEq)]
8717pub struct P1Pfs_SPEC;
8718impl crate::sealed::RegSpec for P1Pfs_SPEC {
8719    type DataType = u32;
8720}
8721
8722#[doc = "P1%s Pin Function Control Register"]
8723pub type P1Pfs = crate::RegValueT<P1Pfs_SPEC>;
8724
8725impl NoBitfieldReg<P1Pfs_SPEC> for P1Pfs {}
8726impl ::core::default::Default for P1Pfs {
8727    #[inline(always)]
8728    fn default() -> P1Pfs {
8729        <crate::RegValueT<P1Pfs_SPEC> as RegisterValue<_>>::new(0)
8730    }
8731}
8732
8733#[doc(hidden)]
8734#[derive(Copy, Clone, Eq, PartialEq)]
8735pub struct P1PfsHa_SPEC;
8736impl crate::sealed::RegSpec for P1PfsHa_SPEC {
8737    type DataType = u16;
8738}
8739
8740#[doc = "P1%s Pin Function Control Register"]
8741pub type P1PfsHa = crate::RegValueT<P1PfsHa_SPEC>;
8742
8743impl NoBitfieldReg<P1PfsHa_SPEC> for P1PfsHa {}
8744impl ::core::default::Default for P1PfsHa {
8745    #[inline(always)]
8746    fn default() -> P1PfsHa {
8747        <crate::RegValueT<P1PfsHa_SPEC> as RegisterValue<_>>::new(0)
8748    }
8749}
8750
8751#[doc(hidden)]
8752#[derive(Copy, Clone, Eq, PartialEq)]
8753pub struct P1PfsBy_SPEC;
8754impl crate::sealed::RegSpec for P1PfsBy_SPEC {
8755    type DataType = u8;
8756}
8757
8758#[doc = "P1%s Pin Function Control Register"]
8759pub type P1PfsBy = crate::RegValueT<P1PfsBy_SPEC>;
8760
8761impl NoBitfieldReg<P1PfsBy_SPEC> for P1PfsBy {}
8762impl ::core::default::Default for P1PfsBy {
8763    #[inline(always)]
8764    fn default() -> P1PfsBy {
8765        <crate::RegValueT<P1PfsBy_SPEC> as RegisterValue<_>>::new(0)
8766    }
8767}
8768
8769#[doc(hidden)]
8770#[derive(Copy, Clone, Eq, PartialEq)]
8771pub struct P200Pfs_SPEC;
8772impl crate::sealed::RegSpec for P200Pfs_SPEC {
8773    type DataType = u32;
8774}
8775
8776#[doc = "P200 Pin Function Control Register"]
8777pub type P200Pfs = crate::RegValueT<P200Pfs_SPEC>;
8778
8779impl NoBitfieldReg<P200Pfs_SPEC> for P200Pfs {}
8780impl ::core::default::Default for P200Pfs {
8781    #[inline(always)]
8782    fn default() -> P200Pfs {
8783        <crate::RegValueT<P200Pfs_SPEC> as RegisterValue<_>>::new(0)
8784    }
8785}
8786
8787#[doc(hidden)]
8788#[derive(Copy, Clone, Eq, PartialEq)]
8789pub struct P200PfsHa_SPEC;
8790impl crate::sealed::RegSpec for P200PfsHa_SPEC {
8791    type DataType = u16;
8792}
8793
8794#[doc = "P200 Pin Function Control Register"]
8795pub type P200PfsHa = crate::RegValueT<P200PfsHa_SPEC>;
8796
8797impl NoBitfieldReg<P200PfsHa_SPEC> for P200PfsHa {}
8798impl ::core::default::Default for P200PfsHa {
8799    #[inline(always)]
8800    fn default() -> P200PfsHa {
8801        <crate::RegValueT<P200PfsHa_SPEC> as RegisterValue<_>>::new(0)
8802    }
8803}
8804
8805#[doc(hidden)]
8806#[derive(Copy, Clone, Eq, PartialEq)]
8807pub struct P200PfsBy_SPEC;
8808impl crate::sealed::RegSpec for P200PfsBy_SPEC {
8809    type DataType = u8;
8810}
8811
8812#[doc = "P200 Pin Function Control Register"]
8813pub type P200PfsBy = crate::RegValueT<P200PfsBy_SPEC>;
8814
8815impl NoBitfieldReg<P200PfsBy_SPEC> for P200PfsBy {}
8816impl ::core::default::Default for P200PfsBy {
8817    #[inline(always)]
8818    fn default() -> P200PfsBy {
8819        <crate::RegValueT<P200PfsBy_SPEC> as RegisterValue<_>>::new(0)
8820    }
8821}
8822
8823#[doc(hidden)]
8824#[derive(Copy, Clone, Eq, PartialEq)]
8825pub struct P201Pfs_SPEC;
8826impl crate::sealed::RegSpec for P201Pfs_SPEC {
8827    type DataType = u32;
8828}
8829
8830#[doc = "P201 Pin Function Control Register"]
8831pub type P201Pfs = crate::RegValueT<P201Pfs_SPEC>;
8832
8833impl P201Pfs {
8834    #[doc = "Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table"]
8835    #[inline(always)]
8836    pub fn psel(
8837        self,
8838    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, P201Pfs_SPEC, crate::common::RW> {
8839        crate::common::RegisterField::<24,0x1f,1,0,u8,u8,P201Pfs_SPEC,crate::common::RW>::from_register(self,0)
8840    }
8841
8842    #[doc = "Port Mode Control"]
8843    #[inline(always)]
8844    pub fn pmr(
8845        self,
8846    ) -> crate::common::RegisterField<
8847        16,
8848        0x1,
8849        1,
8850        0,
8851        p201pfs::Pmr,
8852        p201pfs::Pmr,
8853        P201Pfs_SPEC,
8854        crate::common::RW,
8855    > {
8856        crate::common::RegisterField::<
8857            16,
8858            0x1,
8859            1,
8860            0,
8861            p201pfs::Pmr,
8862            p201pfs::Pmr,
8863            P201Pfs_SPEC,
8864            crate::common::RW,
8865        >::from_register(self, 0)
8866    }
8867
8868    #[doc = "Analog Input enable"]
8869    #[inline(always)]
8870    pub fn asel(
8871        self,
8872    ) -> crate::common::RegisterField<
8873        15,
8874        0x1,
8875        1,
8876        0,
8877        p201pfs::Asel,
8878        p201pfs::Asel,
8879        P201Pfs_SPEC,
8880        crate::common::RW,
8881    > {
8882        crate::common::RegisterField::<
8883            15,
8884            0x1,
8885            1,
8886            0,
8887            p201pfs::Asel,
8888            p201pfs::Asel,
8889            P201Pfs_SPEC,
8890            crate::common::RW,
8891        >::from_register(self, 0)
8892    }
8893
8894    #[doc = "IRQ input enable"]
8895    #[inline(always)]
8896    pub fn isel(
8897        self,
8898    ) -> crate::common::RegisterField<
8899        14,
8900        0x1,
8901        1,
8902        0,
8903        p201pfs::Isel,
8904        p201pfs::Isel,
8905        P201Pfs_SPEC,
8906        crate::common::RW,
8907    > {
8908        crate::common::RegisterField::<
8909            14,
8910            0x1,
8911            1,
8912            0,
8913            p201pfs::Isel,
8914            p201pfs::Isel,
8915            P201Pfs_SPEC,
8916            crate::common::RW,
8917        >::from_register(self, 0)
8918    }
8919
8920    #[doc = "Event on Falling"]
8921    #[inline(always)]
8922    pub fn eof(
8923        self,
8924    ) -> crate::common::RegisterField<
8925        13,
8926        0x1,
8927        1,
8928        0,
8929        p201pfs::Eof,
8930        p201pfs::Eof,
8931        P201Pfs_SPEC,
8932        crate::common::RW,
8933    > {
8934        crate::common::RegisterField::<
8935            13,
8936            0x1,
8937            1,
8938            0,
8939            p201pfs::Eof,
8940            p201pfs::Eof,
8941            P201Pfs_SPEC,
8942            crate::common::RW,
8943        >::from_register(self, 0)
8944    }
8945
8946    #[doc = "Event on Rising"]
8947    #[inline(always)]
8948    pub fn eor(
8949        self,
8950    ) -> crate::common::RegisterField<
8951        12,
8952        0x1,
8953        1,
8954        0,
8955        p201pfs::Eor,
8956        p201pfs::Eor,
8957        P201Pfs_SPEC,
8958        crate::common::RW,
8959    > {
8960        crate::common::RegisterField::<
8961            12,
8962            0x1,
8963            1,
8964            0,
8965            p201pfs::Eor,
8966            p201pfs::Eor,
8967            P201Pfs_SPEC,
8968            crate::common::RW,
8969        >::from_register(self, 0)
8970    }
8971
8972    #[doc = "Drive Strength Control Register"]
8973    #[inline(always)]
8974    pub fn dscr(
8975        self,
8976    ) -> crate::common::RegisterField<
8977        10,
8978        0x3,
8979        1,
8980        0,
8981        p201pfs::Dscr,
8982        p201pfs::Dscr,
8983        P201Pfs_SPEC,
8984        crate::common::RW,
8985    > {
8986        crate::common::RegisterField::<
8987            10,
8988            0x3,
8989            1,
8990            0,
8991            p201pfs::Dscr,
8992            p201pfs::Dscr,
8993            P201Pfs_SPEC,
8994            crate::common::RW,
8995        >::from_register(self, 0)
8996    }
8997
8998    #[doc = "N-Channel Open Drain Control"]
8999    #[inline(always)]
9000    pub fn ncodr(
9001        self,
9002    ) -> crate::common::RegisterField<
9003        6,
9004        0x1,
9005        1,
9006        0,
9007        p201pfs::Ncodr,
9008        p201pfs::Ncodr,
9009        P201Pfs_SPEC,
9010        crate::common::RW,
9011    > {
9012        crate::common::RegisterField::<
9013            6,
9014            0x1,
9015            1,
9016            0,
9017            p201pfs::Ncodr,
9018            p201pfs::Ncodr,
9019            P201Pfs_SPEC,
9020            crate::common::RW,
9021        >::from_register(self, 0)
9022    }
9023
9024    #[doc = "Pull-up Control"]
9025    #[inline(always)]
9026    pub fn pcr(
9027        self,
9028    ) -> crate::common::RegisterField<
9029        4,
9030        0x1,
9031        1,
9032        0,
9033        p201pfs::Pcr,
9034        p201pfs::Pcr,
9035        P201Pfs_SPEC,
9036        crate::common::RW,
9037    > {
9038        crate::common::RegisterField::<
9039            4,
9040            0x1,
9041            1,
9042            0,
9043            p201pfs::Pcr,
9044            p201pfs::Pcr,
9045            P201Pfs_SPEC,
9046            crate::common::RW,
9047        >::from_register(self, 0)
9048    }
9049
9050    #[doc = "Port Direction"]
9051    #[inline(always)]
9052    pub fn pdr(
9053        self,
9054    ) -> crate::common::RegisterField<
9055        2,
9056        0x1,
9057        1,
9058        0,
9059        p201pfs::Pdr,
9060        p201pfs::Pdr,
9061        P201Pfs_SPEC,
9062        crate::common::RW,
9063    > {
9064        crate::common::RegisterField::<
9065            2,
9066            0x1,
9067            1,
9068            0,
9069            p201pfs::Pdr,
9070            p201pfs::Pdr,
9071            P201Pfs_SPEC,
9072            crate::common::RW,
9073        >::from_register(self, 0)
9074    }
9075
9076    #[doc = "Port Input Data"]
9077    #[inline(always)]
9078    pub fn pidr(
9079        self,
9080    ) -> crate::common::RegisterField<
9081        1,
9082        0x1,
9083        1,
9084        0,
9085        p201pfs::Pidr,
9086        p201pfs::Pidr,
9087        P201Pfs_SPEC,
9088        crate::common::R,
9089    > {
9090        crate::common::RegisterField::<
9091            1,
9092            0x1,
9093            1,
9094            0,
9095            p201pfs::Pidr,
9096            p201pfs::Pidr,
9097            P201Pfs_SPEC,
9098            crate::common::R,
9099        >::from_register(self, 0)
9100    }
9101
9102    #[doc = "Port Output Data"]
9103    #[inline(always)]
9104    pub fn podr(
9105        self,
9106    ) -> crate::common::RegisterField<
9107        0,
9108        0x1,
9109        1,
9110        0,
9111        p201pfs::Podr,
9112        p201pfs::Podr,
9113        P201Pfs_SPEC,
9114        crate::common::RW,
9115    > {
9116        crate::common::RegisterField::<
9117            0,
9118            0x1,
9119            1,
9120            0,
9121            p201pfs::Podr,
9122            p201pfs::Podr,
9123            P201Pfs_SPEC,
9124            crate::common::RW,
9125        >::from_register(self, 0)
9126    }
9127}
9128impl ::core::default::Default for P201Pfs {
9129    #[inline(always)]
9130    fn default() -> P201Pfs {
9131        <crate::RegValueT<P201Pfs_SPEC> as RegisterValue<_>>::new(16)
9132    }
9133}
9134pub mod p201pfs {
9135
9136    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9137    pub struct Pmr_SPEC;
9138    pub type Pmr = crate::EnumBitfieldStruct<u8, Pmr_SPEC>;
9139    impl Pmr {
9140        #[doc = "Uses the pin as a general I/O pin."]
9141        pub const _0: Self = Self::new(0);
9142
9143        #[doc = "Uses the pin as an I/O port for peripheral functions."]
9144        pub const _1: Self = Self::new(1);
9145    }
9146    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9147    pub struct Asel_SPEC;
9148    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
9149    impl Asel {
9150        #[doc = "Used other than as analog pin"]
9151        pub const _0: Self = Self::new(0);
9152
9153        #[doc = "Used as analog pin"]
9154        pub const _1: Self = Self::new(1);
9155    }
9156    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9157    pub struct Isel_SPEC;
9158    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
9159    impl Isel {
9160        #[doc = "Not used as IRQn input pin"]
9161        pub const _0: Self = Self::new(0);
9162
9163        #[doc = "Used as IRQn input pin"]
9164        pub const _1: Self = Self::new(1);
9165    }
9166    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9167    pub struct Eof_SPEC;
9168    pub type Eof = crate::EnumBitfieldStruct<u8, Eof_SPEC>;
9169    impl Eof {
9170        #[doc = "Do not care"]
9171        pub const _0: Self = Self::new(0);
9172
9173        #[doc = "Detect falling edge"]
9174        pub const _1: Self = Self::new(1);
9175    }
9176    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9177    pub struct Eor_SPEC;
9178    pub type Eor = crate::EnumBitfieldStruct<u8, Eor_SPEC>;
9179    impl Eor {
9180        #[doc = "Do not care"]
9181        pub const _0: Self = Self::new(0);
9182
9183        #[doc = "Detect rising edge"]
9184        pub const _1: Self = Self::new(1);
9185    }
9186    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9187    pub struct Dscr_SPEC;
9188    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
9189    impl Dscr {
9190        #[doc = "Normal drive output"]
9191        pub const _00: Self = Self::new(0);
9192
9193        #[doc = "Middle drive output"]
9194        pub const _01: Self = Self::new(1);
9195
9196        #[doc = "Setting prohibited"]
9197        pub const _10: Self = Self::new(2);
9198
9199        #[doc = "High-drive output"]
9200        pub const _11: Self = Self::new(3);
9201    }
9202    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9203    pub struct Ncodr_SPEC;
9204    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
9205    impl Ncodr {
9206        #[doc = "CMOS output"]
9207        pub const _0: Self = Self::new(0);
9208
9209        #[doc = "NMOS open-drain output"]
9210        pub const _1: Self = Self::new(1);
9211    }
9212    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9213    pub struct Pcr_SPEC;
9214    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
9215    impl Pcr {
9216        #[doc = "Disables an input pull-up."]
9217        pub const _0: Self = Self::new(0);
9218
9219        #[doc = "Enables an input pull-up."]
9220        pub const _1: Self = Self::new(1);
9221    }
9222    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9223    pub struct Pdr_SPEC;
9224    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
9225    impl Pdr {
9226        #[doc = "Input (Functions as an input pin.)"]
9227        pub const _0: Self = Self::new(0);
9228
9229        #[doc = "Output (Functions as an output pin.)"]
9230        pub const _1: Self = Self::new(1);
9231    }
9232    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9233    pub struct Pidr_SPEC;
9234    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
9235    impl Pidr {
9236        #[doc = "Low input"]
9237        pub const _0: Self = Self::new(0);
9238
9239        #[doc = "High input"]
9240        pub const _1: Self = Self::new(1);
9241    }
9242    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9243    pub struct Podr_SPEC;
9244    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
9245    impl Podr {
9246        #[doc = "Low output"]
9247        pub const _0: Self = Self::new(0);
9248
9249        #[doc = "High output"]
9250        pub const _1: Self = Self::new(1);
9251    }
9252}
9253#[doc(hidden)]
9254#[derive(Copy, Clone, Eq, PartialEq)]
9255pub struct P201PfsHa_SPEC;
9256impl crate::sealed::RegSpec for P201PfsHa_SPEC {
9257    type DataType = u16;
9258}
9259
9260#[doc = "P201 Pin Function Control Register"]
9261pub type P201PfsHa = crate::RegValueT<P201PfsHa_SPEC>;
9262
9263impl P201PfsHa {
9264    #[doc = "Analog Input enable"]
9265    #[inline(always)]
9266    pub fn asel(
9267        self,
9268    ) -> crate::common::RegisterField<
9269        15,
9270        0x1,
9271        1,
9272        0,
9273        p201pfs_ha::Asel,
9274        p201pfs_ha::Asel,
9275        P201PfsHa_SPEC,
9276        crate::common::RW,
9277    > {
9278        crate::common::RegisterField::<
9279            15,
9280            0x1,
9281            1,
9282            0,
9283            p201pfs_ha::Asel,
9284            p201pfs_ha::Asel,
9285            P201PfsHa_SPEC,
9286            crate::common::RW,
9287        >::from_register(self, 0)
9288    }
9289
9290    #[doc = "IRQ input enable"]
9291    #[inline(always)]
9292    pub fn isel(
9293        self,
9294    ) -> crate::common::RegisterField<
9295        14,
9296        0x1,
9297        1,
9298        0,
9299        p201pfs_ha::Isel,
9300        p201pfs_ha::Isel,
9301        P201PfsHa_SPEC,
9302        crate::common::RW,
9303    > {
9304        crate::common::RegisterField::<
9305            14,
9306            0x1,
9307            1,
9308            0,
9309            p201pfs_ha::Isel,
9310            p201pfs_ha::Isel,
9311            P201PfsHa_SPEC,
9312            crate::common::RW,
9313        >::from_register(self, 0)
9314    }
9315
9316    #[doc = "Event on Falling"]
9317    #[inline(always)]
9318    pub fn eof(
9319        self,
9320    ) -> crate::common::RegisterField<
9321        13,
9322        0x1,
9323        1,
9324        0,
9325        p201pfs_ha::Eof,
9326        p201pfs_ha::Eof,
9327        P201PfsHa_SPEC,
9328        crate::common::RW,
9329    > {
9330        crate::common::RegisterField::<
9331            13,
9332            0x1,
9333            1,
9334            0,
9335            p201pfs_ha::Eof,
9336            p201pfs_ha::Eof,
9337            P201PfsHa_SPEC,
9338            crate::common::RW,
9339        >::from_register(self, 0)
9340    }
9341
9342    #[doc = "Event on Rising"]
9343    #[inline(always)]
9344    pub fn eor(
9345        self,
9346    ) -> crate::common::RegisterField<
9347        12,
9348        0x1,
9349        1,
9350        0,
9351        p201pfs_ha::Eor,
9352        p201pfs_ha::Eor,
9353        P201PfsHa_SPEC,
9354        crate::common::RW,
9355    > {
9356        crate::common::RegisterField::<
9357            12,
9358            0x1,
9359            1,
9360            0,
9361            p201pfs_ha::Eor,
9362            p201pfs_ha::Eor,
9363            P201PfsHa_SPEC,
9364            crate::common::RW,
9365        >::from_register(self, 0)
9366    }
9367
9368    #[doc = "Drive Strength Control Register"]
9369    #[inline(always)]
9370    pub fn dscr(
9371        self,
9372    ) -> crate::common::RegisterField<
9373        10,
9374        0x3,
9375        1,
9376        0,
9377        p201pfs_ha::Dscr,
9378        p201pfs_ha::Dscr,
9379        P201PfsHa_SPEC,
9380        crate::common::RW,
9381    > {
9382        crate::common::RegisterField::<
9383            10,
9384            0x3,
9385            1,
9386            0,
9387            p201pfs_ha::Dscr,
9388            p201pfs_ha::Dscr,
9389            P201PfsHa_SPEC,
9390            crate::common::RW,
9391        >::from_register(self, 0)
9392    }
9393
9394    #[doc = "N-Channel Open Drain Control"]
9395    #[inline(always)]
9396    pub fn ncodr(
9397        self,
9398    ) -> crate::common::RegisterField<
9399        6,
9400        0x1,
9401        1,
9402        0,
9403        p201pfs_ha::Ncodr,
9404        p201pfs_ha::Ncodr,
9405        P201PfsHa_SPEC,
9406        crate::common::RW,
9407    > {
9408        crate::common::RegisterField::<
9409            6,
9410            0x1,
9411            1,
9412            0,
9413            p201pfs_ha::Ncodr,
9414            p201pfs_ha::Ncodr,
9415            P201PfsHa_SPEC,
9416            crate::common::RW,
9417        >::from_register(self, 0)
9418    }
9419
9420    #[doc = "Pull-up Control"]
9421    #[inline(always)]
9422    pub fn pcr(
9423        self,
9424    ) -> crate::common::RegisterField<
9425        4,
9426        0x1,
9427        1,
9428        0,
9429        p201pfs_ha::Pcr,
9430        p201pfs_ha::Pcr,
9431        P201PfsHa_SPEC,
9432        crate::common::RW,
9433    > {
9434        crate::common::RegisterField::<
9435            4,
9436            0x1,
9437            1,
9438            0,
9439            p201pfs_ha::Pcr,
9440            p201pfs_ha::Pcr,
9441            P201PfsHa_SPEC,
9442            crate::common::RW,
9443        >::from_register(self, 0)
9444    }
9445
9446    #[doc = "Port Direction"]
9447    #[inline(always)]
9448    pub fn pdr(
9449        self,
9450    ) -> crate::common::RegisterField<
9451        2,
9452        0x1,
9453        1,
9454        0,
9455        p201pfs_ha::Pdr,
9456        p201pfs_ha::Pdr,
9457        P201PfsHa_SPEC,
9458        crate::common::RW,
9459    > {
9460        crate::common::RegisterField::<
9461            2,
9462            0x1,
9463            1,
9464            0,
9465            p201pfs_ha::Pdr,
9466            p201pfs_ha::Pdr,
9467            P201PfsHa_SPEC,
9468            crate::common::RW,
9469        >::from_register(self, 0)
9470    }
9471
9472    #[doc = "Port Input Data"]
9473    #[inline(always)]
9474    pub fn pidr(
9475        self,
9476    ) -> crate::common::RegisterField<
9477        1,
9478        0x1,
9479        1,
9480        0,
9481        p201pfs_ha::Pidr,
9482        p201pfs_ha::Pidr,
9483        P201PfsHa_SPEC,
9484        crate::common::R,
9485    > {
9486        crate::common::RegisterField::<
9487            1,
9488            0x1,
9489            1,
9490            0,
9491            p201pfs_ha::Pidr,
9492            p201pfs_ha::Pidr,
9493            P201PfsHa_SPEC,
9494            crate::common::R,
9495        >::from_register(self, 0)
9496    }
9497
9498    #[doc = "Port Output Data"]
9499    #[inline(always)]
9500    pub fn podr(
9501        self,
9502    ) -> crate::common::RegisterField<
9503        0,
9504        0x1,
9505        1,
9506        0,
9507        p201pfs_ha::Podr,
9508        p201pfs_ha::Podr,
9509        P201PfsHa_SPEC,
9510        crate::common::RW,
9511    > {
9512        crate::common::RegisterField::<
9513            0,
9514            0x1,
9515            1,
9516            0,
9517            p201pfs_ha::Podr,
9518            p201pfs_ha::Podr,
9519            P201PfsHa_SPEC,
9520            crate::common::RW,
9521        >::from_register(self, 0)
9522    }
9523}
9524impl ::core::default::Default for P201PfsHa {
9525    #[inline(always)]
9526    fn default() -> P201PfsHa {
9527        <crate::RegValueT<P201PfsHa_SPEC> as RegisterValue<_>>::new(16)
9528    }
9529}
9530pub mod p201pfs_ha {
9531
9532    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9533    pub struct Asel_SPEC;
9534    pub type Asel = crate::EnumBitfieldStruct<u8, Asel_SPEC>;
9535    impl Asel {
9536        #[doc = "Used other than as analog pin"]
9537        pub const _0: Self = Self::new(0);
9538
9539        #[doc = "Used as analog pin"]
9540        pub const _1: Self = Self::new(1);
9541    }
9542    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9543    pub struct Isel_SPEC;
9544    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
9545    impl Isel {
9546        #[doc = "Not used as IRQn input pin"]
9547        pub const _0: Self = Self::new(0);
9548
9549        #[doc = "Used as IRQn input pin"]
9550        pub const _1: Self = Self::new(1);
9551    }
9552    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9553    pub struct Eof_SPEC;
9554    pub type Eof = crate::EnumBitfieldStruct<u8, Eof_SPEC>;
9555    impl Eof {
9556        #[doc = "Do not care"]
9557        pub const _0: Self = Self::new(0);
9558
9559        #[doc = "Detect falling edge"]
9560        pub const _1: Self = Self::new(1);
9561    }
9562    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9563    pub struct Eor_SPEC;
9564    pub type Eor = crate::EnumBitfieldStruct<u8, Eor_SPEC>;
9565    impl Eor {
9566        #[doc = "Do not care"]
9567        pub const _0: Self = Self::new(0);
9568
9569        #[doc = "Detect rising edge"]
9570        pub const _1: Self = Self::new(1);
9571    }
9572    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9573    pub struct Dscr_SPEC;
9574    pub type Dscr = crate::EnumBitfieldStruct<u8, Dscr_SPEC>;
9575    impl Dscr {
9576        #[doc = "Normal drive output"]
9577        pub const _00: Self = Self::new(0);
9578
9579        #[doc = "Middle drive output"]
9580        pub const _01: Self = Self::new(1);
9581
9582        #[doc = "Setting prohibited"]
9583        pub const _10: Self = Self::new(2);
9584
9585        #[doc = "High-drive output"]
9586        pub const _11: Self = Self::new(3);
9587    }
9588    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9589    pub struct Ncodr_SPEC;
9590    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
9591    impl Ncodr {
9592        #[doc = "CMOS output"]
9593        pub const _0: Self = Self::new(0);
9594
9595        #[doc = "NMOS open-drain output"]
9596        pub const _1: Self = Self::new(1);
9597    }
9598    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9599    pub struct Pcr_SPEC;
9600    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
9601    impl Pcr {
9602        #[doc = "Disables an input pull-up."]
9603        pub const _0: Self = Self::new(0);
9604
9605        #[doc = "Enables an input pull-up."]
9606        pub const _1: Self = Self::new(1);
9607    }
9608    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9609    pub struct Pdr_SPEC;
9610    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
9611    impl Pdr {
9612        #[doc = "Input (Functions as an input pin.)"]
9613        pub const _0: Self = Self::new(0);
9614
9615        #[doc = "Output (Functions as an output pin.)"]
9616        pub const _1: Self = Self::new(1);
9617    }
9618    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9619    pub struct Pidr_SPEC;
9620    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
9621    impl Pidr {
9622        #[doc = "Low input"]
9623        pub const _0: Self = Self::new(0);
9624
9625        #[doc = "High input"]
9626        pub const _1: Self = Self::new(1);
9627    }
9628    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9629    pub struct Podr_SPEC;
9630    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
9631    impl Podr {
9632        #[doc = "Low output"]
9633        pub const _0: Self = Self::new(0);
9634
9635        #[doc = "High output"]
9636        pub const _1: Self = Self::new(1);
9637    }
9638}
9639#[doc(hidden)]
9640#[derive(Copy, Clone, Eq, PartialEq)]
9641pub struct P201PfsBy_SPEC;
9642impl crate::sealed::RegSpec for P201PfsBy_SPEC {
9643    type DataType = u8;
9644}
9645
9646#[doc = "P201 Pin Function Control Register"]
9647pub type P201PfsBy = crate::RegValueT<P201PfsBy_SPEC>;
9648
9649impl P201PfsBy {
9650    #[doc = "N-Channel Open Drain Control"]
9651    #[inline(always)]
9652    pub fn ncodr(
9653        self,
9654    ) -> crate::common::RegisterField<
9655        6,
9656        0x1,
9657        1,
9658        0,
9659        p201pfs_by::Ncodr,
9660        p201pfs_by::Ncodr,
9661        P201PfsBy_SPEC,
9662        crate::common::RW,
9663    > {
9664        crate::common::RegisterField::<
9665            6,
9666            0x1,
9667            1,
9668            0,
9669            p201pfs_by::Ncodr,
9670            p201pfs_by::Ncodr,
9671            P201PfsBy_SPEC,
9672            crate::common::RW,
9673        >::from_register(self, 0)
9674    }
9675
9676    #[doc = "Pull-up Control"]
9677    #[inline(always)]
9678    pub fn pcr(
9679        self,
9680    ) -> crate::common::RegisterField<
9681        4,
9682        0x1,
9683        1,
9684        0,
9685        p201pfs_by::Pcr,
9686        p201pfs_by::Pcr,
9687        P201PfsBy_SPEC,
9688        crate::common::RW,
9689    > {
9690        crate::common::RegisterField::<
9691            4,
9692            0x1,
9693            1,
9694            0,
9695            p201pfs_by::Pcr,
9696            p201pfs_by::Pcr,
9697            P201PfsBy_SPEC,
9698            crate::common::RW,
9699        >::from_register(self, 0)
9700    }
9701
9702    #[doc = "Port Direction"]
9703    #[inline(always)]
9704    pub fn pdr(
9705        self,
9706    ) -> crate::common::RegisterField<
9707        2,
9708        0x1,
9709        1,
9710        0,
9711        p201pfs_by::Pdr,
9712        p201pfs_by::Pdr,
9713        P201PfsBy_SPEC,
9714        crate::common::RW,
9715    > {
9716        crate::common::RegisterField::<
9717            2,
9718            0x1,
9719            1,
9720            0,
9721            p201pfs_by::Pdr,
9722            p201pfs_by::Pdr,
9723            P201PfsBy_SPEC,
9724            crate::common::RW,
9725        >::from_register(self, 0)
9726    }
9727
9728    #[doc = "Port Input Data"]
9729    #[inline(always)]
9730    pub fn pidr(
9731        self,
9732    ) -> crate::common::RegisterField<
9733        1,
9734        0x1,
9735        1,
9736        0,
9737        p201pfs_by::Pidr,
9738        p201pfs_by::Pidr,
9739        P201PfsBy_SPEC,
9740        crate::common::R,
9741    > {
9742        crate::common::RegisterField::<
9743            1,
9744            0x1,
9745            1,
9746            0,
9747            p201pfs_by::Pidr,
9748            p201pfs_by::Pidr,
9749            P201PfsBy_SPEC,
9750            crate::common::R,
9751        >::from_register(self, 0)
9752    }
9753
9754    #[doc = "Port Output Data"]
9755    #[inline(always)]
9756    pub fn podr(
9757        self,
9758    ) -> crate::common::RegisterField<
9759        0,
9760        0x1,
9761        1,
9762        0,
9763        p201pfs_by::Podr,
9764        p201pfs_by::Podr,
9765        P201PfsBy_SPEC,
9766        crate::common::RW,
9767    > {
9768        crate::common::RegisterField::<
9769            0,
9770            0x1,
9771            1,
9772            0,
9773            p201pfs_by::Podr,
9774            p201pfs_by::Podr,
9775            P201PfsBy_SPEC,
9776            crate::common::RW,
9777        >::from_register(self, 0)
9778    }
9779}
9780impl ::core::default::Default for P201PfsBy {
9781    #[inline(always)]
9782    fn default() -> P201PfsBy {
9783        <crate::RegValueT<P201PfsBy_SPEC> as RegisterValue<_>>::new(16)
9784    }
9785}
9786pub mod p201pfs_by {
9787
9788    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9789    pub struct Ncodr_SPEC;
9790    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
9791    impl Ncodr {
9792        #[doc = "CMOS output"]
9793        pub const _0: Self = Self::new(0);
9794
9795        #[doc = "NMOS open-drain output"]
9796        pub const _1: Self = Self::new(1);
9797    }
9798    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9799    pub struct Pcr_SPEC;
9800    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
9801    impl Pcr {
9802        #[doc = "Disables an input pull-up."]
9803        pub const _0: Self = Self::new(0);
9804
9805        #[doc = "Enables an input pull-up."]
9806        pub const _1: Self = Self::new(1);
9807    }
9808    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9809    pub struct Pdr_SPEC;
9810    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
9811    impl Pdr {
9812        #[doc = "Input (Functions as an input pin.)"]
9813        pub const _0: Self = Self::new(0);
9814
9815        #[doc = "Output (Functions as an output pin.)"]
9816        pub const _1: Self = Self::new(1);
9817    }
9818    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9819    pub struct Pidr_SPEC;
9820    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
9821    impl Pidr {
9822        #[doc = "Low input"]
9823        pub const _0: Self = Self::new(0);
9824
9825        #[doc = "High input"]
9826        pub const _1: Self = Self::new(1);
9827    }
9828    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9829    pub struct Podr_SPEC;
9830    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
9831    impl Podr {
9832        #[doc = "Low output"]
9833        pub const _0: Self = Self::new(0);
9834
9835        #[doc = "High output"]
9836        pub const _1: Self = Self::new(1);
9837    }
9838}
9839#[doc(hidden)]
9840#[derive(Copy, Clone, Eq, PartialEq)]
9841pub struct P20Pfs_SPEC;
9842impl crate::sealed::RegSpec for P20Pfs_SPEC {
9843    type DataType = u32;
9844}
9845
9846#[doc = "P20%s Pin Function Control Register"]
9847pub type P20Pfs = crate::RegValueT<P20Pfs_SPEC>;
9848
9849impl NoBitfieldReg<P20Pfs_SPEC> for P20Pfs {}
9850impl ::core::default::Default for P20Pfs {
9851    #[inline(always)]
9852    fn default() -> P20Pfs {
9853        <crate::RegValueT<P20Pfs_SPEC> as RegisterValue<_>>::new(0)
9854    }
9855}
9856
9857#[doc(hidden)]
9858#[derive(Copy, Clone, Eq, PartialEq)]
9859pub struct P20PfsHa_SPEC;
9860impl crate::sealed::RegSpec for P20PfsHa_SPEC {
9861    type DataType = u16;
9862}
9863
9864#[doc = "P20%s Pin Function Control Register"]
9865pub type P20PfsHa = crate::RegValueT<P20PfsHa_SPEC>;
9866
9867impl NoBitfieldReg<P20PfsHa_SPEC> for P20PfsHa {}
9868impl ::core::default::Default for P20PfsHa {
9869    #[inline(always)]
9870    fn default() -> P20PfsHa {
9871        <crate::RegValueT<P20PfsHa_SPEC> as RegisterValue<_>>::new(0)
9872    }
9873}
9874
9875#[doc(hidden)]
9876#[derive(Copy, Clone, Eq, PartialEq)]
9877pub struct P20PfsBy_SPEC;
9878impl crate::sealed::RegSpec for P20PfsBy_SPEC {
9879    type DataType = u8;
9880}
9881
9882#[doc = "P20%s Pin Function Control Register"]
9883pub type P20PfsBy = crate::RegValueT<P20PfsBy_SPEC>;
9884
9885impl NoBitfieldReg<P20PfsBy_SPEC> for P20PfsBy {}
9886impl ::core::default::Default for P20PfsBy {
9887    #[inline(always)]
9888    fn default() -> P20PfsBy {
9889        <crate::RegValueT<P20PfsBy_SPEC> as RegisterValue<_>>::new(0)
9890    }
9891}
9892
9893#[doc(hidden)]
9894#[derive(Copy, Clone, Eq, PartialEq)]
9895pub struct P2Pfs_SPEC;
9896impl crate::sealed::RegSpec for P2Pfs_SPEC {
9897    type DataType = u32;
9898}
9899
9900#[doc = "P2%s Pin Function Control Register"]
9901pub type P2Pfs = crate::RegValueT<P2Pfs_SPEC>;
9902
9903impl NoBitfieldReg<P2Pfs_SPEC> for P2Pfs {}
9904impl ::core::default::Default for P2Pfs {
9905    #[inline(always)]
9906    fn default() -> P2Pfs {
9907        <crate::RegValueT<P2Pfs_SPEC> as RegisterValue<_>>::new(0)
9908    }
9909}
9910
9911#[doc(hidden)]
9912#[derive(Copy, Clone, Eq, PartialEq)]
9913pub struct P2PfsHa_SPEC;
9914impl crate::sealed::RegSpec for P2PfsHa_SPEC {
9915    type DataType = u16;
9916}
9917
9918#[doc = "P2%s Pin Function Control Register"]
9919pub type P2PfsHa = crate::RegValueT<P2PfsHa_SPEC>;
9920
9921impl NoBitfieldReg<P2PfsHa_SPEC> for P2PfsHa {}
9922impl ::core::default::Default for P2PfsHa {
9923    #[inline(always)]
9924    fn default() -> P2PfsHa {
9925        <crate::RegValueT<P2PfsHa_SPEC> as RegisterValue<_>>::new(0)
9926    }
9927}
9928
9929#[doc(hidden)]
9930#[derive(Copy, Clone, Eq, PartialEq)]
9931pub struct P2PfsBy_SPEC;
9932impl crate::sealed::RegSpec for P2PfsBy_SPEC {
9933    type DataType = u8;
9934}
9935
9936#[doc = "P2%s Pin Function Control Register"]
9937pub type P2PfsBy = crate::RegValueT<P2PfsBy_SPEC>;
9938
9939impl NoBitfieldReg<P2PfsBy_SPEC> for P2PfsBy {}
9940impl ::core::default::Default for P2PfsBy {
9941    #[inline(always)]
9942    fn default() -> P2PfsBy {
9943        <crate::RegValueT<P2PfsBy_SPEC> as RegisterValue<_>>::new(0)
9944    }
9945}
9946
9947#[doc(hidden)]
9948#[derive(Copy, Clone, Eq, PartialEq)]
9949pub struct P300Pfs_SPEC;
9950impl crate::sealed::RegSpec for P300Pfs_SPEC {
9951    type DataType = u32;
9952}
9953
9954#[doc = "P300 Pin Function Control Register"]
9955pub type P300Pfs = crate::RegValueT<P300Pfs_SPEC>;
9956
9957impl NoBitfieldReg<P300Pfs_SPEC> for P300Pfs {}
9958impl ::core::default::Default for P300Pfs {
9959    #[inline(always)]
9960    fn default() -> P300Pfs {
9961        <crate::RegValueT<P300Pfs_SPEC> as RegisterValue<_>>::new(65552)
9962    }
9963}
9964
9965#[doc(hidden)]
9966#[derive(Copy, Clone, Eq, PartialEq)]
9967pub struct P300PfsHa_SPEC;
9968impl crate::sealed::RegSpec for P300PfsHa_SPEC {
9969    type DataType = u16;
9970}
9971
9972#[doc = "P300 Pin Function Control Register"]
9973pub type P300PfsHa = crate::RegValueT<P300PfsHa_SPEC>;
9974
9975impl NoBitfieldReg<P300PfsHa_SPEC> for P300PfsHa {}
9976impl ::core::default::Default for P300PfsHa {
9977    #[inline(always)]
9978    fn default() -> P300PfsHa {
9979        <crate::RegValueT<P300PfsHa_SPEC> as RegisterValue<_>>::new(16)
9980    }
9981}
9982
9983#[doc(hidden)]
9984#[derive(Copy, Clone, Eq, PartialEq)]
9985pub struct P300PfsBy_SPEC;
9986impl crate::sealed::RegSpec for P300PfsBy_SPEC {
9987    type DataType = u8;
9988}
9989
9990#[doc = "P300 Pin Function Control Register"]
9991pub type P300PfsBy = crate::RegValueT<P300PfsBy_SPEC>;
9992
9993impl NoBitfieldReg<P300PfsBy_SPEC> for P300PfsBy {}
9994impl ::core::default::Default for P300PfsBy {
9995    #[inline(always)]
9996    fn default() -> P300PfsBy {
9997        <crate::RegValueT<P300PfsBy_SPEC> as RegisterValue<_>>::new(16)
9998    }
9999}
10000
10001#[doc(hidden)]
10002#[derive(Copy, Clone, Eq, PartialEq)]
10003pub struct P30Pfs_SPEC;
10004impl crate::sealed::RegSpec for P30Pfs_SPEC {
10005    type DataType = u32;
10006}
10007
10008#[doc = "P30%s Pin Function Control Register"]
10009pub type P30Pfs = crate::RegValueT<P30Pfs_SPEC>;
10010
10011impl NoBitfieldReg<P30Pfs_SPEC> for P30Pfs {}
10012impl ::core::default::Default for P30Pfs {
10013    #[inline(always)]
10014    fn default() -> P30Pfs {
10015        <crate::RegValueT<P30Pfs_SPEC> as RegisterValue<_>>::new(0)
10016    }
10017}
10018
10019#[doc(hidden)]
10020#[derive(Copy, Clone, Eq, PartialEq)]
10021pub struct P30PfsHa_SPEC;
10022impl crate::sealed::RegSpec for P30PfsHa_SPEC {
10023    type DataType = u16;
10024}
10025
10026#[doc = "P30%s Pin Function Control Register"]
10027pub type P30PfsHa = crate::RegValueT<P30PfsHa_SPEC>;
10028
10029impl NoBitfieldReg<P30PfsHa_SPEC> for P30PfsHa {}
10030impl ::core::default::Default for P30PfsHa {
10031    #[inline(always)]
10032    fn default() -> P30PfsHa {
10033        <crate::RegValueT<P30PfsHa_SPEC> as RegisterValue<_>>::new(0)
10034    }
10035}
10036
10037#[doc(hidden)]
10038#[derive(Copy, Clone, Eq, PartialEq)]
10039pub struct P30PfsBy_SPEC;
10040impl crate::sealed::RegSpec for P30PfsBy_SPEC {
10041    type DataType = u8;
10042}
10043
10044#[doc = "P30%s Pin Function Control Register"]
10045pub type P30PfsBy = crate::RegValueT<P30PfsBy_SPEC>;
10046
10047impl NoBitfieldReg<P30PfsBy_SPEC> for P30PfsBy {}
10048impl ::core::default::Default for P30PfsBy {
10049    #[inline(always)]
10050    fn default() -> P30PfsBy {
10051        <crate::RegValueT<P30PfsBy_SPEC> as RegisterValue<_>>::new(0)
10052    }
10053}
10054
10055#[doc(hidden)]
10056#[derive(Copy, Clone, Eq, PartialEq)]
10057pub struct P3Pfs_SPEC;
10058impl crate::sealed::RegSpec for P3Pfs_SPEC {
10059    type DataType = u32;
10060}
10061
10062#[doc = "P3%s Pin Function Control Register"]
10063pub type P3Pfs = crate::RegValueT<P3Pfs_SPEC>;
10064
10065impl NoBitfieldReg<P3Pfs_SPEC> for P3Pfs {}
10066impl ::core::default::Default for P3Pfs {
10067    #[inline(always)]
10068    fn default() -> P3Pfs {
10069        <crate::RegValueT<P3Pfs_SPEC> as RegisterValue<_>>::new(0)
10070    }
10071}
10072
10073#[doc(hidden)]
10074#[derive(Copy, Clone, Eq, PartialEq)]
10075pub struct P3PfsHa_SPEC;
10076impl crate::sealed::RegSpec for P3PfsHa_SPEC {
10077    type DataType = u16;
10078}
10079
10080#[doc = "P30%s Pin Function Control Register"]
10081pub type P3PfsHa = crate::RegValueT<P3PfsHa_SPEC>;
10082
10083impl NoBitfieldReg<P3PfsHa_SPEC> for P3PfsHa {}
10084impl ::core::default::Default for P3PfsHa {
10085    #[inline(always)]
10086    fn default() -> P3PfsHa {
10087        <crate::RegValueT<P3PfsHa_SPEC> as RegisterValue<_>>::new(0)
10088    }
10089}
10090
10091#[doc(hidden)]
10092#[derive(Copy, Clone, Eq, PartialEq)]
10093pub struct P3PfsBy_SPEC;
10094impl crate::sealed::RegSpec for P3PfsBy_SPEC {
10095    type DataType = u8;
10096}
10097
10098#[doc = "P30%s Pin Function Control Register"]
10099pub type P3PfsBy = crate::RegValueT<P3PfsBy_SPEC>;
10100
10101impl NoBitfieldReg<P3PfsBy_SPEC> for P3PfsBy {}
10102impl ::core::default::Default for P3PfsBy {
10103    #[inline(always)]
10104    fn default() -> P3PfsBy {
10105        <crate::RegValueT<P3PfsBy_SPEC> as RegisterValue<_>>::new(0)
10106    }
10107}
10108
10109#[doc(hidden)]
10110#[derive(Copy, Clone, Eq, PartialEq)]
10111pub struct P40Pfs_SPEC;
10112impl crate::sealed::RegSpec for P40Pfs_SPEC {
10113    type DataType = u32;
10114}
10115
10116#[doc = "P40%s Pin Function Control Register"]
10117pub type P40Pfs = crate::RegValueT<P40Pfs_SPEC>;
10118
10119impl NoBitfieldReg<P40Pfs_SPEC> for P40Pfs {}
10120impl ::core::default::Default for P40Pfs {
10121    #[inline(always)]
10122    fn default() -> P40Pfs {
10123        <crate::RegValueT<P40Pfs_SPEC> as RegisterValue<_>>::new(0)
10124    }
10125}
10126
10127#[doc(hidden)]
10128#[derive(Copy, Clone, Eq, PartialEq)]
10129pub struct P40PfsHa_SPEC;
10130impl crate::sealed::RegSpec for P40PfsHa_SPEC {
10131    type DataType = u16;
10132}
10133
10134#[doc = "P40%s Pin Function Control Register"]
10135pub type P40PfsHa = crate::RegValueT<P40PfsHa_SPEC>;
10136
10137impl NoBitfieldReg<P40PfsHa_SPEC> for P40PfsHa {}
10138impl ::core::default::Default for P40PfsHa {
10139    #[inline(always)]
10140    fn default() -> P40PfsHa {
10141        <crate::RegValueT<P40PfsHa_SPEC> as RegisterValue<_>>::new(0)
10142    }
10143}
10144
10145#[doc(hidden)]
10146#[derive(Copy, Clone, Eq, PartialEq)]
10147pub struct P40PfsBy_SPEC;
10148impl crate::sealed::RegSpec for P40PfsBy_SPEC {
10149    type DataType = u8;
10150}
10151
10152#[doc = "P40%s Pin Function Control Register"]
10153pub type P40PfsBy = crate::RegValueT<P40PfsBy_SPEC>;
10154
10155impl NoBitfieldReg<P40PfsBy_SPEC> for P40PfsBy {}
10156impl ::core::default::Default for P40PfsBy {
10157    #[inline(always)]
10158    fn default() -> P40PfsBy {
10159        <crate::RegValueT<P40PfsBy_SPEC> as RegisterValue<_>>::new(0)
10160    }
10161}
10162
10163#[doc(hidden)]
10164#[derive(Copy, Clone, Eq, PartialEq)]
10165pub struct P4Pfs_SPEC;
10166impl crate::sealed::RegSpec for P4Pfs_SPEC {
10167    type DataType = u32;
10168}
10169
10170#[doc = "P4%s Pin Function Control Register"]
10171pub type P4Pfs = crate::RegValueT<P4Pfs_SPEC>;
10172
10173impl NoBitfieldReg<P4Pfs_SPEC> for P4Pfs {}
10174impl ::core::default::Default for P4Pfs {
10175    #[inline(always)]
10176    fn default() -> P4Pfs {
10177        <crate::RegValueT<P4Pfs_SPEC> as RegisterValue<_>>::new(0)
10178    }
10179}
10180
10181#[doc(hidden)]
10182#[derive(Copy, Clone, Eq, PartialEq)]
10183pub struct P4PfsHa_SPEC;
10184impl crate::sealed::RegSpec for P4PfsHa_SPEC {
10185    type DataType = u16;
10186}
10187
10188#[doc = "P4%s Pin Function Control Register"]
10189pub type P4PfsHa = crate::RegValueT<P4PfsHa_SPEC>;
10190
10191impl NoBitfieldReg<P4PfsHa_SPEC> for P4PfsHa {}
10192impl ::core::default::Default for P4PfsHa {
10193    #[inline(always)]
10194    fn default() -> P4PfsHa {
10195        <crate::RegValueT<P4PfsHa_SPEC> as RegisterValue<_>>::new(0)
10196    }
10197}
10198
10199#[doc(hidden)]
10200#[derive(Copy, Clone, Eq, PartialEq)]
10201pub struct P4PfsBy_SPEC;
10202impl crate::sealed::RegSpec for P4PfsBy_SPEC {
10203    type DataType = u8;
10204}
10205
10206#[doc = "P4%s Pin Function Control Register"]
10207pub type P4PfsBy = crate::RegValueT<P4PfsBy_SPEC>;
10208
10209impl NoBitfieldReg<P4PfsBy_SPEC> for P4PfsBy {}
10210impl ::core::default::Default for P4PfsBy {
10211    #[inline(always)]
10212    fn default() -> P4PfsBy {
10213        <crate::RegValueT<P4PfsBy_SPEC> as RegisterValue<_>>::new(0)
10214    }
10215}
10216
10217#[doc(hidden)]
10218#[derive(Copy, Clone, Eq, PartialEq)]
10219pub struct P50Pfs_SPEC;
10220impl crate::sealed::RegSpec for P50Pfs_SPEC {
10221    type DataType = u32;
10222}
10223
10224#[doc = "P50%s Pin Function Control Register"]
10225pub type P50Pfs = crate::RegValueT<P50Pfs_SPEC>;
10226
10227impl NoBitfieldReg<P50Pfs_SPEC> for P50Pfs {}
10228impl ::core::default::Default for P50Pfs {
10229    #[inline(always)]
10230    fn default() -> P50Pfs {
10231        <crate::RegValueT<P50Pfs_SPEC> as RegisterValue<_>>::new(0)
10232    }
10233}
10234
10235#[doc(hidden)]
10236#[derive(Copy, Clone, Eq, PartialEq)]
10237pub struct P50PfsHa_SPEC;
10238impl crate::sealed::RegSpec for P50PfsHa_SPEC {
10239    type DataType = u16;
10240}
10241
10242#[doc = "P50%s Pin Function Control Register"]
10243pub type P50PfsHa = crate::RegValueT<P50PfsHa_SPEC>;
10244
10245impl NoBitfieldReg<P50PfsHa_SPEC> for P50PfsHa {}
10246impl ::core::default::Default for P50PfsHa {
10247    #[inline(always)]
10248    fn default() -> P50PfsHa {
10249        <crate::RegValueT<P50PfsHa_SPEC> as RegisterValue<_>>::new(0)
10250    }
10251}
10252
10253#[doc(hidden)]
10254#[derive(Copy, Clone, Eq, PartialEq)]
10255pub struct P50PfsBy_SPEC;
10256impl crate::sealed::RegSpec for P50PfsBy_SPEC {
10257    type DataType = u8;
10258}
10259
10260#[doc = "P50%s Pin Function Control Register"]
10261pub type P50PfsBy = crate::RegValueT<P50PfsBy_SPEC>;
10262
10263impl NoBitfieldReg<P50PfsBy_SPEC> for P50PfsBy {}
10264impl ::core::default::Default for P50PfsBy {
10265    #[inline(always)]
10266    fn default() -> P50PfsBy {
10267        <crate::RegValueT<P50PfsBy_SPEC> as RegisterValue<_>>::new(0)
10268    }
10269}
10270
10271#[doc(hidden)]
10272#[derive(Copy, Clone, Eq, PartialEq)]
10273pub struct P5Pfs_SPEC;
10274impl crate::sealed::RegSpec for P5Pfs_SPEC {
10275    type DataType = u32;
10276}
10277
10278#[doc = "P5%s Pin Function Control Register"]
10279pub type P5Pfs = crate::RegValueT<P5Pfs_SPEC>;
10280
10281impl NoBitfieldReg<P5Pfs_SPEC> for P5Pfs {}
10282impl ::core::default::Default for P5Pfs {
10283    #[inline(always)]
10284    fn default() -> P5Pfs {
10285        <crate::RegValueT<P5Pfs_SPEC> as RegisterValue<_>>::new(0)
10286    }
10287}
10288
10289#[doc(hidden)]
10290#[derive(Copy, Clone, Eq, PartialEq)]
10291pub struct P5PfsHa_SPEC;
10292impl crate::sealed::RegSpec for P5PfsHa_SPEC {
10293    type DataType = u16;
10294}
10295
10296#[doc = "P5%s Pin Function Control Register"]
10297pub type P5PfsHa = crate::RegValueT<P5PfsHa_SPEC>;
10298
10299impl NoBitfieldReg<P5PfsHa_SPEC> for P5PfsHa {}
10300impl ::core::default::Default for P5PfsHa {
10301    #[inline(always)]
10302    fn default() -> P5PfsHa {
10303        <crate::RegValueT<P5PfsHa_SPEC> as RegisterValue<_>>::new(0)
10304    }
10305}
10306
10307#[doc(hidden)]
10308#[derive(Copy, Clone, Eq, PartialEq)]
10309pub struct P5PfsBy_SPEC;
10310impl crate::sealed::RegSpec for P5PfsBy_SPEC {
10311    type DataType = u8;
10312}
10313
10314#[doc = "P5%s Pin Function Control Register"]
10315pub type P5PfsBy = crate::RegValueT<P5PfsBy_SPEC>;
10316
10317impl NoBitfieldReg<P5PfsBy_SPEC> for P5PfsBy {}
10318impl ::core::default::Default for P5PfsBy {
10319    #[inline(always)]
10320    fn default() -> P5PfsBy {
10321        <crate::RegValueT<P5PfsBy_SPEC> as RegisterValue<_>>::new(0)
10322    }
10323}
10324
10325#[doc(hidden)]
10326#[derive(Copy, Clone, Eq, PartialEq)]
10327pub struct P60Pfs_SPEC;
10328impl crate::sealed::RegSpec for P60Pfs_SPEC {
10329    type DataType = u32;
10330}
10331
10332#[doc = "P60%s Pin Function Control Register"]
10333pub type P60Pfs = crate::RegValueT<P60Pfs_SPEC>;
10334
10335impl NoBitfieldReg<P60Pfs_SPEC> for P60Pfs {}
10336impl ::core::default::Default for P60Pfs {
10337    #[inline(always)]
10338    fn default() -> P60Pfs {
10339        <crate::RegValueT<P60Pfs_SPEC> as RegisterValue<_>>::new(0)
10340    }
10341}
10342
10343#[doc(hidden)]
10344#[derive(Copy, Clone, Eq, PartialEq)]
10345pub struct P60PfsHa_SPEC;
10346impl crate::sealed::RegSpec for P60PfsHa_SPEC {
10347    type DataType = u16;
10348}
10349
10350#[doc = "P60%s Pin Function Control Register"]
10351pub type P60PfsHa = crate::RegValueT<P60PfsHa_SPEC>;
10352
10353impl NoBitfieldReg<P60PfsHa_SPEC> for P60PfsHa {}
10354impl ::core::default::Default for P60PfsHa {
10355    #[inline(always)]
10356    fn default() -> P60PfsHa {
10357        <crate::RegValueT<P60PfsHa_SPEC> as RegisterValue<_>>::new(0)
10358    }
10359}
10360
10361#[doc(hidden)]
10362#[derive(Copy, Clone, Eq, PartialEq)]
10363pub struct P60PfsBy_SPEC;
10364impl crate::sealed::RegSpec for P60PfsBy_SPEC {
10365    type DataType = u8;
10366}
10367
10368#[doc = "P60%s Pin Function Control Register"]
10369pub type P60PfsBy = crate::RegValueT<P60PfsBy_SPEC>;
10370
10371impl NoBitfieldReg<P60PfsBy_SPEC> for P60PfsBy {}
10372impl ::core::default::Default for P60PfsBy {
10373    #[inline(always)]
10374    fn default() -> P60PfsBy {
10375        <crate::RegValueT<P60PfsBy_SPEC> as RegisterValue<_>>::new(0)
10376    }
10377}
10378
10379#[doc(hidden)]
10380#[derive(Copy, Clone, Eq, PartialEq)]
10381pub struct P6Pfs_SPEC;
10382impl crate::sealed::RegSpec for P6Pfs_SPEC {
10383    type DataType = u32;
10384}
10385
10386#[doc = "P6%s Pin Function Control Register"]
10387pub type P6Pfs = crate::RegValueT<P6Pfs_SPEC>;
10388
10389impl NoBitfieldReg<P6Pfs_SPEC> for P6Pfs {}
10390impl ::core::default::Default for P6Pfs {
10391    #[inline(always)]
10392    fn default() -> P6Pfs {
10393        <crate::RegValueT<P6Pfs_SPEC> as RegisterValue<_>>::new(0)
10394    }
10395}
10396
10397#[doc(hidden)]
10398#[derive(Copy, Clone, Eq, PartialEq)]
10399pub struct P6PfsHa_SPEC;
10400impl crate::sealed::RegSpec for P6PfsHa_SPEC {
10401    type DataType = u16;
10402}
10403
10404#[doc = "P6%s Pin Function Control Register"]
10405pub type P6PfsHa = crate::RegValueT<P6PfsHa_SPEC>;
10406
10407impl NoBitfieldReg<P6PfsHa_SPEC> for P6PfsHa {}
10408impl ::core::default::Default for P6PfsHa {
10409    #[inline(always)]
10410    fn default() -> P6PfsHa {
10411        <crate::RegValueT<P6PfsHa_SPEC> as RegisterValue<_>>::new(0)
10412    }
10413}
10414
10415#[doc(hidden)]
10416#[derive(Copy, Clone, Eq, PartialEq)]
10417pub struct P6PfsBy_SPEC;
10418impl crate::sealed::RegSpec for P6PfsBy_SPEC {
10419    type DataType = u8;
10420}
10421
10422#[doc = "P6%s Pin Function Control Register"]
10423pub type P6PfsBy = crate::RegValueT<P6PfsBy_SPEC>;
10424
10425impl NoBitfieldReg<P6PfsBy_SPEC> for P6PfsBy {}
10426impl ::core::default::Default for P6PfsBy {
10427    #[inline(always)]
10428    fn default() -> P6PfsBy {
10429        <crate::RegValueT<P6PfsBy_SPEC> as RegisterValue<_>>::new(0)
10430    }
10431}
10432
10433#[doc(hidden)]
10434#[derive(Copy, Clone, Eq, PartialEq)]
10435pub struct P70Pfs_SPEC;
10436impl crate::sealed::RegSpec for P70Pfs_SPEC {
10437    type DataType = u32;
10438}
10439
10440#[doc = "P70%s Pin Function Control Register"]
10441pub type P70Pfs = crate::RegValueT<P70Pfs_SPEC>;
10442
10443impl NoBitfieldReg<P70Pfs_SPEC> for P70Pfs {}
10444impl ::core::default::Default for P70Pfs {
10445    #[inline(always)]
10446    fn default() -> P70Pfs {
10447        <crate::RegValueT<P70Pfs_SPEC> as RegisterValue<_>>::new(0)
10448    }
10449}
10450
10451#[doc(hidden)]
10452#[derive(Copy, Clone, Eq, PartialEq)]
10453pub struct P70PfsHa_SPEC;
10454impl crate::sealed::RegSpec for P70PfsHa_SPEC {
10455    type DataType = u16;
10456}
10457
10458#[doc = "P70%s Pin Function Control Register"]
10459pub type P70PfsHa = crate::RegValueT<P70PfsHa_SPEC>;
10460
10461impl NoBitfieldReg<P70PfsHa_SPEC> for P70PfsHa {}
10462impl ::core::default::Default for P70PfsHa {
10463    #[inline(always)]
10464    fn default() -> P70PfsHa {
10465        <crate::RegValueT<P70PfsHa_SPEC> as RegisterValue<_>>::new(0)
10466    }
10467}
10468
10469#[doc(hidden)]
10470#[derive(Copy, Clone, Eq, PartialEq)]
10471pub struct P70PfsBy_SPEC;
10472impl crate::sealed::RegSpec for P70PfsBy_SPEC {
10473    type DataType = u8;
10474}
10475
10476#[doc = "P70%s Pin Function Control Register"]
10477pub type P70PfsBy = crate::RegValueT<P70PfsBy_SPEC>;
10478
10479impl NoBitfieldReg<P70PfsBy_SPEC> for P70PfsBy {}
10480impl ::core::default::Default for P70PfsBy {
10481    #[inline(always)]
10482    fn default() -> P70PfsBy {
10483        <crate::RegValueT<P70PfsBy_SPEC> as RegisterValue<_>>::new(0)
10484    }
10485}
10486
10487#[doc(hidden)]
10488#[derive(Copy, Clone, Eq, PartialEq)]
10489pub struct P80Pfs_SPEC;
10490impl crate::sealed::RegSpec for P80Pfs_SPEC {
10491    type DataType = u32;
10492}
10493
10494#[doc = "P80%s Pin Function Control Register"]
10495pub type P80Pfs = crate::RegValueT<P80Pfs_SPEC>;
10496
10497impl NoBitfieldReg<P80Pfs_SPEC> for P80Pfs {}
10498impl ::core::default::Default for P80Pfs {
10499    #[inline(always)]
10500    fn default() -> P80Pfs {
10501        <crate::RegValueT<P80Pfs_SPEC> as RegisterValue<_>>::new(0)
10502    }
10503}
10504
10505#[doc(hidden)]
10506#[derive(Copy, Clone, Eq, PartialEq)]
10507pub struct P80PfsHa_SPEC;
10508impl crate::sealed::RegSpec for P80PfsHa_SPEC {
10509    type DataType = u16;
10510}
10511
10512#[doc = "P80%s Pin Function Control Register"]
10513pub type P80PfsHa = crate::RegValueT<P80PfsHa_SPEC>;
10514
10515impl NoBitfieldReg<P80PfsHa_SPEC> for P80PfsHa {}
10516impl ::core::default::Default for P80PfsHa {
10517    #[inline(always)]
10518    fn default() -> P80PfsHa {
10519        <crate::RegValueT<P80PfsHa_SPEC> as RegisterValue<_>>::new(0)
10520    }
10521}
10522
10523#[doc(hidden)]
10524#[derive(Copy, Clone, Eq, PartialEq)]
10525pub struct P80PfsBy_SPEC;
10526impl crate::sealed::RegSpec for P80PfsBy_SPEC {
10527    type DataType = u8;
10528}
10529
10530#[doc = "P80%s Pin Function Control Register"]
10531pub type P80PfsBy = crate::RegValueT<P80PfsBy_SPEC>;
10532
10533impl NoBitfieldReg<P80PfsBy_SPEC> for P80PfsBy {}
10534impl ::core::default::Default for P80PfsBy {
10535    #[inline(always)]
10536    fn default() -> P80PfsBy {
10537        <crate::RegValueT<P80PfsBy_SPEC> as RegisterValue<_>>::new(0)
10538    }
10539}
10540
10541#[doc(hidden)]
10542#[derive(Copy, Clone, Eq, PartialEq)]
10543pub struct P90Pfs_SPEC;
10544impl crate::sealed::RegSpec for P90Pfs_SPEC {
10545    type DataType = u32;
10546}
10547
10548#[doc = "P90%s Pin Function Control Register"]
10549pub type P90Pfs = crate::RegValueT<P90Pfs_SPEC>;
10550
10551impl NoBitfieldReg<P90Pfs_SPEC> for P90Pfs {}
10552impl ::core::default::Default for P90Pfs {
10553    #[inline(always)]
10554    fn default() -> P90Pfs {
10555        <crate::RegValueT<P90Pfs_SPEC> as RegisterValue<_>>::new(0)
10556    }
10557}
10558
10559#[doc(hidden)]
10560#[derive(Copy, Clone, Eq, PartialEq)]
10561pub struct P90PfsHa_SPEC;
10562impl crate::sealed::RegSpec for P90PfsHa_SPEC {
10563    type DataType = u16;
10564}
10565
10566#[doc = "P90%s Pin Function Control Register"]
10567pub type P90PfsHa = crate::RegValueT<P90PfsHa_SPEC>;
10568
10569impl NoBitfieldReg<P90PfsHa_SPEC> for P90PfsHa {}
10570impl ::core::default::Default for P90PfsHa {
10571    #[inline(always)]
10572    fn default() -> P90PfsHa {
10573        <crate::RegValueT<P90PfsHa_SPEC> as RegisterValue<_>>::new(0)
10574    }
10575}
10576
10577#[doc(hidden)]
10578#[derive(Copy, Clone, Eq, PartialEq)]
10579pub struct P90PfsBy_SPEC;
10580impl crate::sealed::RegSpec for P90PfsBy_SPEC {
10581    type DataType = u8;
10582}
10583
10584#[doc = "P90%s Pin Function Control Register"]
10585pub type P90PfsBy = crate::RegValueT<P90PfsBy_SPEC>;
10586
10587impl NoBitfieldReg<P90PfsBy_SPEC> for P90PfsBy {}
10588impl ::core::default::Default for P90PfsBy {
10589    #[inline(always)]
10590    fn default() -> P90PfsBy {
10591        <crate::RegValueT<P90PfsBy_SPEC> as RegisterValue<_>>::new(0)
10592    }
10593}
10594
10595#[doc(hidden)]
10596#[derive(Copy, Clone, Eq, PartialEq)]
10597pub struct Pa0Pfs_SPEC;
10598impl crate::sealed::RegSpec for Pa0Pfs_SPEC {
10599    type DataType = u32;
10600}
10601
10602#[doc = "PA0%s Pin Function Control Register"]
10603pub type Pa0Pfs = crate::RegValueT<Pa0Pfs_SPEC>;
10604
10605impl NoBitfieldReg<Pa0Pfs_SPEC> for Pa0Pfs {}
10606impl ::core::default::Default for Pa0Pfs {
10607    #[inline(always)]
10608    fn default() -> Pa0Pfs {
10609        <crate::RegValueT<Pa0Pfs_SPEC> as RegisterValue<_>>::new(0)
10610    }
10611}
10612
10613#[doc(hidden)]
10614#[derive(Copy, Clone, Eq, PartialEq)]
10615pub struct Pa0PfsHa_SPEC;
10616impl crate::sealed::RegSpec for Pa0PfsHa_SPEC {
10617    type DataType = u16;
10618}
10619
10620#[doc = "PA0%s Pin Function Control Register"]
10621pub type Pa0PfsHa = crate::RegValueT<Pa0PfsHa_SPEC>;
10622
10623impl NoBitfieldReg<Pa0PfsHa_SPEC> for Pa0PfsHa {}
10624impl ::core::default::Default for Pa0PfsHa {
10625    #[inline(always)]
10626    fn default() -> Pa0PfsHa {
10627        <crate::RegValueT<Pa0PfsHa_SPEC> as RegisterValue<_>>::new(0)
10628    }
10629}
10630
10631#[doc(hidden)]
10632#[derive(Copy, Clone, Eq, PartialEq)]
10633pub struct Pa0PfsBy_SPEC;
10634impl crate::sealed::RegSpec for Pa0PfsBy_SPEC {
10635    type DataType = u8;
10636}
10637
10638#[doc = "PA0%s Pin Function Control Register"]
10639pub type Pa0PfsBy = crate::RegValueT<Pa0PfsBy_SPEC>;
10640
10641impl NoBitfieldReg<Pa0PfsBy_SPEC> for Pa0PfsBy {}
10642impl ::core::default::Default for Pa0PfsBy {
10643    #[inline(always)]
10644    fn default() -> Pa0PfsBy {
10645        <crate::RegValueT<Pa0PfsBy_SPEC> as RegisterValue<_>>::new(0)
10646    }
10647}
10648
10649#[doc(hidden)]
10650#[derive(Copy, Clone, Eq, PartialEq)]
10651pub struct Pa10Pfs_SPEC;
10652impl crate::sealed::RegSpec for Pa10Pfs_SPEC {
10653    type DataType = u32;
10654}
10655
10656#[doc = "PA10 Pin Function Control Register"]
10657pub type Pa10Pfs = crate::RegValueT<Pa10Pfs_SPEC>;
10658
10659impl NoBitfieldReg<Pa10Pfs_SPEC> for Pa10Pfs {}
10660impl ::core::default::Default for Pa10Pfs {
10661    #[inline(always)]
10662    fn default() -> Pa10Pfs {
10663        <crate::RegValueT<Pa10Pfs_SPEC> as RegisterValue<_>>::new(0)
10664    }
10665}
10666
10667#[doc(hidden)]
10668#[derive(Copy, Clone, Eq, PartialEq)]
10669pub struct Pa10PfsHa_SPEC;
10670impl crate::sealed::RegSpec for Pa10PfsHa_SPEC {
10671    type DataType = u16;
10672}
10673
10674#[doc = "PA10 Pin Function Control Register"]
10675pub type Pa10PfsHa = crate::RegValueT<Pa10PfsHa_SPEC>;
10676
10677impl NoBitfieldReg<Pa10PfsHa_SPEC> for Pa10PfsHa {}
10678impl ::core::default::Default for Pa10PfsHa {
10679    #[inline(always)]
10680    fn default() -> Pa10PfsHa {
10681        <crate::RegValueT<Pa10PfsHa_SPEC> as RegisterValue<_>>::new(0)
10682    }
10683}
10684
10685#[doc(hidden)]
10686#[derive(Copy, Clone, Eq, PartialEq)]
10687pub struct Pa10PfsBy_SPEC;
10688impl crate::sealed::RegSpec for Pa10PfsBy_SPEC {
10689    type DataType = u8;
10690}
10691
10692#[doc = "PA10 Pin Function Control Register"]
10693pub type Pa10PfsBy = crate::RegValueT<Pa10PfsBy_SPEC>;
10694
10695impl NoBitfieldReg<Pa10PfsBy_SPEC> for Pa10PfsBy {}
10696impl ::core::default::Default for Pa10PfsBy {
10697    #[inline(always)]
10698    fn default() -> Pa10PfsBy {
10699        <crate::RegValueT<Pa10PfsBy_SPEC> as RegisterValue<_>>::new(0)
10700    }
10701}
10702
10703#[doc(hidden)]
10704#[derive(Copy, Clone, Eq, PartialEq)]
10705pub struct Pb0Pfs_SPEC;
10706impl crate::sealed::RegSpec for Pb0Pfs_SPEC {
10707    type DataType = u32;
10708}
10709
10710#[doc = "PB0%s Pin Function Control Register"]
10711pub type Pb0Pfs = crate::RegValueT<Pb0Pfs_SPEC>;
10712
10713impl NoBitfieldReg<Pb0Pfs_SPEC> for Pb0Pfs {}
10714impl ::core::default::Default for Pb0Pfs {
10715    #[inline(always)]
10716    fn default() -> Pb0Pfs {
10717        <crate::RegValueT<Pb0Pfs_SPEC> as RegisterValue<_>>::new(0)
10718    }
10719}
10720
10721#[doc(hidden)]
10722#[derive(Copy, Clone, Eq, PartialEq)]
10723pub struct Pb0PfsHa_SPEC;
10724impl crate::sealed::RegSpec for Pb0PfsHa_SPEC {
10725    type DataType = u16;
10726}
10727
10728#[doc = "PB0%s Pin Function Control Register"]
10729pub type Pb0PfsHa = crate::RegValueT<Pb0PfsHa_SPEC>;
10730
10731impl NoBitfieldReg<Pb0PfsHa_SPEC> for Pb0PfsHa {}
10732impl ::core::default::Default for Pb0PfsHa {
10733    #[inline(always)]
10734    fn default() -> Pb0PfsHa {
10735        <crate::RegValueT<Pb0PfsHa_SPEC> as RegisterValue<_>>::new(0)
10736    }
10737}
10738
10739#[doc(hidden)]
10740#[derive(Copy, Clone, Eq, PartialEq)]
10741pub struct Pb0PfsBy_SPEC;
10742impl crate::sealed::RegSpec for Pb0PfsBy_SPEC {
10743    type DataType = u8;
10744}
10745
10746#[doc = "PB0%s Pin Function Control Register"]
10747pub type Pb0PfsBy = crate::RegValueT<Pb0PfsBy_SPEC>;
10748
10749impl NoBitfieldReg<Pb0PfsBy_SPEC> for Pb0PfsBy {}
10750impl ::core::default::Default for Pb0PfsBy {
10751    #[inline(always)]
10752    fn default() -> Pb0PfsBy {
10753        <crate::RegValueT<Pb0PfsBy_SPEC> as RegisterValue<_>>::new(0)
10754    }
10755}