ra6m2_pac/
etherc0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:11:44 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Ethernet Controller Channel 0"]
28unsafe impl ::core::marker::Send for super::Etherc0 {}
29unsafe impl ::core::marker::Sync for super::Etherc0 {}
30impl super::Etherc0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "ETHERC Mode Register"]
38    #[inline(always)]
39    pub const fn ecmr(&self) -> &'static crate::common::Reg<self::Ecmr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Ecmr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "Receive Frame Maximum Length Register"]
48    #[inline(always)]
49    pub const fn rflr(&self) -> &'static crate::common::Reg<self::Rflr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Rflr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(8usize),
53            )
54        }
55    }
56
57    #[doc = "ETHERC Status Register"]
58    #[inline(always)]
59    pub const fn ecsr(&self) -> &'static crate::common::Reg<self::Ecsr_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Ecsr_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(16usize),
63            )
64        }
65    }
66
67    #[doc = "ETHERC Interrupt Enable Register"]
68    #[inline(always)]
69    pub const fn ecsipr(
70        &self,
71    ) -> &'static crate::common::Reg<self::Ecsipr_SPEC, crate::common::RW> {
72        unsafe {
73            crate::common::Reg::<self::Ecsipr_SPEC, crate::common::RW>::from_ptr(
74                self._svd2pac_as_ptr().add(24usize),
75            )
76        }
77    }
78
79    #[doc = "PHY Interface Register"]
80    #[inline(always)]
81    pub const fn pir(&self) -> &'static crate::common::Reg<self::Pir_SPEC, crate::common::RW> {
82        unsafe {
83            crate::common::Reg::<self::Pir_SPEC, crate::common::RW>::from_ptr(
84                self._svd2pac_as_ptr().add(32usize),
85            )
86        }
87    }
88
89    #[doc = "PHY Status Register"]
90    #[inline(always)]
91    pub const fn psr(&self) -> &'static crate::common::Reg<self::Psr_SPEC, crate::common::R> {
92        unsafe {
93            crate::common::Reg::<self::Psr_SPEC, crate::common::R>::from_ptr(
94                self._svd2pac_as_ptr().add(40usize),
95            )
96        }
97    }
98
99    #[doc = "Random Number Generation Counter Upper Limit Setting Register"]
100    #[inline(always)]
101    pub const fn rdmlr(&self) -> &'static crate::common::Reg<self::Rdmlr_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Rdmlr_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(64usize),
105            )
106        }
107    }
108
109    #[doc = "IPG Register"]
110    #[inline(always)]
111    pub const fn ipgr(&self) -> &'static crate::common::Reg<self::Ipgr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Ipgr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(80usize),
115            )
116        }
117    }
118
119    #[doc = "Automatic PAUSE Frame Register"]
120    #[inline(always)]
121    pub const fn apr(&self) -> &'static crate::common::Reg<self::Apr_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Apr_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(84usize),
125            )
126        }
127    }
128
129    #[doc = "Manual PAUSE Frame Register"]
130    #[inline(always)]
131    pub const fn mpr(&self) -> &'static crate::common::Reg<self::Mpr_SPEC, crate::common::W> {
132        unsafe {
133            crate::common::Reg::<self::Mpr_SPEC, crate::common::W>::from_ptr(
134                self._svd2pac_as_ptr().add(88usize),
135            )
136        }
137    }
138
139    #[doc = "Received PAUSE Frame Counter"]
140    #[inline(always)]
141    pub const fn rfcf(&self) -> &'static crate::common::Reg<self::Rfcf_SPEC, crate::common::R> {
142        unsafe {
143            crate::common::Reg::<self::Rfcf_SPEC, crate::common::R>::from_ptr(
144                self._svd2pac_as_ptr().add(96usize),
145            )
146        }
147    }
148
149    #[doc = "PAUSE Frame Retransmit Count Setting Register"]
150    #[inline(always)]
151    pub const fn tpauser(
152        &self,
153    ) -> &'static crate::common::Reg<self::Tpauser_SPEC, crate::common::RW> {
154        unsafe {
155            crate::common::Reg::<self::Tpauser_SPEC, crate::common::RW>::from_ptr(
156                self._svd2pac_as_ptr().add(100usize),
157            )
158        }
159    }
160
161    #[doc = "PAUSE Frame Retransmit Counter"]
162    #[inline(always)]
163    pub const fn tpausecr(
164        &self,
165    ) -> &'static crate::common::Reg<self::Tpausecr_SPEC, crate::common::R> {
166        unsafe {
167            crate::common::Reg::<self::Tpausecr_SPEC, crate::common::R>::from_ptr(
168                self._svd2pac_as_ptr().add(104usize),
169            )
170        }
171    }
172
173    #[doc = "Broadcast Frame Receive Count Setting Register"]
174    #[inline(always)]
175    pub const fn bcfrr(&self) -> &'static crate::common::Reg<self::Bcfrr_SPEC, crate::common::RW> {
176        unsafe {
177            crate::common::Reg::<self::Bcfrr_SPEC, crate::common::RW>::from_ptr(
178                self._svd2pac_as_ptr().add(108usize),
179            )
180        }
181    }
182
183    #[doc = "MAC Address Upper Bit Register"]
184    #[inline(always)]
185    pub const fn mahr(&self) -> &'static crate::common::Reg<self::Mahr_SPEC, crate::common::RW> {
186        unsafe {
187            crate::common::Reg::<self::Mahr_SPEC, crate::common::RW>::from_ptr(
188                self._svd2pac_as_ptr().add(192usize),
189            )
190        }
191    }
192
193    #[doc = "MAC Address Lower Bit Register"]
194    #[inline(always)]
195    pub const fn malr(&self) -> &'static crate::common::Reg<self::Malr_SPEC, crate::common::RW> {
196        unsafe {
197            crate::common::Reg::<self::Malr_SPEC, crate::common::RW>::from_ptr(
198                self._svd2pac_as_ptr().add(200usize),
199            )
200        }
201    }
202
203    #[doc = "Transmit Retry Over Counter Register"]
204    #[inline(always)]
205    pub const fn trocr(&self) -> &'static crate::common::Reg<self::Trocr_SPEC, crate::common::RW> {
206        unsafe {
207            crate::common::Reg::<self::Trocr_SPEC, crate::common::RW>::from_ptr(
208                self._svd2pac_as_ptr().add(208usize),
209            )
210        }
211    }
212
213    #[doc = "Late Collision Detect Counter Register"]
214    #[inline(always)]
215    pub const fn cdcr(&self) -> &'static crate::common::Reg<self::Cdcr_SPEC, crate::common::RW> {
216        unsafe {
217            crate::common::Reg::<self::Cdcr_SPEC, crate::common::RW>::from_ptr(
218                self._svd2pac_as_ptr().add(212usize),
219            )
220        }
221    }
222
223    #[doc = "Lost Carrier Counter Register"]
224    #[inline(always)]
225    pub const fn lccr(&self) -> &'static crate::common::Reg<self::Lccr_SPEC, crate::common::RW> {
226        unsafe {
227            crate::common::Reg::<self::Lccr_SPEC, crate::common::RW>::from_ptr(
228                self._svd2pac_as_ptr().add(216usize),
229            )
230        }
231    }
232
233    #[doc = "Carrier Not Detect Counter Register"]
234    #[inline(always)]
235    pub const fn cndcr(&self) -> &'static crate::common::Reg<self::Cndcr_SPEC, crate::common::RW> {
236        unsafe {
237            crate::common::Reg::<self::Cndcr_SPEC, crate::common::RW>::from_ptr(
238                self._svd2pac_as_ptr().add(220usize),
239            )
240        }
241    }
242
243    #[doc = "CRC Error Frame Receive Counter Register"]
244    #[inline(always)]
245    pub const fn cefcr(&self) -> &'static crate::common::Reg<self::Cefcr_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::Cefcr_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(228usize),
249            )
250        }
251    }
252
253    #[doc = "Frame Receive Error Counter Register"]
254    #[inline(always)]
255    pub const fn frecr(&self) -> &'static crate::common::Reg<self::Frecr_SPEC, crate::common::RW> {
256        unsafe {
257            crate::common::Reg::<self::Frecr_SPEC, crate::common::RW>::from_ptr(
258                self._svd2pac_as_ptr().add(232usize),
259            )
260        }
261    }
262
263    #[doc = "Too-Short Frame Receive Counter Register"]
264    #[inline(always)]
265    pub const fn tsfrcr(
266        &self,
267    ) -> &'static crate::common::Reg<self::Tsfrcr_SPEC, crate::common::RW> {
268        unsafe {
269            crate::common::Reg::<self::Tsfrcr_SPEC, crate::common::RW>::from_ptr(
270                self._svd2pac_as_ptr().add(236usize),
271            )
272        }
273    }
274
275    #[doc = "Too-Long Frame Receive Counter Register"]
276    #[inline(always)]
277    pub const fn tlfrcr(
278        &self,
279    ) -> &'static crate::common::Reg<self::Tlfrcr_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Tlfrcr_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(240usize),
283            )
284        }
285    }
286
287    #[doc = "Received Alignment Error Frame Counter Register"]
288    #[inline(always)]
289    pub const fn rfcr(&self) -> &'static crate::common::Reg<self::Rfcr_SPEC, crate::common::RW> {
290        unsafe {
291            crate::common::Reg::<self::Rfcr_SPEC, crate::common::RW>::from_ptr(
292                self._svd2pac_as_ptr().add(244usize),
293            )
294        }
295    }
296
297    #[doc = "Multicast Address Frame Receive Counter Register"]
298    #[inline(always)]
299    pub const fn mafcr(&self) -> &'static crate::common::Reg<self::Mafcr_SPEC, crate::common::RW> {
300        unsafe {
301            crate::common::Reg::<self::Mafcr_SPEC, crate::common::RW>::from_ptr(
302                self._svd2pac_as_ptr().add(248usize),
303            )
304        }
305    }
306}
307#[doc(hidden)]
308#[derive(Copy, Clone, Eq, PartialEq)]
309pub struct Ecmr_SPEC;
310impl crate::sealed::RegSpec for Ecmr_SPEC {
311    type DataType = u32;
312}
313
314#[doc = "ETHERC Mode Register"]
315pub type Ecmr = crate::RegValueT<Ecmr_SPEC>;
316
317impl Ecmr {
318    #[doc = "PAUSE Frame Transmit"]
319    #[inline(always)]
320    pub fn tpc(
321        self,
322    ) -> crate::common::RegisterField<
323        20,
324        0x1,
325        1,
326        0,
327        ecmr::Tpc,
328        ecmr::Tpc,
329        Ecmr_SPEC,
330        crate::common::RW,
331    > {
332        crate::common::RegisterField::<
333            20,
334            0x1,
335            1,
336            0,
337            ecmr::Tpc,
338            ecmr::Tpc,
339            Ecmr_SPEC,
340            crate::common::RW,
341        >::from_register(self, 0)
342    }
343
344    #[doc = "0 Time PAUSE Frame Enable"]
345    #[inline(always)]
346    pub fn zpf(
347        self,
348    ) -> crate::common::RegisterField<
349        19,
350        0x1,
351        1,
352        0,
353        ecmr::Zpf,
354        ecmr::Zpf,
355        Ecmr_SPEC,
356        crate::common::RW,
357    > {
358        crate::common::RegisterField::<
359            19,
360            0x1,
361            1,
362            0,
363            ecmr::Zpf,
364            ecmr::Zpf,
365            Ecmr_SPEC,
366            crate::common::RW,
367        >::from_register(self, 0)
368    }
369
370    #[doc = "PAUSE Frame Receive Mode"]
371    #[inline(always)]
372    pub fn pfr(
373        self,
374    ) -> crate::common::RegisterField<
375        18,
376        0x1,
377        1,
378        0,
379        ecmr::Pfr,
380        ecmr::Pfr,
381        Ecmr_SPEC,
382        crate::common::RW,
383    > {
384        crate::common::RegisterField::<
385            18,
386            0x1,
387            1,
388            0,
389            ecmr::Pfr,
390            ecmr::Pfr,
391            Ecmr_SPEC,
392            crate::common::RW,
393        >::from_register(self, 0)
394    }
395
396    #[doc = "Receive Flow Control Operating Mode"]
397    #[inline(always)]
398    pub fn rxf(
399        self,
400    ) -> crate::common::RegisterField<
401        17,
402        0x1,
403        1,
404        0,
405        ecmr::Rxf,
406        ecmr::Rxf,
407        Ecmr_SPEC,
408        crate::common::RW,
409    > {
410        crate::common::RegisterField::<
411            17,
412            0x1,
413            1,
414            0,
415            ecmr::Rxf,
416            ecmr::Rxf,
417            Ecmr_SPEC,
418            crate::common::RW,
419        >::from_register(self, 0)
420    }
421
422    #[doc = "Transmit Flow Control Operating Mode"]
423    #[inline(always)]
424    pub fn txf(
425        self,
426    ) -> crate::common::RegisterField<
427        16,
428        0x1,
429        1,
430        0,
431        ecmr::Txf,
432        ecmr::Txf,
433        Ecmr_SPEC,
434        crate::common::RW,
435    > {
436        crate::common::RegisterField::<
437            16,
438            0x1,
439            1,
440            0,
441            ecmr::Txf,
442            ecmr::Txf,
443            Ecmr_SPEC,
444            crate::common::RW,
445        >::from_register(self, 0)
446    }
447
448    #[doc = "CRC Error Frame Receive Mode"]
449    #[inline(always)]
450    pub fn prcef(
451        self,
452    ) -> crate::common::RegisterField<
453        12,
454        0x1,
455        1,
456        0,
457        ecmr::Prcef,
458        ecmr::Prcef,
459        Ecmr_SPEC,
460        crate::common::RW,
461    > {
462        crate::common::RegisterField::<
463            12,
464            0x1,
465            1,
466            0,
467            ecmr::Prcef,
468            ecmr::Prcef,
469            Ecmr_SPEC,
470            crate::common::RW,
471        >::from_register(self, 0)
472    }
473
474    #[doc = "Magic Packet Detection Enable"]
475    #[inline(always)]
476    pub fn mpde(
477        self,
478    ) -> crate::common::RegisterField<
479        9,
480        0x1,
481        1,
482        0,
483        ecmr::Mpde,
484        ecmr::Mpde,
485        Ecmr_SPEC,
486        crate::common::RW,
487    > {
488        crate::common::RegisterField::<
489            9,
490            0x1,
491            1,
492            0,
493            ecmr::Mpde,
494            ecmr::Mpde,
495            Ecmr_SPEC,
496            crate::common::RW,
497        >::from_register(self, 0)
498    }
499
500    #[doc = "Reception Enable"]
501    #[inline(always)]
502    pub fn re(
503        self,
504    ) -> crate::common::RegisterField<6, 0x1, 1, 0, ecmr::Re, ecmr::Re, Ecmr_SPEC, crate::common::RW>
505    {
506        crate::common::RegisterField::<6,0x1,1,0,ecmr::Re,ecmr::Re,Ecmr_SPEC,crate::common::RW>::from_register(self,0)
507    }
508
509    #[doc = "Transmission Enable"]
510    #[inline(always)]
511    pub fn te(
512        self,
513    ) -> crate::common::RegisterField<5, 0x1, 1, 0, ecmr::Te, ecmr::Te, Ecmr_SPEC, crate::common::RW>
514    {
515        crate::common::RegisterField::<5,0x1,1,0,ecmr::Te,ecmr::Te,Ecmr_SPEC,crate::common::RW>::from_register(self,0)
516    }
517
518    #[doc = "Internal Loopback Mode"]
519    #[inline(always)]
520    pub fn ilb(
521        self,
522    ) -> crate::common::RegisterField<
523        3,
524        0x1,
525        1,
526        0,
527        ecmr::Ilb,
528        ecmr::Ilb,
529        Ecmr_SPEC,
530        crate::common::RW,
531    > {
532        crate::common::RegisterField::<
533            3,
534            0x1,
535            1,
536            0,
537            ecmr::Ilb,
538            ecmr::Ilb,
539            Ecmr_SPEC,
540            crate::common::RW,
541        >::from_register(self, 0)
542    }
543
544    #[doc = "Bit Rate"]
545    #[inline(always)]
546    pub fn rtm(
547        self,
548    ) -> crate::common::RegisterField<
549        2,
550        0x1,
551        1,
552        0,
553        ecmr::Rtm,
554        ecmr::Rtm,
555        Ecmr_SPEC,
556        crate::common::RW,
557    > {
558        crate::common::RegisterField::<
559            2,
560            0x1,
561            1,
562            0,
563            ecmr::Rtm,
564            ecmr::Rtm,
565            Ecmr_SPEC,
566            crate::common::RW,
567        >::from_register(self, 0)
568    }
569
570    #[doc = "Duplex Mode"]
571    #[inline(always)]
572    pub fn dm(
573        self,
574    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ecmr::Dm, ecmr::Dm, Ecmr_SPEC, crate::common::RW>
575    {
576        crate::common::RegisterField::<1,0x1,1,0,ecmr::Dm,ecmr::Dm,Ecmr_SPEC,crate::common::RW>::from_register(self,0)
577    }
578
579    #[doc = "Promiscuous Mode"]
580    #[inline(always)]
581    pub fn prm(
582        self,
583    ) -> crate::common::RegisterField<
584        0,
585        0x1,
586        1,
587        0,
588        ecmr::Prm,
589        ecmr::Prm,
590        Ecmr_SPEC,
591        crate::common::RW,
592    > {
593        crate::common::RegisterField::<
594            0,
595            0x1,
596            1,
597            0,
598            ecmr::Prm,
599            ecmr::Prm,
600            Ecmr_SPEC,
601            crate::common::RW,
602        >::from_register(self, 0)
603    }
604}
605impl ::core::default::Default for Ecmr {
606    #[inline(always)]
607    fn default() -> Ecmr {
608        <crate::RegValueT<Ecmr_SPEC> as RegisterValue<_>>::new(0)
609    }
610}
611pub mod ecmr {
612
613    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
614    pub struct Tpc_SPEC;
615    pub type Tpc = crate::EnumBitfieldStruct<u8, Tpc_SPEC>;
616    impl Tpc {
617        #[doc = "PAUSE frame is transmitted even during a PAUSE period."]
618        pub const _0: Self = Self::new(0);
619
620        #[doc = "PAUSE frame is not transmitted during a PAUSE period."]
621        pub const _1: Self = Self::new(1);
622    }
623    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
624    pub struct Zpf_SPEC;
625    pub type Zpf = crate::EnumBitfieldStruct<u8, Zpf_SPEC>;
626    impl Zpf {
627        #[doc = "PAUSE frame that contains the pause_time parameter of 0 is not used."]
628        pub const _0: Self = Self::new(0);
629
630        #[doc = "PAUSE frame that contains the pause_time parameter of 0 is used."]
631        pub const _1: Self = Self::new(1);
632    }
633    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
634    pub struct Pfr_SPEC;
635    pub type Pfr = crate::EnumBitfieldStruct<u8, Pfr_SPEC>;
636    impl Pfr {
637        #[doc = "PAUSE frame is not transferred to the EDMAC."]
638        pub const _0: Self = Self::new(0);
639
640        #[doc = "PAUSE frame is transferred to the EDMAC."]
641        pub const _1: Self = Self::new(1);
642    }
643    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
644    pub struct Rxf_SPEC;
645    pub type Rxf = crate::EnumBitfieldStruct<u8, Rxf_SPEC>;
646    impl Rxf {
647        #[doc = "PAUSE frame detection is disabled."]
648        pub const _0: Self = Self::new(0);
649
650        #[doc = "PAUSE frame detection is enabled."]
651        pub const _1: Self = Self::new(1);
652    }
653    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
654    pub struct Txf_SPEC;
655    pub type Txf = crate::EnumBitfieldStruct<u8, Txf_SPEC>;
656    impl Txf {
657        #[doc = "Automatic PAUSE frame transmission is disabled.(PAUSE frame is not automatically transmitted.)"]
658        pub const _0: Self = Self::new(0);
659
660        #[doc = "Automatic PAUSE frame transmission is enabled.(PAUSE frame is automatically transmitted as required.)"]
661        pub const _1: Self = Self::new(1);
662    }
663    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
664    pub struct Prcef_SPEC;
665    pub type Prcef = crate::EnumBitfieldStruct<u8, Prcef_SPEC>;
666    impl Prcef {
667        #[doc = "EDMAC is notified of a CRC error."]
668        pub const _0: Self = Self::new(0);
669
670        #[doc = "EDMAC is not notified of a CRC error."]
671        pub const _1: Self = Self::new(1);
672    }
673    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
674    pub struct Mpde_SPEC;
675    pub type Mpde = crate::EnumBitfieldStruct<u8, Mpde_SPEC>;
676    impl Mpde {
677        #[doc = "Magic Packet detection is disabled."]
678        pub const _0: Self = Self::new(0);
679
680        #[doc = "Magic Packet detection is enabled."]
681        pub const _1: Self = Self::new(1);
682    }
683    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
684    pub struct Re_SPEC;
685    pub type Re = crate::EnumBitfieldStruct<u8, Re_SPEC>;
686    impl Re {
687        #[doc = "Receive function is disabled."]
688        pub const _0: Self = Self::new(0);
689
690        #[doc = "Receive function is enabled."]
691        pub const _1: Self = Self::new(1);
692    }
693    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
694    pub struct Te_SPEC;
695    pub type Te = crate::EnumBitfieldStruct<u8, Te_SPEC>;
696    impl Te {
697        #[doc = "Transmit function is disabled."]
698        pub const _0: Self = Self::new(0);
699
700        #[doc = "Transmit function is enabled."]
701        pub const _1: Self = Self::new(1);
702    }
703    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
704    pub struct Ilb_SPEC;
705    pub type Ilb = crate::EnumBitfieldStruct<u8, Ilb_SPEC>;
706    impl Ilb {
707        #[doc = "Normal data transmission or reception is performed."]
708        pub const _0: Self = Self::new(0);
709
710        #[doc = "Data is looped back in the ETHERC when full-duplex mode is selected."]
711        pub const _1: Self = Self::new(1);
712    }
713    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
714    pub struct Rtm_SPEC;
715    pub type Rtm = crate::EnumBitfieldStruct<u8, Rtm_SPEC>;
716    impl Rtm {
717        #[doc = "10 Mbps"]
718        pub const _0: Self = Self::new(0);
719
720        #[doc = "100 Mbps"]
721        pub const _1: Self = Self::new(1);
722    }
723    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
724    pub struct Dm_SPEC;
725    pub type Dm = crate::EnumBitfieldStruct<u8, Dm_SPEC>;
726    impl Dm {
727        #[doc = "Half-duplex mode"]
728        pub const _0: Self = Self::new(0);
729
730        #[doc = "Full-duplex mode"]
731        pub const _1: Self = Self::new(1);
732    }
733    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
734    pub struct Prm_SPEC;
735    pub type Prm = crate::EnumBitfieldStruct<u8, Prm_SPEC>;
736    impl Prm {
737        #[doc = "Promiscuous mode is disabled."]
738        pub const _0: Self = Self::new(0);
739
740        #[doc = "Promiscuous mode is enabled."]
741        pub const _1: Self = Self::new(1);
742    }
743}
744#[doc(hidden)]
745#[derive(Copy, Clone, Eq, PartialEq)]
746pub struct Rflr_SPEC;
747impl crate::sealed::RegSpec for Rflr_SPEC {
748    type DataType = u32;
749}
750
751#[doc = "Receive Frame Maximum Length Register"]
752pub type Rflr = crate::RegValueT<Rflr_SPEC>;
753
754impl Rflr {
755    #[doc = "Receive Frame Maximum LengthThe set value becomes the maximum frame length. The minimum value that can be set is 1,518 bytes, and the maximum value that can be set is 2,048 bytes. Values that are less than 1,518 bytes are regarded as 1,518 bytes, and values larger than 2,048 bytes are regarded as 2,048 bytes."]
756    #[inline(always)]
757    pub fn rfl(
758        self,
759    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Rflr_SPEC, crate::common::RW> {
760        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Rflr_SPEC,crate::common::RW>::from_register(self,0)
761    }
762}
763impl ::core::default::Default for Rflr {
764    #[inline(always)]
765    fn default() -> Rflr {
766        <crate::RegValueT<Rflr_SPEC> as RegisterValue<_>>::new(0)
767    }
768}
769
770#[doc(hidden)]
771#[derive(Copy, Clone, Eq, PartialEq)]
772pub struct Ecsr_SPEC;
773impl crate::sealed::RegSpec for Ecsr_SPEC {
774    type DataType = u32;
775}
776
777#[doc = "ETHERC Status Register"]
778pub type Ecsr = crate::RegValueT<Ecsr_SPEC>;
779
780impl Ecsr {
781    #[doc = "Continuous Broadcast Frame Reception Flag"]
782    #[inline(always)]
783    pub fn bfr(
784        self,
785    ) -> crate::common::RegisterField<
786        5,
787        0x1,
788        1,
789        0,
790        ecsr::Bfr,
791        ecsr::Bfr,
792        Ecsr_SPEC,
793        crate::common::RW,
794    > {
795        crate::common::RegisterField::<
796            5,
797            0x1,
798            1,
799            0,
800            ecsr::Bfr,
801            ecsr::Bfr,
802            Ecsr_SPEC,
803            crate::common::RW,
804        >::from_register(self, 0)
805    }
806
807    #[doc = "PAUSE Frame Retransmit Over Flag"]
808    #[inline(always)]
809    pub fn psrto(
810        self,
811    ) -> crate::common::RegisterField<
812        4,
813        0x1,
814        1,
815        0,
816        ecsr::Psrto,
817        ecsr::Psrto,
818        Ecsr_SPEC,
819        crate::common::RW,
820    > {
821        crate::common::RegisterField::<
822            4,
823            0x1,
824            1,
825            0,
826            ecsr::Psrto,
827            ecsr::Psrto,
828            Ecsr_SPEC,
829            crate::common::RW,
830        >::from_register(self, 0)
831    }
832
833    #[doc = "LCHNG Link Signal Change Flag"]
834    #[inline(always)]
835    pub fn lchng(
836        self,
837    ) -> crate::common::RegisterField<
838        2,
839        0x1,
840        1,
841        0,
842        ecsr::Lchng,
843        ecsr::Lchng,
844        Ecsr_SPEC,
845        crate::common::RW,
846    > {
847        crate::common::RegisterField::<
848            2,
849            0x1,
850            1,
851            0,
852            ecsr::Lchng,
853            ecsr::Lchng,
854            Ecsr_SPEC,
855            crate::common::RW,
856        >::from_register(self, 0)
857    }
858
859    #[doc = "Magic Packet Detect Flag"]
860    #[inline(always)]
861    pub fn mpd(
862        self,
863    ) -> crate::common::RegisterField<
864        1,
865        0x1,
866        1,
867        0,
868        ecsr::Mpd,
869        ecsr::Mpd,
870        Ecsr_SPEC,
871        crate::common::RW,
872    > {
873        crate::common::RegisterField::<
874            1,
875            0x1,
876            1,
877            0,
878            ecsr::Mpd,
879            ecsr::Mpd,
880            Ecsr_SPEC,
881            crate::common::RW,
882        >::from_register(self, 0)
883    }
884
885    #[doc = "False Carrier Detect Flag"]
886    #[inline(always)]
887    pub fn icd(
888        self,
889    ) -> crate::common::RegisterField<
890        0,
891        0x1,
892        1,
893        0,
894        ecsr::Icd,
895        ecsr::Icd,
896        Ecsr_SPEC,
897        crate::common::RW,
898    > {
899        crate::common::RegisterField::<
900            0,
901            0x1,
902            1,
903            0,
904            ecsr::Icd,
905            ecsr::Icd,
906            Ecsr_SPEC,
907            crate::common::RW,
908        >::from_register(self, 0)
909    }
910}
911impl ::core::default::Default for Ecsr {
912    #[inline(always)]
913    fn default() -> Ecsr {
914        <crate::RegValueT<Ecsr_SPEC> as RegisterValue<_>>::new(0)
915    }
916}
917pub mod ecsr {
918
919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
920    pub struct Bfr_SPEC;
921    pub type Bfr = crate::EnumBitfieldStruct<u8, Bfr_SPEC>;
922    impl Bfr {
923        #[doc = "Continuous reception of broadcast frames has not been detected."]
924        pub const _0: Self = Self::new(0);
925
926        #[doc = "Continuous reception of broadcast frames has been detected."]
927        pub const _1: Self = Self::new(1);
928    }
929    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
930    pub struct Psrto_SPEC;
931    pub type Psrto = crate::EnumBitfieldStruct<u8, Psrto_SPEC>;
932    impl Psrto {
933        #[doc = "PAUSE frame retransmit count has not reached the upper limit."]
934        pub const _0: Self = Self::new(0);
935
936        #[doc = "PAUSE frame retransmit count has reached the upper limit."]
937        pub const _1: Self = Self::new(1);
938    }
939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
940    pub struct Lchng_SPEC;
941    pub type Lchng = crate::EnumBitfieldStruct<u8, Lchng_SPEC>;
942    impl Lchng {
943        #[doc = "Change in the ETn_LINKSTA signal has not been detected."]
944        pub const _0: Self = Self::new(0);
945
946        #[doc = "Change in the ETn_LINKSTA signal has been detected (high to low, or low to high)."]
947        pub const _1: Self = Self::new(1);
948    }
949    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
950    pub struct Mpd_SPEC;
951    pub type Mpd = crate::EnumBitfieldStruct<u8, Mpd_SPEC>;
952    impl Mpd {
953        #[doc = "Magic Packet has not been detected."]
954        pub const _0: Self = Self::new(0);
955
956        #[doc = "Magic Packet has been detected."]
957        pub const _1: Self = Self::new(1);
958    }
959    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
960    pub struct Icd_SPEC;
961    pub type Icd = crate::EnumBitfieldStruct<u8, Icd_SPEC>;
962    impl Icd {
963        #[doc = "PHY-LSI has not detected a false carrier on the line."]
964        pub const _0: Self = Self::new(0);
965
966        #[doc = "PHY-LSI has detected a false carrier on the line."]
967        pub const _1: Self = Self::new(1);
968    }
969}
970#[doc(hidden)]
971#[derive(Copy, Clone, Eq, PartialEq)]
972pub struct Ecsipr_SPEC;
973impl crate::sealed::RegSpec for Ecsipr_SPEC {
974    type DataType = u32;
975}
976
977#[doc = "ETHERC Interrupt Enable Register"]
978pub type Ecsipr = crate::RegValueT<Ecsipr_SPEC>;
979
980impl Ecsipr {
981    #[doc = "Continuous Broadcast Frame Reception Interrupt Enable"]
982    #[inline(always)]
983    pub fn bfsipr(
984        self,
985    ) -> crate::common::RegisterField<
986        5,
987        0x1,
988        1,
989        0,
990        ecsipr::Bfsipr,
991        ecsipr::Bfsipr,
992        Ecsipr_SPEC,
993        crate::common::RW,
994    > {
995        crate::common::RegisterField::<
996            5,
997            0x1,
998            1,
999            0,
1000            ecsipr::Bfsipr,
1001            ecsipr::Bfsipr,
1002            Ecsipr_SPEC,
1003            crate::common::RW,
1004        >::from_register(self, 0)
1005    }
1006
1007    #[doc = "PAUSE Frame Retransmit Over Interrupt Enable"]
1008    #[inline(always)]
1009    pub fn psrtoip(
1010        self,
1011    ) -> crate::common::RegisterField<
1012        4,
1013        0x1,
1014        1,
1015        0,
1016        ecsipr::Psrtoip,
1017        ecsipr::Psrtoip,
1018        Ecsipr_SPEC,
1019        crate::common::RW,
1020    > {
1021        crate::common::RegisterField::<
1022            4,
1023            0x1,
1024            1,
1025            0,
1026            ecsipr::Psrtoip,
1027            ecsipr::Psrtoip,
1028            Ecsipr_SPEC,
1029            crate::common::RW,
1030        >::from_register(self, 0)
1031    }
1032
1033    #[doc = "LINK Signal Change Interrupt Enable"]
1034    #[inline(always)]
1035    pub fn lchngip(
1036        self,
1037    ) -> crate::common::RegisterField<
1038        2,
1039        0x1,
1040        1,
1041        0,
1042        ecsipr::Lchngip,
1043        ecsipr::Lchngip,
1044        Ecsipr_SPEC,
1045        crate::common::RW,
1046    > {
1047        crate::common::RegisterField::<
1048            2,
1049            0x1,
1050            1,
1051            0,
1052            ecsipr::Lchngip,
1053            ecsipr::Lchngip,
1054            Ecsipr_SPEC,
1055            crate::common::RW,
1056        >::from_register(self, 0)
1057    }
1058
1059    #[doc = "Magic Packet Detect Interrupt Enable"]
1060    #[inline(always)]
1061    pub fn mpdip(
1062        self,
1063    ) -> crate::common::RegisterField<
1064        1,
1065        0x1,
1066        1,
1067        0,
1068        ecsipr::Mpdip,
1069        ecsipr::Mpdip,
1070        Ecsipr_SPEC,
1071        crate::common::RW,
1072    > {
1073        crate::common::RegisterField::<
1074            1,
1075            0x1,
1076            1,
1077            0,
1078            ecsipr::Mpdip,
1079            ecsipr::Mpdip,
1080            Ecsipr_SPEC,
1081            crate::common::RW,
1082        >::from_register(self, 0)
1083    }
1084
1085    #[doc = "False Carrier Detect Interrupt Enable"]
1086    #[inline(always)]
1087    pub fn icdip(
1088        self,
1089    ) -> crate::common::RegisterField<
1090        0,
1091        0x1,
1092        1,
1093        0,
1094        ecsipr::Icdip,
1095        ecsipr::Icdip,
1096        Ecsipr_SPEC,
1097        crate::common::RW,
1098    > {
1099        crate::common::RegisterField::<
1100            0,
1101            0x1,
1102            1,
1103            0,
1104            ecsipr::Icdip,
1105            ecsipr::Icdip,
1106            Ecsipr_SPEC,
1107            crate::common::RW,
1108        >::from_register(self, 0)
1109    }
1110}
1111impl ::core::default::Default for Ecsipr {
1112    #[inline(always)]
1113    fn default() -> Ecsipr {
1114        <crate::RegValueT<Ecsipr_SPEC> as RegisterValue<_>>::new(0)
1115    }
1116}
1117pub mod ecsipr {
1118
1119    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1120    pub struct Bfsipr_SPEC;
1121    pub type Bfsipr = crate::EnumBitfieldStruct<u8, Bfsipr_SPEC>;
1122    impl Bfsipr {
1123        #[doc = "Notification of continuous broadcast frame reception interrupt is disabled."]
1124        pub const _0: Self = Self::new(0);
1125
1126        #[doc = "Notification of continuous broadcast frame reception interrupt is enabled."]
1127        pub const _1: Self = Self::new(1);
1128    }
1129    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1130    pub struct Psrtoip_SPEC;
1131    pub type Psrtoip = crate::EnumBitfieldStruct<u8, Psrtoip_SPEC>;
1132    impl Psrtoip {
1133        #[doc = "Notification of PAUSE frame retransmit over interrupt is disabled."]
1134        pub const _0: Self = Self::new(0);
1135
1136        #[doc = "Notification of PAUSE frame retransmit over interrupt is enabled."]
1137        pub const _1: Self = Self::new(1);
1138    }
1139    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1140    pub struct Lchngip_SPEC;
1141    pub type Lchngip = crate::EnumBitfieldStruct<u8, Lchngip_SPEC>;
1142    impl Lchngip {
1143        #[doc = "Notification of ETn_LINKSTA signal change interrupt is disabled."]
1144        pub const _0: Self = Self::new(0);
1145
1146        #[doc = "Notification of ETn_LINKSTA signal change interrupt is enabled."]
1147        pub const _1: Self = Self::new(1);
1148    }
1149    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1150    pub struct Mpdip_SPEC;
1151    pub type Mpdip = crate::EnumBitfieldStruct<u8, Mpdip_SPEC>;
1152    impl Mpdip {
1153        #[doc = "Notification of the Magic Packet detect interrupt is disabled."]
1154        pub const _0: Self = Self::new(0);
1155
1156        #[doc = "Notification of the Magic Packet detect interrupt is enabled."]
1157        pub const _1: Self = Self::new(1);
1158    }
1159    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1160    pub struct Icdip_SPEC;
1161    pub type Icdip = crate::EnumBitfieldStruct<u8, Icdip_SPEC>;
1162    impl Icdip {
1163        #[doc = "Notification of the false carrier detect interrupt is disabled."]
1164        pub const _0: Self = Self::new(0);
1165
1166        #[doc = "Notification of the false carrier detect interrupt is enabled."]
1167        pub const _1: Self = Self::new(1);
1168    }
1169}
1170#[doc(hidden)]
1171#[derive(Copy, Clone, Eq, PartialEq)]
1172pub struct Pir_SPEC;
1173impl crate::sealed::RegSpec for Pir_SPEC {
1174    type DataType = u32;
1175}
1176
1177#[doc = "PHY Interface Register"]
1178pub type Pir = crate::RegValueT<Pir_SPEC>;
1179
1180impl Pir {
1181    #[doc = "MII/RMII Management Data-InThis bit indicates the level of the ETn_MDIO pin. The write value should be 0."]
1182    #[inline(always)]
1183    pub fn mdi(self) -> crate::common::RegisterFieldBool<3, 1, 0, Pir_SPEC, crate::common::R> {
1184        crate::common::RegisterFieldBool::<3, 1, 0, Pir_SPEC, crate::common::R>::from_register(
1185            self, 0,
1186        )
1187    }
1188
1189    #[doc = "MII/RMII Management Data-OutThe MDO bit value is output from the ETn_MDIO pin when the MMD bit is 1 (write). The value is not output when the MMD bit is 0 (read)."]
1190    #[inline(always)]
1191    pub fn mdo(self) -> crate::common::RegisterFieldBool<2, 1, 0, Pir_SPEC, crate::common::RW> {
1192        crate::common::RegisterFieldBool::<2, 1, 0, Pir_SPEC, crate::common::RW>::from_register(
1193            self, 0,
1194        )
1195    }
1196
1197    #[doc = "MII/RMII Management Mode"]
1198    #[inline(always)]
1199    pub fn mmd(
1200        self,
1201    ) -> crate::common::RegisterField<1, 0x1, 1, 0, pir::Mmd, pir::Mmd, Pir_SPEC, crate::common::RW>
1202    {
1203        crate::common::RegisterField::<1,0x1,1,0,pir::Mmd,pir::Mmd,Pir_SPEC,crate::common::RW>::from_register(self,0)
1204    }
1205
1206    #[doc = "MII/RMII Management Data ClockThe MDC bit value is output from the ETn_MDC pin to supply the management data clock to the MII or RMII."]
1207    #[inline(always)]
1208    pub fn mdc(self) -> crate::common::RegisterFieldBool<0, 1, 0, Pir_SPEC, crate::common::RW> {
1209        crate::common::RegisterFieldBool::<0, 1, 0, Pir_SPEC, crate::common::RW>::from_register(
1210            self, 0,
1211        )
1212    }
1213}
1214impl ::core::default::Default for Pir {
1215    #[inline(always)]
1216    fn default() -> Pir {
1217        <crate::RegValueT<Pir_SPEC> as RegisterValue<_>>::new(0)
1218    }
1219}
1220pub mod pir {
1221
1222    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1223    pub struct Mmd_SPEC;
1224    pub type Mmd = crate::EnumBitfieldStruct<u8, Mmd_SPEC>;
1225    impl Mmd {
1226        #[doc = "Read"]
1227        pub const _0: Self = Self::new(0);
1228
1229        #[doc = "Write"]
1230        pub const _1: Self = Self::new(1);
1231    }
1232}
1233#[doc(hidden)]
1234#[derive(Copy, Clone, Eq, PartialEq)]
1235pub struct Psr_SPEC;
1236impl crate::sealed::RegSpec for Psr_SPEC {
1237    type DataType = u32;
1238}
1239
1240#[doc = "PHY Status Register"]
1241pub type Psr = crate::RegValueT<Psr_SPEC>;
1242
1243impl Psr {
1244    #[doc = "ETn_LINKSTA Pin Status FlagThe link status can be read by connecting the link signal output from the PHY-LSI to the ETn_LINKSTA pin. For details on the polarity, refer to the specifications of the connected PHY-LSI."]
1245    #[inline(always)]
1246    pub fn lmon(self) -> crate::common::RegisterFieldBool<0, 1, 0, Psr_SPEC, crate::common::R> {
1247        crate::common::RegisterFieldBool::<0, 1, 0, Psr_SPEC, crate::common::R>::from_register(
1248            self, 0,
1249        )
1250    }
1251}
1252impl ::core::default::Default for Psr {
1253    #[inline(always)]
1254    fn default() -> Psr {
1255        <crate::RegValueT<Psr_SPEC> as RegisterValue<_>>::new(0)
1256    }
1257}
1258
1259#[doc(hidden)]
1260#[derive(Copy, Clone, Eq, PartialEq)]
1261pub struct Rdmlr_SPEC;
1262impl crate::sealed::RegSpec for Rdmlr_SPEC {
1263    type DataType = u32;
1264}
1265
1266#[doc = "Random Number Generation Counter Upper Limit Setting Register"]
1267pub type Rdmlr = crate::RegValueT<Rdmlr_SPEC>;
1268
1269impl Rdmlr {
1270    #[doc = "Random Number Generation Counter"]
1271    #[inline(always)]
1272    pub fn rmd(
1273        self,
1274    ) -> crate::common::RegisterField<
1275        0,
1276        0xfffff,
1277        1,
1278        0,
1279        rdmlr::Rmd,
1280        rdmlr::Rmd,
1281        Rdmlr_SPEC,
1282        crate::common::RW,
1283    > {
1284        crate::common::RegisterField::<
1285            0,
1286            0xfffff,
1287            1,
1288            0,
1289            rdmlr::Rmd,
1290            rdmlr::Rmd,
1291            Rdmlr_SPEC,
1292            crate::common::RW,
1293        >::from_register(self, 0)
1294    }
1295}
1296impl ::core::default::Default for Rdmlr {
1297    #[inline(always)]
1298    fn default() -> Rdmlr {
1299        <crate::RegValueT<Rdmlr_SPEC> as RegisterValue<_>>::new(0)
1300    }
1301}
1302pub mod rdmlr {
1303
1304    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1305    pub struct Rmd_SPEC;
1306    pub type Rmd = crate::EnumBitfieldStruct<u8, Rmd_SPEC>;
1307    impl Rmd {
1308        #[doc = "Normal operation"]
1309        pub const _00000_H: Self = Self::new(0);
1310    }
1311}
1312#[doc(hidden)]
1313#[derive(Copy, Clone, Eq, PartialEq)]
1314pub struct Ipgr_SPEC;
1315impl crate::sealed::RegSpec for Ipgr_SPEC {
1316    type DataType = u32;
1317}
1318
1319#[doc = "IPG Register"]
1320pub type Ipgr = crate::RegValueT<Ipgr_SPEC>;
1321
1322impl Ipgr {
1323    #[doc = "Interpacket Gap  Range:\"16bit time(0x00)\"-\"140bit time(0x1F)\""]
1324    #[inline(always)]
1325    pub fn ipg(
1326        self,
1327    ) -> crate::common::RegisterField<
1328        0,
1329        0x1f,
1330        1,
1331        0,
1332        ipgr::Ipg,
1333        ipgr::Ipg,
1334        Ipgr_SPEC,
1335        crate::common::RW,
1336    > {
1337        crate::common::RegisterField::<
1338            0,
1339            0x1f,
1340            1,
1341            0,
1342            ipgr::Ipg,
1343            ipgr::Ipg,
1344            Ipgr_SPEC,
1345            crate::common::RW,
1346        >::from_register(self, 0)
1347    }
1348}
1349impl ::core::default::Default for Ipgr {
1350    #[inline(always)]
1351    fn default() -> Ipgr {
1352        <crate::RegValueT<Ipgr_SPEC> as RegisterValue<_>>::new(20)
1353    }
1354}
1355pub mod ipgr {
1356
1357    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1358    pub struct Ipg_SPEC;
1359    pub type Ipg = crate::EnumBitfieldStruct<u8, Ipg_SPEC>;
1360    impl Ipg {
1361        #[doc = "96 bit time (initial value)"]
1362        pub const _14_H: Self = Self::new(20);
1363    }
1364}
1365#[doc(hidden)]
1366#[derive(Copy, Clone, Eq, PartialEq)]
1367pub struct Apr_SPEC;
1368impl crate::sealed::RegSpec for Apr_SPEC {
1369    type DataType = u32;
1370}
1371
1372#[doc = "Automatic PAUSE Frame Register"]
1373pub type Apr = crate::RegValueT<Apr_SPEC>;
1374
1375impl Apr {
1376    #[doc = "Automatic PAUSE Time SettingThese bits set the value of the pause_time parameter for a PAUSE frame that is automatically transmitted. Transmission is not performed until the set value multiplied by 512 bit time has elapsed."]
1377    #[inline(always)]
1378    pub fn ap(
1379        self,
1380    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Apr_SPEC, crate::common::RW> {
1381        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Apr_SPEC,crate::common::RW>::from_register(self,0)
1382    }
1383}
1384impl ::core::default::Default for Apr {
1385    #[inline(always)]
1386    fn default() -> Apr {
1387        <crate::RegValueT<Apr_SPEC> as RegisterValue<_>>::new(0)
1388    }
1389}
1390
1391#[doc(hidden)]
1392#[derive(Copy, Clone, Eq, PartialEq)]
1393pub struct Mpr_SPEC;
1394impl crate::sealed::RegSpec for Mpr_SPEC {
1395    type DataType = u32;
1396}
1397
1398#[doc = "Manual PAUSE Frame Register"]
1399pub type Mpr = crate::RegValueT<Mpr_SPEC>;
1400
1401impl Mpr {
1402    #[doc = "Manual PAUSE Time SettingThese bits set the value of the pause_time parameter for a PAUSE frame that is manually transmitted. Transmission is not performed until the set value multiplied by 512 bit time has elapsed. The read value is undefined."]
1403    #[inline(always)]
1404    pub fn mp(
1405        self,
1406    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Mpr_SPEC, crate::common::W> {
1407        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Mpr_SPEC,crate::common::W>::from_register(self,0)
1408    }
1409}
1410impl ::core::default::Default for Mpr {
1411    #[inline(always)]
1412    fn default() -> Mpr {
1413        <crate::RegValueT<Mpr_SPEC> as RegisterValue<_>>::new(0)
1414    }
1415}
1416
1417#[doc(hidden)]
1418#[derive(Copy, Clone, Eq, PartialEq)]
1419pub struct Rfcf_SPEC;
1420impl crate::sealed::RegSpec for Rfcf_SPEC {
1421    type DataType = u32;
1422}
1423
1424#[doc = "Received PAUSE Frame Counter"]
1425pub type Rfcf = crate::RegValueT<Rfcf_SPEC>;
1426
1427impl Rfcf {
1428    #[doc = "Received PAUSE Frame CountNumber of received PAUSE frames"]
1429    #[inline(always)]
1430    pub fn rpause(
1431        self,
1432    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Rfcf_SPEC, crate::common::R> {
1433        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Rfcf_SPEC,crate::common::R>::from_register(self,0)
1434    }
1435}
1436impl ::core::default::Default for Rfcf {
1437    #[inline(always)]
1438    fn default() -> Rfcf {
1439        <crate::RegValueT<Rfcf_SPEC> as RegisterValue<_>>::new(0)
1440    }
1441}
1442
1443#[doc(hidden)]
1444#[derive(Copy, Clone, Eq, PartialEq)]
1445pub struct Tpauser_SPEC;
1446impl crate::sealed::RegSpec for Tpauser_SPEC {
1447    type DataType = u32;
1448}
1449
1450#[doc = "PAUSE Frame Retransmit Count Setting Register"]
1451pub type Tpauser = crate::RegValueT<Tpauser_SPEC>;
1452
1453impl Tpauser {
1454    #[doc = "Automatic PAUSE Frame Retransmit Setting"]
1455    #[inline(always)]
1456    pub fn tpause(
1457        self,
1458    ) -> crate::common::RegisterField<
1459        0,
1460        0xffff,
1461        1,
1462        0,
1463        tpauser::Tpause,
1464        tpauser::Tpause,
1465        Tpauser_SPEC,
1466        crate::common::RW,
1467    > {
1468        crate::common::RegisterField::<
1469            0,
1470            0xffff,
1471            1,
1472            0,
1473            tpauser::Tpause,
1474            tpauser::Tpause,
1475            Tpauser_SPEC,
1476            crate::common::RW,
1477        >::from_register(self, 0)
1478    }
1479}
1480impl ::core::default::Default for Tpauser {
1481    #[inline(always)]
1482    fn default() -> Tpauser {
1483        <crate::RegValueT<Tpauser_SPEC> as RegisterValue<_>>::new(0)
1484    }
1485}
1486pub mod tpauser {
1487
1488    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1489    pub struct Tpause_SPEC;
1490    pub type Tpause = crate::EnumBitfieldStruct<u8, Tpause_SPEC>;
1491    impl Tpause {
1492        #[doc = "Number of retransmissions is unlimited"]
1493        pub const _0_X_0000: Self = Self::new(0);
1494    }
1495}
1496#[doc(hidden)]
1497#[derive(Copy, Clone, Eq, PartialEq)]
1498pub struct Tpausecr_SPEC;
1499impl crate::sealed::RegSpec for Tpausecr_SPEC {
1500    type DataType = u32;
1501}
1502
1503#[doc = "PAUSE Frame Retransmit Counter"]
1504pub type Tpausecr = crate::RegValueT<Tpausecr_SPEC>;
1505
1506impl NoBitfieldReg<Tpausecr_SPEC> for Tpausecr {}
1507impl ::core::default::Default for Tpausecr {
1508    #[inline(always)]
1509    fn default() -> Tpausecr {
1510        <crate::RegValueT<Tpausecr_SPEC> as RegisterValue<_>>::new(0)
1511    }
1512}
1513
1514#[doc(hidden)]
1515#[derive(Copy, Clone, Eq, PartialEq)]
1516pub struct Bcfrr_SPEC;
1517impl crate::sealed::RegSpec for Bcfrr_SPEC {
1518    type DataType = u32;
1519}
1520
1521#[doc = "Broadcast Frame Receive Count Setting Register"]
1522pub type Bcfrr = crate::RegValueT<Bcfrr_SPEC>;
1523
1524impl Bcfrr {
1525    #[doc = "Broadcast Frame Continuous Receive Count Setting"]
1526    #[inline(always)]
1527    pub fn bcf(
1528        self,
1529    ) -> crate::common::RegisterField<
1530        0,
1531        0xffff,
1532        1,
1533        0,
1534        bcfrr::Bcf,
1535        bcfrr::Bcf,
1536        Bcfrr_SPEC,
1537        crate::common::RW,
1538    > {
1539        crate::common::RegisterField::<
1540            0,
1541            0xffff,
1542            1,
1543            0,
1544            bcfrr::Bcf,
1545            bcfrr::Bcf,
1546            Bcfrr_SPEC,
1547            crate::common::RW,
1548        >::from_register(self, 0)
1549    }
1550}
1551impl ::core::default::Default for Bcfrr {
1552    #[inline(always)]
1553    fn default() -> Bcfrr {
1554        <crate::RegValueT<Bcfrr_SPEC> as RegisterValue<_>>::new(0)
1555    }
1556}
1557pub mod bcfrr {
1558
1559    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1560    pub struct Bcf_SPEC;
1561    pub type Bcf = crate::EnumBitfieldStruct<u8, Bcf_SPEC>;
1562    impl Bcf {
1563        #[doc = "Number of receptions is unlimited."]
1564        pub const _0000_H: Self = Self::new(0);
1565    }
1566}
1567#[doc(hidden)]
1568#[derive(Copy, Clone, Eq, PartialEq)]
1569pub struct Mahr_SPEC;
1570impl crate::sealed::RegSpec for Mahr_SPEC {
1571    type DataType = u32;
1572}
1573
1574#[doc = "MAC Address Upper Bit Register"]
1575pub type Mahr = crate::RegValueT<Mahr_SPEC>;
1576
1577impl Mahr {
1578    #[doc = "MAC Address Upper Bit RegisterThe MAHR register sets the upper 32 bits (b47 to b16) of the 48-bit MAC address."]
1579    #[inline(always)]
1580    pub fn mahr(
1581        self,
1582    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mahr_SPEC, crate::common::RW>
1583    {
1584        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Mahr_SPEC,crate::common::RW>::from_register(self,0)
1585    }
1586}
1587impl ::core::default::Default for Mahr {
1588    #[inline(always)]
1589    fn default() -> Mahr {
1590        <crate::RegValueT<Mahr_SPEC> as RegisterValue<_>>::new(0)
1591    }
1592}
1593
1594#[doc(hidden)]
1595#[derive(Copy, Clone, Eq, PartialEq)]
1596pub struct Malr_SPEC;
1597impl crate::sealed::RegSpec for Malr_SPEC {
1598    type DataType = u32;
1599}
1600
1601#[doc = "MAC Address Lower Bit Register"]
1602pub type Malr = crate::RegValueT<Malr_SPEC>;
1603
1604impl Malr {
1605    #[doc = "MAC Address Lower Bit RegisterThe MALR register sets the lower 16 bits of the 48-bit MAC address."]
1606    #[inline(always)]
1607    pub fn malr(
1608        self,
1609    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Malr_SPEC, crate::common::RW> {
1610        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Malr_SPEC,crate::common::RW>::from_register(self,0)
1611    }
1612}
1613impl ::core::default::Default for Malr {
1614    #[inline(always)]
1615    fn default() -> Malr {
1616        <crate::RegValueT<Malr_SPEC> as RegisterValue<_>>::new(0)
1617    }
1618}
1619
1620#[doc(hidden)]
1621#[derive(Copy, Clone, Eq, PartialEq)]
1622pub struct Trocr_SPEC;
1623impl crate::sealed::RegSpec for Trocr_SPEC {
1624    type DataType = u32;
1625}
1626
1627#[doc = "Transmit Retry Over Counter Register"]
1628pub type Trocr = crate::RegValueT<Trocr_SPEC>;
1629
1630impl Trocr {
1631    #[doc = "Transmit Retry Over Counter RegisterThe TROCR register is a counter indicating the number of frames that fail to be retransmitted."]
1632    #[inline(always)]
1633    pub fn trocr(
1634        self,
1635    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Trocr_SPEC, crate::common::RW>
1636    {
1637        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Trocr_SPEC,crate::common::RW>::from_register(self,0)
1638    }
1639}
1640impl ::core::default::Default for Trocr {
1641    #[inline(always)]
1642    fn default() -> Trocr {
1643        <crate::RegValueT<Trocr_SPEC> as RegisterValue<_>>::new(0)
1644    }
1645}
1646
1647#[doc(hidden)]
1648#[derive(Copy, Clone, Eq, PartialEq)]
1649pub struct Cdcr_SPEC;
1650impl crate::sealed::RegSpec for Cdcr_SPEC {
1651    type DataType = u32;
1652}
1653
1654#[doc = "Late Collision Detect Counter Register"]
1655pub type Cdcr = crate::RegValueT<Cdcr_SPEC>;
1656
1657impl NoBitfieldReg<Cdcr_SPEC> for Cdcr {}
1658impl ::core::default::Default for Cdcr {
1659    #[inline(always)]
1660    fn default() -> Cdcr {
1661        <crate::RegValueT<Cdcr_SPEC> as RegisterValue<_>>::new(0)
1662    }
1663}
1664
1665#[doc(hidden)]
1666#[derive(Copy, Clone, Eq, PartialEq)]
1667pub struct Lccr_SPEC;
1668impl crate::sealed::RegSpec for Lccr_SPEC {
1669    type DataType = u32;
1670}
1671
1672#[doc = "Lost Carrier Counter Register"]
1673pub type Lccr = crate::RegValueT<Lccr_SPEC>;
1674
1675impl Lccr {
1676    #[doc = "Lost Carrier Counter RegisterThe LCCR register is a counter indicating the number of times a loss of carrier is detected during frame transmission."]
1677    #[inline(always)]
1678    pub fn lccr(
1679        self,
1680    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Lccr_SPEC, crate::common::RW>
1681    {
1682        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Lccr_SPEC,crate::common::RW>::from_register(self,0)
1683    }
1684}
1685impl ::core::default::Default for Lccr {
1686    #[inline(always)]
1687    fn default() -> Lccr {
1688        <crate::RegValueT<Lccr_SPEC> as RegisterValue<_>>::new(0)
1689    }
1690}
1691
1692#[doc(hidden)]
1693#[derive(Copy, Clone, Eq, PartialEq)]
1694pub struct Cndcr_SPEC;
1695impl crate::sealed::RegSpec for Cndcr_SPEC {
1696    type DataType = u32;
1697}
1698
1699#[doc = "Carrier Not Detect Counter Register"]
1700pub type Cndcr = crate::RegValueT<Cndcr_SPEC>;
1701
1702impl Cndcr {
1703    #[doc = "Carrier Not Detect Counter RegisterThe CNDCR register is a counter indicating the number of times a carrier is not detected during preamble transmission."]
1704    #[inline(always)]
1705    pub fn cndcr(
1706        self,
1707    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Cndcr_SPEC, crate::common::RW>
1708    {
1709        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Cndcr_SPEC,crate::common::RW>::from_register(self,0)
1710    }
1711}
1712impl ::core::default::Default for Cndcr {
1713    #[inline(always)]
1714    fn default() -> Cndcr {
1715        <crate::RegValueT<Cndcr_SPEC> as RegisterValue<_>>::new(0)
1716    }
1717}
1718
1719#[doc(hidden)]
1720#[derive(Copy, Clone, Eq, PartialEq)]
1721pub struct Cefcr_SPEC;
1722impl crate::sealed::RegSpec for Cefcr_SPEC {
1723    type DataType = u32;
1724}
1725
1726#[doc = "CRC Error Frame Receive Counter Register"]
1727pub type Cefcr = crate::RegValueT<Cefcr_SPEC>;
1728
1729impl Cefcr {
1730    #[doc = "CRC Error Frame Receive Counter RegisterThe CEFCR register is a counter indicating the number of received frames where a CRC error has been detected."]
1731    #[inline(always)]
1732    pub fn cefcr(
1733        self,
1734    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Cefcr_SPEC, crate::common::RW>
1735    {
1736        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Cefcr_SPEC,crate::common::RW>::from_register(self,0)
1737    }
1738}
1739impl ::core::default::Default for Cefcr {
1740    #[inline(always)]
1741    fn default() -> Cefcr {
1742        <crate::RegValueT<Cefcr_SPEC> as RegisterValue<_>>::new(0)
1743    }
1744}
1745
1746#[doc(hidden)]
1747#[derive(Copy, Clone, Eq, PartialEq)]
1748pub struct Frecr_SPEC;
1749impl crate::sealed::RegSpec for Frecr_SPEC {
1750    type DataType = u32;
1751}
1752
1753#[doc = "Frame Receive Error Counter Register"]
1754pub type Frecr = crate::RegValueT<Frecr_SPEC>;
1755
1756impl Frecr {
1757    #[doc = "Frame Receive Error Counter RegisterThe FRECR register is a counter indicating the number of times a frame receive error has occurred."]
1758    #[inline(always)]
1759    pub fn frecr(
1760        self,
1761    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Frecr_SPEC, crate::common::RW>
1762    {
1763        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Frecr_SPEC,crate::common::RW>::from_register(self,0)
1764    }
1765}
1766impl ::core::default::Default for Frecr {
1767    #[inline(always)]
1768    fn default() -> Frecr {
1769        <crate::RegValueT<Frecr_SPEC> as RegisterValue<_>>::new(0)
1770    }
1771}
1772
1773#[doc(hidden)]
1774#[derive(Copy, Clone, Eq, PartialEq)]
1775pub struct Tsfrcr_SPEC;
1776impl crate::sealed::RegSpec for Tsfrcr_SPEC {
1777    type DataType = u32;
1778}
1779
1780#[doc = "Too-Short Frame Receive Counter Register"]
1781pub type Tsfrcr = crate::RegValueT<Tsfrcr_SPEC>;
1782
1783impl Tsfrcr {
1784    #[doc = "Too-Short Frame Receive Counter RegisterThe TSFRCR register is a counter indicating the number of times a short frame that is shorter than 64 bytes has been received."]
1785    #[inline(always)]
1786    pub fn tsfrcr(
1787        self,
1788    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Tsfrcr_SPEC, crate::common::RW>
1789    {
1790        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Tsfrcr_SPEC,crate::common::RW>::from_register(self,0)
1791    }
1792}
1793impl ::core::default::Default for Tsfrcr {
1794    #[inline(always)]
1795    fn default() -> Tsfrcr {
1796        <crate::RegValueT<Tsfrcr_SPEC> as RegisterValue<_>>::new(0)
1797    }
1798}
1799
1800#[doc(hidden)]
1801#[derive(Copy, Clone, Eq, PartialEq)]
1802pub struct Tlfrcr_SPEC;
1803impl crate::sealed::RegSpec for Tlfrcr_SPEC {
1804    type DataType = u32;
1805}
1806
1807#[doc = "Too-Long Frame Receive Counter Register"]
1808pub type Tlfrcr = crate::RegValueT<Tlfrcr_SPEC>;
1809
1810impl Tlfrcr {
1811    #[doc = "Too-Long Frame Receive Counter RegisterThe TLFRCR register is a counter indicating the number of times a long frame that is longer than the RFLR register value has been received."]
1812    #[inline(always)]
1813    pub fn tlfrcr(
1814        self,
1815    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Tlfrcr_SPEC, crate::common::RW>
1816    {
1817        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Tlfrcr_SPEC,crate::common::RW>::from_register(self,0)
1818    }
1819}
1820impl ::core::default::Default for Tlfrcr {
1821    #[inline(always)]
1822    fn default() -> Tlfrcr {
1823        <crate::RegValueT<Tlfrcr_SPEC> as RegisterValue<_>>::new(0)
1824    }
1825}
1826
1827#[doc(hidden)]
1828#[derive(Copy, Clone, Eq, PartialEq)]
1829pub struct Rfcr_SPEC;
1830impl crate::sealed::RegSpec for Rfcr_SPEC {
1831    type DataType = u32;
1832}
1833
1834#[doc = "Received Alignment Error Frame Counter Register"]
1835pub type Rfcr = crate::RegValueT<Rfcr_SPEC>;
1836
1837impl Rfcr {
1838    #[doc = "Received Alignment Error Frame Counter RegisterThe RFCR register is a counter indicating the number of times a frame has been received with the alignment error (frame is not an integral number of octets)."]
1839    #[inline(always)]
1840    pub fn rfcr(
1841        self,
1842    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Rfcr_SPEC, crate::common::RW>
1843    {
1844        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Rfcr_SPEC,crate::common::RW>::from_register(self,0)
1845    }
1846}
1847impl ::core::default::Default for Rfcr {
1848    #[inline(always)]
1849    fn default() -> Rfcr {
1850        <crate::RegValueT<Rfcr_SPEC> as RegisterValue<_>>::new(0)
1851    }
1852}
1853
1854#[doc(hidden)]
1855#[derive(Copy, Clone, Eq, PartialEq)]
1856pub struct Mafcr_SPEC;
1857impl crate::sealed::RegSpec for Mafcr_SPEC {
1858    type DataType = u32;
1859}
1860
1861#[doc = "Multicast Address Frame Receive Counter Register"]
1862pub type Mafcr = crate::RegValueT<Mafcr_SPEC>;
1863
1864impl Mafcr {
1865    #[doc = "Multicast Address Frame Receive Counter RegisterThe MAFCR register is a counter indicating the number of times a frame where the multicast address is set has been received."]
1866    #[inline(always)]
1867    pub fn mafcr(
1868        self,
1869    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mafcr_SPEC, crate::common::RW>
1870    {
1871        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Mafcr_SPEC,crate::common::RW>::from_register(self,0)
1872    }
1873}
1874impl ::core::default::Default for Mafcr {
1875    #[inline(always)]
1876    fn default() -> Mafcr {
1877        <crate::RegValueT<Mafcr_SPEC> as RegisterValue<_>>::new(0)
1878    }
1879}
ra6m2_pac/etherc0.rs

ra6m2_pac/
etherc0.rs
