1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Watchdog Timer"]
28unsafe impl ::core::marker::Send for super::Wdt {}
29unsafe impl ::core::marker::Sync for super::Wdt {}
30impl super::Wdt {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "WDT Refresh Register"]
38 #[inline(always)]
39 pub const fn wdtrr(&self) -> &'static crate::common::Reg<self::Wdtrr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Wdtrr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "WDT Control Register"]
48 #[inline(always)]
49 pub const fn wdtcr(&self) -> &'static crate::common::Reg<self::Wdtcr_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Wdtcr_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(2usize),
53 )
54 }
55 }
56
57 #[doc = "WDT Status Register"]
58 #[inline(always)]
59 pub const fn wdtsr(&self) -> &'static crate::common::Reg<self::Wdtsr_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Wdtsr_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(4usize),
63 )
64 }
65 }
66
67 #[doc = "WDT Reset Control Register"]
68 #[inline(always)]
69 pub const fn wdtrcr(
70 &self,
71 ) -> &'static crate::common::Reg<self::Wdtrcr_SPEC, crate::common::RW> {
72 unsafe {
73 crate::common::Reg::<self::Wdtrcr_SPEC, crate::common::RW>::from_ptr(
74 self._svd2pac_as_ptr().add(6usize),
75 )
76 }
77 }
78
79 #[doc = "WDT Count Stop Control Register"]
80 #[inline(always)]
81 pub const fn wdtcstpr(
82 &self,
83 ) -> &'static crate::common::Reg<self::Wdtcstpr_SPEC, crate::common::RW> {
84 unsafe {
85 crate::common::Reg::<self::Wdtcstpr_SPEC, crate::common::RW>::from_ptr(
86 self._svd2pac_as_ptr().add(8usize),
87 )
88 }
89 }
90}
91#[doc(hidden)]
92#[derive(Copy, Clone, Eq, PartialEq)]
93pub struct Wdtrr_SPEC;
94impl crate::sealed::RegSpec for Wdtrr_SPEC {
95 type DataType = u8;
96}
97
98#[doc = "WDT Refresh Register"]
99pub type Wdtrr = crate::RegValueT<Wdtrr_SPEC>;
100
101impl Wdtrr {
102 #[doc = "WDTRR is an 8-bit register that refreshes the down-counter of the WDT."]
103 #[inline(always)]
104 pub fn wdtrr(
105 self,
106 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Wdtrr_SPEC, crate::common::RW> {
107 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Wdtrr_SPEC,crate::common::RW>::from_register(self,0)
108 }
109}
110impl ::core::default::Default for Wdtrr {
111 #[inline(always)]
112 fn default() -> Wdtrr {
113 <crate::RegValueT<Wdtrr_SPEC> as RegisterValue<_>>::new(255)
114 }
115}
116
117#[doc(hidden)]
118#[derive(Copy, Clone, Eq, PartialEq)]
119pub struct Wdtcr_SPEC;
120impl crate::sealed::RegSpec for Wdtcr_SPEC {
121 type DataType = u16;
122}
123
124#[doc = "WDT Control Register"]
125pub type Wdtcr = crate::RegValueT<Wdtcr_SPEC>;
126
127impl Wdtcr {
128 #[doc = "Window Start Position Selection"]
129 #[inline(always)]
130 pub fn rpss(
131 self,
132 ) -> crate::common::RegisterField<
133 12,
134 0x3,
135 1,
136 0,
137 wdtcr::Rpss,
138 wdtcr::Rpss,
139 Wdtcr_SPEC,
140 crate::common::RW,
141 > {
142 crate::common::RegisterField::<
143 12,
144 0x3,
145 1,
146 0,
147 wdtcr::Rpss,
148 wdtcr::Rpss,
149 Wdtcr_SPEC,
150 crate::common::RW,
151 >::from_register(self, 0)
152 }
153
154 #[doc = "Window End Position Selection"]
155 #[inline(always)]
156 pub fn rpes(
157 self,
158 ) -> crate::common::RegisterField<
159 8,
160 0x3,
161 1,
162 0,
163 wdtcr::Rpes,
164 wdtcr::Rpes,
165 Wdtcr_SPEC,
166 crate::common::RW,
167 > {
168 crate::common::RegisterField::<
169 8,
170 0x3,
171 1,
172 0,
173 wdtcr::Rpes,
174 wdtcr::Rpes,
175 Wdtcr_SPEC,
176 crate::common::RW,
177 >::from_register(self, 0)
178 }
179
180 #[doc = "Clock Division Ratio Selection"]
181 #[inline(always)]
182 pub fn cks(
183 self,
184 ) -> crate::common::RegisterField<
185 4,
186 0xf,
187 1,
188 0,
189 wdtcr::Cks,
190 wdtcr::Cks,
191 Wdtcr_SPEC,
192 crate::common::RW,
193 > {
194 crate::common::RegisterField::<
195 4,
196 0xf,
197 1,
198 0,
199 wdtcr::Cks,
200 wdtcr::Cks,
201 Wdtcr_SPEC,
202 crate::common::RW,
203 >::from_register(self, 0)
204 }
205
206 #[doc = "Timeout Period Selection"]
207 #[inline(always)]
208 pub fn tops(
209 self,
210 ) -> crate::common::RegisterField<
211 0,
212 0x3,
213 1,
214 0,
215 wdtcr::Tops,
216 wdtcr::Tops,
217 Wdtcr_SPEC,
218 crate::common::RW,
219 > {
220 crate::common::RegisterField::<
221 0,
222 0x3,
223 1,
224 0,
225 wdtcr::Tops,
226 wdtcr::Tops,
227 Wdtcr_SPEC,
228 crate::common::RW,
229 >::from_register(self, 0)
230 }
231}
232impl ::core::default::Default for Wdtcr {
233 #[inline(always)]
234 fn default() -> Wdtcr {
235 <crate::RegValueT<Wdtcr_SPEC> as RegisterValue<_>>::new(13299)
236 }
237}
238pub mod wdtcr {
239
240 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
241 pub struct Rpss_SPEC;
242 pub type Rpss = crate::EnumBitfieldStruct<u8, Rpss_SPEC>;
243 impl Rpss {
244 #[doc = "25 percent"]
245 pub const _00: Self = Self::new(0);
246
247 #[doc = "50 percent"]
248 pub const _01: Self = Self::new(1);
249
250 #[doc = "75 percent"]
251 pub const _10: Self = Self::new(2);
252
253 #[doc = "100 percent (window start position is not specified)"]
254 pub const _11: Self = Self::new(3);
255 }
256 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
257 pub struct Rpes_SPEC;
258 pub type Rpes = crate::EnumBitfieldStruct<u8, Rpes_SPEC>;
259 impl Rpes {
260 #[doc = "75 percent"]
261 pub const _00: Self = Self::new(0);
262
263 #[doc = "50 percent"]
264 pub const _01: Self = Self::new(1);
265
266 #[doc = "25 percent"]
267 pub const _10: Self = Self::new(2);
268
269 #[doc = "0 percent (window end position is not specified)"]
270 pub const _11: Self = Self::new(3);
271 }
272 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
273 pub struct Cks_SPEC;
274 pub type Cks = crate::EnumBitfieldStruct<u8, Cks_SPEC>;
275 impl Cks {
276 #[doc = "PCLK/4"]
277 pub const _0001: Self = Self::new(1);
278
279 #[doc = "PCLK/64"]
280 pub const _0100: Self = Self::new(4);
281
282 #[doc = "PCLK/128"]
283 pub const _1111: Self = Self::new(15);
284
285 #[doc = "PCLK/512"]
286 pub const _0110: Self = Self::new(6);
287
288 #[doc = "PCLK/2048"]
289 pub const _0111: Self = Self::new(7);
290
291 #[doc = "PCLK/8192"]
292 pub const _1000: Self = Self::new(8);
293 }
294 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
295 pub struct Tops_SPEC;
296 pub type Tops = crate::EnumBitfieldStruct<u8, Tops_SPEC>;
297 impl Tops {
298 #[doc = "1,024 cycles (03FFh)"]
299 pub const _00: Self = Self::new(0);
300
301 #[doc = "4,096 cycles (0FFFh)"]
302 pub const _01: Self = Self::new(1);
303
304 #[doc = "8,192 cycles (1FFFh)"]
305 pub const _10: Self = Self::new(2);
306
307 #[doc = "16,384 cycles (3FFFh)"]
308 pub const _11: Self = Self::new(3);
309 }
310}
311#[doc(hidden)]
312#[derive(Copy, Clone, Eq, PartialEq)]
313pub struct Wdtsr_SPEC;
314impl crate::sealed::RegSpec for Wdtsr_SPEC {
315 type DataType = u16;
316}
317
318#[doc = "WDT Status Register"]
319pub type Wdtsr = crate::RegValueT<Wdtsr_SPEC>;
320
321impl Wdtsr {
322 #[doc = "Refresh Error Flag"]
323 #[inline(always)]
324 pub fn refef(
325 self,
326 ) -> crate::common::RegisterField<
327 15,
328 0x1,
329 1,
330 0,
331 wdtsr::Refef,
332 wdtsr::Refef,
333 Wdtsr_SPEC,
334 crate::common::RW,
335 > {
336 crate::common::RegisterField::<
337 15,
338 0x1,
339 1,
340 0,
341 wdtsr::Refef,
342 wdtsr::Refef,
343 Wdtsr_SPEC,
344 crate::common::RW,
345 >::from_register(self, 0)
346 }
347
348 #[doc = "Underflow Flag"]
349 #[inline(always)]
350 pub fn undff(
351 self,
352 ) -> crate::common::RegisterField<
353 14,
354 0x1,
355 1,
356 0,
357 wdtsr::Undff,
358 wdtsr::Undff,
359 Wdtsr_SPEC,
360 crate::common::RW,
361 > {
362 crate::common::RegisterField::<
363 14,
364 0x1,
365 1,
366 0,
367 wdtsr::Undff,
368 wdtsr::Undff,
369 Wdtsr_SPEC,
370 crate::common::RW,
371 >::from_register(self, 0)
372 }
373
374 #[doc = "Down-Counter ValueValue counted by the down-counter"]
375 #[inline(always)]
376 pub fn cntval(
377 self,
378 ) -> crate::common::RegisterField<0, 0x3fff, 1, 0, u16, u16, Wdtsr_SPEC, crate::common::R> {
379 crate::common::RegisterField::<0,0x3fff,1,0,u16,u16,Wdtsr_SPEC,crate::common::R>::from_register(self,0)
380 }
381}
382impl ::core::default::Default for Wdtsr {
383 #[inline(always)]
384 fn default() -> Wdtsr {
385 <crate::RegValueT<Wdtsr_SPEC> as RegisterValue<_>>::new(0)
386 }
387}
388pub mod wdtsr {
389
390 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
391 pub struct Refef_SPEC;
392 pub type Refef = crate::EnumBitfieldStruct<u8, Refef_SPEC>;
393 impl Refef {
394 #[doc = "No refresh error occurred"]
395 pub const _0: Self = Self::new(0);
396
397 #[doc = "Refresh error occurred"]
398 pub const _1: Self = Self::new(1);
399 }
400 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
401 pub struct Undff_SPEC;
402 pub type Undff = crate::EnumBitfieldStruct<u8, Undff_SPEC>;
403 impl Undff {
404 #[doc = "No underflow occurred"]
405 pub const _0: Self = Self::new(0);
406
407 #[doc = "Underflow occurred"]
408 pub const _1: Self = Self::new(1);
409 }
410}
411#[doc(hidden)]
412#[derive(Copy, Clone, Eq, PartialEq)]
413pub struct Wdtrcr_SPEC;
414impl crate::sealed::RegSpec for Wdtrcr_SPEC {
415 type DataType = u8;
416}
417
418#[doc = "WDT Reset Control Register"]
419pub type Wdtrcr = crate::RegValueT<Wdtrcr_SPEC>;
420
421impl Wdtrcr {
422 #[doc = "Reset Interrupt Request Selection"]
423 #[inline(always)]
424 pub fn rstirqs(
425 self,
426 ) -> crate::common::RegisterField<
427 7,
428 0x1,
429 1,
430 0,
431 wdtrcr::Rstirqs,
432 wdtrcr::Rstirqs,
433 Wdtrcr_SPEC,
434 crate::common::RW,
435 > {
436 crate::common::RegisterField::<
437 7,
438 0x1,
439 1,
440 0,
441 wdtrcr::Rstirqs,
442 wdtrcr::Rstirqs,
443 Wdtrcr_SPEC,
444 crate::common::RW,
445 >::from_register(self, 0)
446 }
447}
448impl ::core::default::Default for Wdtrcr {
449 #[inline(always)]
450 fn default() -> Wdtrcr {
451 <crate::RegValueT<Wdtrcr_SPEC> as RegisterValue<_>>::new(128)
452 }
453}
454pub mod wdtrcr {
455
456 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
457 pub struct Rstirqs_SPEC;
458 pub type Rstirqs = crate::EnumBitfieldStruct<u8, Rstirqs_SPEC>;
459 impl Rstirqs {
460 #[doc = "Non-maskable interrupt request or interrupt request output is enabled"]
461 pub const _0: Self = Self::new(0);
462
463 #[doc = "Reset output is enabled."]
464 pub const _1: Self = Self::new(1);
465 }
466}
467#[doc(hidden)]
468#[derive(Copy, Clone, Eq, PartialEq)]
469pub struct Wdtcstpr_SPEC;
470impl crate::sealed::RegSpec for Wdtcstpr_SPEC {
471 type DataType = u8;
472}
473
474#[doc = "WDT Count Stop Control Register"]
475pub type Wdtcstpr = crate::RegValueT<Wdtcstpr_SPEC>;
476
477impl Wdtcstpr {
478 #[doc = "Sleep-Mode Count Stop Control"]
479 #[inline(always)]
480 pub fn slcstp(
481 self,
482 ) -> crate::common::RegisterField<
483 7,
484 0x1,
485 1,
486 0,
487 wdtcstpr::Slcstp,
488 wdtcstpr::Slcstp,
489 Wdtcstpr_SPEC,
490 crate::common::RW,
491 > {
492 crate::common::RegisterField::<
493 7,
494 0x1,
495 1,
496 0,
497 wdtcstpr::Slcstp,
498 wdtcstpr::Slcstp,
499 Wdtcstpr_SPEC,
500 crate::common::RW,
501 >::from_register(self, 0)
502 }
503}
504impl ::core::default::Default for Wdtcstpr {
505 #[inline(always)]
506 fn default() -> Wdtcstpr {
507 <crate::RegValueT<Wdtcstpr_SPEC> as RegisterValue<_>>::new(128)
508 }
509}
510pub mod wdtcstpr {
511
512 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
513 pub struct Slcstp_SPEC;
514 pub type Slcstp = crate::EnumBitfieldStruct<u8, Slcstp_SPEC>;
515 impl Slcstp {
516 #[doc = "Count stop is disabled."]
517 pub const _0: Self = Self::new(0);
518
519 #[doc = "Count is stopped at a transition to sleep mode."]
520 pub const _1: Self = Self::new(1);
521 }
522}