1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Debug Function"]
28unsafe impl ::core::marker::Send for super::Dbg {}
29unsafe impl ::core::marker::Sync for super::Dbg {}
30impl super::Dbg {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Debug Status Register"]
38 #[inline(always)]
39 pub const fn dbgstr(&self) -> &'static crate::common::Reg<self::Dbgstr_SPEC, crate::common::R> {
40 unsafe {
41 crate::common::Reg::<self::Dbgstr_SPEC, crate::common::R>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "Debug Stop Control Register"]
48 #[inline(always)]
49 pub const fn dbgstopcr(
50 &self,
51 ) -> &'static crate::common::Reg<self::Dbgstopcr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Dbgstopcr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(16usize),
55 )
56 }
57 }
58
59 #[doc = "Trace Control Register"]
60 #[inline(always)]
61 pub const fn tracectr(
62 &self,
63 ) -> &'static crate::common::Reg<self::Tracectr_SPEC, crate::common::RW> {
64 unsafe {
65 crate::common::Reg::<self::Tracectr_SPEC, crate::common::RW>::from_ptr(
66 self._svd2pac_as_ptr().add(32usize),
67 )
68 }
69 }
70}
71#[doc(hidden)]
72#[derive(Copy, Clone, Eq, PartialEq)]
73pub struct Dbgstr_SPEC;
74impl crate::sealed::RegSpec for Dbgstr_SPEC {
75 type DataType = u32;
76}
77
78#[doc = "Debug Status Register"]
79pub type Dbgstr = crate::RegValueT<Dbgstr_SPEC>;
80
81impl Dbgstr {
82 #[doc = "Debug power-up acknowledge"]
83 #[inline(always)]
84 pub fn cdbgpwrupack(
85 self,
86 ) -> crate::common::RegisterField<
87 29,
88 0x1,
89 1,
90 0,
91 dbgstr::Cdbgpwrupack,
92 dbgstr::Cdbgpwrupack,
93 Dbgstr_SPEC,
94 crate::common::R,
95 > {
96 crate::common::RegisterField::<
97 29,
98 0x1,
99 1,
100 0,
101 dbgstr::Cdbgpwrupack,
102 dbgstr::Cdbgpwrupack,
103 Dbgstr_SPEC,
104 crate::common::R,
105 >::from_register(self, 0)
106 }
107
108 #[doc = "Debug power-up request"]
109 #[inline(always)]
110 pub fn cdbgpwrupreq(
111 self,
112 ) -> crate::common::RegisterField<
113 28,
114 0x1,
115 1,
116 0,
117 dbgstr::Cdbgpwrupreq,
118 dbgstr::Cdbgpwrupreq,
119 Dbgstr_SPEC,
120 crate::common::R,
121 > {
122 crate::common::RegisterField::<
123 28,
124 0x1,
125 1,
126 0,
127 dbgstr::Cdbgpwrupreq,
128 dbgstr::Cdbgpwrupreq,
129 Dbgstr_SPEC,
130 crate::common::R,
131 >::from_register(self, 0)
132 }
133}
134impl ::core::default::Default for Dbgstr {
135 #[inline(always)]
136 fn default() -> Dbgstr {
137 <crate::RegValueT<Dbgstr_SPEC> as RegisterValue<_>>::new(0)
138 }
139}
140pub mod dbgstr {
141
142 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
143 pub struct Cdbgpwrupack_SPEC;
144 pub type Cdbgpwrupack = crate::EnumBitfieldStruct<u8, Cdbgpwrupack_SPEC>;
145 impl Cdbgpwrupack {
146 #[doc = "Debug power-up request is not acknowledged"]
147 pub const _0: Self = Self::new(0);
148
149 #[doc = "Debug power-up request is acknowledged"]
150 pub const _1: Self = Self::new(1);
151 }
152 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
153 pub struct Cdbgpwrupreq_SPEC;
154 pub type Cdbgpwrupreq = crate::EnumBitfieldStruct<u8, Cdbgpwrupreq_SPEC>;
155 impl Cdbgpwrupreq {
156 #[doc = "OCD is not requesting debug power-up"]
157 pub const _0: Self = Self::new(0);
158
159 #[doc = "OCD is requesting debug power-up"]
160 pub const _1: Self = Self::new(1);
161 }
162}
163#[doc(hidden)]
164#[derive(Copy, Clone, Eq, PartialEq)]
165pub struct Dbgstopcr_SPEC;
166impl crate::sealed::RegSpec for Dbgstopcr_SPEC {
167 type DataType = u32;
168}
169
170#[doc = "Debug Stop Control Register"]
171pub type Dbgstopcr = crate::RegValueT<Dbgstopcr_SPEC>;
172
173impl Dbgstopcr {
174 #[doc = "Mask bit for RAM ECC error reset/interrupt"]
175 #[inline(always)]
176 pub fn dbgstop_reccr(
177 self,
178 ) -> crate::common::RegisterField<
179 25,
180 0x1,
181 1,
182 0,
183 dbgstopcr::DbgstopReccr,
184 dbgstopcr::DbgstopReccr,
185 Dbgstopcr_SPEC,
186 crate::common::RW,
187 > {
188 crate::common::RegisterField::<
189 25,
190 0x1,
191 1,
192 0,
193 dbgstopcr::DbgstopReccr,
194 dbgstopcr::DbgstopReccr,
195 Dbgstopcr_SPEC,
196 crate::common::RW,
197 >::from_register(self, 0)
198 }
199
200 #[doc = "Mask bit for RAM parity error reset/interrupt"]
201 #[inline(always)]
202 pub fn dbgstop_rper(
203 self,
204 ) -> crate::common::RegisterField<
205 24,
206 0x1,
207 1,
208 0,
209 dbgstopcr::DbgstopRper,
210 dbgstopcr::DbgstopRper,
211 Dbgstopcr_SPEC,
212 crate::common::RW,
213 > {
214 crate::common::RegisterField::<
215 24,
216 0x1,
217 1,
218 0,
219 dbgstopcr::DbgstopRper,
220 dbgstopcr::DbgstopRper,
221 Dbgstopcr_SPEC,
222 crate::common::RW,
223 >::from_register(self, 0)
224 }
225
226 #[doc = "b18: Mask bit for LVD2 reset/interrupt (0:enable / 1:Mask)b17: Mask bit for LVD1 reset/interrupt (0:enable / 1:Mask)b16: Mask bit for LVD0 reset (0:enable / 1:Mask)"]
227 #[inline(always)]
228 pub fn dbgstop_lvd(
229 self,
230 ) -> crate::common::RegisterField<16, 0x7, 1, 0, u8, u8, Dbgstopcr_SPEC, crate::common::RW>
231 {
232 crate::common::RegisterField::<16,0x7,1,0,u8,u8,Dbgstopcr_SPEC,crate::common::RW>::from_register(self,0)
233 }
234
235 #[doc = "Mask bit for WDT reset/interrupt"]
236 #[inline(always)]
237 pub fn dbgstop_wdt(
238 self,
239 ) -> crate::common::RegisterField<
240 1,
241 0x1,
242 1,
243 0,
244 dbgstopcr::DbgstopWdt,
245 dbgstopcr::DbgstopWdt,
246 Dbgstopcr_SPEC,
247 crate::common::RW,
248 > {
249 crate::common::RegisterField::<
250 1,
251 0x1,
252 1,
253 0,
254 dbgstopcr::DbgstopWdt,
255 dbgstopcr::DbgstopWdt,
256 Dbgstopcr_SPEC,
257 crate::common::RW,
258 >::from_register(self, 0)
259 }
260
261 #[doc = "Mask bit for IWDT reset/interrupt"]
262 #[inline(always)]
263 pub fn dbgstop_iwdt(
264 self,
265 ) -> crate::common::RegisterField<
266 0,
267 0x1,
268 1,
269 0,
270 dbgstopcr::DbgstopIwdt,
271 dbgstopcr::DbgstopIwdt,
272 Dbgstopcr_SPEC,
273 crate::common::RW,
274 > {
275 crate::common::RegisterField::<
276 0,
277 0x1,
278 1,
279 0,
280 dbgstopcr::DbgstopIwdt,
281 dbgstopcr::DbgstopIwdt,
282 Dbgstopcr_SPEC,
283 crate::common::RW,
284 >::from_register(self, 0)
285 }
286}
287impl ::core::default::Default for Dbgstopcr {
288 #[inline(always)]
289 fn default() -> Dbgstopcr {
290 <crate::RegValueT<Dbgstopcr_SPEC> as RegisterValue<_>>::new(3)
291 }
292}
293pub mod dbgstopcr {
294
295 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
296 pub struct DbgstopReccr_SPEC;
297 pub type DbgstopReccr = crate::EnumBitfieldStruct<u8, DbgstopReccr_SPEC>;
298 impl DbgstopReccr {
299 #[doc = "Enable RAM ECC error reset/interrupt"]
300 pub const _0: Self = Self::new(0);
301
302 #[doc = "Mask RAM ECC error reset/interrupt"]
303 pub const _1: Self = Self::new(1);
304 }
305 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
306 pub struct DbgstopRper_SPEC;
307 pub type DbgstopRper = crate::EnumBitfieldStruct<u8, DbgstopRper_SPEC>;
308 impl DbgstopRper {
309 #[doc = "Enable RAM parity error reset/interrupt"]
310 pub const _0: Self = Self::new(0);
311
312 #[doc = "Mask RAM parity error reset/interrupt"]
313 pub const _1: Self = Self::new(1);
314 }
315 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
316 pub struct DbgstopWdt_SPEC;
317 pub type DbgstopWdt = crate::EnumBitfieldStruct<u8, DbgstopWdt_SPEC>;
318 impl DbgstopWdt {
319 #[doc = "Mask WDT reset/interrupt"]
320 pub const _0: Self = Self::new(0);
321
322 #[doc = "Enable WDT reset"]
323 pub const _1: Self = Self::new(1);
324 }
325 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
326 pub struct DbgstopIwdt_SPEC;
327 pub type DbgstopIwdt = crate::EnumBitfieldStruct<u8, DbgstopIwdt_SPEC>;
328 impl DbgstopIwdt {
329 #[doc = "Mask IWDT reset/interrupt"]
330 pub const _0: Self = Self::new(0);
331
332 #[doc = "Enable IWDT reset"]
333 pub const _1: Self = Self::new(1);
334 }
335}
336#[doc(hidden)]
337#[derive(Copy, Clone, Eq, PartialEq)]
338pub struct Tracectr_SPEC;
339impl crate::sealed::RegSpec for Tracectr_SPEC {
340 type DataType = u32;
341}
342
343#[doc = "Trace Control Register"]
344pub type Tracectr = crate::RegValueT<Tracectr_SPEC>;
345
346impl Tracectr {
347 #[doc = "Enable bit for halt request by ETB full"]
348 #[inline(always)]
349 pub fn enetbfull(
350 self,
351 ) -> crate::common::RegisterField<
352 31,
353 0x1,
354 1,
355 0,
356 tracectr::Enetbfull,
357 tracectr::Enetbfull,
358 Tracectr_SPEC,
359 crate::common::RW,
360 > {
361 crate::common::RegisterField::<
362 31,
363 0x1,
364 1,
365 0,
366 tracectr::Enetbfull,
367 tracectr::Enetbfull,
368 Tracectr_SPEC,
369 crate::common::RW,
370 >::from_register(self, 0)
371 }
372}
373impl ::core::default::Default for Tracectr {
374 #[inline(always)]
375 fn default() -> Tracectr {
376 <crate::RegValueT<Tracectr_SPEC> as RegisterValue<_>>::new(0)
377 }
378}
379pub mod tracectr {
380
381 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
382 pub struct Enetbfull_SPEC;
383 pub type Enetbfull = crate::EnumBitfieldStruct<u8, Enetbfull_SPEC>;
384 impl Enetbfull {
385 #[doc = "ETB full does not cause CPU halt"]
386 pub const _0: Self = Self::new(0);
387
388 #[doc = "ETB full cause CPU halt"]
389 pub const _1: Self = Self::new(1);
390 }
391}