ra6m2_pac/
agt0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:11:44 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Asynchronous General purpose Timer 0"]
28unsafe impl ::core::marker::Send for super::Agt0 {}
29unsafe impl ::core::marker::Sync for super::Agt0 {}
30impl super::Agt0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "AGT Counter Register"]
38    #[inline(always)]
39    pub const fn agt(&self) -> &'static crate::common::Reg<self::Agt_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Agt_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "AGT Compare Match A Register"]
48    #[inline(always)]
49    pub const fn agtcma(
50        &self,
51    ) -> &'static crate::common::Reg<self::Agtcma_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Agtcma_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(2usize),
55            )
56        }
57    }
58
59    #[doc = "AGT Compare Match B Register"]
60    #[inline(always)]
61    pub const fn agtcmb(
62        &self,
63    ) -> &'static crate::common::Reg<self::Agtcmb_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Agtcmb_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(4usize),
67            )
68        }
69    }
70
71    #[doc = "AGT Control Register"]
72    #[inline(always)]
73    pub const fn agtcr(&self) -> &'static crate::common::Reg<self::Agtcr_SPEC, crate::common::RW> {
74        unsafe {
75            crate::common::Reg::<self::Agtcr_SPEC, crate::common::RW>::from_ptr(
76                self._svd2pac_as_ptr().add(8usize),
77            )
78        }
79    }
80
81    #[doc = "AGT Mode Register 1"]
82    #[inline(always)]
83    pub const fn agtmr1(
84        &self,
85    ) -> &'static crate::common::Reg<self::Agtmr1_SPEC, crate::common::RW> {
86        unsafe {
87            crate::common::Reg::<self::Agtmr1_SPEC, crate::common::RW>::from_ptr(
88                self._svd2pac_as_ptr().add(9usize),
89            )
90        }
91    }
92
93    #[doc = "AGT Mode Register 2"]
94    #[inline(always)]
95    pub const fn agtmr2(
96        &self,
97    ) -> &'static crate::common::Reg<self::Agtmr2_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Agtmr2_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(10usize),
101            )
102        }
103    }
104
105    #[doc = "AGT I/O Control Register"]
106    #[inline(always)]
107    pub const fn agtioc(
108        &self,
109    ) -> &'static crate::common::Reg<self::Agtioc_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Agtioc_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(12usize),
113            )
114        }
115    }
116
117    #[doc = "AGT Event Pin Select Register"]
118    #[inline(always)]
119    pub const fn agtisr(
120        &self,
121    ) -> &'static crate::common::Reg<self::Agtisr_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Agtisr_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(13usize),
125            )
126        }
127    }
128
129    #[doc = "AGT Compare Match Function Select Register"]
130    #[inline(always)]
131    pub const fn agtcmsr(
132        &self,
133    ) -> &'static crate::common::Reg<self::Agtcmsr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Agtcmsr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(14usize),
137            )
138        }
139    }
140
141    #[doc = "AGT Pin Select Register"]
142    #[inline(always)]
143    pub const fn agtiosel(
144        &self,
145    ) -> &'static crate::common::Reg<self::Agtiosel_SPEC, crate::common::RW> {
146        unsafe {
147            crate::common::Reg::<self::Agtiosel_SPEC, crate::common::RW>::from_ptr(
148                self._svd2pac_as_ptr().add(15usize),
149            )
150        }
151    }
152}
153#[doc(hidden)]
154#[derive(Copy, Clone, Eq, PartialEq)]
155pub struct Agt_SPEC;
156impl crate::sealed::RegSpec for Agt_SPEC {
157    type DataType = u16;
158}
159
160#[doc = "AGT Counter Register"]
161pub type Agt = crate::RegValueT<Agt_SPEC>;
162
163impl Agt {
164    #[doc = "16bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the AGTCRn register, the 16-bit counter is forcibly stopped and set to FFFFH."]
165    #[inline(always)]
166    pub fn agt(
167        self,
168    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Agt_SPEC, crate::common::RW> {
169        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Agt_SPEC,crate::common::RW>::from_register(self,0)
170    }
171}
172impl ::core::default::Default for Agt {
173    #[inline(always)]
174    fn default() -> Agt {
175        <crate::RegValueT<Agt_SPEC> as RegisterValue<_>>::new(65535)
176    }
177}
178
179#[doc(hidden)]
180#[derive(Copy, Clone, Eq, PartialEq)]
181pub struct Agtcma_SPEC;
182impl crate::sealed::RegSpec for Agtcma_SPEC {
183    type DataType = u16;
184}
185
186#[doc = "AGT Compare Match A Register"]
187pub type Agtcma = crate::RegValueT<Agtcma_SPEC>;
188
189impl Agtcma {
190    #[doc = "AGT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCRn register, set to FFFFH"]
191    #[inline(always)]
192    pub fn agtcma(
193        self,
194    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Agtcma_SPEC, crate::common::RW>
195    {
196        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Agtcma_SPEC,crate::common::RW>::from_register(self,0)
197    }
198}
199impl ::core::default::Default for Agtcma {
200    #[inline(always)]
201    fn default() -> Agtcma {
202        <crate::RegValueT<Agtcma_SPEC> as RegisterValue<_>>::new(65535)
203    }
204}
205
206#[doc(hidden)]
207#[derive(Copy, Clone, Eq, PartialEq)]
208pub struct Agtcmb_SPEC;
209impl crate::sealed::RegSpec for Agtcmb_SPEC {
210    type DataType = u16;
211}
212
213#[doc = "AGT Compare Match B Register"]
214pub type Agtcmb = crate::RegValueT<Agtcmb_SPEC>;
215
216impl Agtcmb {
217    #[doc = "AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCR register, set to FFFFH"]
218    #[inline(always)]
219    pub fn agtcmb(
220        self,
221    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Agtcmb_SPEC, crate::common::RW>
222    {
223        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Agtcmb_SPEC,crate::common::RW>::from_register(self,0)
224    }
225}
226impl ::core::default::Default for Agtcmb {
227    #[inline(always)]
228    fn default() -> Agtcmb {
229        <crate::RegValueT<Agtcmb_SPEC> as RegisterValue<_>>::new(65535)
230    }
231}
232
233#[doc(hidden)]
234#[derive(Copy, Clone, Eq, PartialEq)]
235pub struct Agtcr_SPEC;
236impl crate::sealed::RegSpec for Agtcr_SPEC {
237    type DataType = u8;
238}
239
240#[doc = "AGT Control Register"]
241pub type Agtcr = crate::RegValueT<Agtcr_SPEC>;
242
243impl Agtcr {
244    #[doc = "AGT compare match B flag"]
245    #[inline(always)]
246    pub fn tcmbf(
247        self,
248    ) -> crate::common::RegisterField<
249        7,
250        0x1,
251        1,
252        0,
253        agtcr::Tcmbf,
254        agtcr::Tcmbf,
255        Agtcr_SPEC,
256        crate::common::RW,
257    > {
258        crate::common::RegisterField::<
259            7,
260            0x1,
261            1,
262            0,
263            agtcr::Tcmbf,
264            agtcr::Tcmbf,
265            Agtcr_SPEC,
266            crate::common::RW,
267        >::from_register(self, 0)
268    }
269
270    #[doc = "AGT compare match A flag"]
271    #[inline(always)]
272    pub fn tcmaf(
273        self,
274    ) -> crate::common::RegisterField<
275        6,
276        0x1,
277        1,
278        0,
279        agtcr::Tcmaf,
280        agtcr::Tcmaf,
281        Agtcr_SPEC,
282        crate::common::RW,
283    > {
284        crate::common::RegisterField::<
285            6,
286            0x1,
287            1,
288            0,
289            agtcr::Tcmaf,
290            agtcr::Tcmaf,
291            Agtcr_SPEC,
292            crate::common::RW,
293        >::from_register(self, 0)
294    }
295
296    #[doc = "AGT underflow flag"]
297    #[inline(always)]
298    pub fn tundf(
299        self,
300    ) -> crate::common::RegisterField<
301        5,
302        0x1,
303        1,
304        0,
305        agtcr::Tundf,
306        agtcr::Tundf,
307        Agtcr_SPEC,
308        crate::common::RW,
309    > {
310        crate::common::RegisterField::<
311            5,
312            0x1,
313            1,
314            0,
315            agtcr::Tundf,
316            agtcr::Tundf,
317            Agtcr_SPEC,
318            crate::common::RW,
319        >::from_register(self, 0)
320    }
321
322    #[doc = "Active edge judgement flag"]
323    #[inline(always)]
324    pub fn tedgf(
325        self,
326    ) -> crate::common::RegisterField<
327        4,
328        0x1,
329        1,
330        0,
331        agtcr::Tedgf,
332        agtcr::Tedgf,
333        Agtcr_SPEC,
334        crate::common::RW,
335    > {
336        crate::common::RegisterField::<
337            4,
338            0x1,
339            1,
340            0,
341            agtcr::Tedgf,
342            agtcr::Tedgf,
343            Agtcr_SPEC,
344            crate::common::RW,
345        >::from_register(self, 0)
346    }
347
348    #[doc = "AGT count forced stop"]
349    #[inline(always)]
350    pub fn tstop(
351        self,
352    ) -> crate::common::RegisterField<
353        2,
354        0x1,
355        1,
356        0,
357        agtcr::Tstop,
358        agtcr::Tstop,
359        Agtcr_SPEC,
360        crate::common::W,
361    > {
362        crate::common::RegisterField::<
363            2,
364            0x1,
365            1,
366            0,
367            agtcr::Tstop,
368            agtcr::Tstop,
369            Agtcr_SPEC,
370            crate::common::W,
371        >::from_register(self, 0)
372    }
373
374    #[doc = "AGT count status flag"]
375    #[inline(always)]
376    pub fn tcstf(
377        self,
378    ) -> crate::common::RegisterField<
379        1,
380        0x1,
381        1,
382        0,
383        agtcr::Tcstf,
384        agtcr::Tcstf,
385        Agtcr_SPEC,
386        crate::common::R,
387    > {
388        crate::common::RegisterField::<
389            1,
390            0x1,
391            1,
392            0,
393            agtcr::Tcstf,
394            agtcr::Tcstf,
395            Agtcr_SPEC,
396            crate::common::R,
397        >::from_register(self, 0)
398    }
399
400    #[doc = "AGT count start"]
401    #[inline(always)]
402    pub fn tstart(
403        self,
404    ) -> crate::common::RegisterField<
405        0,
406        0x1,
407        1,
408        0,
409        agtcr::Tstart,
410        agtcr::Tstart,
411        Agtcr_SPEC,
412        crate::common::RW,
413    > {
414        crate::common::RegisterField::<
415            0,
416            0x1,
417            1,
418            0,
419            agtcr::Tstart,
420            agtcr::Tstart,
421            Agtcr_SPEC,
422            crate::common::RW,
423        >::from_register(self, 0)
424    }
425}
426impl ::core::default::Default for Agtcr {
427    #[inline(always)]
428    fn default() -> Agtcr {
429        <crate::RegValueT<Agtcr_SPEC> as RegisterValue<_>>::new(0)
430    }
431}
432pub mod agtcr {
433
434    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
435    pub struct Tcmbf_SPEC;
436    pub type Tcmbf = crate::EnumBitfieldStruct<u8, Tcmbf_SPEC>;
437    impl Tcmbf {
438        #[doc = "No Match"]
439        pub const _0: Self = Self::new(0);
440
441        #[doc = "Match"]
442        pub const _1: Self = Self::new(1);
443    }
444    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
445    pub struct Tcmaf_SPEC;
446    pub type Tcmaf = crate::EnumBitfieldStruct<u8, Tcmaf_SPEC>;
447    impl Tcmaf {
448        #[doc = "No Match"]
449        pub const _0: Self = Self::new(0);
450
451        #[doc = "Match"]
452        pub const _1: Self = Self::new(1);
453    }
454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
455    pub struct Tundf_SPEC;
456    pub type Tundf = crate::EnumBitfieldStruct<u8, Tundf_SPEC>;
457    impl Tundf {
458        #[doc = "No underflow"]
459        pub const _0: Self = Self::new(0);
460
461        #[doc = "Underflow"]
462        pub const _1: Self = Self::new(1);
463    }
464    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
465    pub struct Tedgf_SPEC;
466    pub type Tedgf = crate::EnumBitfieldStruct<u8, Tedgf_SPEC>;
467    impl Tedgf {
468        #[doc = "No active edge received"]
469        pub const _0: Self = Self::new(0);
470
471        #[doc = "Active edge received"]
472        pub const _1: Self = Self::new(1);
473    }
474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475    pub struct Tstop_SPEC;
476    pub type Tstop = crate::EnumBitfieldStruct<u8, Tstop_SPEC>;
477    impl Tstop {
478        #[doc = "no effect"]
479        pub const _0: Self = Self::new(0);
480
481        #[doc = "The count is forcibly stopped."]
482        pub const _1: Self = Self::new(1);
483    }
484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
485    pub struct Tcstf_SPEC;
486    pub type Tcstf = crate::EnumBitfieldStruct<u8, Tcstf_SPEC>;
487    impl Tcstf {
488        #[doc = "Count stops"]
489        pub const _0: Self = Self::new(0);
490
491        #[doc = "Count starts"]
492        pub const _1: Self = Self::new(1);
493    }
494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
495    pub struct Tstart_SPEC;
496    pub type Tstart = crate::EnumBitfieldStruct<u8, Tstart_SPEC>;
497    impl Tstart {
498        #[doc = "Count stops"]
499        pub const _0: Self = Self::new(0);
500
501        #[doc = "Count starts"]
502        pub const _1: Self = Self::new(1);
503    }
504}
505#[doc(hidden)]
506#[derive(Copy, Clone, Eq, PartialEq)]
507pub struct Agtmr1_SPEC;
508impl crate::sealed::RegSpec for Agtmr1_SPEC {
509    type DataType = u8;
510}
511
512#[doc = "AGT Mode Register 1"]
513pub type Agtmr1 = crate::RegValueT<Agtmr1_SPEC>;
514
515impl Agtmr1 {
516    #[doc = "AGT count source select"]
517    #[inline(always)]
518    pub fn tck(
519        self,
520    ) -> crate::common::RegisterField<
521        4,
522        0x7,
523        1,
524        0,
525        agtmr1::Tck,
526        agtmr1::Tck,
527        Agtmr1_SPEC,
528        crate::common::RW,
529    > {
530        crate::common::RegisterField::<
531            4,
532            0x7,
533            1,
534            0,
535            agtmr1::Tck,
536            agtmr1::Tck,
537            Agtmr1_SPEC,
538            crate::common::RW,
539        >::from_register(self, 0)
540    }
541
542    #[doc = "AGTIO edge polarity select"]
543    #[inline(always)]
544    pub fn tedgpl(
545        self,
546    ) -> crate::common::RegisterField<
547        3,
548        0x1,
549        1,
550        0,
551        agtmr1::Tedgpl,
552        agtmr1::Tedgpl,
553        Agtmr1_SPEC,
554        crate::common::RW,
555    > {
556        crate::common::RegisterField::<
557            3,
558            0x1,
559            1,
560            0,
561            agtmr1::Tedgpl,
562            agtmr1::Tedgpl,
563            Agtmr1_SPEC,
564            crate::common::RW,
565        >::from_register(self, 0)
566    }
567
568    #[doc = "AGT operating mode select"]
569    #[inline(always)]
570    pub fn tmod(
571        self,
572    ) -> crate::common::RegisterField<
573        0,
574        0x7,
575        1,
576        0,
577        agtmr1::Tmod,
578        agtmr1::Tmod,
579        Agtmr1_SPEC,
580        crate::common::RW,
581    > {
582        crate::common::RegisterField::<
583            0,
584            0x7,
585            1,
586            0,
587            agtmr1::Tmod,
588            agtmr1::Tmod,
589            Agtmr1_SPEC,
590            crate::common::RW,
591        >::from_register(self, 0)
592    }
593}
594impl ::core::default::Default for Agtmr1 {
595    #[inline(always)]
596    fn default() -> Agtmr1 {
597        <crate::RegValueT<Agtmr1_SPEC> as RegisterValue<_>>::new(0)
598    }
599}
600pub mod agtmr1 {
601
602    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
603    pub struct Tck_SPEC;
604    pub type Tck = crate::EnumBitfieldStruct<u8, Tck_SPEC>;
605    impl Tck {
606        #[doc = "PCLKB"]
607        pub const _000: Self = Self::new(0);
608
609        #[doc = "PCLKB/8"]
610        pub const _001: Self = Self::new(1);
611
612        #[doc = "PCLKB/2"]
613        pub const _011: Self = Self::new(3);
614
615        #[doc = "Divided clock LOCO specified by AGTMR2.CKS bit."]
616        pub const _100: Self = Self::new(4);
617
618        #[doc = "Underflow event signal from AGT"]
619        pub const _101: Self = Self::new(5);
620
621        #[doc = "Divided clock fSUB specified by AGTMR2.CKS bit."]
622        pub const _110: Self = Self::new(6);
623    }
624    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
625    pub struct Tedgpl_SPEC;
626    pub type Tedgpl = crate::EnumBitfieldStruct<u8, Tedgpl_SPEC>;
627    impl Tedgpl {
628        #[doc = "One edge"]
629        pub const _0: Self = Self::new(0);
630
631        #[doc = "Both edges"]
632        pub const _1: Self = Self::new(1);
633    }
634    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
635    pub struct Tmod_SPEC;
636    pub type Tmod = crate::EnumBitfieldStruct<u8, Tmod_SPEC>;
637    impl Tmod {
638        #[doc = "Timer mode"]
639        pub const _000: Self = Self::new(0);
640
641        #[doc = "Pulse output mode"]
642        pub const _001: Self = Self::new(1);
643
644        #[doc = "Event counter mode"]
645        pub const _010: Self = Self::new(2);
646
647        #[doc = "Pulse width measurement mode"]
648        pub const _011: Self = Self::new(3);
649
650        #[doc = "Pulse period measurement mode"]
651        pub const _100: Self = Self::new(4);
652    }
653}
654#[doc(hidden)]
655#[derive(Copy, Clone, Eq, PartialEq)]
656pub struct Agtmr2_SPEC;
657impl crate::sealed::RegSpec for Agtmr2_SPEC {
658    type DataType = u8;
659}
660
661#[doc = "AGT Mode Register 2"]
662pub type Agtmr2 = crate::RegValueT<Agtmr2_SPEC>;
663
664impl Agtmr2 {
665    #[doc = "AGT Low Power Mode"]
666    #[inline(always)]
667    pub fn lpm(
668        self,
669    ) -> crate::common::RegisterField<
670        7,
671        0x1,
672        1,
673        0,
674        agtmr2::Lpm,
675        agtmr2::Lpm,
676        Agtmr2_SPEC,
677        crate::common::RW,
678    > {
679        crate::common::RegisterField::<
680            7,
681            0x1,
682            1,
683            0,
684            agtmr2::Lpm,
685            agtmr2::Lpm,
686            Agtmr2_SPEC,
687            crate::common::RW,
688        >::from_register(self, 0)
689    }
690
691    #[doc = "fsub/LOCO count source clock frequency division ratio select"]
692    #[inline(always)]
693    pub fn cks(
694        self,
695    ) -> crate::common::RegisterField<
696        0,
697        0x7,
698        1,
699        0,
700        agtmr2::Cks,
701        agtmr2::Cks,
702        Agtmr2_SPEC,
703        crate::common::RW,
704    > {
705        crate::common::RegisterField::<
706            0,
707            0x7,
708            1,
709            0,
710            agtmr2::Cks,
711            agtmr2::Cks,
712            Agtmr2_SPEC,
713            crate::common::RW,
714        >::from_register(self, 0)
715    }
716}
717impl ::core::default::Default for Agtmr2 {
718    #[inline(always)]
719    fn default() -> Agtmr2 {
720        <crate::RegValueT<Agtmr2_SPEC> as RegisterValue<_>>::new(0)
721    }
722}
723pub mod agtmr2 {
724
725    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
726    pub struct Lpm_SPEC;
727    pub type Lpm = crate::EnumBitfieldStruct<u8, Lpm_SPEC>;
728    impl Lpm {
729        #[doc = "Normal mode"]
730        pub const _0: Self = Self::new(0);
731
732        #[doc = "Low Power mode"]
733        pub const _1: Self = Self::new(1);
734    }
735    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
736    pub struct Cks_SPEC;
737    pub type Cks = crate::EnumBitfieldStruct<u8, Cks_SPEC>;
738    impl Cks {
739        #[doc = "1/1"]
740        pub const _000: Self = Self::new(0);
741
742        #[doc = "1/2"]
743        pub const _001: Self = Self::new(1);
744
745        #[doc = "1/4"]
746        pub const _010: Self = Self::new(2);
747
748        #[doc = "1/8"]
749        pub const _011: Self = Self::new(3);
750
751        #[doc = "1/16"]
752        pub const _100: Self = Self::new(4);
753
754        #[doc = "1/32"]
755        pub const _101: Self = Self::new(5);
756
757        #[doc = "1/64"]
758        pub const _110: Self = Self::new(6);
759
760        #[doc = "1/128"]
761        pub const _111: Self = Self::new(7);
762    }
763}
764#[doc(hidden)]
765#[derive(Copy, Clone, Eq, PartialEq)]
766pub struct Agtioc_SPEC;
767impl crate::sealed::RegSpec for Agtioc_SPEC {
768    type DataType = u8;
769}
770
771#[doc = "AGT I/O Control Register"]
772pub type Agtioc = crate::RegValueT<Agtioc_SPEC>;
773
774impl Agtioc {
775    #[doc = "AGTIO count control"]
776    #[inline(always)]
777    pub fn tiogt(
778        self,
779    ) -> crate::common::RegisterField<
780        6,
781        0x3,
782        1,
783        0,
784        agtioc::Tiogt,
785        agtioc::Tiogt,
786        Agtioc_SPEC,
787        crate::common::RW,
788    > {
789        crate::common::RegisterField::<
790            6,
791            0x3,
792            1,
793            0,
794            agtioc::Tiogt,
795            agtioc::Tiogt,
796            Agtioc_SPEC,
797            crate::common::RW,
798        >::from_register(self, 0)
799    }
800
801    #[doc = "AGTIO input filter select"]
802    #[inline(always)]
803    pub fn tipf(
804        self,
805    ) -> crate::common::RegisterField<
806        4,
807        0x3,
808        1,
809        0,
810        agtioc::Tipf,
811        agtioc::Tipf,
812        Agtioc_SPEC,
813        crate::common::RW,
814    > {
815        crate::common::RegisterField::<
816            4,
817            0x3,
818            1,
819            0,
820            agtioc::Tipf,
821            agtioc::Tipf,
822            Agtioc_SPEC,
823            crate::common::RW,
824        >::from_register(self, 0)
825    }
826
827    #[doc = "AGTO output enable"]
828    #[inline(always)]
829    pub fn toe(
830        self,
831    ) -> crate::common::RegisterField<
832        2,
833        0x1,
834        1,
835        0,
836        agtioc::Toe,
837        agtioc::Toe,
838        Agtioc_SPEC,
839        crate::common::RW,
840    > {
841        crate::common::RegisterField::<
842            2,
843            0x1,
844            1,
845            0,
846            agtioc::Toe,
847            agtioc::Toe,
848            Agtioc_SPEC,
849            crate::common::RW,
850        >::from_register(self, 0)
851    }
852
853    #[doc = "I/O polarity switchFunction varies depending on the operating mode."]
854    #[inline(always)]
855    pub fn tedgsel(
856        self,
857    ) -> crate::common::RegisterFieldBool<0, 1, 0, Agtioc_SPEC, crate::common::RW> {
858        crate::common::RegisterFieldBool::<0, 1, 0, Agtioc_SPEC, crate::common::RW>::from_register(
859            self, 0,
860        )
861    }
862}
863impl ::core::default::Default for Agtioc {
864    #[inline(always)]
865    fn default() -> Agtioc {
866        <crate::RegValueT<Agtioc_SPEC> as RegisterValue<_>>::new(0)
867    }
868}
869pub mod agtioc {
870
871    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
872    pub struct Tiogt_SPEC;
873    pub type Tiogt = crate::EnumBitfieldStruct<u8, Tiogt_SPEC>;
874    impl Tiogt {
875        #[doc = "Event is always counted"]
876        pub const _00: Self = Self::new(0);
877
878        #[doc = "Event is counted during polarity period specified for AGTEE"]
879        pub const _01: Self = Self::new(1);
880    }
881    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
882    pub struct Tipf_SPEC;
883    pub type Tipf = crate::EnumBitfieldStruct<u8, Tipf_SPEC>;
884    impl Tipf {
885        #[doc = "No filter"]
886        pub const _00: Self = Self::new(0);
887
888        #[doc = "Filter sampled at PCLKB"]
889        pub const _01: Self = Self::new(1);
890
891        #[doc = "Filter sampled at PCLKB/8"]
892        pub const _10: Self = Self::new(2);
893
894        #[doc = "Filter sampled at PCLKB/32"]
895        pub const _11: Self = Self::new(3);
896    }
897    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
898    pub struct Toe_SPEC;
899    pub type Toe = crate::EnumBitfieldStruct<u8, Toe_SPEC>;
900    impl Toe {
901        #[doc = "AGTO output disabled (port)"]
902        pub const _0: Self = Self::new(0);
903
904        #[doc = "AGTO output enabled"]
905        pub const _1: Self = Self::new(1);
906    }
907}
908#[doc(hidden)]
909#[derive(Copy, Clone, Eq, PartialEq)]
910pub struct Agtisr_SPEC;
911impl crate::sealed::RegSpec for Agtisr_SPEC {
912    type DataType = u8;
913}
914
915#[doc = "AGT Event Pin Select Register"]
916pub type Agtisr = crate::RegValueT<Agtisr_SPEC>;
917
918impl Agtisr {
919    #[doc = "AGTEE  polarty selection"]
920    #[inline(always)]
921    pub fn eeps(
922        self,
923    ) -> crate::common::RegisterField<
924        2,
925        0x1,
926        1,
927        0,
928        agtisr::Eeps,
929        agtisr::Eeps,
930        Agtisr_SPEC,
931        crate::common::RW,
932    > {
933        crate::common::RegisterField::<
934            2,
935            0x1,
936            1,
937            0,
938            agtisr::Eeps,
939            agtisr::Eeps,
940            Agtisr_SPEC,
941            crate::common::RW,
942        >::from_register(self, 0)
943    }
944}
945impl ::core::default::Default for Agtisr {
946    #[inline(always)]
947    fn default() -> Agtisr {
948        <crate::RegValueT<Agtisr_SPEC> as RegisterValue<_>>::new(0)
949    }
950}
951pub mod agtisr {
952
953    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
954    pub struct Eeps_SPEC;
955    pub type Eeps = crate::EnumBitfieldStruct<u8, Eeps_SPEC>;
956    impl Eeps {
957        #[doc = "An event is counted during the low-level period"]
958        pub const _0: Self = Self::new(0);
959
960        #[doc = "An event is counted during the high-level period"]
961        pub const _1: Self = Self::new(1);
962    }
963}
964#[doc(hidden)]
965#[derive(Copy, Clone, Eq, PartialEq)]
966pub struct Agtcmsr_SPEC;
967impl crate::sealed::RegSpec for Agtcmsr_SPEC {
968    type DataType = u8;
969}
970
971#[doc = "AGT Compare Match Function Select Register"]
972pub type Agtcmsr = crate::RegValueT<Agtcmsr_SPEC>;
973
974impl Agtcmsr {
975    #[doc = "AGTOB polarity select"]
976    #[inline(always)]
977    pub fn topolb(
978        self,
979    ) -> crate::common::RegisterField<
980        6,
981        0x1,
982        1,
983        0,
984        agtcmsr::Topolb,
985        agtcmsr::Topolb,
986        Agtcmsr_SPEC,
987        crate::common::RW,
988    > {
989        crate::common::RegisterField::<
990            6,
991            0x1,
992            1,
993            0,
994            agtcmsr::Topolb,
995            agtcmsr::Topolb,
996            Agtcmsr_SPEC,
997            crate::common::RW,
998        >::from_register(self, 0)
999    }
1000
1001    #[doc = "AGTOB output enable"]
1002    #[inline(always)]
1003    pub fn toeb(
1004        self,
1005    ) -> crate::common::RegisterField<
1006        5,
1007        0x1,
1008        1,
1009        0,
1010        agtcmsr::Toeb,
1011        agtcmsr::Toeb,
1012        Agtcmsr_SPEC,
1013        crate::common::RW,
1014    > {
1015        crate::common::RegisterField::<
1016            5,
1017            0x1,
1018            1,
1019            0,
1020            agtcmsr::Toeb,
1021            agtcmsr::Toeb,
1022            Agtcmsr_SPEC,
1023            crate::common::RW,
1024        >::from_register(self, 0)
1025    }
1026
1027    #[doc = "Compare match B register enable"]
1028    #[inline(always)]
1029    pub fn tcmeb(
1030        self,
1031    ) -> crate::common::RegisterField<
1032        4,
1033        0x1,
1034        1,
1035        0,
1036        agtcmsr::Tcmeb,
1037        agtcmsr::Tcmeb,
1038        Agtcmsr_SPEC,
1039        crate::common::RW,
1040    > {
1041        crate::common::RegisterField::<
1042            4,
1043            0x1,
1044            1,
1045            0,
1046            agtcmsr::Tcmeb,
1047            agtcmsr::Tcmeb,
1048            Agtcmsr_SPEC,
1049            crate::common::RW,
1050        >::from_register(self, 0)
1051    }
1052
1053    #[doc = "AGTOA polarity select"]
1054    #[inline(always)]
1055    pub fn topola(
1056        self,
1057    ) -> crate::common::RegisterField<
1058        2,
1059        0x1,
1060        1,
1061        0,
1062        agtcmsr::Topola,
1063        agtcmsr::Topola,
1064        Agtcmsr_SPEC,
1065        crate::common::RW,
1066    > {
1067        crate::common::RegisterField::<
1068            2,
1069            0x1,
1070            1,
1071            0,
1072            agtcmsr::Topola,
1073            agtcmsr::Topola,
1074            Agtcmsr_SPEC,
1075            crate::common::RW,
1076        >::from_register(self, 0)
1077    }
1078
1079    #[doc = "AGTOA output enable"]
1080    #[inline(always)]
1081    pub fn toea(
1082        self,
1083    ) -> crate::common::RegisterField<
1084        1,
1085        0x1,
1086        1,
1087        0,
1088        agtcmsr::Toea,
1089        agtcmsr::Toea,
1090        Agtcmsr_SPEC,
1091        crate::common::RW,
1092    > {
1093        crate::common::RegisterField::<
1094            1,
1095            0x1,
1096            1,
1097            0,
1098            agtcmsr::Toea,
1099            agtcmsr::Toea,
1100            Agtcmsr_SPEC,
1101            crate::common::RW,
1102        >::from_register(self, 0)
1103    }
1104
1105    #[doc = "Compare match A register enable"]
1106    #[inline(always)]
1107    pub fn tcmea(
1108        self,
1109    ) -> crate::common::RegisterField<
1110        0,
1111        0x1,
1112        1,
1113        0,
1114        agtcmsr::Tcmea,
1115        agtcmsr::Tcmea,
1116        Agtcmsr_SPEC,
1117        crate::common::RW,
1118    > {
1119        crate::common::RegisterField::<
1120            0,
1121            0x1,
1122            1,
1123            0,
1124            agtcmsr::Tcmea,
1125            agtcmsr::Tcmea,
1126            Agtcmsr_SPEC,
1127            crate::common::RW,
1128        >::from_register(self, 0)
1129    }
1130}
1131impl ::core::default::Default for Agtcmsr {
1132    #[inline(always)]
1133    fn default() -> Agtcmsr {
1134        <crate::RegValueT<Agtcmsr_SPEC> as RegisterValue<_>>::new(0)
1135    }
1136}
1137pub mod agtcmsr {
1138
1139    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1140    pub struct Topolb_SPEC;
1141    pub type Topolb = crate::EnumBitfieldStruct<u8, Topolb_SPEC>;
1142    impl Topolb {
1143        #[doc = "AGTOB Output is started at low"]
1144        pub const _0: Self = Self::new(0);
1145
1146        #[doc = "AGTOB Output is started at high"]
1147        pub const _1: Self = Self::new(1);
1148    }
1149    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1150    pub struct Toeb_SPEC;
1151    pub type Toeb = crate::EnumBitfieldStruct<u8, Toeb_SPEC>;
1152    impl Toeb {
1153        #[doc = "AGTOB output disabled (port)"]
1154        pub const _0: Self = Self::new(0);
1155
1156        #[doc = "AGTOB output enabled"]
1157        pub const _1: Self = Self::new(1);
1158    }
1159    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1160    pub struct Tcmeb_SPEC;
1161    pub type Tcmeb = crate::EnumBitfieldStruct<u8, Tcmeb_SPEC>;
1162    impl Tcmeb {
1163        #[doc = "Disable compare match B register"]
1164        pub const _0: Self = Self::new(0);
1165
1166        #[doc = "Enable compare match B register"]
1167        pub const _1: Self = Self::new(1);
1168    }
1169    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1170    pub struct Topola_SPEC;
1171    pub type Topola = crate::EnumBitfieldStruct<u8, Topola_SPEC>;
1172    impl Topola {
1173        #[doc = "AGTOA Output is started at low"]
1174        pub const _0: Self = Self::new(0);
1175
1176        #[doc = "AGTOA Output is started at high"]
1177        pub const _1: Self = Self::new(1);
1178    }
1179    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1180    pub struct Toea_SPEC;
1181    pub type Toea = crate::EnumBitfieldStruct<u8, Toea_SPEC>;
1182    impl Toea {
1183        #[doc = "AGTOA output disabled (port)"]
1184        pub const _0: Self = Self::new(0);
1185
1186        #[doc = "AGTOA output enabled"]
1187        pub const _1: Self = Self::new(1);
1188    }
1189    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1190    pub struct Tcmea_SPEC;
1191    pub type Tcmea = crate::EnumBitfieldStruct<u8, Tcmea_SPEC>;
1192    impl Tcmea {
1193        #[doc = "Disable compare match A register"]
1194        pub const _0: Self = Self::new(0);
1195
1196        #[doc = "Enable compare match A register"]
1197        pub const _1: Self = Self::new(1);
1198    }
1199}
1200#[doc(hidden)]
1201#[derive(Copy, Clone, Eq, PartialEq)]
1202pub struct Agtiosel_SPEC;
1203impl crate::sealed::RegSpec for Agtiosel_SPEC {
1204    type DataType = u8;
1205}
1206
1207#[doc = "AGT Pin Select Register"]
1208pub type Agtiosel = crate::RegValueT<Agtiosel_SPEC>;
1209
1210impl Agtiosel {
1211    #[doc = "AGTIO input enable"]
1212    #[inline(always)]
1213    pub fn ties(
1214        self,
1215    ) -> crate::common::RegisterField<
1216        4,
1217        0x1,
1218        1,
1219        0,
1220        agtiosel::Ties,
1221        agtiosel::Ties,
1222        Agtiosel_SPEC,
1223        crate::common::RW,
1224    > {
1225        crate::common::RegisterField::<
1226            4,
1227            0x1,
1228            1,
1229            0,
1230            agtiosel::Ties,
1231            agtiosel::Ties,
1232            Agtiosel_SPEC,
1233            crate::common::RW,
1234        >::from_register(self, 0)
1235    }
1236
1237    #[doc = "AGTIO pin select"]
1238    #[inline(always)]
1239    pub fn sel(
1240        self,
1241    ) -> crate::common::RegisterField<
1242        0,
1243        0x3,
1244        1,
1245        0,
1246        agtiosel::Sel,
1247        agtiosel::Sel,
1248        Agtiosel_SPEC,
1249        crate::common::RW,
1250    > {
1251        crate::common::RegisterField::<
1252            0,
1253            0x3,
1254            1,
1255            0,
1256            agtiosel::Sel,
1257            agtiosel::Sel,
1258            Agtiosel_SPEC,
1259            crate::common::RW,
1260        >::from_register(self, 0)
1261    }
1262}
1263impl ::core::default::Default for Agtiosel {
1264    #[inline(always)]
1265    fn default() -> Agtiosel {
1266        <crate::RegValueT<Agtiosel_SPEC> as RegisterValue<_>>::new(0)
1267    }
1268}
1269pub mod agtiosel {
1270
1271    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1272    pub struct Ties_SPEC;
1273    pub type Ties = crate::EnumBitfieldStruct<u8, Ties_SPEC>;
1274    impl Ties {
1275        #[doc = "external event input disable during software standby mode"]
1276        pub const _0: Self = Self::new(0);
1277
1278        #[doc = "external event input enable during software standby mode"]
1279        pub const _1: Self = Self::new(1);
1280    }
1281    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1282    pub struct Sel_SPEC;
1283    pub type Sel = crate::EnumBitfieldStruct<u8, Sel_SPEC>;
1284    impl Sel {
1285        #[doc = "AGTIO_A can not be used as AGTIO input pin in deep software standby mode"]
1286        pub const _00: Self = Self::new(0);
1287
1288        #[doc = "Setting prohibited"]
1289        pub const _01: Self = Self::new(1);
1290
1291        #[doc = "AGTIO_B can be used as AGTIO input pin in deep software standby mode. AGTIO_B is input only. It is not possible to output."]
1292        pub const _10: Self = Self::new(2);
1293
1294        #[doc = "AGTIO_C can be used as AGTIO input pin in deep software standby mode. AGTIO_C is input only. It is not possible to output."]
1295        pub const _11: Self = Self::new(3);
1296    }
1297}
ra6m2_pac/agt0.rs

ra6m2_pac/
agt0.rs
