1#[doc = "Register `NMIER` reader"]
2pub struct R(crate::R<NMIER_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<NMIER_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<NMIER_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<NMIER_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `NMIER` writer"]
17pub struct W(crate::W<NMIER_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<NMIER_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<NMIER_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<NMIER_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `IWDTEN` reader - IWDT Underflow/Refresh Error Interrupt Enable"]
38pub type IWDTEN_R = crate::BitReader<IWDTEN_A>;
39#[doc = "IWDT Underflow/Refresh Error Interrupt Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum IWDTEN_A {
42 #[doc = "0: IWDT underflow/refresh error interrupt is disabled."]
43 _0 = 0,
44 #[doc = "1: IWDT underflow/refresh error interrupt is enabled."]
45 _1 = 1,
46}
47impl From<IWDTEN_A> for bool {
48 #[inline(always)]
49 fn from(variant: IWDTEN_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl IWDTEN_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> IWDTEN_A {
57 match self.bits {
58 false => IWDTEN_A::_0,
59 true => IWDTEN_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == IWDTEN_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == IWDTEN_A::_1
71 }
72}
73#[doc = "Field `IWDTEN` writer - IWDT Underflow/Refresh Error Interrupt Enable"]
74pub type IWDTEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, IWDTEN_A, O>;
75impl<'a, const O: u8> IWDTEN_W<'a, O> {
76 #[doc = "IWDT underflow/refresh error interrupt is disabled."]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(IWDTEN_A::_0)
80 }
81 #[doc = "IWDT underflow/refresh error interrupt is enabled."]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(IWDTEN_A::_1)
85 }
86}
87#[doc = "Field `WDTEN` reader - WDT Underflow/Refresh Error Interrupt Enable"]
88pub type WDTEN_R = crate::BitReader<WDTEN_A>;
89#[doc = "WDT Underflow/Refresh Error Interrupt Enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum WDTEN_A {
92 #[doc = "0: WDT underflow/refresh error interrupt is disabled."]
93 _0 = 0,
94 #[doc = "1: WDT underflow/refresh error interrupt is enabled."]
95 _1 = 1,
96}
97impl From<WDTEN_A> for bool {
98 #[inline(always)]
99 fn from(variant: WDTEN_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl WDTEN_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> WDTEN_A {
107 match self.bits {
108 false => WDTEN_A::_0,
109 true => WDTEN_A::_1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `_0`"]
113 #[inline(always)]
114 pub fn is_0(&self) -> bool {
115 *self == WDTEN_A::_0
116 }
117 #[doc = "Checks if the value of the field is `_1`"]
118 #[inline(always)]
119 pub fn is_1(&self) -> bool {
120 *self == WDTEN_A::_1
121 }
122}
123#[doc = "Field `WDTEN` writer - WDT Underflow/Refresh Error Interrupt Enable"]
124pub type WDTEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, WDTEN_A, O>;
125impl<'a, const O: u8> WDTEN_W<'a, O> {
126 #[doc = "WDT underflow/refresh error interrupt is disabled."]
127 #[inline(always)]
128 pub fn _0(self) -> &'a mut W {
129 self.variant(WDTEN_A::_0)
130 }
131 #[doc = "WDT underflow/refresh error interrupt is enabled."]
132 #[inline(always)]
133 pub fn _1(self) -> &'a mut W {
134 self.variant(WDTEN_A::_1)
135 }
136}
137#[doc = "Field `LVD1EN` reader - Voltage-Monitoring 1 Interrupt Enable"]
138pub type LVD1EN_R = crate::BitReader<LVD1EN_A>;
139#[doc = "Voltage-Monitoring 1 Interrupt Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum LVD1EN_A {
142 #[doc = "0: Voltage-monitoring 1 interrupt is disabled."]
143 _0 = 0,
144 #[doc = "1: Voltage-monitoring 1 interrupt is enabled."]
145 _1 = 1,
146}
147impl From<LVD1EN_A> for bool {
148 #[inline(always)]
149 fn from(variant: LVD1EN_A) -> Self {
150 variant as u8 != 0
151 }
152}
153impl LVD1EN_R {
154 #[doc = "Get enumerated values variant"]
155 #[inline(always)]
156 pub fn variant(&self) -> LVD1EN_A {
157 match self.bits {
158 false => LVD1EN_A::_0,
159 true => LVD1EN_A::_1,
160 }
161 }
162 #[doc = "Checks if the value of the field is `_0`"]
163 #[inline(always)]
164 pub fn is_0(&self) -> bool {
165 *self == LVD1EN_A::_0
166 }
167 #[doc = "Checks if the value of the field is `_1`"]
168 #[inline(always)]
169 pub fn is_1(&self) -> bool {
170 *self == LVD1EN_A::_1
171 }
172}
173#[doc = "Field `LVD1EN` writer - Voltage-Monitoring 1 Interrupt Enable"]
174pub type LVD1EN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, LVD1EN_A, O>;
175impl<'a, const O: u8> LVD1EN_W<'a, O> {
176 #[doc = "Voltage-monitoring 1 interrupt is disabled."]
177 #[inline(always)]
178 pub fn _0(self) -> &'a mut W {
179 self.variant(LVD1EN_A::_0)
180 }
181 #[doc = "Voltage-monitoring 1 interrupt is enabled."]
182 #[inline(always)]
183 pub fn _1(self) -> &'a mut W {
184 self.variant(LVD1EN_A::_1)
185 }
186}
187#[doc = "Field `LVD2EN` reader - Voltage-Monitoring 2 Interrupt Enable"]
188pub type LVD2EN_R = crate::BitReader<LVD2EN_A>;
189#[doc = "Voltage-Monitoring 2 Interrupt Enable\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum LVD2EN_A {
192 #[doc = "0: Voltage-monitoring 2 interrupt is disabled."]
193 _0 = 0,
194 #[doc = "1: Voltage-monitoring 2 interrupt is enabled."]
195 _1 = 1,
196}
197impl From<LVD2EN_A> for bool {
198 #[inline(always)]
199 fn from(variant: LVD2EN_A) -> Self {
200 variant as u8 != 0
201 }
202}
203impl LVD2EN_R {
204 #[doc = "Get enumerated values variant"]
205 #[inline(always)]
206 pub fn variant(&self) -> LVD2EN_A {
207 match self.bits {
208 false => LVD2EN_A::_0,
209 true => LVD2EN_A::_1,
210 }
211 }
212 #[doc = "Checks if the value of the field is `_0`"]
213 #[inline(always)]
214 pub fn is_0(&self) -> bool {
215 *self == LVD2EN_A::_0
216 }
217 #[doc = "Checks if the value of the field is `_1`"]
218 #[inline(always)]
219 pub fn is_1(&self) -> bool {
220 *self == LVD2EN_A::_1
221 }
222}
223#[doc = "Field `LVD2EN` writer - Voltage-Monitoring 2 Interrupt Enable"]
224pub type LVD2EN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, LVD2EN_A, O>;
225impl<'a, const O: u8> LVD2EN_W<'a, O> {
226 #[doc = "Voltage-monitoring 2 interrupt is disabled."]
227 #[inline(always)]
228 pub fn _0(self) -> &'a mut W {
229 self.variant(LVD2EN_A::_0)
230 }
231 #[doc = "Voltage-monitoring 2 interrupt is enabled."]
232 #[inline(always)]
233 pub fn _1(self) -> &'a mut W {
234 self.variant(LVD2EN_A::_1)
235 }
236}
237#[doc = "Field `OSTEN` reader - Oscillation Stop Detection Interrupt Enable"]
238pub type OSTEN_R = crate::BitReader<OSTEN_A>;
239#[doc = "Oscillation Stop Detection Interrupt Enable\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum OSTEN_A {
242 #[doc = "0: Oscillation stop detection interrupt is disabled."]
243 _0 = 0,
244 #[doc = "1: Oscillation stop detection interrupt is enabled."]
245 _1 = 1,
246}
247impl From<OSTEN_A> for bool {
248 #[inline(always)]
249 fn from(variant: OSTEN_A) -> Self {
250 variant as u8 != 0
251 }
252}
253impl OSTEN_R {
254 #[doc = "Get enumerated values variant"]
255 #[inline(always)]
256 pub fn variant(&self) -> OSTEN_A {
257 match self.bits {
258 false => OSTEN_A::_0,
259 true => OSTEN_A::_1,
260 }
261 }
262 #[doc = "Checks if the value of the field is `_0`"]
263 #[inline(always)]
264 pub fn is_0(&self) -> bool {
265 *self == OSTEN_A::_0
266 }
267 #[doc = "Checks if the value of the field is `_1`"]
268 #[inline(always)]
269 pub fn is_1(&self) -> bool {
270 *self == OSTEN_A::_1
271 }
272}
273#[doc = "Field `OSTEN` writer - Oscillation Stop Detection Interrupt Enable"]
274pub type OSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, OSTEN_A, O>;
275impl<'a, const O: u8> OSTEN_W<'a, O> {
276 #[doc = "Oscillation stop detection interrupt is disabled."]
277 #[inline(always)]
278 pub fn _0(self) -> &'a mut W {
279 self.variant(OSTEN_A::_0)
280 }
281 #[doc = "Oscillation stop detection interrupt is enabled."]
282 #[inline(always)]
283 pub fn _1(self) -> &'a mut W {
284 self.variant(OSTEN_A::_1)
285 }
286}
287#[doc = "Field `NMIEN` reader - NMI Pin Interrupt Enable"]
288pub type NMIEN_R = crate::BitReader<NMIEN_A>;
289#[doc = "NMI Pin Interrupt Enable\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum NMIEN_A {
292 #[doc = "0: NMI pin interrupt is disabled."]
293 _0 = 0,
294 #[doc = "1: NMI pin interrupt is enabled."]
295 _1 = 1,
296}
297impl From<NMIEN_A> for bool {
298 #[inline(always)]
299 fn from(variant: NMIEN_A) -> Self {
300 variant as u8 != 0
301 }
302}
303impl NMIEN_R {
304 #[doc = "Get enumerated values variant"]
305 #[inline(always)]
306 pub fn variant(&self) -> NMIEN_A {
307 match self.bits {
308 false => NMIEN_A::_0,
309 true => NMIEN_A::_1,
310 }
311 }
312 #[doc = "Checks if the value of the field is `_0`"]
313 #[inline(always)]
314 pub fn is_0(&self) -> bool {
315 *self == NMIEN_A::_0
316 }
317 #[doc = "Checks if the value of the field is `_1`"]
318 #[inline(always)]
319 pub fn is_1(&self) -> bool {
320 *self == NMIEN_A::_1
321 }
322}
323#[doc = "Field `NMIEN` writer - NMI Pin Interrupt Enable"]
324pub type NMIEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, NMIEN_A, O>;
325impl<'a, const O: u8> NMIEN_W<'a, O> {
326 #[doc = "NMI pin interrupt is disabled."]
327 #[inline(always)]
328 pub fn _0(self) -> &'a mut W {
329 self.variant(NMIEN_A::_0)
330 }
331 #[doc = "NMI pin interrupt is enabled."]
332 #[inline(always)]
333 pub fn _1(self) -> &'a mut W {
334 self.variant(NMIEN_A::_1)
335 }
336}
337#[doc = "Field `RPEEN` reader - RAM Parity Error Interrupt Enable"]
338pub type RPEEN_R = crate::BitReader<RPEEN_A>;
339#[doc = "RAM Parity Error Interrupt Enable\n\nValue on reset: 0"]
340#[derive(Clone, Copy, Debug, PartialEq, Eq)]
341pub enum RPEEN_A {
342 #[doc = "0: RAM Parity Error interrupt is disabled."]
343 _0 = 0,
344 #[doc = "1: RAM Parity Error interrupt is enabled."]
345 _1 = 1,
346}
347impl From<RPEEN_A> for bool {
348 #[inline(always)]
349 fn from(variant: RPEEN_A) -> Self {
350 variant as u8 != 0
351 }
352}
353impl RPEEN_R {
354 #[doc = "Get enumerated values variant"]
355 #[inline(always)]
356 pub fn variant(&self) -> RPEEN_A {
357 match self.bits {
358 false => RPEEN_A::_0,
359 true => RPEEN_A::_1,
360 }
361 }
362 #[doc = "Checks if the value of the field is `_0`"]
363 #[inline(always)]
364 pub fn is_0(&self) -> bool {
365 *self == RPEEN_A::_0
366 }
367 #[doc = "Checks if the value of the field is `_1`"]
368 #[inline(always)]
369 pub fn is_1(&self) -> bool {
370 *self == RPEEN_A::_1
371 }
372}
373#[doc = "Field `RPEEN` writer - RAM Parity Error Interrupt Enable"]
374pub type RPEEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, RPEEN_A, O>;
375impl<'a, const O: u8> RPEEN_W<'a, O> {
376 #[doc = "RAM Parity Error interrupt is disabled."]
377 #[inline(always)]
378 pub fn _0(self) -> &'a mut W {
379 self.variant(RPEEN_A::_0)
380 }
381 #[doc = "RAM Parity Error interrupt is enabled."]
382 #[inline(always)]
383 pub fn _1(self) -> &'a mut W {
384 self.variant(RPEEN_A::_1)
385 }
386}
387#[doc = "Field `RECCEN` reader - RAM ECC Error Interrupt Enable"]
388pub type RECCEN_R = crate::BitReader<RECCEN_A>;
389#[doc = "RAM ECC Error Interrupt Enable\n\nValue on reset: 0"]
390#[derive(Clone, Copy, Debug, PartialEq, Eq)]
391pub enum RECCEN_A {
392 #[doc = "0: RAM ECC Error interrupt is disabled."]
393 _0 = 0,
394 #[doc = "1: RAM ECC Error interrupt is enabled."]
395 _1 = 1,
396}
397impl From<RECCEN_A> for bool {
398 #[inline(always)]
399 fn from(variant: RECCEN_A) -> Self {
400 variant as u8 != 0
401 }
402}
403impl RECCEN_R {
404 #[doc = "Get enumerated values variant"]
405 #[inline(always)]
406 pub fn variant(&self) -> RECCEN_A {
407 match self.bits {
408 false => RECCEN_A::_0,
409 true => RECCEN_A::_1,
410 }
411 }
412 #[doc = "Checks if the value of the field is `_0`"]
413 #[inline(always)]
414 pub fn is_0(&self) -> bool {
415 *self == RECCEN_A::_0
416 }
417 #[doc = "Checks if the value of the field is `_1`"]
418 #[inline(always)]
419 pub fn is_1(&self) -> bool {
420 *self == RECCEN_A::_1
421 }
422}
423#[doc = "Field `RECCEN` writer - RAM ECC Error Interrupt Enable"]
424pub type RECCEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, RECCEN_A, O>;
425impl<'a, const O: u8> RECCEN_W<'a, O> {
426 #[doc = "RAM ECC Error interrupt is disabled."]
427 #[inline(always)]
428 pub fn _0(self) -> &'a mut W {
429 self.variant(RECCEN_A::_0)
430 }
431 #[doc = "RAM ECC Error interrupt is enabled."]
432 #[inline(always)]
433 pub fn _1(self) -> &'a mut W {
434 self.variant(RECCEN_A::_1)
435 }
436}
437#[doc = "Field `BUSSEN` reader - MPU Bus Slave Error Interrupt Enable"]
438pub type BUSSEN_R = crate::BitReader<BUSSEN_A>;
439#[doc = "MPU Bus Slave Error Interrupt Enable\n\nValue on reset: 0"]
440#[derive(Clone, Copy, Debug, PartialEq, Eq)]
441pub enum BUSSEN_A {
442 #[doc = "0: MPU Bus Slave Error interrupt is disabled."]
443 _0 = 0,
444 #[doc = "1: MPU Bus Slave Error interrupt is enabled."]
445 _1 = 1,
446}
447impl From<BUSSEN_A> for bool {
448 #[inline(always)]
449 fn from(variant: BUSSEN_A) -> Self {
450 variant as u8 != 0
451 }
452}
453impl BUSSEN_R {
454 #[doc = "Get enumerated values variant"]
455 #[inline(always)]
456 pub fn variant(&self) -> BUSSEN_A {
457 match self.bits {
458 false => BUSSEN_A::_0,
459 true => BUSSEN_A::_1,
460 }
461 }
462 #[doc = "Checks if the value of the field is `_0`"]
463 #[inline(always)]
464 pub fn is_0(&self) -> bool {
465 *self == BUSSEN_A::_0
466 }
467 #[doc = "Checks if the value of the field is `_1`"]
468 #[inline(always)]
469 pub fn is_1(&self) -> bool {
470 *self == BUSSEN_A::_1
471 }
472}
473#[doc = "Field `BUSSEN` writer - MPU Bus Slave Error Interrupt Enable"]
474pub type BUSSEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, BUSSEN_A, O>;
475impl<'a, const O: u8> BUSSEN_W<'a, O> {
476 #[doc = "MPU Bus Slave Error interrupt is disabled."]
477 #[inline(always)]
478 pub fn _0(self) -> &'a mut W {
479 self.variant(BUSSEN_A::_0)
480 }
481 #[doc = "MPU Bus Slave Error interrupt is enabled."]
482 #[inline(always)]
483 pub fn _1(self) -> &'a mut W {
484 self.variant(BUSSEN_A::_1)
485 }
486}
487#[doc = "Field `BUSMEN` reader - MPU Bus Master Error Interrupt Enable"]
488pub type BUSMEN_R = crate::BitReader<BUSMEN_A>;
489#[doc = "MPU Bus Master Error Interrupt Enable\n\nValue on reset: 0"]
490#[derive(Clone, Copy, Debug, PartialEq, Eq)]
491pub enum BUSMEN_A {
492 #[doc = "0: MPU Bus Master Error interrupt is disabled."]
493 _0 = 0,
494 #[doc = "1: MPU Bus Master Error interrupt is enabled."]
495 _1 = 1,
496}
497impl From<BUSMEN_A> for bool {
498 #[inline(always)]
499 fn from(variant: BUSMEN_A) -> Self {
500 variant as u8 != 0
501 }
502}
503impl BUSMEN_R {
504 #[doc = "Get enumerated values variant"]
505 #[inline(always)]
506 pub fn variant(&self) -> BUSMEN_A {
507 match self.bits {
508 false => BUSMEN_A::_0,
509 true => BUSMEN_A::_1,
510 }
511 }
512 #[doc = "Checks if the value of the field is `_0`"]
513 #[inline(always)]
514 pub fn is_0(&self) -> bool {
515 *self == BUSMEN_A::_0
516 }
517 #[doc = "Checks if the value of the field is `_1`"]
518 #[inline(always)]
519 pub fn is_1(&self) -> bool {
520 *self == BUSMEN_A::_1
521 }
522}
523#[doc = "Field `BUSMEN` writer - MPU Bus Master Error Interrupt Enable"]
524pub type BUSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, BUSMEN_A, O>;
525impl<'a, const O: u8> BUSMEN_W<'a, O> {
526 #[doc = "MPU Bus Master Error interrupt is disabled."]
527 #[inline(always)]
528 pub fn _0(self) -> &'a mut W {
529 self.variant(BUSMEN_A::_0)
530 }
531 #[doc = "MPU Bus Master Error interrupt is enabled."]
532 #[inline(always)]
533 pub fn _1(self) -> &'a mut W {
534 self.variant(BUSMEN_A::_1)
535 }
536}
537#[doc = "Field `SPEEN` reader - MPU Stack Error Interrupt Enable"]
538pub type SPEEN_R = crate::BitReader<SPEEN_A>;
539#[doc = "MPU Stack Error Interrupt Enable\n\nValue on reset: 0"]
540#[derive(Clone, Copy, Debug, PartialEq, Eq)]
541pub enum SPEEN_A {
542 #[doc = "0: MPU Stack Error interrupt is disabled."]
543 _0 = 0,
544 #[doc = "1: MPU Stack Error interrupt is enabled."]
545 _1 = 1,
546}
547impl From<SPEEN_A> for bool {
548 #[inline(always)]
549 fn from(variant: SPEEN_A) -> Self {
550 variant as u8 != 0
551 }
552}
553impl SPEEN_R {
554 #[doc = "Get enumerated values variant"]
555 #[inline(always)]
556 pub fn variant(&self) -> SPEEN_A {
557 match self.bits {
558 false => SPEEN_A::_0,
559 true => SPEEN_A::_1,
560 }
561 }
562 #[doc = "Checks if the value of the field is `_0`"]
563 #[inline(always)]
564 pub fn is_0(&self) -> bool {
565 *self == SPEEN_A::_0
566 }
567 #[doc = "Checks if the value of the field is `_1`"]
568 #[inline(always)]
569 pub fn is_1(&self) -> bool {
570 *self == SPEEN_A::_1
571 }
572}
573#[doc = "Field `SPEEN` writer - MPU Stack Error Interrupt Enable"]
574pub type SPEEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMIER_SPEC, SPEEN_A, O>;
575impl<'a, const O: u8> SPEEN_W<'a, O> {
576 #[doc = "MPU Stack Error interrupt is disabled."]
577 #[inline(always)]
578 pub fn _0(self) -> &'a mut W {
579 self.variant(SPEEN_A::_0)
580 }
581 #[doc = "MPU Stack Error interrupt is enabled."]
582 #[inline(always)]
583 pub fn _1(self) -> &'a mut W {
584 self.variant(SPEEN_A::_1)
585 }
586}
587impl R {
588 #[doc = "Bit 0 - IWDT Underflow/Refresh Error Interrupt Enable"]
589 #[inline(always)]
590 pub fn iwdten(&self) -> IWDTEN_R {
591 IWDTEN_R::new((self.bits & 1) != 0)
592 }
593 #[doc = "Bit 1 - WDT Underflow/Refresh Error Interrupt Enable"]
594 #[inline(always)]
595 pub fn wdten(&self) -> WDTEN_R {
596 WDTEN_R::new(((self.bits >> 1) & 1) != 0)
597 }
598 #[doc = "Bit 2 - Voltage-Monitoring 1 Interrupt Enable"]
599 #[inline(always)]
600 pub fn lvd1en(&self) -> LVD1EN_R {
601 LVD1EN_R::new(((self.bits >> 2) & 1) != 0)
602 }
603 #[doc = "Bit 3 - Voltage-Monitoring 2 Interrupt Enable"]
604 #[inline(always)]
605 pub fn lvd2en(&self) -> LVD2EN_R {
606 LVD2EN_R::new(((self.bits >> 3) & 1) != 0)
607 }
608 #[doc = "Bit 6 - Oscillation Stop Detection Interrupt Enable"]
609 #[inline(always)]
610 pub fn osten(&self) -> OSTEN_R {
611 OSTEN_R::new(((self.bits >> 6) & 1) != 0)
612 }
613 #[doc = "Bit 7 - NMI Pin Interrupt Enable"]
614 #[inline(always)]
615 pub fn nmien(&self) -> NMIEN_R {
616 NMIEN_R::new(((self.bits >> 7) & 1) != 0)
617 }
618 #[doc = "Bit 8 - RAM Parity Error Interrupt Enable"]
619 #[inline(always)]
620 pub fn rpeen(&self) -> RPEEN_R {
621 RPEEN_R::new(((self.bits >> 8) & 1) != 0)
622 }
623 #[doc = "Bit 9 - RAM ECC Error Interrupt Enable"]
624 #[inline(always)]
625 pub fn reccen(&self) -> RECCEN_R {
626 RECCEN_R::new(((self.bits >> 9) & 1) != 0)
627 }
628 #[doc = "Bit 10 - MPU Bus Slave Error Interrupt Enable"]
629 #[inline(always)]
630 pub fn bussen(&self) -> BUSSEN_R {
631 BUSSEN_R::new(((self.bits >> 10) & 1) != 0)
632 }
633 #[doc = "Bit 11 - MPU Bus Master Error Interrupt Enable"]
634 #[inline(always)]
635 pub fn busmen(&self) -> BUSMEN_R {
636 BUSMEN_R::new(((self.bits >> 11) & 1) != 0)
637 }
638 #[doc = "Bit 12 - MPU Stack Error Interrupt Enable"]
639 #[inline(always)]
640 pub fn speen(&self) -> SPEEN_R {
641 SPEEN_R::new(((self.bits >> 12) & 1) != 0)
642 }
643}
644impl W {
645 #[doc = "Bit 0 - IWDT Underflow/Refresh Error Interrupt Enable"]
646 #[inline(always)]
647 #[must_use]
648 pub fn iwdten(&mut self) -> IWDTEN_W<0> {
649 IWDTEN_W::new(self)
650 }
651 #[doc = "Bit 1 - WDT Underflow/Refresh Error Interrupt Enable"]
652 #[inline(always)]
653 #[must_use]
654 pub fn wdten(&mut self) -> WDTEN_W<1> {
655 WDTEN_W::new(self)
656 }
657 #[doc = "Bit 2 - Voltage-Monitoring 1 Interrupt Enable"]
658 #[inline(always)]
659 #[must_use]
660 pub fn lvd1en(&mut self) -> LVD1EN_W<2> {
661 LVD1EN_W::new(self)
662 }
663 #[doc = "Bit 3 - Voltage-Monitoring 2 Interrupt Enable"]
664 #[inline(always)]
665 #[must_use]
666 pub fn lvd2en(&mut self) -> LVD2EN_W<3> {
667 LVD2EN_W::new(self)
668 }
669 #[doc = "Bit 6 - Oscillation Stop Detection Interrupt Enable"]
670 #[inline(always)]
671 #[must_use]
672 pub fn osten(&mut self) -> OSTEN_W<6> {
673 OSTEN_W::new(self)
674 }
675 #[doc = "Bit 7 - NMI Pin Interrupt Enable"]
676 #[inline(always)]
677 #[must_use]
678 pub fn nmien(&mut self) -> NMIEN_W<7> {
679 NMIEN_W::new(self)
680 }
681 #[doc = "Bit 8 - RAM Parity Error Interrupt Enable"]
682 #[inline(always)]
683 #[must_use]
684 pub fn rpeen(&mut self) -> RPEEN_W<8> {
685 RPEEN_W::new(self)
686 }
687 #[doc = "Bit 9 - RAM ECC Error Interrupt Enable"]
688 #[inline(always)]
689 #[must_use]
690 pub fn reccen(&mut self) -> RECCEN_W<9> {
691 RECCEN_W::new(self)
692 }
693 #[doc = "Bit 10 - MPU Bus Slave Error Interrupt Enable"]
694 #[inline(always)]
695 #[must_use]
696 pub fn bussen(&mut self) -> BUSSEN_W<10> {
697 BUSSEN_W::new(self)
698 }
699 #[doc = "Bit 11 - MPU Bus Master Error Interrupt Enable"]
700 #[inline(always)]
701 #[must_use]
702 pub fn busmen(&mut self) -> BUSMEN_W<11> {
703 BUSMEN_W::new(self)
704 }
705 #[doc = "Bit 12 - MPU Stack Error Interrupt Enable"]
706 #[inline(always)]
707 #[must_use]
708 pub fn speen(&mut self) -> SPEEN_W<12> {
709 SPEEN_W::new(self)
710 }
711 #[doc = "Writes raw bits to the register."]
712 #[inline(always)]
713 pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
714 self.0.bits(bits);
715 self
716 }
717}
718#[doc = "Non-Maskable Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nmier](index.html) module"]
719pub struct NMIER_SPEC;
720impl crate::RegisterSpec for NMIER_SPEC {
721 type Ux = u16;
722}
723#[doc = "`read()` method returns [nmier::R](R) reader structure"]
724impl crate::Readable for NMIER_SPEC {
725 type Reader = R;
726}
727#[doc = "`write(|w| ..)` method takes [nmier::W](W) writer structure"]
728impl crate::Writable for NMIER_SPEC {
729 type Writer = W;
730 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
731 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
732}
733#[doc = "`reset()` method sets NMIER to value 0"]
734impl crate::Resettable for NMIER_SPEC {
735 const RESET_VALUE: Self::Ux = 0;
736}