1#[doc = "Register `SRCIDCTRL` reader"]
2pub struct R(crate::R<SRCIDCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SRCIDCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SRCIDCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SRCIDCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SRCIDCTRL` writer"]
17pub struct W(crate::W<SRCIDCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SRCIDCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SRCIDCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SRCIDCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `IFTRG` reader - Input FIFO Data Triggering Number"]
38pub type IFTRG_R = crate::FieldReader<u8, IFTRG_A>;
39#[doc = "Input FIFO Data Triggering Number\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum IFTRG_A {
43 #[doc = "0: 0"]
44 _00 = 0,
45 #[doc = "1: 2"]
46 _01 = 1,
47 #[doc = "2: 4"]
48 _10 = 2,
49 #[doc = "3: 6"]
50 _11 = 3,
51}
52impl From<IFTRG_A> for u8 {
53 #[inline(always)]
54 fn from(variant: IFTRG_A) -> Self {
55 variant as _
56 }
57}
58impl IFTRG_R {
59 #[doc = "Get enumerated values variant"]
60 #[inline(always)]
61 pub fn variant(&self) -> IFTRG_A {
62 match self.bits {
63 0 => IFTRG_A::_00,
64 1 => IFTRG_A::_01,
65 2 => IFTRG_A::_10,
66 3 => IFTRG_A::_11,
67 _ => unreachable!(),
68 }
69 }
70 #[doc = "Checks if the value of the field is `_00`"]
71 #[inline(always)]
72 pub fn is_00(&self) -> bool {
73 *self == IFTRG_A::_00
74 }
75 #[doc = "Checks if the value of the field is `_01`"]
76 #[inline(always)]
77 pub fn is_01(&self) -> bool {
78 *self == IFTRG_A::_01
79 }
80 #[doc = "Checks if the value of the field is `_10`"]
81 #[inline(always)]
82 pub fn is_10(&self) -> bool {
83 *self == IFTRG_A::_10
84 }
85 #[doc = "Checks if the value of the field is `_11`"]
86 #[inline(always)]
87 pub fn is_11(&self) -> bool {
88 *self == IFTRG_A::_11
89 }
90}
91#[doc = "Field `IFTRG` writer - Input FIFO Data Triggering Number"]
92pub type IFTRG_W<'a, const O: u8> =
93 crate::FieldWriterSafe<'a, u16, SRCIDCTRL_SPEC, u8, IFTRG_A, 2, O>;
94impl<'a, const O: u8> IFTRG_W<'a, O> {
95 #[doc = "0"]
96 #[inline(always)]
97 pub fn _00(self) -> &'a mut W {
98 self.variant(IFTRG_A::_00)
99 }
100 #[doc = "2"]
101 #[inline(always)]
102 pub fn _01(self) -> &'a mut W {
103 self.variant(IFTRG_A::_01)
104 }
105 #[doc = "4"]
106 #[inline(always)]
107 pub fn _10(self) -> &'a mut W {
108 self.variant(IFTRG_A::_10)
109 }
110 #[doc = "6"]
111 #[inline(always)]
112 pub fn _11(self) -> &'a mut W {
113 self.variant(IFTRG_A::_11)
114 }
115}
116#[doc = "Field `IEN` reader - Input FIFO Empty Interrupt Enable"]
117pub type IEN_R = crate::BitReader<IEN_A>;
118#[doc = "Input FIFO Empty Interrupt Enable\n\nValue on reset: 0"]
119#[derive(Clone, Copy, Debug, PartialEq, Eq)]
120pub enum IEN_A {
121 #[doc = "0: Input FIFO empty interrupt is disabled."]
122 _0 = 0,
123 #[doc = "1: Input FIFO empty interrupt is enabled."]
124 _1 = 1,
125}
126impl From<IEN_A> for bool {
127 #[inline(always)]
128 fn from(variant: IEN_A) -> Self {
129 variant as u8 != 0
130 }
131}
132impl IEN_R {
133 #[doc = "Get enumerated values variant"]
134 #[inline(always)]
135 pub fn variant(&self) -> IEN_A {
136 match self.bits {
137 false => IEN_A::_0,
138 true => IEN_A::_1,
139 }
140 }
141 #[doc = "Checks if the value of the field is `_0`"]
142 #[inline(always)]
143 pub fn is_0(&self) -> bool {
144 *self == IEN_A::_0
145 }
146 #[doc = "Checks if the value of the field is `_1`"]
147 #[inline(always)]
148 pub fn is_1(&self) -> bool {
149 *self == IEN_A::_1
150 }
151}
152#[doc = "Field `IEN` writer - Input FIFO Empty Interrupt Enable"]
153pub type IEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, SRCIDCTRL_SPEC, IEN_A, O>;
154impl<'a, const O: u8> IEN_W<'a, O> {
155 #[doc = "Input FIFO empty interrupt is disabled."]
156 #[inline(always)]
157 pub fn _0(self) -> &'a mut W {
158 self.variant(IEN_A::_0)
159 }
160 #[doc = "Input FIFO empty interrupt is enabled."]
161 #[inline(always)]
162 pub fn _1(self) -> &'a mut W {
163 self.variant(IEN_A::_1)
164 }
165}
166#[doc = "Field `IED` reader - Input Data Endian"]
167pub type IED_R = crate::BitReader<IED_A>;
168#[doc = "Input Data Endian\n\nValue on reset: 0"]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum IED_A {
171 #[doc = "0: Endian formats 1 are the same between the CPU and input data."]
172 _0 = 0,
173 #[doc = "1: Endian formats 1 are different between the CPU and input data."]
174 _1 = 1,
175}
176impl From<IED_A> for bool {
177 #[inline(always)]
178 fn from(variant: IED_A) -> Self {
179 variant as u8 != 0
180 }
181}
182impl IED_R {
183 #[doc = "Get enumerated values variant"]
184 #[inline(always)]
185 pub fn variant(&self) -> IED_A {
186 match self.bits {
187 false => IED_A::_0,
188 true => IED_A::_1,
189 }
190 }
191 #[doc = "Checks if the value of the field is `_0`"]
192 #[inline(always)]
193 pub fn is_0(&self) -> bool {
194 *self == IED_A::_0
195 }
196 #[doc = "Checks if the value of the field is `_1`"]
197 #[inline(always)]
198 pub fn is_1(&self) -> bool {
199 *self == IED_A::_1
200 }
201}
202#[doc = "Field `IED` writer - Input Data Endian"]
203pub type IED_W<'a, const O: u8> = crate::BitWriter<'a, u16, SRCIDCTRL_SPEC, IED_A, O>;
204impl<'a, const O: u8> IED_W<'a, O> {
205 #[doc = "Endian formats 1 are the same between the CPU and input data."]
206 #[inline(always)]
207 pub fn _0(self) -> &'a mut W {
208 self.variant(IED_A::_0)
209 }
210 #[doc = "Endian formats 1 are different between the CPU and input data."]
211 #[inline(always)]
212 pub fn _1(self) -> &'a mut W {
213 self.variant(IED_A::_1)
214 }
215}
216impl R {
217 #[doc = "Bits 0:1 - Input FIFO Data Triggering Number"]
218 #[inline(always)]
219 pub fn iftrg(&self) -> IFTRG_R {
220 IFTRG_R::new((self.bits & 3) as u8)
221 }
222 #[doc = "Bit 8 - Input FIFO Empty Interrupt Enable"]
223 #[inline(always)]
224 pub fn ien(&self) -> IEN_R {
225 IEN_R::new(((self.bits >> 8) & 1) != 0)
226 }
227 #[doc = "Bit 9 - Input Data Endian"]
228 #[inline(always)]
229 pub fn ied(&self) -> IED_R {
230 IED_R::new(((self.bits >> 9) & 1) != 0)
231 }
232}
233impl W {
234 #[doc = "Bits 0:1 - Input FIFO Data Triggering Number"]
235 #[inline(always)]
236 #[must_use]
237 pub fn iftrg(&mut self) -> IFTRG_W<0> {
238 IFTRG_W::new(self)
239 }
240 #[doc = "Bit 8 - Input FIFO Empty Interrupt Enable"]
241 #[inline(always)]
242 #[must_use]
243 pub fn ien(&mut self) -> IEN_W<8> {
244 IEN_W::new(self)
245 }
246 #[doc = "Bit 9 - Input Data Endian"]
247 #[inline(always)]
248 #[must_use]
249 pub fn ied(&mut self) -> IED_W<9> {
250 IED_W::new(self)
251 }
252 #[doc = "Writes raw bits to the register."]
253 #[inline(always)]
254 pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
255 self.0.bits(bits);
256 self
257 }
258}
259#[doc = "Input Data Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [srcidctrl](index.html) module"]
260pub struct SRCIDCTRL_SPEC;
261impl crate::RegisterSpec for SRCIDCTRL_SPEC {
262 type Ux = u16;
263}
264#[doc = "`read()` method returns [srcidctrl::R](R) reader structure"]
265impl crate::Readable for SRCIDCTRL_SPEC {
266 type Reader = R;
267}
268#[doc = "`write(|w| ..)` method takes [srcidctrl::W](W) writer structure"]
269impl crate::Writable for SRCIDCTRL_SPEC {
270 type Writer = W;
271 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
272 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
273}
274#[doc = "`reset()` method sets SRCIDCTRL to value 0"]
275impl crate::Resettable for SRCIDCTRL_SPEC {
276 const RESET_VALUE: Self::Ux = 0;
277}