ra6e2_pac/
bus.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:10:15 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Bus Control"]
28unsafe impl ::core::marker::Send for super::Bus {}
29unsafe impl ::core::marker::Sync for super::Bus {}
30impl super::Bus {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Slave Bus Control Register"]
38    #[inline(always)]
39    pub const fn busscntfhbiu(
40        &self,
41    ) -> &'static crate::common::Reg<self::Busscntfhbiu_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Busscntfhbiu_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(4352usize),
45            )
46        }
47    }
48
49    #[doc = "Slave Bus Control Register"]
50    #[inline(always)]
51    pub const fn busscntflbiu(
52        &self,
53    ) -> &'static crate::common::Reg<self::Busscntflbiu_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Busscntflbiu_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(4356usize),
57            )
58        }
59    }
60
61    #[doc = "Slave Bus Control Register"]
62    #[inline(always)]
63    pub const fn busscnts0biu(
64        &self,
65    ) -> &'static crate::common::Reg<self::Busscnts0Biu_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Busscnts0Biu_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(4368usize),
69            )
70        }
71    }
72
73    #[doc = "Slave Bus Control Register"]
74    #[inline(always)]
75    pub const fn busscntpsbiu(
76        &self,
77    ) -> &'static crate::common::Reg<self::Busscntpsbiu_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Busscntpsbiu_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(4384usize),
81            )
82        }
83    }
84
85    #[doc = "Slave Bus Control Register"]
86    #[inline(always)]
87    pub const fn busscntplbiu(
88        &self,
89    ) -> &'static crate::common::Reg<self::Busscntplbiu_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Busscntplbiu_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(4400usize),
93            )
94        }
95    }
96
97    #[doc = "Slave Bus Control Register"]
98    #[inline(always)]
99    pub const fn busscntphbiu(
100        &self,
101    ) -> &'static crate::common::Reg<self::Busscntphbiu_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Busscntphbiu_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(4404usize),
105            )
106        }
107    }
108
109    #[doc = "Slave Bus Control Register"]
110    #[inline(always)]
111    pub const fn busscnteqbiu(
112        &self,
113    ) -> &'static crate::common::Reg<self::Busscnteqbiu_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::Busscnteqbiu_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(4416usize),
117            )
118        }
119    }
120
121    #[doc = "BUS Error Address Register"]
122    #[inline(always)]
123    pub const fn buserradd(
124        &self,
125    ) -> &'static crate::common::ClusterRegisterArray<
126        crate::common::Reg<self::Buserradd_SPEC, crate::common::R>,
127        3,
128        0x10,
129    > {
130        unsafe {
131            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1800usize))
132        }
133    }
134    #[inline(always)]
135    pub const fn bus1erradd(
136        &self,
137    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
138        unsafe {
139            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
140                self._svd2pac_as_ptr().add(0x1800usize),
141            )
142        }
143    }
144    #[inline(always)]
145    pub const fn bus2erradd(
146        &self,
147    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
148        unsafe {
149            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
150                self._svd2pac_as_ptr().add(0x1810usize),
151            )
152        }
153    }
154    #[inline(always)]
155    pub const fn bus3erradd(
156        &self,
157    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
158        unsafe {
159            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
160                self._svd2pac_as_ptr().add(0x1820usize),
161            )
162        }
163    }
164
165    #[doc = "BUS Error Read Write Register"]
166    #[inline(always)]
167    pub const fn buserrrw(
168        &self,
169    ) -> &'static crate::common::ClusterRegisterArray<
170        crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW>,
171        3,
172        0x10,
173    > {
174        unsafe {
175            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1804usize))
176        }
177    }
178    #[inline(always)]
179    pub const fn bus1errrw(
180        &self,
181    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW> {
182        unsafe {
183            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::RW>::from_ptr(
184                self._svd2pac_as_ptr().add(0x1804usize),
185            )
186        }
187    }
188    #[inline(always)]
189    pub const fn bus2errrw(
190        &self,
191    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW> {
192        unsafe {
193            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::RW>::from_ptr(
194                self._svd2pac_as_ptr().add(0x1814usize),
195            )
196        }
197    }
198    #[inline(always)]
199    pub const fn bus3errrw(
200        &self,
201    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(0x1824usize),
205            )
206        }
207    }
208
209    #[doc = "BUS TZF Error Address Register"]
210    #[inline(always)]
211    pub const fn btzferradd(
212        &self,
213    ) -> &'static crate::common::ClusterRegisterArray<
214        crate::common::Reg<self::Btzferradd_SPEC, crate::common::R>,
215        3,
216        0x10,
217    > {
218        unsafe {
219            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1900usize))
220        }
221    }
222    #[inline(always)]
223    pub const fn btzf1erradd(
224        &self,
225    ) -> &'static crate::common::Reg<self::Btzferradd_SPEC, crate::common::R> {
226        unsafe {
227            crate::common::Reg::<self::Btzferradd_SPEC, crate::common::R>::from_ptr(
228                self._svd2pac_as_ptr().add(0x1900usize),
229            )
230        }
231    }
232    #[inline(always)]
233    pub const fn btzf2erradd(
234        &self,
235    ) -> &'static crate::common::Reg<self::Btzferradd_SPEC, crate::common::R> {
236        unsafe {
237            crate::common::Reg::<self::Btzferradd_SPEC, crate::common::R>::from_ptr(
238                self._svd2pac_as_ptr().add(0x1910usize),
239            )
240        }
241    }
242    #[inline(always)]
243    pub const fn btzf3erradd(
244        &self,
245    ) -> &'static crate::common::Reg<self::Btzferradd_SPEC, crate::common::R> {
246        unsafe {
247            crate::common::Reg::<self::Btzferradd_SPEC, crate::common::R>::from_ptr(
248                self._svd2pac_as_ptr().add(0x1920usize),
249            )
250        }
251    }
252
253    #[doc = "BUS TZF Error Read Write Register"]
254    #[inline(always)]
255    pub const fn btzferrrw(
256        &self,
257    ) -> &'static crate::common::ClusterRegisterArray<
258        crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW>,
259        3,
260        0x10,
261    > {
262        unsafe {
263            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1904usize))
264        }
265    }
266    #[inline(always)]
267    pub const fn btzf1errrw(
268        &self,
269    ) -> &'static crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW> {
270        unsafe {
271            crate::common::Reg::<self::Btzferrrw_SPEC, crate::common::RW>::from_ptr(
272                self._svd2pac_as_ptr().add(0x1904usize),
273            )
274        }
275    }
276    #[inline(always)]
277    pub const fn btzf2errrw(
278        &self,
279    ) -> &'static crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Btzferrrw_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(0x1914usize),
283            )
284        }
285    }
286    #[inline(always)]
287    pub const fn btzf3errrw(
288        &self,
289    ) -> &'static crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW> {
290        unsafe {
291            crate::common::Reg::<self::Btzferrrw_SPEC, crate::common::RW>::from_ptr(
292                self._svd2pac_as_ptr().add(0x1924usize),
293            )
294        }
295    }
296
297    #[doc = "BUS Error Status Register %s"]
298    #[inline(always)]
299    pub const fn buserrstat(
300        &self,
301    ) -> &'static crate::common::ClusterRegisterArray<
302        crate::common::Reg<self::Buserrstat_SPEC, crate::common::R>,
303        3,
304        0x10,
305    > {
306        unsafe {
307            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a00usize))
308        }
309    }
310    #[inline(always)]
311    pub const fn bus1errstat(
312        &self,
313    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
314        unsafe {
315            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
316                self._svd2pac_as_ptr().add(0x1a00usize),
317            )
318        }
319    }
320    #[inline(always)]
321    pub const fn bus2errstat(
322        &self,
323    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
324        unsafe {
325            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
326                self._svd2pac_as_ptr().add(0x1a10usize),
327            )
328        }
329    }
330    #[inline(always)]
331    pub const fn bus3errstat(
332        &self,
333    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
334        unsafe {
335            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
336                self._svd2pac_as_ptr().add(0x1a20usize),
337            )
338        }
339    }
340
341    #[doc = "BUS Error Clear Register %s"]
342    #[inline(always)]
343    pub const fn buserrclr(
344        &self,
345    ) -> &'static crate::common::ClusterRegisterArray<
346        crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW>,
347        3,
348        0x10,
349    > {
350        unsafe {
351            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a08usize))
352        }
353    }
354    #[inline(always)]
355    pub const fn bus1errclr(
356        &self,
357    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
358        unsafe {
359            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
360                self._svd2pac_as_ptr().add(0x1a08usize),
361            )
362        }
363    }
364    #[inline(always)]
365    pub const fn bus2errclr(
366        &self,
367    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
368        unsafe {
369            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
370                self._svd2pac_as_ptr().add(0x1a18usize),
371            )
372        }
373    }
374    #[inline(always)]
375    pub const fn bus3errclr(
376        &self,
377    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
378        unsafe {
379            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
380                self._svd2pac_as_ptr().add(0x1a28usize),
381            )
382        }
383    }
384
385    #[doc = "DMAC/DTC Error Status Register"]
386    #[inline(always)]
387    pub const fn dmacdtcerrstat(
388        &self,
389    ) -> &'static crate::common::Reg<self::Dmacdtcerrstat_SPEC, crate::common::R> {
390        unsafe {
391            crate::common::Reg::<self::Dmacdtcerrstat_SPEC, crate::common::R>::from_ptr(
392                self._svd2pac_as_ptr().add(6692usize),
393            )
394        }
395    }
396
397    #[doc = "DMAC/DTC Error Clear Register"]
398    #[inline(always)]
399    pub const fn dmacdtcerrclr(
400        &self,
401    ) -> &'static crate::common::Reg<self::Dmacdtcerrclr_SPEC, crate::common::RW> {
402        unsafe {
403            crate::common::Reg::<self::Dmacdtcerrclr_SPEC, crate::common::RW>::from_ptr(
404                self._svd2pac_as_ptr().add(6700usize),
405            )
406        }
407    }
408}
409#[doc(hidden)]
410#[derive(Copy, Clone, Eq, PartialEq)]
411pub struct Busscntfhbiu_SPEC;
412impl crate::sealed::RegSpec for Busscntfhbiu_SPEC {
413    type DataType = u16;
414}
415
416#[doc = "Slave Bus Control Register"]
417pub type Busscntfhbiu = crate::RegValueT<Busscntfhbiu_SPEC>;
418
419impl Busscntfhbiu {
420    #[doc = "Arbitration Select for two masters"]
421    #[inline(always)]
422    pub fn arbs(
423        self,
424    ) -> crate::common::RegisterField<
425        0,
426        0x3,
427        1,
428        0,
429        busscntfhbiu::Arbs,
430        busscntfhbiu::Arbs,
431        Busscntfhbiu_SPEC,
432        crate::common::RW,
433    > {
434        crate::common::RegisterField::<
435            0,
436            0x3,
437            1,
438            0,
439            busscntfhbiu::Arbs,
440            busscntfhbiu::Arbs,
441            Busscntfhbiu_SPEC,
442            crate::common::RW,
443        >::from_register(self, 0)
444    }
445}
446impl ::core::default::Default for Busscntfhbiu {
447    #[inline(always)]
448    fn default() -> Busscntfhbiu {
449        <crate::RegValueT<Busscntfhbiu_SPEC> as RegisterValue<_>>::new(0)
450    }
451}
452pub mod busscntfhbiu {
453
454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
455    pub struct Arbs_SPEC;
456    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
457    impl Arbs {
458        #[doc = "DMAC/DTC > CPU"]
459        pub const _00: Self = Self::new(0);
460
461        #[doc = "DMAC/DTC ↔ CPU"]
462        pub const _01: Self = Self::new(1);
463    }
464}
465#[doc(hidden)]
466#[derive(Copy, Clone, Eq, PartialEq)]
467pub struct Busscntflbiu_SPEC;
468impl crate::sealed::RegSpec for Busscntflbiu_SPEC {
469    type DataType = u16;
470}
471
472#[doc = "Slave Bus Control Register"]
473pub type Busscntflbiu = crate::RegValueT<Busscntflbiu_SPEC>;
474
475impl Busscntflbiu {
476    #[doc = "Arbitration Select for two masters"]
477    #[inline(always)]
478    pub fn arbs(
479        self,
480    ) -> crate::common::RegisterField<
481        0,
482        0x3,
483        1,
484        0,
485        busscntflbiu::Arbs,
486        busscntflbiu::Arbs,
487        Busscntflbiu_SPEC,
488        crate::common::RW,
489    > {
490        crate::common::RegisterField::<
491            0,
492            0x3,
493            1,
494            0,
495            busscntflbiu::Arbs,
496            busscntflbiu::Arbs,
497            Busscntflbiu_SPEC,
498            crate::common::RW,
499        >::from_register(self, 0)
500    }
501}
502impl ::core::default::Default for Busscntflbiu {
503    #[inline(always)]
504    fn default() -> Busscntflbiu {
505        <crate::RegValueT<Busscntflbiu_SPEC> as RegisterValue<_>>::new(0)
506    }
507}
508pub mod busscntflbiu {
509
510    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
511    pub struct Arbs_SPEC;
512    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
513    impl Arbs {
514        #[doc = "DMAC/DTC > CPU"]
515        pub const _00: Self = Self::new(0);
516
517        #[doc = "DMAC/DTC ↔ CPU"]
518        pub const _01: Self = Self::new(1);
519    }
520}
521#[doc(hidden)]
522#[derive(Copy, Clone, Eq, PartialEq)]
523pub struct Busscnts0Biu_SPEC;
524impl crate::sealed::RegSpec for Busscnts0Biu_SPEC {
525    type DataType = u16;
526}
527
528#[doc = "Slave Bus Control Register"]
529pub type Busscnts0Biu = crate::RegValueT<Busscnts0Biu_SPEC>;
530
531impl Busscnts0Biu {
532    #[doc = "Arbitration Select for two masters"]
533    #[inline(always)]
534    pub fn arbs(
535        self,
536    ) -> crate::common::RegisterField<
537        0,
538        0x3,
539        1,
540        0,
541        busscnts0biu::Arbs,
542        busscnts0biu::Arbs,
543        Busscnts0Biu_SPEC,
544        crate::common::RW,
545    > {
546        crate::common::RegisterField::<
547            0,
548            0x3,
549            1,
550            0,
551            busscnts0biu::Arbs,
552            busscnts0biu::Arbs,
553            Busscnts0Biu_SPEC,
554            crate::common::RW,
555        >::from_register(self, 0)
556    }
557}
558impl ::core::default::Default for Busscnts0Biu {
559    #[inline(always)]
560    fn default() -> Busscnts0Biu {
561        <crate::RegValueT<Busscnts0Biu_SPEC> as RegisterValue<_>>::new(0)
562    }
563}
564pub mod busscnts0biu {
565
566    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
567    pub struct Arbs_SPEC;
568    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
569    impl Arbs {
570        #[doc = "DMAC/DTC > CPU"]
571        pub const _00: Self = Self::new(0);
572
573        #[doc = "DMAC/DTC ↔ CPU"]
574        pub const _01: Self = Self::new(1);
575    }
576}
577#[doc(hidden)]
578#[derive(Copy, Clone, Eq, PartialEq)]
579pub struct Busscntpsbiu_SPEC;
580impl crate::sealed::RegSpec for Busscntpsbiu_SPEC {
581    type DataType = u16;
582}
583
584#[doc = "Slave Bus Control Register"]
585pub type Busscntpsbiu = crate::RegValueT<Busscntpsbiu_SPEC>;
586
587impl Busscntpsbiu {
588    #[doc = "Arbitration Select for two masters"]
589    #[inline(always)]
590    pub fn arbs(
591        self,
592    ) -> crate::common::RegisterField<
593        0,
594        0x1,
595        1,
596        0,
597        busscntpsbiu::Arbs,
598        busscntpsbiu::Arbs,
599        Busscntpsbiu_SPEC,
600        crate::common::RW,
601    > {
602        crate::common::RegisterField::<
603            0,
604            0x1,
605            1,
606            0,
607            busscntpsbiu::Arbs,
608            busscntpsbiu::Arbs,
609            Busscntpsbiu_SPEC,
610            crate::common::RW,
611        >::from_register(self, 0)
612    }
613}
614impl ::core::default::Default for Busscntpsbiu {
615    #[inline(always)]
616    fn default() -> Busscntpsbiu {
617        <crate::RegValueT<Busscntpsbiu_SPEC> as RegisterValue<_>>::new(0)
618    }
619}
620pub mod busscntpsbiu {
621
622    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
623    pub struct Arbs_SPEC;
624    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
625    impl Arbs {
626        #[doc = "DMAC/DTC > CPU"]
627        pub const _0: Self = Self::new(0);
628
629        #[doc = "DMAC/DTC ↔ CPU"]
630        pub const _1: Self = Self::new(1);
631    }
632}
633#[doc(hidden)]
634#[derive(Copy, Clone, Eq, PartialEq)]
635pub struct Busscntplbiu_SPEC;
636impl crate::sealed::RegSpec for Busscntplbiu_SPEC {
637    type DataType = u16;
638}
639
640#[doc = "Slave Bus Control Register"]
641pub type Busscntplbiu = crate::RegValueT<Busscntplbiu_SPEC>;
642
643impl Busscntplbiu {
644    #[doc = "Arbitration Select for two masters"]
645    #[inline(always)]
646    pub fn arbs(
647        self,
648    ) -> crate::common::RegisterField<
649        0,
650        0x1,
651        1,
652        0,
653        busscntplbiu::Arbs,
654        busscntplbiu::Arbs,
655        Busscntplbiu_SPEC,
656        crate::common::RW,
657    > {
658        crate::common::RegisterField::<
659            0,
660            0x1,
661            1,
662            0,
663            busscntplbiu::Arbs,
664            busscntplbiu::Arbs,
665            Busscntplbiu_SPEC,
666            crate::common::RW,
667        >::from_register(self, 0)
668    }
669}
670impl ::core::default::Default for Busscntplbiu {
671    #[inline(always)]
672    fn default() -> Busscntplbiu {
673        <crate::RegValueT<Busscntplbiu_SPEC> as RegisterValue<_>>::new(0)
674    }
675}
676pub mod busscntplbiu {
677
678    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
679    pub struct Arbs_SPEC;
680    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
681    impl Arbs {
682        #[doc = "DMAC/DTC > CPU"]
683        pub const _0: Self = Self::new(0);
684
685        #[doc = "DMAC/DTC ↔ CPU"]
686        pub const _1: Self = Self::new(1);
687    }
688}
689#[doc(hidden)]
690#[derive(Copy, Clone, Eq, PartialEq)]
691pub struct Busscntphbiu_SPEC;
692impl crate::sealed::RegSpec for Busscntphbiu_SPEC {
693    type DataType = u16;
694}
695
696#[doc = "Slave Bus Control Register"]
697pub type Busscntphbiu = crate::RegValueT<Busscntphbiu_SPEC>;
698
699impl Busscntphbiu {
700    #[doc = "Arbitration Select for two masters"]
701    #[inline(always)]
702    pub fn arbs(
703        self,
704    ) -> crate::common::RegisterField<
705        0,
706        0x1,
707        1,
708        0,
709        busscntphbiu::Arbs,
710        busscntphbiu::Arbs,
711        Busscntphbiu_SPEC,
712        crate::common::RW,
713    > {
714        crate::common::RegisterField::<
715            0,
716            0x1,
717            1,
718            0,
719            busscntphbiu::Arbs,
720            busscntphbiu::Arbs,
721            Busscntphbiu_SPEC,
722            crate::common::RW,
723        >::from_register(self, 0)
724    }
725}
726impl ::core::default::Default for Busscntphbiu {
727    #[inline(always)]
728    fn default() -> Busscntphbiu {
729        <crate::RegValueT<Busscntphbiu_SPEC> as RegisterValue<_>>::new(0)
730    }
731}
732pub mod busscntphbiu {
733
734    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
735    pub struct Arbs_SPEC;
736    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
737    impl Arbs {
738        #[doc = "DMAC/DTC > CPU"]
739        pub const _0: Self = Self::new(0);
740
741        #[doc = "DMAC/DTC ↔ CPU"]
742        pub const _1: Self = Self::new(1);
743    }
744}
745#[doc(hidden)]
746#[derive(Copy, Clone, Eq, PartialEq)]
747pub struct Busscnteqbiu_SPEC;
748impl crate::sealed::RegSpec for Busscnteqbiu_SPEC {
749    type DataType = u16;
750}
751
752#[doc = "Slave Bus Control Register"]
753pub type Busscnteqbiu = crate::RegValueT<Busscnteqbiu_SPEC>;
754
755impl Busscnteqbiu {
756    #[doc = "Arbitration Select for two masters"]
757    #[inline(always)]
758    pub fn arbs(
759        self,
760    ) -> crate::common::RegisterField<
761        0,
762        0x3,
763        1,
764        0,
765        busscnteqbiu::Arbs,
766        busscnteqbiu::Arbs,
767        Busscnteqbiu_SPEC,
768        crate::common::RW,
769    > {
770        crate::common::RegisterField::<
771            0,
772            0x3,
773            1,
774            0,
775            busscnteqbiu::Arbs,
776            busscnteqbiu::Arbs,
777            Busscnteqbiu_SPEC,
778            crate::common::RW,
779        >::from_register(self, 0)
780    }
781}
782impl ::core::default::Default for Busscnteqbiu {
783    #[inline(always)]
784    fn default() -> Busscnteqbiu {
785        <crate::RegValueT<Busscnteqbiu_SPEC> as RegisterValue<_>>::new(0)
786    }
787}
788pub mod busscnteqbiu {
789
790    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
791    pub struct Arbs_SPEC;
792    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
793    impl Arbs {
794        #[doc = "DMAC/DTC > CPU"]
795        pub const _00: Self = Self::new(0);
796
797        #[doc = "DMAC/DTC ↔ CPU"]
798        pub const _01: Self = Self::new(1);
799    }
800}
801#[doc(hidden)]
802#[derive(Copy, Clone, Eq, PartialEq)]
803pub struct Buserradd_SPEC;
804impl crate::sealed::RegSpec for Buserradd_SPEC {
805    type DataType = u32;
806}
807
808#[doc = "BUS Error Address Register"]
809pub type Buserradd = crate::RegValueT<Buserradd_SPEC>;
810
811impl Buserradd {
812    #[doc = "Bus Error Address"]
813    #[inline(always)]
814    pub fn berad(
815        self,
816    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Buserradd_SPEC, crate::common::R>
817    {
818        crate::common::RegisterField::<
819            0,
820            0xffffffff,
821            1,
822            0,
823            u32,
824            u32,
825            Buserradd_SPEC,
826            crate::common::R,
827        >::from_register(self, 0)
828    }
829}
830impl ::core::default::Default for Buserradd {
831    #[inline(always)]
832    fn default() -> Buserradd {
833        <crate::RegValueT<Buserradd_SPEC> as RegisterValue<_>>::new(0)
834    }
835}
836
837#[doc(hidden)]
838#[derive(Copy, Clone, Eq, PartialEq)]
839pub struct Buserrrw_SPEC;
840impl crate::sealed::RegSpec for Buserrrw_SPEC {
841    type DataType = u8;
842}
843
844#[doc = "BUS Error Read Write Register"]
845pub type Buserrrw = crate::RegValueT<Buserrrw_SPEC>;
846
847impl Buserrrw {
848    #[doc = "Error Access Read/Write Status"]
849    #[inline(always)]
850    pub fn rwstat(
851        self,
852    ) -> crate::common::RegisterField<
853        0,
854        0x1,
855        1,
856        0,
857        buserrrw::Rwstat,
858        buserrrw::Rwstat,
859        Buserrrw_SPEC,
860        crate::common::R,
861    > {
862        crate::common::RegisterField::<
863            0,
864            0x1,
865            1,
866            0,
867            buserrrw::Rwstat,
868            buserrrw::Rwstat,
869            Buserrrw_SPEC,
870            crate::common::R,
871        >::from_register(self, 0)
872    }
873}
874impl ::core::default::Default for Buserrrw {
875    #[inline(always)]
876    fn default() -> Buserrrw {
877        <crate::RegValueT<Buserrrw_SPEC> as RegisterValue<_>>::new(0)
878    }
879}
880pub mod buserrrw {
881
882    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
883    pub struct Rwstat_SPEC;
884    pub type Rwstat = crate::EnumBitfieldStruct<u8, Rwstat_SPEC>;
885    impl Rwstat {
886        #[doc = "Read access"]
887        pub const _0: Self = Self::new(0);
888
889        #[doc = "Write access"]
890        pub const _1: Self = Self::new(1);
891    }
892}
893#[doc(hidden)]
894#[derive(Copy, Clone, Eq, PartialEq)]
895pub struct Btzferradd_SPEC;
896impl crate::sealed::RegSpec for Btzferradd_SPEC {
897    type DataType = u32;
898}
899
900#[doc = "BUS TZF Error Address Register"]
901pub type Btzferradd = crate::RegValueT<Btzferradd_SPEC>;
902
903impl Btzferradd {
904    #[doc = "Bus TrustZone Filter Error Address"]
905    #[inline(always)]
906    pub fn btzferad(
907        self,
908    ) -> crate::common::RegisterField<
909        0,
910        0xffffffff,
911        1,
912        0,
913        u32,
914        u32,
915        Btzferradd_SPEC,
916        crate::common::R,
917    > {
918        crate::common::RegisterField::<
919            0,
920            0xffffffff,
921            1,
922            0,
923            u32,
924            u32,
925            Btzferradd_SPEC,
926            crate::common::R,
927        >::from_register(self, 0)
928    }
929}
930impl ::core::default::Default for Btzferradd {
931    #[inline(always)]
932    fn default() -> Btzferradd {
933        <crate::RegValueT<Btzferradd_SPEC> as RegisterValue<_>>::new(0)
934    }
935}
936
937#[doc(hidden)]
938#[derive(Copy, Clone, Eq, PartialEq)]
939pub struct Btzferrrw_SPEC;
940impl crate::sealed::RegSpec for Btzferrrw_SPEC {
941    type DataType = u8;
942}
943
944#[doc = "BUS TZF Error Read Write Register"]
945pub type Btzferrrw = crate::RegValueT<Btzferrrw_SPEC>;
946
947impl Btzferrrw {
948    #[doc = "TrustZone filter error access Read/Write Status"]
949    #[inline(always)]
950    pub fn trwstat(
951        self,
952    ) -> crate::common::RegisterField<
953        0,
954        0x1,
955        1,
956        0,
957        btzferrrw::Trwstat,
958        btzferrrw::Trwstat,
959        Btzferrrw_SPEC,
960        crate::common::R,
961    > {
962        crate::common::RegisterField::<
963            0,
964            0x1,
965            1,
966            0,
967            btzferrrw::Trwstat,
968            btzferrrw::Trwstat,
969            Btzferrrw_SPEC,
970            crate::common::R,
971        >::from_register(self, 0)
972    }
973}
974impl ::core::default::Default for Btzferrrw {
975    #[inline(always)]
976    fn default() -> Btzferrrw {
977        <crate::RegValueT<Btzferrrw_SPEC> as RegisterValue<_>>::new(0)
978    }
979}
980pub mod btzferrrw {
981
982    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
983    pub struct Trwstat_SPEC;
984    pub type Trwstat = crate::EnumBitfieldStruct<u8, Trwstat_SPEC>;
985    impl Trwstat {
986        #[doc = "Read access"]
987        pub const _0: Self = Self::new(0);
988
989        #[doc = "Write access"]
990        pub const _1: Self = Self::new(1);
991    }
992}
993#[doc(hidden)]
994#[derive(Copy, Clone, Eq, PartialEq)]
995pub struct Buserrstat_SPEC;
996impl crate::sealed::RegSpec for Buserrstat_SPEC {
997    type DataType = u8;
998}
999
1000#[doc = "BUS Error Status Register %s"]
1001pub type Buserrstat = crate::RegValueT<Buserrstat_SPEC>;
1002
1003impl Buserrstat {
1004    #[doc = "Slave bus Error Status"]
1005    #[inline(always)]
1006    pub fn slerrstat(
1007        self,
1008    ) -> crate::common::RegisterField<
1009        0,
1010        0x1,
1011        1,
1012        0,
1013        buserrstat::Slerrstat,
1014        buserrstat::Slerrstat,
1015        Buserrstat_SPEC,
1016        crate::common::R,
1017    > {
1018        crate::common::RegisterField::<
1019            0,
1020            0x1,
1021            1,
1022            0,
1023            buserrstat::Slerrstat,
1024            buserrstat::Slerrstat,
1025            Buserrstat_SPEC,
1026            crate::common::R,
1027        >::from_register(self, 0)
1028    }
1029
1030    #[doc = "Slave TrustZone filter Error Status"]
1031    #[inline(always)]
1032    pub fn sterrstat(
1033        self,
1034    ) -> crate::common::RegisterField<
1035        1,
1036        0x1,
1037        1,
1038        0,
1039        buserrstat::Sterrstat,
1040        buserrstat::Sterrstat,
1041        Buserrstat_SPEC,
1042        crate::common::R,
1043    > {
1044        crate::common::RegisterField::<
1045            1,
1046            0x1,
1047            1,
1048            0,
1049            buserrstat::Sterrstat,
1050            buserrstat::Sterrstat,
1051            Buserrstat_SPEC,
1052            crate::common::R,
1053        >::from_register(self, 0)
1054    }
1055
1056    #[doc = "Master MPU Error Status"]
1057    #[inline(always)]
1058    pub fn mmerrstat(
1059        self,
1060    ) -> crate::common::RegisterField<
1061        3,
1062        0x1,
1063        1,
1064        0,
1065        buserrstat::Mmerrstat,
1066        buserrstat::Mmerrstat,
1067        Buserrstat_SPEC,
1068        crate::common::R,
1069    > {
1070        crate::common::RegisterField::<
1071            3,
1072            0x1,
1073            1,
1074            0,
1075            buserrstat::Mmerrstat,
1076            buserrstat::Mmerrstat,
1077            Buserrstat_SPEC,
1078            crate::common::R,
1079        >::from_register(self, 0)
1080    }
1081
1082    #[doc = "Illegal address access Error Status"]
1083    #[inline(always)]
1084    pub fn ilerrstat(
1085        self,
1086    ) -> crate::common::RegisterField<
1087        4,
1088        0x1,
1089        1,
1090        0,
1091        buserrstat::Ilerrstat,
1092        buserrstat::Ilerrstat,
1093        Buserrstat_SPEC,
1094        crate::common::R,
1095    > {
1096        crate::common::RegisterField::<
1097            4,
1098            0x1,
1099            1,
1100            0,
1101            buserrstat::Ilerrstat,
1102            buserrstat::Ilerrstat,
1103            Buserrstat_SPEC,
1104            crate::common::R,
1105        >::from_register(self, 0)
1106    }
1107}
1108impl ::core::default::Default for Buserrstat {
1109    #[inline(always)]
1110    fn default() -> Buserrstat {
1111        <crate::RegValueT<Buserrstat_SPEC> as RegisterValue<_>>::new(0)
1112    }
1113}
1114pub mod buserrstat {
1115
1116    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1117    pub struct Slerrstat_SPEC;
1118    pub type Slerrstat = crate::EnumBitfieldStruct<u8, Slerrstat_SPEC>;
1119    impl Slerrstat {
1120        #[doc = "No error occurred"]
1121        pub const _0: Self = Self::new(0);
1122
1123        #[doc = "Error occurred"]
1124        pub const _1: Self = Self::new(1);
1125    }
1126    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1127    pub struct Sterrstat_SPEC;
1128    pub type Sterrstat = crate::EnumBitfieldStruct<u8, Sterrstat_SPEC>;
1129    impl Sterrstat {
1130        #[doc = "No error occurred"]
1131        pub const _0: Self = Self::new(0);
1132
1133        #[doc = "Error occurred"]
1134        pub const _1: Self = Self::new(1);
1135    }
1136    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1137    pub struct Mmerrstat_SPEC;
1138    pub type Mmerrstat = crate::EnumBitfieldStruct<u8, Mmerrstat_SPEC>;
1139    impl Mmerrstat {
1140        #[doc = "No error occurred"]
1141        pub const _0: Self = Self::new(0);
1142
1143        #[doc = "Error occurred"]
1144        pub const _1: Self = Self::new(1);
1145    }
1146    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1147    pub struct Ilerrstat_SPEC;
1148    pub type Ilerrstat = crate::EnumBitfieldStruct<u8, Ilerrstat_SPEC>;
1149    impl Ilerrstat {
1150        #[doc = "No error occurred"]
1151        pub const _0: Self = Self::new(0);
1152
1153        #[doc = "Error occurred"]
1154        pub const _1: Self = Self::new(1);
1155    }
1156}
1157#[doc(hidden)]
1158#[derive(Copy, Clone, Eq, PartialEq)]
1159pub struct Buserrclr_SPEC;
1160impl crate::sealed::RegSpec for Buserrclr_SPEC {
1161    type DataType = u8;
1162}
1163
1164#[doc = "BUS Error Clear Register %s"]
1165pub type Buserrclr = crate::RegValueT<Buserrclr_SPEC>;
1166
1167impl Buserrclr {
1168    #[doc = "Slave bus Error Clear"]
1169    #[inline(always)]
1170    pub fn slerrclr(
1171        self,
1172    ) -> crate::common::RegisterFieldBool<0, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1173        crate::common::RegisterFieldBool::<0,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1174    }
1175
1176    #[doc = "Slave TrustZone filter Error Clear"]
1177    #[inline(always)]
1178    pub fn sterrclr(
1179        self,
1180    ) -> crate::common::RegisterFieldBool<1, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1181        crate::common::RegisterFieldBool::<1,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1182    }
1183
1184    #[doc = "Master MPU Error Clear"]
1185    #[inline(always)]
1186    pub fn mmerrclr(
1187        self,
1188    ) -> crate::common::RegisterFieldBool<3, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1189        crate::common::RegisterFieldBool::<3,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1190    }
1191
1192    #[doc = "Illegal Address Access Error Clear"]
1193    #[inline(always)]
1194    pub fn ilerrclr(
1195        self,
1196    ) -> crate::common::RegisterFieldBool<4, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1197        crate::common::RegisterFieldBool::<4,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1198    }
1199}
1200impl ::core::default::Default for Buserrclr {
1201    #[inline(always)]
1202    fn default() -> Buserrclr {
1203        <crate::RegValueT<Buserrclr_SPEC> as RegisterValue<_>>::new(0)
1204    }
1205}
1206
1207#[doc(hidden)]
1208#[derive(Copy, Clone, Eq, PartialEq)]
1209pub struct Dmacdtcerrstat_SPEC;
1210impl crate::sealed::RegSpec for Dmacdtcerrstat_SPEC {
1211    type DataType = u8;
1212}
1213
1214#[doc = "DMAC/DTC Error Status Register"]
1215pub type Dmacdtcerrstat = crate::RegValueT<Dmacdtcerrstat_SPEC>;
1216
1217impl Dmacdtcerrstat {
1218    #[doc = "Master TrustZone Filter Error Status"]
1219    #[inline(always)]
1220    pub fn mterrstat(
1221        self,
1222    ) -> crate::common::RegisterField<
1223        0,
1224        0x1,
1225        1,
1226        0,
1227        dmacdtcerrstat::Mterrstat,
1228        dmacdtcerrstat::Mterrstat,
1229        Dmacdtcerrstat_SPEC,
1230        crate::common::R,
1231    > {
1232        crate::common::RegisterField::<
1233            0,
1234            0x1,
1235            1,
1236            0,
1237            dmacdtcerrstat::Mterrstat,
1238            dmacdtcerrstat::Mterrstat,
1239            Dmacdtcerrstat_SPEC,
1240            crate::common::R,
1241        >::from_register(self, 0)
1242    }
1243}
1244impl ::core::default::Default for Dmacdtcerrstat {
1245    #[inline(always)]
1246    fn default() -> Dmacdtcerrstat {
1247        <crate::RegValueT<Dmacdtcerrstat_SPEC> as RegisterValue<_>>::new(0)
1248    }
1249}
1250pub mod dmacdtcerrstat {
1251
1252    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1253    pub struct Mterrstat_SPEC;
1254    pub type Mterrstat = crate::EnumBitfieldStruct<u8, Mterrstat_SPEC>;
1255    impl Mterrstat {
1256        #[doc = "No error occurred"]
1257        pub const _0: Self = Self::new(0);
1258
1259        #[doc = "Error occurred"]
1260        pub const _1: Self = Self::new(1);
1261    }
1262}
1263#[doc(hidden)]
1264#[derive(Copy, Clone, Eq, PartialEq)]
1265pub struct Dmacdtcerrclr_SPEC;
1266impl crate::sealed::RegSpec for Dmacdtcerrclr_SPEC {
1267    type DataType = u8;
1268}
1269
1270#[doc = "DMAC/DTC Error Clear Register"]
1271pub type Dmacdtcerrclr = crate::RegValueT<Dmacdtcerrclr_SPEC>;
1272
1273impl Dmacdtcerrclr {
1274    #[doc = "Master TrustZone filter Error Clear"]
1275    #[inline(always)]
1276    pub fn mterrclr(
1277        self,
1278    ) -> crate::common::RegisterFieldBool<0, 1, 0, Dmacdtcerrclr_SPEC, crate::common::RW> {
1279        crate::common::RegisterFieldBool::<0,1,0,Dmacdtcerrclr_SPEC,crate::common::RW>::from_register(self,0)
1280    }
1281}
1282impl ::core::default::Default for Dmacdtcerrclr {
1283    #[inline(always)]
1284    fn default() -> Dmacdtcerrclr {
1285        <crate::RegValueT<Dmacdtcerrclr_SPEC> as RegisterValue<_>>::new(0)
1286    }
1287}
ra6e2_pac/bus.rs

ra6e2_pac/
bus.rs
