ra6e1/sci2/
fcr.rs

1#[doc = "Register `FCR` reader"]
2pub struct R(crate::R<FCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `FCR` writer"]
17pub struct W(crate::W<FCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<FCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<FCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<FCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `FM` reader - FIFO Mode Select"]
38pub type FM_R = crate::BitReader<FM_A>;
39#[doc = "FIFO Mode Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum FM_A {
42    #[doc = "0: Non-FIFO mode. Selects TDR/RDR or TDRHL/RDRHL for communication."]
43    _0 = 0,
44    #[doc = "1: FIFO mode. Selects FTDRHL/FRDRHL for communication."]
45    _1 = 1,
46}
47impl From<FM_A> for bool {
48    #[inline(always)]
49    fn from(variant: FM_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl FM_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> FM_A {
57        match self.bits {
58            false => FM_A::_0,
59            true => FM_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == FM_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == FM_A::_1
71    }
72}
73#[doc = "Field `FM` writer - FIFO Mode Select"]
74pub type FM_W<'a, const O: u8> = crate::BitWriter<'a, u16, FCR_SPEC, FM_A, O>;
75impl<'a, const O: u8> FM_W<'a, O> {
76    #[doc = "Non-FIFO mode. Selects TDR/RDR or TDRHL/RDRHL for communication."]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(FM_A::_0)
80    }
81    #[doc = "FIFO mode. Selects FTDRHL/FRDRHL for communication."]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(FM_A::_1)
85    }
86}
87#[doc = "Field `RFRST` reader - Receive FIFO Data Register Reset"]
88pub type RFRST_R = crate::BitReader<RFRST_A>;
89#[doc = "Receive FIFO Data Register Reset\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum RFRST_A {
92    #[doc = "0: Do not reset FRDRHL"]
93    _0 = 0,
94    #[doc = "1: Reset FRDRHL"]
95    _1 = 1,
96}
97impl From<RFRST_A> for bool {
98    #[inline(always)]
99    fn from(variant: RFRST_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl RFRST_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> RFRST_A {
107        match self.bits {
108            false => RFRST_A::_0,
109            true => RFRST_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == RFRST_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == RFRST_A::_1
121    }
122}
123#[doc = "Field `RFRST` writer - Receive FIFO Data Register Reset"]
124pub type RFRST_W<'a, const O: u8> = crate::BitWriter<'a, u16, FCR_SPEC, RFRST_A, O>;
125impl<'a, const O: u8> RFRST_W<'a, O> {
126    #[doc = "Do not reset FRDRHL"]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(RFRST_A::_0)
130    }
131    #[doc = "Reset FRDRHL"]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(RFRST_A::_1)
135    }
136}
137#[doc = "Field `TFRST` reader - Transmit FIFO Data Register Reset"]
138pub type TFRST_R = crate::BitReader<TFRST_A>;
139#[doc = "Transmit FIFO Data Register Reset\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum TFRST_A {
142    #[doc = "0: Do not reset FTDRHL"]
143    _0 = 0,
144    #[doc = "1: Reset FTDRHL"]
145    _1 = 1,
146}
147impl From<TFRST_A> for bool {
148    #[inline(always)]
149    fn from(variant: TFRST_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl TFRST_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> TFRST_A {
157        match self.bits {
158            false => TFRST_A::_0,
159            true => TFRST_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == TFRST_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == TFRST_A::_1
171    }
172}
173#[doc = "Field `TFRST` writer - Transmit FIFO Data Register Reset"]
174pub type TFRST_W<'a, const O: u8> = crate::BitWriter<'a, u16, FCR_SPEC, TFRST_A, O>;
175impl<'a, const O: u8> TFRST_W<'a, O> {
176    #[doc = "Do not reset FTDRHL"]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(TFRST_A::_0)
180    }
181    #[doc = "Reset FTDRHL"]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(TFRST_A::_1)
185    }
186}
187#[doc = "Field `DRES` reader - Receive Data Ready Error Select"]
188pub type DRES_R = crate::BitReader<DRES_A>;
189#[doc = "Receive Data Ready Error Select\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum DRES_A {
192    #[doc = "0: Receive data full interrupt (SCIn_RXI)"]
193    _0 = 0,
194    #[doc = "1: Receive error interrupt (SCIn_ERI)"]
195    _1 = 1,
196}
197impl From<DRES_A> for bool {
198    #[inline(always)]
199    fn from(variant: DRES_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl DRES_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> DRES_A {
207        match self.bits {
208            false => DRES_A::_0,
209            true => DRES_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == DRES_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == DRES_A::_1
221    }
222}
223#[doc = "Field `DRES` writer - Receive Data Ready Error Select"]
224pub type DRES_W<'a, const O: u8> = crate::BitWriter<'a, u16, FCR_SPEC, DRES_A, O>;
225impl<'a, const O: u8> DRES_W<'a, O> {
226    #[doc = "Receive data full interrupt (SCIn_RXI)"]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(DRES_A::_0)
230    }
231    #[doc = "Receive error interrupt (SCIn_ERI)"]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(DRES_A::_1)
235    }
236}
237#[doc = "Field `TTRG` reader - Transmit FIFO Data Trigger Number"]
238pub type TTRG_R = crate::FieldReader<u8, u8>;
239#[doc = "Field `TTRG` writer - Transmit FIFO Data Trigger Number"]
240pub type TTRG_W<'a, const O: u8> = crate::FieldWriter<'a, u16, FCR_SPEC, u8, u8, 4, O>;
241#[doc = "Field `RTRG` reader - Receive FIFO Data Trigger Number"]
242pub type RTRG_R = crate::FieldReader<u8, u8>;
243#[doc = "Field `RTRG` writer - Receive FIFO Data Trigger Number"]
244pub type RTRG_W<'a, const O: u8> = crate::FieldWriter<'a, u16, FCR_SPEC, u8, u8, 4, O>;
245#[doc = "Field `RSTRG` reader - RTS Output Active Trigger Number Select"]
246pub type RSTRG_R = crate::FieldReader<u8, u8>;
247#[doc = "Field `RSTRG` writer - RTS Output Active Trigger Number Select"]
248pub type RSTRG_W<'a, const O: u8> = crate::FieldWriter<'a, u16, FCR_SPEC, u8, u8, 4, O>;
249impl R {
250    #[doc = "Bit 0 - FIFO Mode Select"]
251    #[inline(always)]
252    pub fn fm(&self) -> FM_R {
253        FM_R::new((self.bits & 1) != 0)
254    }
255    #[doc = "Bit 1 - Receive FIFO Data Register Reset"]
256    #[inline(always)]
257    pub fn rfrst(&self) -> RFRST_R {
258        RFRST_R::new(((self.bits >> 1) & 1) != 0)
259    }
260    #[doc = "Bit 2 - Transmit FIFO Data Register Reset"]
261    #[inline(always)]
262    pub fn tfrst(&self) -> TFRST_R {
263        TFRST_R::new(((self.bits >> 2) & 1) != 0)
264    }
265    #[doc = "Bit 3 - Receive Data Ready Error Select"]
266    #[inline(always)]
267    pub fn dres(&self) -> DRES_R {
268        DRES_R::new(((self.bits >> 3) & 1) != 0)
269    }
270    #[doc = "Bits 4:7 - Transmit FIFO Data Trigger Number"]
271    #[inline(always)]
272    pub fn ttrg(&self) -> TTRG_R {
273        TTRG_R::new(((self.bits >> 4) & 0x0f) as u8)
274    }
275    #[doc = "Bits 8:11 - Receive FIFO Data Trigger Number"]
276    #[inline(always)]
277    pub fn rtrg(&self) -> RTRG_R {
278        RTRG_R::new(((self.bits >> 8) & 0x0f) as u8)
279    }
280    #[doc = "Bits 12:15 - RTS Output Active Trigger Number Select"]
281    #[inline(always)]
282    pub fn rstrg(&self) -> RSTRG_R {
283        RSTRG_R::new(((self.bits >> 12) & 0x0f) as u8)
284    }
285}
286impl W {
287    #[doc = "Bit 0 - FIFO Mode Select"]
288    #[inline(always)]
289    #[must_use]
290    pub fn fm(&mut self) -> FM_W<0> {
291        FM_W::new(self)
292    }
293    #[doc = "Bit 1 - Receive FIFO Data Register Reset"]
294    #[inline(always)]
295    #[must_use]
296    pub fn rfrst(&mut self) -> RFRST_W<1> {
297        RFRST_W::new(self)
298    }
299    #[doc = "Bit 2 - Transmit FIFO Data Register Reset"]
300    #[inline(always)]
301    #[must_use]
302    pub fn tfrst(&mut self) -> TFRST_W<2> {
303        TFRST_W::new(self)
304    }
305    #[doc = "Bit 3 - Receive Data Ready Error Select"]
306    #[inline(always)]
307    #[must_use]
308    pub fn dres(&mut self) -> DRES_W<3> {
309        DRES_W::new(self)
310    }
311    #[doc = "Bits 4:7 - Transmit FIFO Data Trigger Number"]
312    #[inline(always)]
313    #[must_use]
314    pub fn ttrg(&mut self) -> TTRG_W<4> {
315        TTRG_W::new(self)
316    }
317    #[doc = "Bits 8:11 - Receive FIFO Data Trigger Number"]
318    #[inline(always)]
319    #[must_use]
320    pub fn rtrg(&mut self) -> RTRG_W<8> {
321        RTRG_W::new(self)
322    }
323    #[doc = "Bits 12:15 - RTS Output Active Trigger Number Select"]
324    #[inline(always)]
325    #[must_use]
326    pub fn rstrg(&mut self) -> RSTRG_W<12> {
327        RSTRG_W::new(self)
328    }
329    #[doc = "Writes raw bits to the register."]
330    #[inline(always)]
331    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
332        self.0.bits(bits);
333        self
334    }
335}
336#[doc = "FIFO Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fcr](index.html) module"]
337pub struct FCR_SPEC;
338impl crate::RegisterSpec for FCR_SPEC {
339    type Ux = u16;
340}
341#[doc = "`read()` method returns [fcr::R](R) reader structure"]
342impl crate::Readable for FCR_SPEC {
343    type Reader = R;
344}
345#[doc = "`write(|w| ..)` method takes [fcr::W](W) writer structure"]
346impl crate::Writable for FCR_SPEC {
347    type Writer = W;
348    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
349    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
350}
351#[doc = "`reset()` method sets FCR to value 0xf800"]
352impl crate::Resettable for FCR_SPEC {
353    const RESET_VALUE: Self::Ux = 0xf800;
354}
ra6e1/sci2/fcr.rs

ra6e1/sci2/
fcr.rs
