ra6e1/sci3/
tdrhl_man.rs

1#[doc = "Register `TDRHL_MAN` reader"]
2pub struct R(crate::R<TDRHL_MAN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TDRHL_MAN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TDRHL_MAN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TDRHL_MAN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TDRHL_MAN` writer"]
17pub struct W(crate::W<TDRHL_MAN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TDRHL_MAN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TDRHL_MAN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TDRHL_MAN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TDAT` reader - Serial transmit data"]
38pub type TDAT_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `TDAT` writer - Serial transmit data"]
40pub type TDAT_W<'a, const O: u8> = crate::FieldWriter<'a, u16, TDRHL_MAN_SPEC, u16, u16, 9, O>;
41#[doc = "Field `MPBT` reader - Multi-processor transfer bit flag"]
42pub type MPBT_R = crate::BitReader<MPBT_A>;
43#[doc = "Multi-processor transfer bit flag\n\nValue on reset: 1"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45pub enum MPBT_A {
46    #[doc = "0: Data transmission cycles"]
47    _0 = 0,
48    #[doc = "1: ID transmission cycles"]
49    _1 = 1,
50}
51impl From<MPBT_A> for bool {
52    #[inline(always)]
53    fn from(variant: MPBT_A) -> Self {
54        variant as u8 != 0
55    }
56}
57impl MPBT_R {
58    #[doc = "Get enumerated values variant"]
59    #[inline(always)]
60    pub fn variant(&self) -> MPBT_A {
61        match self.bits {
62            false => MPBT_A::_0,
63            true => MPBT_A::_1,
64        }
65    }
66    #[doc = "Checks if the value of the field is `_0`"]
67    #[inline(always)]
68    pub fn is_0(&self) -> bool {
69        *self == MPBT_A::_0
70    }
71    #[doc = "Checks if the value of the field is `_1`"]
72    #[inline(always)]
73    pub fn is_1(&self) -> bool {
74        *self == MPBT_A::_1
75    }
76}
77#[doc = "Field `MPBT` writer - Multi-processor transfer bit flag"]
78pub type MPBT_W<'a, const O: u8> = crate::BitWriter<'a, u16, TDRHL_MAN_SPEC, MPBT_A, O>;
79impl<'a, const O: u8> MPBT_W<'a, O> {
80    #[doc = "Data transmission cycles"]
81    #[inline(always)]
82    pub fn _0(self) -> &'a mut W {
83        self.variant(MPBT_A::_0)
84    }
85    #[doc = "ID transmission cycles"]
86    #[inline(always)]
87    pub fn _1(self) -> &'a mut W {
88        self.variant(MPBT_A::_1)
89    }
90}
91#[doc = "Field `TSYNC` reader - Transmit SYNC data bit"]
92pub type TSYNC_R = crate::BitReader<TSYNC_A>;
93#[doc = "Transmit SYNC data bit\n\nValue on reset: 1"]
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95pub enum TSYNC_A {
96    #[doc = "0: The Start Bit is transmitted as DATA SYNC."]
97    _0 = 0,
98    #[doc = "1: The Start Bit is transmitted as COMMAND SYNC."]
99    _1 = 1,
100}
101impl From<TSYNC_A> for bool {
102    #[inline(always)]
103    fn from(variant: TSYNC_A) -> Self {
104        variant as u8 != 0
105    }
106}
107impl TSYNC_R {
108    #[doc = "Get enumerated values variant"]
109    #[inline(always)]
110    pub fn variant(&self) -> TSYNC_A {
111        match self.bits {
112            false => TSYNC_A::_0,
113            true => TSYNC_A::_1,
114        }
115    }
116    #[doc = "Checks if the value of the field is `_0`"]
117    #[inline(always)]
118    pub fn is_0(&self) -> bool {
119        *self == TSYNC_A::_0
120    }
121    #[doc = "Checks if the value of the field is `_1`"]
122    #[inline(always)]
123    pub fn is_1(&self) -> bool {
124        *self == TSYNC_A::_1
125    }
126}
127#[doc = "Field `TSYNC` writer - Transmit SYNC data bit"]
128pub type TSYNC_W<'a, const O: u8> = crate::BitWriter<'a, u16, TDRHL_MAN_SPEC, TSYNC_A, O>;
129impl<'a, const O: u8> TSYNC_W<'a, O> {
130    #[doc = "The Start Bit is transmitted as DATA SYNC."]
131    #[inline(always)]
132    pub fn _0(self) -> &'a mut W {
133        self.variant(TSYNC_A::_0)
134    }
135    #[doc = "The Start Bit is transmitted as COMMAND SYNC."]
136    #[inline(always)]
137    pub fn _1(self) -> &'a mut W {
138        self.variant(TSYNC_A::_1)
139    }
140}
141impl R {
142    #[doc = "Bits 0:8 - Serial transmit data"]
143    #[inline(always)]
144    pub fn tdat(&self) -> TDAT_R {
145        TDAT_R::new(self.bits & 0x01ff)
146    }
147    #[doc = "Bit 9 - Multi-processor transfer bit flag"]
148    #[inline(always)]
149    pub fn mpbt(&self) -> MPBT_R {
150        MPBT_R::new(((self.bits >> 9) & 1) != 0)
151    }
152    #[doc = "Bit 12 - Transmit SYNC data bit"]
153    #[inline(always)]
154    pub fn tsync(&self) -> TSYNC_R {
155        TSYNC_R::new(((self.bits >> 12) & 1) != 0)
156    }
157}
158impl W {
159    #[doc = "Bits 0:8 - Serial transmit data"]
160    #[inline(always)]
161    #[must_use]
162    pub fn tdat(&mut self) -> TDAT_W<0> {
163        TDAT_W::new(self)
164    }
165    #[doc = "Bit 9 - Multi-processor transfer bit flag"]
166    #[inline(always)]
167    #[must_use]
168    pub fn mpbt(&mut self) -> MPBT_W<9> {
169        MPBT_W::new(self)
170    }
171    #[doc = "Bit 12 - Transmit SYNC data bit"]
172    #[inline(always)]
173    #[must_use]
174    pub fn tsync(&mut self) -> TSYNC_W<12> {
175        TSYNC_W::new(self)
176    }
177    #[doc = "Writes raw bits to the register."]
178    #[inline(always)]
179    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
180        self.0.bits(bits);
181        self
182    }
183}
184#[doc = "Transmit Data Register for Manchester mode (MMR.MANEN = 1)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tdrhl_man](index.html) module"]
185pub struct TDRHL_MAN_SPEC;
186impl crate::RegisterSpec for TDRHL_MAN_SPEC {
187    type Ux = u16;
188}
189#[doc = "`read()` method returns [tdrhl_man::R](R) reader structure"]
190impl crate::Readable for TDRHL_MAN_SPEC {
191    type Reader = R;
192}
193#[doc = "`write(|w| ..)` method takes [tdrhl_man::W](W) writer structure"]
194impl crate::Writable for TDRHL_MAN_SPEC {
195    type Writer = W;
196    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
197    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
198}
199#[doc = "`reset()` method sets TDRHL_MAN to value 0xffff"]
200impl crate::Resettable for TDRHL_MAN_SPEC {
201    const RESET_VALUE: Self::Ux = 0xffff;
202}
ra6e1/sci3/tdrhl_man.rs

ra6e1/sci3/
tdrhl_man.rs
