1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Standby Control Register"]
38 #[inline(always)]
39 pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(12usize),
43 )
44 }
45 }
46
47 #[doc = "System Clock Division Control Register"]
48 #[inline(always)]
49 pub const fn sckdivcr(
50 &self,
51 ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(32usize),
55 )
56 }
57 }
58
59 #[doc = "System Clock Source Control Register"]
60 #[inline(always)]
61 pub const fn sckscr(
62 &self,
63 ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
64 unsafe {
65 crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
66 self._svd2pac_as_ptr().add(38usize),
67 )
68 }
69 }
70
71 #[doc = "PLL Clock Control Register"]
72 #[inline(always)]
73 pub const fn pllccr(
74 &self,
75 ) -> &'static crate::common::Reg<self::Pllccr_SPEC, crate::common::RW> {
76 unsafe {
77 crate::common::Reg::<self::Pllccr_SPEC, crate::common::RW>::from_ptr(
78 self._svd2pac_as_ptr().add(40usize),
79 )
80 }
81 }
82
83 #[doc = "PLL Control Register"]
84 #[inline(always)]
85 pub const fn pllcr(&self) -> &'static crate::common::Reg<self::Pllcr_SPEC, crate::common::RW> {
86 unsafe {
87 crate::common::Reg::<self::Pllcr_SPEC, crate::common::RW>::from_ptr(
88 self._svd2pac_as_ptr().add(42usize),
89 )
90 }
91 }
92
93 #[doc = "Main Clock Oscillator Control Register"]
94 #[inline(always)]
95 pub const fn mosccr(
96 &self,
97 ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
98 unsafe {
99 crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
100 self._svd2pac_as_ptr().add(50usize),
101 )
102 }
103 }
104
105 #[doc = "High-Speed On-Chip Oscillator Control Register"]
106 #[inline(always)]
107 pub const fn hococr(
108 &self,
109 ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
110 unsafe {
111 crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
112 self._svd2pac_as_ptr().add(54usize),
113 )
114 }
115 }
116
117 #[doc = "High-Speed On-Chip Oscillator Control Register 2"]
118 #[inline(always)]
119 pub const fn hococr2(
120 &self,
121 ) -> &'static crate::common::Reg<self::Hococr2_SPEC, crate::common::RW> {
122 unsafe {
123 crate::common::Reg::<self::Hococr2_SPEC, crate::common::RW>::from_ptr(
124 self._svd2pac_as_ptr().add(55usize),
125 )
126 }
127 }
128
129 #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
130 #[inline(always)]
131 pub const fn mococr(
132 &self,
133 ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
134 unsafe {
135 crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
136 self._svd2pac_as_ptr().add(56usize),
137 )
138 }
139 }
140
141 #[doc = "FLL Control Register 1"]
142 #[inline(always)]
143 pub const fn fllcr1(
144 &self,
145 ) -> &'static crate::common::Reg<self::Fllcr1_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::Fllcr1_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(57usize),
149 )
150 }
151 }
152
153 #[doc = "FLL Control Register 2"]
154 #[inline(always)]
155 pub const fn fllcr2(
156 &self,
157 ) -> &'static crate::common::Reg<self::Fllcr2_SPEC, crate::common::RW> {
158 unsafe {
159 crate::common::Reg::<self::Fllcr2_SPEC, crate::common::RW>::from_ptr(
160 self._svd2pac_as_ptr().add(58usize),
161 )
162 }
163 }
164
165 #[doc = "Oscillation Stabilization Flag Register"]
166 #[inline(always)]
167 pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
168 unsafe {
169 crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
170 self._svd2pac_as_ptr().add(60usize),
171 )
172 }
173 }
174
175 #[doc = "Clock Out Control Register"]
176 #[inline(always)]
177 pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
178 unsafe {
179 crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
180 self._svd2pac_as_ptr().add(62usize),
181 )
182 }
183 }
184
185 #[doc = "Trace Clock Control Register"]
186 #[inline(always)]
187 pub const fn trckcr(
188 &self,
189 ) -> &'static crate::common::Reg<self::Trckcr_SPEC, crate::common::RW> {
190 unsafe {
191 crate::common::Reg::<self::Trckcr_SPEC, crate::common::RW>::from_ptr(
192 self._svd2pac_as_ptr().add(63usize),
193 )
194 }
195 }
196
197 #[doc = "Oscillation Stop Detection Control Register"]
198 #[inline(always)]
199 pub const fn ostdcr(
200 &self,
201 ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
202 unsafe {
203 crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
204 self._svd2pac_as_ptr().add(64usize),
205 )
206 }
207 }
208
209 #[doc = "Oscillation Stop Detection Status Register"]
210 #[inline(always)]
211 pub const fn ostdsr(
212 &self,
213 ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
214 unsafe {
215 crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
216 self._svd2pac_as_ptr().add(65usize),
217 )
218 }
219 }
220
221 #[doc = "PLL2 Clock Control Register"]
222 #[inline(always)]
223 pub const fn pll2ccr(
224 &self,
225 ) -> &'static crate::common::Reg<self::Pll2Ccr_SPEC, crate::common::RW> {
226 unsafe {
227 crate::common::Reg::<self::Pll2Ccr_SPEC, crate::common::RW>::from_ptr(
228 self._svd2pac_as_ptr().add(72usize),
229 )
230 }
231 }
232
233 #[doc = "PLL2 Control Register"]
234 #[inline(always)]
235 pub const fn pll2cr(
236 &self,
237 ) -> &'static crate::common::Reg<self::Pll2Cr_SPEC, crate::common::RW> {
238 unsafe {
239 crate::common::Reg::<self::Pll2Cr_SPEC, crate::common::RW>::from_ptr(
240 self._svd2pac_as_ptr().add(74usize),
241 )
242 }
243 }
244
245 #[doc = "MOCO User Trimming Control Register"]
246 #[inline(always)]
247 pub const fn mocoutcr(
248 &self,
249 ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
250 unsafe {
251 crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
252 self._svd2pac_as_ptr().add(97usize),
253 )
254 }
255 }
256
257 #[doc = "HOCO User Trimming Control Register"]
258 #[inline(always)]
259 pub const fn hocoutcr(
260 &self,
261 ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
262 unsafe {
263 crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
264 self._svd2pac_as_ptr().add(98usize),
265 )
266 }
267 }
268
269 #[doc = "USB Clock Division Control Register"]
270 #[inline(always)]
271 pub const fn usbckdivcr(
272 &self,
273 ) -> &'static crate::common::Reg<self::Usbckdivcr_SPEC, crate::common::RW> {
274 unsafe {
275 crate::common::Reg::<self::Usbckdivcr_SPEC, crate::common::RW>::from_ptr(
276 self._svd2pac_as_ptr().add(108usize),
277 )
278 }
279 }
280
281 #[doc = "USB Clock Control Register"]
282 #[inline(always)]
283 pub const fn usbckcr(
284 &self,
285 ) -> &'static crate::common::Reg<self::Usbckcr_SPEC, crate::common::RW> {
286 unsafe {
287 crate::common::Reg::<self::Usbckcr_SPEC, crate::common::RW>::from_ptr(
288 self._svd2pac_as_ptr().add(116usize),
289 )
290 }
291 }
292
293 #[doc = "Snooze Request Control Register 1"]
294 #[inline(always)]
295 pub const fn snzreqcr1(
296 &self,
297 ) -> &'static crate::common::Reg<self::Snzreqcr1_SPEC, crate::common::RW> {
298 unsafe {
299 crate::common::Reg::<self::Snzreqcr1_SPEC, crate::common::RW>::from_ptr(
300 self._svd2pac_as_ptr().add(136usize),
301 )
302 }
303 }
304
305 #[doc = "Snooze Control Register"]
306 #[inline(always)]
307 pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
308 unsafe {
309 crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
310 self._svd2pac_as_ptr().add(146usize),
311 )
312 }
313 }
314
315 #[doc = "Snooze End Control Register 0"]
316 #[inline(always)]
317 pub const fn snzedcr0(
318 &self,
319 ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
320 unsafe {
321 crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
322 self._svd2pac_as_ptr().add(148usize),
323 )
324 }
325 }
326
327 #[doc = "Snooze End Control Register 1"]
328 #[inline(always)]
329 pub const fn snzedcr1(
330 &self,
331 ) -> &'static crate::common::Reg<self::Snzedcr1_SPEC, crate::common::RW> {
332 unsafe {
333 crate::common::Reg::<self::Snzedcr1_SPEC, crate::common::RW>::from_ptr(
334 self._svd2pac_as_ptr().add(149usize),
335 )
336 }
337 }
338
339 #[doc = "Snooze Request Control Register 0"]
340 #[inline(always)]
341 pub const fn snzreqcr0(
342 &self,
343 ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
344 unsafe {
345 crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
346 self._svd2pac_as_ptr().add(152usize),
347 )
348 }
349 }
350
351 #[doc = "Operating Power Control Register"]
352 #[inline(always)]
353 pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
354 unsafe {
355 crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
356 self._svd2pac_as_ptr().add(160usize),
357 )
358 }
359 }
360
361 #[doc = "Main Clock Oscillator Wait Control Register"]
362 #[inline(always)]
363 pub const fn moscwtcr(
364 &self,
365 ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
366 unsafe {
367 crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
368 self._svd2pac_as_ptr().add(162usize),
369 )
370 }
371 }
372
373 #[doc = "Sub Operating Power Control Register"]
374 #[inline(always)]
375 pub const fn sopccr(
376 &self,
377 ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
378 unsafe {
379 crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
380 self._svd2pac_as_ptr().add(170usize),
381 )
382 }
383 }
384
385 #[doc = "Reset Status Register 1"]
386 #[inline(always)]
387 pub const fn rstsr1(
388 &self,
389 ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
390 unsafe {
391 crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
392 self._svd2pac_as_ptr().add(192usize),
393 )
394 }
395 }
396
397 #[doc = "Voltage Monitor 1 Circuit Control Register 1"]
398 #[inline(always)]
399 pub const fn lvd1cr1(
400 &self,
401 ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
402 unsafe {
403 crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
404 self._svd2pac_as_ptr().add(224usize),
405 )
406 }
407 }
408
409 #[doc = "Voltage Monitor 1 Circuit Status Register"]
410 #[inline(always)]
411 pub const fn lvd1sr(
412 &self,
413 ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
414 unsafe {
415 crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
416 self._svd2pac_as_ptr().add(225usize),
417 )
418 }
419 }
420
421 #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
422 #[inline(always)]
423 pub const fn lvd2cr1(
424 &self,
425 ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
426 unsafe {
427 crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
428 self._svd2pac_as_ptr().add(226usize),
429 )
430 }
431 }
432
433 #[doc = "Voltage Monitor 2 Circuit Status Register"]
434 #[inline(always)]
435 pub const fn lvd2sr(
436 &self,
437 ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
438 unsafe {
439 crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
440 self._svd2pac_as_ptr().add(227usize),
441 )
442 }
443 }
444
445 #[doc = "Clock Generation Function Security Attribute Register"]
446 #[inline(always)]
447 pub const fn cgfsar(
448 &self,
449 ) -> &'static crate::common::Reg<self::Cgfsar_SPEC, crate::common::RW> {
450 unsafe {
451 crate::common::Reg::<self::Cgfsar_SPEC, crate::common::RW>::from_ptr(
452 self._svd2pac_as_ptr().add(960usize),
453 )
454 }
455 }
456
457 #[doc = "Reset Security Attribution Register"]
458 #[inline(always)]
459 pub const fn rstsar(
460 &self,
461 ) -> &'static crate::common::Reg<self::Rstsar_SPEC, crate::common::RW> {
462 unsafe {
463 crate::common::Reg::<self::Rstsar_SPEC, crate::common::RW>::from_ptr(
464 self._svd2pac_as_ptr().add(964usize),
465 )
466 }
467 }
468
469 #[doc = "Low Power Mode Security Attribution Register"]
470 #[inline(always)]
471 pub const fn lpmsar(
472 &self,
473 ) -> &'static crate::common::Reg<self::Lpmsar_SPEC, crate::common::RW> {
474 unsafe {
475 crate::common::Reg::<self::Lpmsar_SPEC, crate::common::RW>::from_ptr(
476 self._svd2pac_as_ptr().add(968usize),
477 )
478 }
479 }
480
481 #[doc = "Low Voltage Detection Security Attribution Register"]
482 #[inline(always)]
483 pub const fn lvdsar(
484 &self,
485 ) -> &'static crate::common::Reg<self::Lvdsar_SPEC, crate::common::RW> {
486 unsafe {
487 crate::common::Reg::<self::Lvdsar_SPEC, crate::common::RW>::from_ptr(
488 self._svd2pac_as_ptr().add(972usize),
489 )
490 }
491 }
492
493 #[doc = "Battery Backup Function Security Attribute Register"]
494 #[inline(always)]
495 pub const fn bbfsar(
496 &self,
497 ) -> &'static crate::common::Reg<self::Bbfsar_SPEC, crate::common::RW> {
498 unsafe {
499 crate::common::Reg::<self::Bbfsar_SPEC, crate::common::RW>::from_ptr(
500 self._svd2pac_as_ptr().add(976usize),
501 )
502 }
503 }
504
505 #[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
506 #[inline(always)]
507 pub const fn dpfsar(
508 &self,
509 ) -> &'static crate::common::Reg<self::Dpfsar_SPEC, crate::common::RW> {
510 unsafe {
511 crate::common::Reg::<self::Dpfsar_SPEC, crate::common::RW>::from_ptr(
512 self._svd2pac_as_ptr().add(992usize),
513 )
514 }
515 }
516
517 #[doc = "Protect Register"]
518 #[inline(always)]
519 pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
520 unsafe {
521 crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
522 self._svd2pac_as_ptr().add(1022usize),
523 )
524 }
525 }
526
527 #[doc = "Deep Software Standby Control Register"]
528 #[inline(always)]
529 pub const fn dpsbycr(
530 &self,
531 ) -> &'static crate::common::Reg<self::Dpsbycr_SPEC, crate::common::RW> {
532 unsafe {
533 crate::common::Reg::<self::Dpsbycr_SPEC, crate::common::RW>::from_ptr(
534 self._svd2pac_as_ptr().add(1024usize),
535 )
536 }
537 }
538
539 #[doc = "Deep Software Standby Wait Control Register"]
540 #[inline(always)]
541 pub const fn dpswcr(
542 &self,
543 ) -> &'static crate::common::Reg<self::Dpswcr_SPEC, crate::common::RW> {
544 unsafe {
545 crate::common::Reg::<self::Dpswcr_SPEC, crate::common::RW>::from_ptr(
546 self._svd2pac_as_ptr().add(1025usize),
547 )
548 }
549 }
550
551 #[doc = "Deep Software Standby Interrupt Enable Register 0"]
552 #[inline(always)]
553 pub const fn dpsier0(
554 &self,
555 ) -> &'static crate::common::Reg<self::Dpsier0_SPEC, crate::common::RW> {
556 unsafe {
557 crate::common::Reg::<self::Dpsier0_SPEC, crate::common::RW>::from_ptr(
558 self._svd2pac_as_ptr().add(1026usize),
559 )
560 }
561 }
562
563 #[doc = "Deep Software Standby Interrupt Enable Register 1"]
564 #[inline(always)]
565 pub const fn dpsier1(
566 &self,
567 ) -> &'static crate::common::Reg<self::Dpsier1_SPEC, crate::common::RW> {
568 unsafe {
569 crate::common::Reg::<self::Dpsier1_SPEC, crate::common::RW>::from_ptr(
570 self._svd2pac_as_ptr().add(1027usize),
571 )
572 }
573 }
574
575 #[doc = "Deep Software Standby Interrupt Enable Register 2"]
576 #[inline(always)]
577 pub const fn dpsier2(
578 &self,
579 ) -> &'static crate::common::Reg<self::Dpsier2_SPEC, crate::common::RW> {
580 unsafe {
581 crate::common::Reg::<self::Dpsier2_SPEC, crate::common::RW>::from_ptr(
582 self._svd2pac_as_ptr().add(1028usize),
583 )
584 }
585 }
586
587 #[doc = "Deep Software Standby Interrupt Enable Register 3"]
588 #[inline(always)]
589 pub const fn dpsier3(
590 &self,
591 ) -> &'static crate::common::Reg<self::Dpsier3_SPEC, crate::common::RW> {
592 unsafe {
593 crate::common::Reg::<self::Dpsier3_SPEC, crate::common::RW>::from_ptr(
594 self._svd2pac_as_ptr().add(1029usize),
595 )
596 }
597 }
598
599 #[doc = "Deep Software Standby Interrupt Flag Register 0"]
600 #[inline(always)]
601 pub const fn dpsifr0(
602 &self,
603 ) -> &'static crate::common::Reg<self::Dpsifr0_SPEC, crate::common::RW> {
604 unsafe {
605 crate::common::Reg::<self::Dpsifr0_SPEC, crate::common::RW>::from_ptr(
606 self._svd2pac_as_ptr().add(1030usize),
607 )
608 }
609 }
610
611 #[doc = "Deep Software Standby Interrupt Flag Register 1"]
612 #[inline(always)]
613 pub const fn dpsifr1(
614 &self,
615 ) -> &'static crate::common::Reg<self::Dpsifr1_SPEC, crate::common::RW> {
616 unsafe {
617 crate::common::Reg::<self::Dpsifr1_SPEC, crate::common::RW>::from_ptr(
618 self._svd2pac_as_ptr().add(1031usize),
619 )
620 }
621 }
622
623 #[doc = "Deep Software Standby Interrupt Flag Register 2"]
624 #[inline(always)]
625 pub const fn dpsifr2(
626 &self,
627 ) -> &'static crate::common::Reg<self::Dpsifr2_SPEC, crate::common::RW> {
628 unsafe {
629 crate::common::Reg::<self::Dpsifr2_SPEC, crate::common::RW>::from_ptr(
630 self._svd2pac_as_ptr().add(1032usize),
631 )
632 }
633 }
634
635 #[doc = "Deep Software Standby Interrupt Flag Register 3"]
636 #[inline(always)]
637 pub const fn dpsifr3(
638 &self,
639 ) -> &'static crate::common::Reg<self::Dpsifr3_SPEC, crate::common::RW> {
640 unsafe {
641 crate::common::Reg::<self::Dpsifr3_SPEC, crate::common::RW>::from_ptr(
642 self._svd2pac_as_ptr().add(1033usize),
643 )
644 }
645 }
646
647 #[doc = "Deep Software Standby Interrupt Edge Register 0"]
648 #[inline(always)]
649 pub const fn dpsiegr0(
650 &self,
651 ) -> &'static crate::common::Reg<self::Dpsiegr0_SPEC, crate::common::RW> {
652 unsafe {
653 crate::common::Reg::<self::Dpsiegr0_SPEC, crate::common::RW>::from_ptr(
654 self._svd2pac_as_ptr().add(1034usize),
655 )
656 }
657 }
658
659 #[doc = "Deep Software Standby Interrupt Edge Register 1"]
660 #[inline(always)]
661 pub const fn dpsiegr1(
662 &self,
663 ) -> &'static crate::common::Reg<self::Dpsiegr1_SPEC, crate::common::RW> {
664 unsafe {
665 crate::common::Reg::<self::Dpsiegr1_SPEC, crate::common::RW>::from_ptr(
666 self._svd2pac_as_ptr().add(1035usize),
667 )
668 }
669 }
670
671 #[doc = "Deep Software Standby Interrupt Edge Register 2"]
672 #[inline(always)]
673 pub const fn dpsiegr2(
674 &self,
675 ) -> &'static crate::common::Reg<self::Dpsiegr2_SPEC, crate::common::RW> {
676 unsafe {
677 crate::common::Reg::<self::Dpsiegr2_SPEC, crate::common::RW>::from_ptr(
678 self._svd2pac_as_ptr().add(1036usize),
679 )
680 }
681 }
682
683 #[doc = "System Control OCD Control Register"]
684 #[inline(always)]
685 pub const fn syocdcr(
686 &self,
687 ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
688 unsafe {
689 crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
690 self._svd2pac_as_ptr().add(1038usize),
691 )
692 }
693 }
694
695 #[doc = "Reset Status Register 0"]
696 #[inline(always)]
697 pub const fn rstsr0(
698 &self,
699 ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
700 unsafe {
701 crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
702 self._svd2pac_as_ptr().add(1040usize),
703 )
704 }
705 }
706
707 #[doc = "Reset Status Register 2"]
708 #[inline(always)]
709 pub const fn rstsr2(
710 &self,
711 ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
712 unsafe {
713 crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
714 self._svd2pac_as_ptr().add(1041usize),
715 )
716 }
717 }
718
719 #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
720 #[inline(always)]
721 pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
722 unsafe {
723 crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
724 self._svd2pac_as_ptr().add(1043usize),
725 )
726 }
727 }
728
729 #[doc = "Flash P/E Protect Register"]
730 #[inline(always)]
731 pub const fn fwepror(
732 &self,
733 ) -> &'static crate::common::Reg<self::Fwepror_SPEC, crate::common::RW> {
734 unsafe {
735 crate::common::Reg::<self::Fwepror_SPEC, crate::common::RW>::from_ptr(
736 self._svd2pac_as_ptr().add(1046usize),
737 )
738 }
739 }
740
741 #[doc = "Voltage Monitoring 1 Comparator Control Register"]
742 #[inline(always)]
743 pub const fn lvd1cmpcr(
744 &self,
745 ) -> &'static crate::common::Reg<self::Lvd1Cmpcr_SPEC, crate::common::RW> {
746 unsafe {
747 crate::common::Reg::<self::Lvd1Cmpcr_SPEC, crate::common::RW>::from_ptr(
748 self._svd2pac_as_ptr().add(1047usize),
749 )
750 }
751 }
752
753 #[doc = "Voltage Monitoring 2 Comparator Control Register"]
754 #[inline(always)]
755 pub const fn lvd2cmpcr(
756 &self,
757 ) -> &'static crate::common::Reg<self::Lvd2Cmpcr_SPEC, crate::common::RW> {
758 unsafe {
759 crate::common::Reg::<self::Lvd2Cmpcr_SPEC, crate::common::RW>::from_ptr(
760 self._svd2pac_as_ptr().add(1048usize),
761 )
762 }
763 }
764
765 #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
766 #[inline(always)]
767 pub const fn lvd1cr0(
768 &self,
769 ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
770 unsafe {
771 crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
772 self._svd2pac_as_ptr().add(1050usize),
773 )
774 }
775 }
776
777 #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
778 #[inline(always)]
779 pub const fn lvd2cr0(
780 &self,
781 ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
782 unsafe {
783 crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
784 self._svd2pac_as_ptr().add(1051usize),
785 )
786 }
787 }
788
789 #[doc = "Battery Backup Voltage Monitor Function Select Register"]
790 #[inline(always)]
791 pub const fn vbattmnselr(
792 &self,
793 ) -> &'static crate::common::Reg<self::Vbattmnselr_SPEC, crate::common::RW> {
794 unsafe {
795 crate::common::Reg::<self::Vbattmnselr_SPEC, crate::common::RW>::from_ptr(
796 self._svd2pac_as_ptr().add(1053usize),
797 )
798 }
799 }
800
801 #[doc = "Battery Backup Voltage Monitor Register"]
802 #[inline(always)]
803 pub const fn vbattmonr(
804 &self,
805 ) -> &'static crate::common::Reg<self::Vbattmonr_SPEC, crate::common::R> {
806 unsafe {
807 crate::common::Reg::<self::Vbattmonr_SPEC, crate::common::R>::from_ptr(
808 self._svd2pac_as_ptr().add(1054usize),
809 )
810 }
811 }
812
813 #[doc = "Sub-Clock Oscillator Control Register"]
814 #[inline(always)]
815 pub const fn sosccr(
816 &self,
817 ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
818 unsafe {
819 crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
820 self._svd2pac_as_ptr().add(1152usize),
821 )
822 }
823 }
824
825 #[doc = "Sub-Clock Oscillator Mode Control Register"]
826 #[inline(always)]
827 pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
828 unsafe {
829 crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
830 self._svd2pac_as_ptr().add(1153usize),
831 )
832 }
833 }
834
835 #[doc = "Low-Speed On-Chip Oscillator Control Register"]
836 #[inline(always)]
837 pub const fn lococr(
838 &self,
839 ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
840 unsafe {
841 crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
842 self._svd2pac_as_ptr().add(1168usize),
843 )
844 }
845 }
846
847 #[doc = "LOCO User Trimming Control Register"]
848 #[inline(always)]
849 pub const fn locoutcr(
850 &self,
851 ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
852 unsafe {
853 crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
854 self._svd2pac_as_ptr().add(1170usize),
855 )
856 }
857 }
858
859 #[doc = "VBATT Input Control Register"]
860 #[inline(always)]
861 pub const fn vbtictlr(
862 &self,
863 ) -> &'static crate::common::Reg<self::Vbtictlr_SPEC, crate::common::RW> {
864 unsafe {
865 crate::common::Reg::<self::Vbtictlr_SPEC, crate::common::RW>::from_ptr(
866 self._svd2pac_as_ptr().add(1211usize),
867 )
868 }
869 }
870
871 #[doc = "VBATT Backup Enable Register"]
872 #[inline(always)]
873 pub const fn vbtber(
874 &self,
875 ) -> &'static crate::common::Reg<self::Vbtber_SPEC, crate::common::RW> {
876 unsafe {
877 crate::common::Reg::<self::Vbtber_SPEC, crate::common::RW>::from_ptr(
878 self._svd2pac_as_ptr().add(1216usize),
879 )
880 }
881 }
882
883 #[doc = "VBATT Backup Register"]
884 #[inline(always)]
885 pub const fn vbtbkr(
886 &self,
887 ) -> &'static crate::common::ClusterRegisterArray<
888 crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW>,
889 128,
890 0x1,
891 > {
892 unsafe {
893 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x500usize))
894 }
895 }
896}
897#[doc(hidden)]
898#[derive(Copy, Clone, Eq, PartialEq)]
899pub struct Sbycr_SPEC;
900impl crate::sealed::RegSpec for Sbycr_SPEC {
901 type DataType = u16;
902}
903
904#[doc = "Standby Control Register"]
905pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
906
907impl Sbycr {
908 #[doc = "Software Standby Mode Select"]
909 #[inline(always)]
910 pub fn ssby(
911 self,
912 ) -> crate::common::RegisterField<
913 15,
914 0x1,
915 1,
916 0,
917 sbycr::Ssby,
918 sbycr::Ssby,
919 Sbycr_SPEC,
920 crate::common::RW,
921 > {
922 crate::common::RegisterField::<
923 15,
924 0x1,
925 1,
926 0,
927 sbycr::Ssby,
928 sbycr::Ssby,
929 Sbycr_SPEC,
930 crate::common::RW,
931 >::from_register(self, 0)
932 }
933}
934impl ::core::default::Default for Sbycr {
935 #[inline(always)]
936 fn default() -> Sbycr {
937 <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(16384)
938 }
939}
940pub mod sbycr {
941
942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
943 pub struct Ssby_SPEC;
944 pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
945 impl Ssby {
946 #[doc = "Sleep mode"]
947 pub const _0: Self = Self::new(0);
948
949 #[doc = "Software Standby mode."]
950 pub const _1: Self = Self::new(1);
951 }
952}
953#[doc(hidden)]
954#[derive(Copy, Clone, Eq, PartialEq)]
955pub struct Sckdivcr_SPEC;
956impl crate::sealed::RegSpec for Sckdivcr_SPEC {
957 type DataType = u32;
958}
959
960#[doc = "System Clock Division Control Register"]
961pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
962
963impl Sckdivcr {
964 #[doc = "Peripheral Module Clock D (PCLKD) Select"]
965 #[inline(always)]
966 pub fn pckd(
967 self,
968 ) -> crate::common::RegisterField<
969 0,
970 0x7,
971 1,
972 0,
973 sckdivcr::Pckd,
974 sckdivcr::Pckd,
975 Sckdivcr_SPEC,
976 crate::common::RW,
977 > {
978 crate::common::RegisterField::<
979 0,
980 0x7,
981 1,
982 0,
983 sckdivcr::Pckd,
984 sckdivcr::Pckd,
985 Sckdivcr_SPEC,
986 crate::common::RW,
987 >::from_register(self, 0)
988 }
989
990 #[doc = "Peripheral Module Clock C (PCLKC) Select"]
991 #[inline(always)]
992 pub fn pckc(
993 self,
994 ) -> crate::common::RegisterField<
995 4,
996 0x7,
997 1,
998 0,
999 sckdivcr::Pckc,
1000 sckdivcr::Pckc,
1001 Sckdivcr_SPEC,
1002 crate::common::RW,
1003 > {
1004 crate::common::RegisterField::<
1005 4,
1006 0x7,
1007 1,
1008 0,
1009 sckdivcr::Pckc,
1010 sckdivcr::Pckc,
1011 Sckdivcr_SPEC,
1012 crate::common::RW,
1013 >::from_register(self, 0)
1014 }
1015
1016 #[doc = "Peripheral Module Clock B (PCLKB) Select"]
1017 #[inline(always)]
1018 pub fn pckb(
1019 self,
1020 ) -> crate::common::RegisterField<
1021 8,
1022 0x7,
1023 1,
1024 0,
1025 sckdivcr::Pckb,
1026 sckdivcr::Pckb,
1027 Sckdivcr_SPEC,
1028 crate::common::RW,
1029 > {
1030 crate::common::RegisterField::<
1031 8,
1032 0x7,
1033 1,
1034 0,
1035 sckdivcr::Pckb,
1036 sckdivcr::Pckb,
1037 Sckdivcr_SPEC,
1038 crate::common::RW,
1039 >::from_register(self, 0)
1040 }
1041
1042 #[doc = "Peripheral Module Clock A (PCLKA) Select"]
1043 #[inline(always)]
1044 pub fn pcka(
1045 self,
1046 ) -> crate::common::RegisterField<
1047 12,
1048 0x7,
1049 1,
1050 0,
1051 sckdivcr::Pcka,
1052 sckdivcr::Pcka,
1053 Sckdivcr_SPEC,
1054 crate::common::RW,
1055 > {
1056 crate::common::RegisterField::<
1057 12,
1058 0x7,
1059 1,
1060 0,
1061 sckdivcr::Pcka,
1062 sckdivcr::Pcka,
1063 Sckdivcr_SPEC,
1064 crate::common::RW,
1065 >::from_register(self, 0)
1066 }
1067
1068 #[doc = "Reserved. Set these bits to the same value as PCKB\\[2:0\\]."]
1069 #[inline(always)]
1070 pub fn rsv(
1071 self,
1072 ) -> crate::common::RegisterField<
1073 16,
1074 0x7,
1075 1,
1076 0,
1077 sckdivcr::Rsv,
1078 sckdivcr::Rsv,
1079 Sckdivcr_SPEC,
1080 crate::common::RW,
1081 > {
1082 crate::common::RegisterField::<
1083 16,
1084 0x7,
1085 1,
1086 0,
1087 sckdivcr::Rsv,
1088 sckdivcr::Rsv,
1089 Sckdivcr_SPEC,
1090 crate::common::RW,
1091 >::from_register(self, 0)
1092 }
1093
1094 #[doc = "System Clock (ICLK) Select"]
1095 #[inline(always)]
1096 pub fn ick(
1097 self,
1098 ) -> crate::common::RegisterField<
1099 24,
1100 0x7,
1101 1,
1102 0,
1103 sckdivcr::Ick,
1104 sckdivcr::Ick,
1105 Sckdivcr_SPEC,
1106 crate::common::RW,
1107 > {
1108 crate::common::RegisterField::<
1109 24,
1110 0x7,
1111 1,
1112 0,
1113 sckdivcr::Ick,
1114 sckdivcr::Ick,
1115 Sckdivcr_SPEC,
1116 crate::common::RW,
1117 >::from_register(self, 0)
1118 }
1119
1120 #[doc = "FlashIF Clock (FCLK) Select"]
1121 #[inline(always)]
1122 pub fn fck(
1123 self,
1124 ) -> crate::common::RegisterField<
1125 28,
1126 0x7,
1127 1,
1128 0,
1129 sckdivcr::Fck,
1130 sckdivcr::Fck,
1131 Sckdivcr_SPEC,
1132 crate::common::RW,
1133 > {
1134 crate::common::RegisterField::<
1135 28,
1136 0x7,
1137 1,
1138 0,
1139 sckdivcr::Fck,
1140 sckdivcr::Fck,
1141 Sckdivcr_SPEC,
1142 crate::common::RW,
1143 >::from_register(self, 0)
1144 }
1145}
1146impl ::core::default::Default for Sckdivcr {
1147 #[inline(always)]
1148 fn default() -> Sckdivcr {
1149 <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(570565154)
1150 }
1151}
1152pub mod sckdivcr {
1153
1154 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1155 pub struct Pckd_SPEC;
1156 pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
1157 impl Pckd {
1158 #[doc = "x 1/1"]
1159 pub const _000: Self = Self::new(0);
1160
1161 #[doc = "x 1/2"]
1162 pub const _001: Self = Self::new(1);
1163
1164 #[doc = "x 1/4"]
1165 pub const _010: Self = Self::new(2);
1166
1167 #[doc = "x 1/8"]
1168 pub const _011: Self = Self::new(3);
1169
1170 #[doc = "x 1/16"]
1171 pub const _100: Self = Self::new(4);
1172
1173 #[doc = "x 1/32"]
1174 pub const _101: Self = Self::new(5);
1175
1176 #[doc = "x 1/64"]
1177 pub const _110: Self = Self::new(6);
1178
1179 #[doc = "Setting prohibited."]
1180 pub const OTHERS: Self = Self::new(0);
1181 }
1182 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1183 pub struct Pckc_SPEC;
1184 pub type Pckc = crate::EnumBitfieldStruct<u8, Pckc_SPEC>;
1185 impl Pckc {
1186 #[doc = "x 1/1"]
1187 pub const _000: Self = Self::new(0);
1188
1189 #[doc = "x 1/2"]
1190 pub const _001: Self = Self::new(1);
1191
1192 #[doc = "x 1/4"]
1193 pub const _010: Self = Self::new(2);
1194
1195 #[doc = "x 1/8"]
1196 pub const _011: Self = Self::new(3);
1197
1198 #[doc = "x 1/16"]
1199 pub const _100: Self = Self::new(4);
1200
1201 #[doc = "x 1/32"]
1202 pub const _101: Self = Self::new(5);
1203
1204 #[doc = "x 1/64"]
1205 pub const _110: Self = Self::new(6);
1206
1207 #[doc = "Setting prohibited."]
1208 pub const OTHERS: Self = Self::new(0);
1209 }
1210 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1211 pub struct Pckb_SPEC;
1212 pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
1213 impl Pckb {
1214 #[doc = "x 1/1"]
1215 pub const _000: Self = Self::new(0);
1216
1217 #[doc = "x 1/2"]
1218 pub const _001: Self = Self::new(1);
1219
1220 #[doc = "x 1/4"]
1221 pub const _010: Self = Self::new(2);
1222
1223 #[doc = "x 1/8"]
1224 pub const _011: Self = Self::new(3);
1225
1226 #[doc = "x 1/16"]
1227 pub const _100: Self = Self::new(4);
1228
1229 #[doc = "x 1/32"]
1230 pub const _101: Self = Self::new(5);
1231
1232 #[doc = "x 1/64"]
1233 pub const _110: Self = Self::new(6);
1234
1235 #[doc = "Setting prohibited."]
1236 pub const OTHERS: Self = Self::new(0);
1237 }
1238 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1239 pub struct Pcka_SPEC;
1240 pub type Pcka = crate::EnumBitfieldStruct<u8, Pcka_SPEC>;
1241 impl Pcka {
1242 #[doc = "x 1/1"]
1243 pub const _000: Self = Self::new(0);
1244
1245 #[doc = "x 1/2"]
1246 pub const _001: Self = Self::new(1);
1247
1248 #[doc = "x 1/4"]
1249 pub const _010: Self = Self::new(2);
1250
1251 #[doc = "x 1/8"]
1252 pub const _011: Self = Self::new(3);
1253
1254 #[doc = "x 1/16"]
1255 pub const _100: Self = Self::new(4);
1256
1257 #[doc = "x 1/32"]
1258 pub const _101: Self = Self::new(5);
1259
1260 #[doc = "x 1/64"]
1261 pub const _110: Self = Self::new(6);
1262
1263 #[doc = "Setting prohibited."]
1264 pub const OTHERS: Self = Self::new(0);
1265 }
1266 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1267 pub struct Rsv_SPEC;
1268 pub type Rsv = crate::EnumBitfieldStruct<u8, Rsv_SPEC>;
1269 impl Rsv {
1270 #[doc = "x 1/1"]
1271 pub const _000: Self = Self::new(0);
1272
1273 #[doc = "x 1/2"]
1274 pub const _001: Self = Self::new(1);
1275
1276 #[doc = "x 1/4"]
1277 pub const _010: Self = Self::new(2);
1278
1279 #[doc = "x 1/8"]
1280 pub const _011: Self = Self::new(3);
1281
1282 #[doc = "x 1/16"]
1283 pub const _100: Self = Self::new(4);
1284
1285 #[doc = "x 1/32"]
1286 pub const _101: Self = Self::new(5);
1287
1288 #[doc = "x 1/64"]
1289 pub const _110: Self = Self::new(6);
1290
1291 #[doc = "Settings prohibited"]
1292 pub const OTHERS: Self = Self::new(0);
1293 }
1294 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1295 pub struct Ick_SPEC;
1296 pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
1297 impl Ick {
1298 #[doc = "x 1/1"]
1299 pub const _000: Self = Self::new(0);
1300
1301 #[doc = "x 1/2"]
1302 pub const _001: Self = Self::new(1);
1303
1304 #[doc = "x 1/4"]
1305 pub const _010: Self = Self::new(2);
1306
1307 #[doc = "x 1/8"]
1308 pub const _011: Self = Self::new(3);
1309
1310 #[doc = "x 1/16"]
1311 pub const _100: Self = Self::new(4);
1312
1313 #[doc = "x 1/32"]
1314 pub const _101: Self = Self::new(5);
1315
1316 #[doc = "x 1/64"]
1317 pub const _110: Self = Self::new(6);
1318
1319 #[doc = "Setting prohibited."]
1320 pub const OTHERS: Self = Self::new(0);
1321 }
1322 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1323 pub struct Fck_SPEC;
1324 pub type Fck = crate::EnumBitfieldStruct<u8, Fck_SPEC>;
1325 impl Fck {
1326 #[doc = "x 1/1"]
1327 pub const _000: Self = Self::new(0);
1328
1329 #[doc = "x 1/2"]
1330 pub const _001: Self = Self::new(1);
1331
1332 #[doc = "x 1/4"]
1333 pub const _010: Self = Self::new(2);
1334
1335 #[doc = "x 1/8"]
1336 pub const _011: Self = Self::new(3);
1337
1338 #[doc = "x 1/16"]
1339 pub const _100: Self = Self::new(4);
1340
1341 #[doc = "x 1/32"]
1342 pub const _101: Self = Self::new(5);
1343
1344 #[doc = "x 1/64"]
1345 pub const _110: Self = Self::new(6);
1346
1347 #[doc = "Setting prohibited."]
1348 pub const OTHERS: Self = Self::new(0);
1349 }
1350}
1351#[doc(hidden)]
1352#[derive(Copy, Clone, Eq, PartialEq)]
1353pub struct Sckscr_SPEC;
1354impl crate::sealed::RegSpec for Sckscr_SPEC {
1355 type DataType = u8;
1356}
1357
1358#[doc = "System Clock Source Control Register"]
1359pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
1360
1361impl Sckscr {
1362 #[doc = "Clock Source Select"]
1363 #[inline(always)]
1364 pub fn cksel(
1365 self,
1366 ) -> crate::common::RegisterField<
1367 0,
1368 0x7,
1369 1,
1370 0,
1371 sckscr::Cksel,
1372 sckscr::Cksel,
1373 Sckscr_SPEC,
1374 crate::common::RW,
1375 > {
1376 crate::common::RegisterField::<
1377 0,
1378 0x7,
1379 1,
1380 0,
1381 sckscr::Cksel,
1382 sckscr::Cksel,
1383 Sckscr_SPEC,
1384 crate::common::RW,
1385 >::from_register(self, 0)
1386 }
1387}
1388impl ::core::default::Default for Sckscr {
1389 #[inline(always)]
1390 fn default() -> Sckscr {
1391 <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
1392 }
1393}
1394pub mod sckscr {
1395
1396 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1397 pub struct Cksel_SPEC;
1398 pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1399 impl Cksel {
1400 #[doc = "HOCO"]
1401 pub const _000: Self = Self::new(0);
1402
1403 #[doc = "MOCO"]
1404 pub const _001: Self = Self::new(1);
1405
1406 #[doc = "LOCO"]
1407 pub const _010: Self = Self::new(2);
1408
1409 #[doc = "Main clock oscillator (MOSC)"]
1410 pub const _011: Self = Self::new(3);
1411
1412 #[doc = "Sub-clock oscillator (SOSC)"]
1413 pub const _100: Self = Self::new(4);
1414
1415 #[doc = "PLL"]
1416 pub const _101: Self = Self::new(5);
1417
1418 #[doc = "Setting prohibited"]
1419 pub const _110: Self = Self::new(6);
1420
1421 #[doc = "Setting prohibited"]
1422 pub const _111: Self = Self::new(7);
1423 }
1424}
1425#[doc(hidden)]
1426#[derive(Copy, Clone, Eq, PartialEq)]
1427pub struct Pllccr_SPEC;
1428impl crate::sealed::RegSpec for Pllccr_SPEC {
1429 type DataType = u16;
1430}
1431
1432#[doc = "PLL Clock Control Register"]
1433pub type Pllccr = crate::RegValueT<Pllccr_SPEC>;
1434
1435impl Pllccr {
1436 #[doc = "PLL Input Frequency Division Ratio Select"]
1437 #[inline(always)]
1438 pub fn plidiv(
1439 self,
1440 ) -> crate::common::RegisterField<
1441 0,
1442 0x3,
1443 1,
1444 0,
1445 pllccr::Plidiv,
1446 pllccr::Plidiv,
1447 Pllccr_SPEC,
1448 crate::common::RW,
1449 > {
1450 crate::common::RegisterField::<
1451 0,
1452 0x3,
1453 1,
1454 0,
1455 pllccr::Plidiv,
1456 pllccr::Plidiv,
1457 Pllccr_SPEC,
1458 crate::common::RW,
1459 >::from_register(self, 0)
1460 }
1461
1462 #[doc = "PLL Clock Source Select"]
1463 #[inline(always)]
1464 pub fn plsrcsel(
1465 self,
1466 ) -> crate::common::RegisterField<
1467 4,
1468 0x1,
1469 1,
1470 0,
1471 pllccr::Plsrcsel,
1472 pllccr::Plsrcsel,
1473 Pllccr_SPEC,
1474 crate::common::RW,
1475 > {
1476 crate::common::RegisterField::<
1477 4,
1478 0x1,
1479 1,
1480 0,
1481 pllccr::Plsrcsel,
1482 pllccr::Plsrcsel,
1483 Pllccr_SPEC,
1484 crate::common::RW,
1485 >::from_register(self, 0)
1486 }
1487
1488 #[doc = "PLL Frequency Multiplication Factor Select"]
1489 #[inline(always)]
1490 pub fn pllmul(
1491 self,
1492 ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Pllccr_SPEC, crate::common::RW> {
1493 crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Pllccr_SPEC,crate::common::RW>::from_register(self,0)
1494 }
1495}
1496impl ::core::default::Default for Pllccr {
1497 #[inline(always)]
1498 fn default() -> Pllccr {
1499 <crate::RegValueT<Pllccr_SPEC> as RegisterValue<_>>::new(4864)
1500 }
1501}
1502pub mod pllccr {
1503
1504 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1505 pub struct Plidiv_SPEC;
1506 pub type Plidiv = crate::EnumBitfieldStruct<u8, Plidiv_SPEC>;
1507 impl Plidiv {
1508 #[doc = "/1"]
1509 pub const _00: Self = Self::new(0);
1510
1511 #[doc = "/2"]
1512 pub const _01: Self = Self::new(1);
1513
1514 #[doc = "/3"]
1515 pub const _10: Self = Self::new(2);
1516
1517 #[doc = "Setting prohibited."]
1518 pub const OTHERS: Self = Self::new(0);
1519 }
1520 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1521 pub struct Plsrcsel_SPEC;
1522 pub type Plsrcsel = crate::EnumBitfieldStruct<u8, Plsrcsel_SPEC>;
1523 impl Plsrcsel {
1524 #[doc = "Main clock oscillator"]
1525 pub const _0: Self = Self::new(0);
1526
1527 #[doc = "HOCO"]
1528 pub const _1: Self = Self::new(1);
1529 }
1530}
1531#[doc(hidden)]
1532#[derive(Copy, Clone, Eq, PartialEq)]
1533pub struct Pllcr_SPEC;
1534impl crate::sealed::RegSpec for Pllcr_SPEC {
1535 type DataType = u8;
1536}
1537
1538#[doc = "PLL Control Register"]
1539pub type Pllcr = crate::RegValueT<Pllcr_SPEC>;
1540
1541impl Pllcr {
1542 #[doc = "PLL Stop Control"]
1543 #[inline(always)]
1544 pub fn pllstp(
1545 self,
1546 ) -> crate::common::RegisterField<
1547 0,
1548 0x1,
1549 1,
1550 0,
1551 pllcr::Pllstp,
1552 pllcr::Pllstp,
1553 Pllcr_SPEC,
1554 crate::common::RW,
1555 > {
1556 crate::common::RegisterField::<
1557 0,
1558 0x1,
1559 1,
1560 0,
1561 pllcr::Pllstp,
1562 pllcr::Pllstp,
1563 Pllcr_SPEC,
1564 crate::common::RW,
1565 >::from_register(self, 0)
1566 }
1567}
1568impl ::core::default::Default for Pllcr {
1569 #[inline(always)]
1570 fn default() -> Pllcr {
1571 <crate::RegValueT<Pllcr_SPEC> as RegisterValue<_>>::new(1)
1572 }
1573}
1574pub mod pllcr {
1575
1576 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1577 pub struct Pllstp_SPEC;
1578 pub type Pllstp = crate::EnumBitfieldStruct<u8, Pllstp_SPEC>;
1579 impl Pllstp {
1580 #[doc = "PLL is operating"]
1581 pub const _0: Self = Self::new(0);
1582
1583 #[doc = "PLL is stopped."]
1584 pub const _1: Self = Self::new(1);
1585 }
1586}
1587#[doc(hidden)]
1588#[derive(Copy, Clone, Eq, PartialEq)]
1589pub struct Mosccr_SPEC;
1590impl crate::sealed::RegSpec for Mosccr_SPEC {
1591 type DataType = u8;
1592}
1593
1594#[doc = "Main Clock Oscillator Control Register"]
1595pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
1596
1597impl Mosccr {
1598 #[doc = "Main Clock Oscillator Stop"]
1599 #[inline(always)]
1600 pub fn mostp(
1601 self,
1602 ) -> crate::common::RegisterField<
1603 0,
1604 0x1,
1605 1,
1606 0,
1607 mosccr::Mostp,
1608 mosccr::Mostp,
1609 Mosccr_SPEC,
1610 crate::common::RW,
1611 > {
1612 crate::common::RegisterField::<
1613 0,
1614 0x1,
1615 1,
1616 0,
1617 mosccr::Mostp,
1618 mosccr::Mostp,
1619 Mosccr_SPEC,
1620 crate::common::RW,
1621 >::from_register(self, 0)
1622 }
1623}
1624impl ::core::default::Default for Mosccr {
1625 #[inline(always)]
1626 fn default() -> Mosccr {
1627 <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
1628 }
1629}
1630pub mod mosccr {
1631
1632 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1633 pub struct Mostp_SPEC;
1634 pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
1635 impl Mostp {
1636 #[doc = "Operate the main clock oscillator"]
1637 pub const _0: Self = Self::new(0);
1638
1639 #[doc = "Stop the main clock oscillator"]
1640 pub const _1: Self = Self::new(1);
1641 }
1642}
1643#[doc(hidden)]
1644#[derive(Copy, Clone, Eq, PartialEq)]
1645pub struct Hococr_SPEC;
1646impl crate::sealed::RegSpec for Hococr_SPEC {
1647 type DataType = u8;
1648}
1649
1650#[doc = "High-Speed On-Chip Oscillator Control Register"]
1651pub type Hococr = crate::RegValueT<Hococr_SPEC>;
1652
1653impl Hococr {
1654 #[doc = "HOCO Stop"]
1655 #[inline(always)]
1656 pub fn hcstp(
1657 self,
1658 ) -> crate::common::RegisterField<
1659 0,
1660 0x1,
1661 1,
1662 0,
1663 hococr::Hcstp,
1664 hococr::Hcstp,
1665 Hococr_SPEC,
1666 crate::common::RW,
1667 > {
1668 crate::common::RegisterField::<
1669 0,
1670 0x1,
1671 1,
1672 0,
1673 hococr::Hcstp,
1674 hococr::Hcstp,
1675 Hococr_SPEC,
1676 crate::common::RW,
1677 >::from_register(self, 0)
1678 }
1679}
1680impl ::core::default::Default for Hococr {
1681 #[inline(always)]
1682 fn default() -> Hococr {
1683 <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
1684 }
1685}
1686pub mod hococr {
1687
1688 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1689 pub struct Hcstp_SPEC;
1690 pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
1691 impl Hcstp {
1692 #[doc = "Operate the HOCO clock"]
1693 pub const _0: Self = Self::new(0);
1694
1695 #[doc = "Stop the HOCO clock"]
1696 pub const _1: Self = Self::new(1);
1697 }
1698}
1699#[doc(hidden)]
1700#[derive(Copy, Clone, Eq, PartialEq)]
1701pub struct Hococr2_SPEC;
1702impl crate::sealed::RegSpec for Hococr2_SPEC {
1703 type DataType = u8;
1704}
1705
1706#[doc = "High-Speed On-Chip Oscillator Control Register 2"]
1707pub type Hococr2 = crate::RegValueT<Hococr2_SPEC>;
1708
1709impl Hococr2 {
1710 #[doc = "HOCO Frequency Setting 0"]
1711 #[inline(always)]
1712 pub fn hcfrq0(
1713 self,
1714 ) -> crate::common::RegisterField<
1715 0,
1716 0x3,
1717 1,
1718 0,
1719 hococr2::Hcfrq0,
1720 hococr2::Hcfrq0,
1721 Hococr2_SPEC,
1722 crate::common::RW,
1723 > {
1724 crate::common::RegisterField::<
1725 0,
1726 0x3,
1727 1,
1728 0,
1729 hococr2::Hcfrq0,
1730 hococr2::Hcfrq0,
1731 Hococr2_SPEC,
1732 crate::common::RW,
1733 >::from_register(self, 0)
1734 }
1735}
1736impl ::core::default::Default for Hococr2 {
1737 #[inline(always)]
1738 fn default() -> Hococr2 {
1739 <crate::RegValueT<Hococr2_SPEC> as RegisterValue<_>>::new(0)
1740 }
1741}
1742pub mod hococr2 {
1743
1744 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1745 pub struct Hcfrq0_SPEC;
1746 pub type Hcfrq0 = crate::EnumBitfieldStruct<u8, Hcfrq0_SPEC>;
1747 impl Hcfrq0 {
1748 #[doc = "16 MHz"]
1749 pub const _00: Self = Self::new(0);
1750
1751 #[doc = "18 MHz"]
1752 pub const _01: Self = Self::new(1);
1753
1754 #[doc = "20 MHz"]
1755 pub const _10: Self = Self::new(2);
1756
1757 #[doc = "Setting prohibited"]
1758 pub const _11: Self = Self::new(3);
1759 }
1760}
1761#[doc(hidden)]
1762#[derive(Copy, Clone, Eq, PartialEq)]
1763pub struct Mococr_SPEC;
1764impl crate::sealed::RegSpec for Mococr_SPEC {
1765 type DataType = u8;
1766}
1767
1768#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
1769pub type Mococr = crate::RegValueT<Mococr_SPEC>;
1770
1771impl Mococr {
1772 #[doc = "MOCO Stop"]
1773 #[inline(always)]
1774 pub fn mcstp(
1775 self,
1776 ) -> crate::common::RegisterField<
1777 0,
1778 0x1,
1779 1,
1780 0,
1781 mococr::Mcstp,
1782 mococr::Mcstp,
1783 Mococr_SPEC,
1784 crate::common::RW,
1785 > {
1786 crate::common::RegisterField::<
1787 0,
1788 0x1,
1789 1,
1790 0,
1791 mococr::Mcstp,
1792 mococr::Mcstp,
1793 Mococr_SPEC,
1794 crate::common::RW,
1795 >::from_register(self, 0)
1796 }
1797}
1798impl ::core::default::Default for Mococr {
1799 #[inline(always)]
1800 fn default() -> Mococr {
1801 <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
1802 }
1803}
1804pub mod mococr {
1805
1806 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1807 pub struct Mcstp_SPEC;
1808 pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
1809 impl Mcstp {
1810 #[doc = "MOCO clock is operating"]
1811 pub const _0: Self = Self::new(0);
1812
1813 #[doc = "MOCO clock is stopped"]
1814 pub const _1: Self = Self::new(1);
1815 }
1816}
1817#[doc(hidden)]
1818#[derive(Copy, Clone, Eq, PartialEq)]
1819pub struct Fllcr1_SPEC;
1820impl crate::sealed::RegSpec for Fllcr1_SPEC {
1821 type DataType = u8;
1822}
1823
1824#[doc = "FLL Control Register 1"]
1825pub type Fllcr1 = crate::RegValueT<Fllcr1_SPEC>;
1826
1827impl Fllcr1 {
1828 #[doc = "FLL Enable"]
1829 #[inline(always)]
1830 pub fn fllen(
1831 self,
1832 ) -> crate::common::RegisterField<
1833 0,
1834 0x1,
1835 1,
1836 0,
1837 fllcr1::Fllen,
1838 fllcr1::Fllen,
1839 Fllcr1_SPEC,
1840 crate::common::RW,
1841 > {
1842 crate::common::RegisterField::<
1843 0,
1844 0x1,
1845 1,
1846 0,
1847 fllcr1::Fllen,
1848 fllcr1::Fllen,
1849 Fllcr1_SPEC,
1850 crate::common::RW,
1851 >::from_register(self, 0)
1852 }
1853}
1854impl ::core::default::Default for Fllcr1 {
1855 #[inline(always)]
1856 fn default() -> Fllcr1 {
1857 <crate::RegValueT<Fllcr1_SPEC> as RegisterValue<_>>::new(0)
1858 }
1859}
1860pub mod fllcr1 {
1861
1862 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1863 pub struct Fllen_SPEC;
1864 pub type Fllen = crate::EnumBitfieldStruct<u8, Fllen_SPEC>;
1865 impl Fllen {
1866 #[doc = "FLL function is disabled"]
1867 pub const _0: Self = Self::new(0);
1868
1869 #[doc = "FLL function is enabled."]
1870 pub const _1: Self = Self::new(1);
1871 }
1872}
1873#[doc(hidden)]
1874#[derive(Copy, Clone, Eq, PartialEq)]
1875pub struct Fllcr2_SPEC;
1876impl crate::sealed::RegSpec for Fllcr2_SPEC {
1877 type DataType = u16;
1878}
1879
1880#[doc = "FLL Control Register 2"]
1881pub type Fllcr2 = crate::RegValueT<Fllcr2_SPEC>;
1882
1883impl Fllcr2 {
1884 #[doc = "FLL Multiplication Control"]
1885 #[inline(always)]
1886 pub fn fllcntl(
1887 self,
1888 ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fllcr2_SPEC, crate::common::RW>
1889 {
1890 crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fllcr2_SPEC,crate::common::RW>::from_register(self,0)
1891 }
1892}
1893impl ::core::default::Default for Fllcr2 {
1894 #[inline(always)]
1895 fn default() -> Fllcr2 {
1896 <crate::RegValueT<Fllcr2_SPEC> as RegisterValue<_>>::new(0)
1897 }
1898}
1899
1900#[doc(hidden)]
1901#[derive(Copy, Clone, Eq, PartialEq)]
1902pub struct Oscsf_SPEC;
1903impl crate::sealed::RegSpec for Oscsf_SPEC {
1904 type DataType = u8;
1905}
1906
1907#[doc = "Oscillation Stabilization Flag Register"]
1908pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
1909
1910impl Oscsf {
1911 #[doc = "HOCO Clock Oscillation Stabilization Flag"]
1912 #[inline(always)]
1913 pub fn hocosf(
1914 self,
1915 ) -> crate::common::RegisterField<
1916 0,
1917 0x1,
1918 1,
1919 0,
1920 oscsf::Hocosf,
1921 oscsf::Hocosf,
1922 Oscsf_SPEC,
1923 crate::common::R,
1924 > {
1925 crate::common::RegisterField::<
1926 0,
1927 0x1,
1928 1,
1929 0,
1930 oscsf::Hocosf,
1931 oscsf::Hocosf,
1932 Oscsf_SPEC,
1933 crate::common::R,
1934 >::from_register(self, 0)
1935 }
1936
1937 #[doc = "Main Clock Oscillation Stabilization Flag"]
1938 #[inline(always)]
1939 pub fn moscsf(
1940 self,
1941 ) -> crate::common::RegisterField<
1942 3,
1943 0x1,
1944 1,
1945 0,
1946 oscsf::Moscsf,
1947 oscsf::Moscsf,
1948 Oscsf_SPEC,
1949 crate::common::R,
1950 > {
1951 crate::common::RegisterField::<
1952 3,
1953 0x1,
1954 1,
1955 0,
1956 oscsf::Moscsf,
1957 oscsf::Moscsf,
1958 Oscsf_SPEC,
1959 crate::common::R,
1960 >::from_register(self, 0)
1961 }
1962
1963 #[doc = "PLL Clock Oscillation Stabilization Flag"]
1964 #[inline(always)]
1965 pub fn pllsf(
1966 self,
1967 ) -> crate::common::RegisterField<
1968 5,
1969 0x1,
1970 1,
1971 0,
1972 oscsf::Pllsf,
1973 oscsf::Pllsf,
1974 Oscsf_SPEC,
1975 crate::common::R,
1976 > {
1977 crate::common::RegisterField::<
1978 5,
1979 0x1,
1980 1,
1981 0,
1982 oscsf::Pllsf,
1983 oscsf::Pllsf,
1984 Oscsf_SPEC,
1985 crate::common::R,
1986 >::from_register(self, 0)
1987 }
1988
1989 #[doc = "PLL2 Clock Oscillation Stabilization Flag"]
1990 #[inline(always)]
1991 pub fn pll2sf(
1992 self,
1993 ) -> crate::common::RegisterField<
1994 6,
1995 0x1,
1996 1,
1997 0,
1998 oscsf::Pll2Sf,
1999 oscsf::Pll2Sf,
2000 Oscsf_SPEC,
2001 crate::common::R,
2002 > {
2003 crate::common::RegisterField::<
2004 6,
2005 0x1,
2006 1,
2007 0,
2008 oscsf::Pll2Sf,
2009 oscsf::Pll2Sf,
2010 Oscsf_SPEC,
2011 crate::common::R,
2012 >::from_register(self, 0)
2013 }
2014}
2015impl ::core::default::Default for Oscsf {
2016 #[inline(always)]
2017 fn default() -> Oscsf {
2018 <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
2019 }
2020}
2021pub mod oscsf {
2022
2023 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2024 pub struct Hocosf_SPEC;
2025 pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
2026 impl Hocosf {
2027 #[doc = "The HOCO clock is stopped or is not yet stable"]
2028 pub const _0: Self = Self::new(0);
2029
2030 #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
2031 pub const _1: Self = Self::new(1);
2032 }
2033 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2034 pub struct Moscsf_SPEC;
2035 pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
2036 impl Moscsf {
2037 #[doc = "The main clock oscillator is stopped (MOSTP = 1) or is not yet stable"]
2038 pub const _0: Self = Self::new(0);
2039
2040 #[doc = "The main clock oscillator is stable, so is available for use as the system clock"]
2041 pub const _1: Self = Self::new(1);
2042 }
2043 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2044 pub struct Pllsf_SPEC;
2045 pub type Pllsf = crate::EnumBitfieldStruct<u8, Pllsf_SPEC>;
2046 impl Pllsf {
2047 #[doc = "The PLL clock is stopped, or oscillation of the PLL clock is not stable yet"]
2048 pub const _0: Self = Self::new(0);
2049
2050 #[doc = "The PLL clock is stable, so is available for use as the system clock"]
2051 pub const _1: Self = Self::new(1);
2052 }
2053 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2054 pub struct Pll2Sf_SPEC;
2055 pub type Pll2Sf = crate::EnumBitfieldStruct<u8, Pll2Sf_SPEC>;
2056 impl Pll2Sf {
2057 #[doc = "The PLL2 clock is stopped, or oscillation of the PLL2 clock is not stable yet"]
2058 pub const _0: Self = Self::new(0);
2059
2060 #[doc = "The PLL2 clock is stable"]
2061 pub const _1: Self = Self::new(1);
2062 }
2063}
2064#[doc(hidden)]
2065#[derive(Copy, Clone, Eq, PartialEq)]
2066pub struct Ckocr_SPEC;
2067impl crate::sealed::RegSpec for Ckocr_SPEC {
2068 type DataType = u8;
2069}
2070
2071#[doc = "Clock Out Control Register"]
2072pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
2073
2074impl Ckocr {
2075 #[doc = "Clock Out Source Select"]
2076 #[inline(always)]
2077 pub fn ckosel(
2078 self,
2079 ) -> crate::common::RegisterField<
2080 0,
2081 0x7,
2082 1,
2083 0,
2084 ckocr::Ckosel,
2085 ckocr::Ckosel,
2086 Ckocr_SPEC,
2087 crate::common::RW,
2088 > {
2089 crate::common::RegisterField::<
2090 0,
2091 0x7,
2092 1,
2093 0,
2094 ckocr::Ckosel,
2095 ckocr::Ckosel,
2096 Ckocr_SPEC,
2097 crate::common::RW,
2098 >::from_register(self, 0)
2099 }
2100
2101 #[doc = "Clock Output Frequency Division Ratio"]
2102 #[inline(always)]
2103 pub fn ckodiv(
2104 self,
2105 ) -> crate::common::RegisterField<
2106 4,
2107 0x7,
2108 1,
2109 0,
2110 ckocr::Ckodiv,
2111 ckocr::Ckodiv,
2112 Ckocr_SPEC,
2113 crate::common::RW,
2114 > {
2115 crate::common::RegisterField::<
2116 4,
2117 0x7,
2118 1,
2119 0,
2120 ckocr::Ckodiv,
2121 ckocr::Ckodiv,
2122 Ckocr_SPEC,
2123 crate::common::RW,
2124 >::from_register(self, 0)
2125 }
2126
2127 #[doc = "Clock Out Enable"]
2128 #[inline(always)]
2129 pub fn ckoen(
2130 self,
2131 ) -> crate::common::RegisterField<
2132 7,
2133 0x1,
2134 1,
2135 0,
2136 ckocr::Ckoen,
2137 ckocr::Ckoen,
2138 Ckocr_SPEC,
2139 crate::common::RW,
2140 > {
2141 crate::common::RegisterField::<
2142 7,
2143 0x1,
2144 1,
2145 0,
2146 ckocr::Ckoen,
2147 ckocr::Ckoen,
2148 Ckocr_SPEC,
2149 crate::common::RW,
2150 >::from_register(self, 0)
2151 }
2152}
2153impl ::core::default::Default for Ckocr {
2154 #[inline(always)]
2155 fn default() -> Ckocr {
2156 <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
2157 }
2158}
2159pub mod ckocr {
2160
2161 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2162 pub struct Ckosel_SPEC;
2163 pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
2164 impl Ckosel {
2165 #[doc = "HOCO (value after reset)"]
2166 pub const _000: Self = Self::new(0);
2167
2168 #[doc = "MOCO"]
2169 pub const _001: Self = Self::new(1);
2170
2171 #[doc = "LOCO"]
2172 pub const _010: Self = Self::new(2);
2173
2174 #[doc = "MOSC"]
2175 pub const _011: Self = Self::new(3);
2176
2177 #[doc = "SOSC"]
2178 pub const _100: Self = Self::new(4);
2179
2180 #[doc = "Setting prohibited"]
2181 pub const _101: Self = Self::new(5);
2182
2183 #[doc = "Setting prohibited"]
2184 pub const OTHERS: Self = Self::new(0);
2185 }
2186 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2187 pub struct Ckodiv_SPEC;
2188 pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
2189 impl Ckodiv {
2190 #[doc = "x 1/1"]
2191 pub const _000: Self = Self::new(0);
2192
2193 #[doc = "x 1/2"]
2194 pub const _001: Self = Self::new(1);
2195
2196 #[doc = "x 1/4"]
2197 pub const _010: Self = Self::new(2);
2198
2199 #[doc = "x 1/8"]
2200 pub const _011: Self = Self::new(3);
2201
2202 #[doc = "x 1/16"]
2203 pub const _100: Self = Self::new(4);
2204
2205 #[doc = "x 1/32"]
2206 pub const _101: Self = Self::new(5);
2207
2208 #[doc = "x 1/64"]
2209 pub const _110: Self = Self::new(6);
2210
2211 #[doc = "x 1/128"]
2212 pub const _111: Self = Self::new(7);
2213 }
2214 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2215 pub struct Ckoen_SPEC;
2216 pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
2217 impl Ckoen {
2218 #[doc = "Disable clock out"]
2219 pub const _0: Self = Self::new(0);
2220
2221 #[doc = "Enable clock out"]
2222 pub const _1: Self = Self::new(1);
2223 }
2224}
2225#[doc(hidden)]
2226#[derive(Copy, Clone, Eq, PartialEq)]
2227pub struct Trckcr_SPEC;
2228impl crate::sealed::RegSpec for Trckcr_SPEC {
2229 type DataType = u8;
2230}
2231
2232#[doc = "Trace Clock Control Register"]
2233pub type Trckcr = crate::RegValueT<Trckcr_SPEC>;
2234
2235impl Trckcr {
2236 #[doc = "Trace Clock operating frequency select"]
2237 #[inline(always)]
2238 pub fn trck(
2239 self,
2240 ) -> crate::common::RegisterField<
2241 0,
2242 0xf,
2243 1,
2244 0,
2245 trckcr::Trck,
2246 trckcr::Trck,
2247 Trckcr_SPEC,
2248 crate::common::RW,
2249 > {
2250 crate::common::RegisterField::<
2251 0,
2252 0xf,
2253 1,
2254 0,
2255 trckcr::Trck,
2256 trckcr::Trck,
2257 Trckcr_SPEC,
2258 crate::common::RW,
2259 >::from_register(self, 0)
2260 }
2261
2262 #[doc = "Trace Clock operating Enable"]
2263 #[inline(always)]
2264 pub fn trcken(
2265 self,
2266 ) -> crate::common::RegisterField<
2267 7,
2268 0x1,
2269 1,
2270 0,
2271 trckcr::Trcken,
2272 trckcr::Trcken,
2273 Trckcr_SPEC,
2274 crate::common::RW,
2275 > {
2276 crate::common::RegisterField::<
2277 7,
2278 0x1,
2279 1,
2280 0,
2281 trckcr::Trcken,
2282 trckcr::Trcken,
2283 Trckcr_SPEC,
2284 crate::common::RW,
2285 >::from_register(self, 0)
2286 }
2287}
2288impl ::core::default::Default for Trckcr {
2289 #[inline(always)]
2290 fn default() -> Trckcr {
2291 <crate::RegValueT<Trckcr_SPEC> as RegisterValue<_>>::new(1)
2292 }
2293}
2294pub mod trckcr {
2295
2296 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2297 pub struct Trck_SPEC;
2298 pub type Trck = crate::EnumBitfieldStruct<u8, Trck_SPEC>;
2299 impl Trck {
2300 #[doc = "/1"]
2301 pub const _0_X_0: Self = Self::new(0);
2302
2303 #[doc = "/2 (value after reset)"]
2304 pub const _0_X_1: Self = Self::new(1);
2305
2306 #[doc = "/4"]
2307 pub const _0_X_2: Self = Self::new(2);
2308
2309 #[doc = "Setting prohibited"]
2310 pub const OTHERS: Self = Self::new(0);
2311 }
2312 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2313 pub struct Trcken_SPEC;
2314 pub type Trcken = crate::EnumBitfieldStruct<u8, Trcken_SPEC>;
2315 impl Trcken {
2316 #[doc = "Stop"]
2317 pub const _0: Self = Self::new(0);
2318
2319 #[doc = "Operation enable"]
2320 pub const _1: Self = Self::new(1);
2321 }
2322}
2323#[doc(hidden)]
2324#[derive(Copy, Clone, Eq, PartialEq)]
2325pub struct Ostdcr_SPEC;
2326impl crate::sealed::RegSpec for Ostdcr_SPEC {
2327 type DataType = u8;
2328}
2329
2330#[doc = "Oscillation Stop Detection Control Register"]
2331pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
2332
2333impl Ostdcr {
2334 #[doc = "Oscillation Stop Detection Interrupt Enable"]
2335 #[inline(always)]
2336 pub fn ostdie(
2337 self,
2338 ) -> crate::common::RegisterField<
2339 0,
2340 0x1,
2341 1,
2342 0,
2343 ostdcr::Ostdie,
2344 ostdcr::Ostdie,
2345 Ostdcr_SPEC,
2346 crate::common::RW,
2347 > {
2348 crate::common::RegisterField::<
2349 0,
2350 0x1,
2351 1,
2352 0,
2353 ostdcr::Ostdie,
2354 ostdcr::Ostdie,
2355 Ostdcr_SPEC,
2356 crate::common::RW,
2357 >::from_register(self, 0)
2358 }
2359
2360 #[doc = "Oscillation Stop Detection Function Enable"]
2361 #[inline(always)]
2362 pub fn ostde(
2363 self,
2364 ) -> crate::common::RegisterField<
2365 7,
2366 0x1,
2367 1,
2368 0,
2369 ostdcr::Ostde,
2370 ostdcr::Ostde,
2371 Ostdcr_SPEC,
2372 crate::common::RW,
2373 > {
2374 crate::common::RegisterField::<
2375 7,
2376 0x1,
2377 1,
2378 0,
2379 ostdcr::Ostde,
2380 ostdcr::Ostde,
2381 Ostdcr_SPEC,
2382 crate::common::RW,
2383 >::from_register(self, 0)
2384 }
2385}
2386impl ::core::default::Default for Ostdcr {
2387 #[inline(always)]
2388 fn default() -> Ostdcr {
2389 <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
2390 }
2391}
2392pub mod ostdcr {
2393
2394 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2395 pub struct Ostdie_SPEC;
2396 pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
2397 impl Ostdie {
2398 #[doc = "Disable oscillation stop detection interrupt (do not notify the POEG)"]
2399 pub const _0: Self = Self::new(0);
2400
2401 #[doc = "Enable oscillation stop detection interrupt (notify the POEG)"]
2402 pub const _1: Self = Self::new(1);
2403 }
2404 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2405 pub struct Ostde_SPEC;
2406 pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
2407 impl Ostde {
2408 #[doc = "Disable oscillation stop detection function"]
2409 pub const _0: Self = Self::new(0);
2410
2411 #[doc = "Enable oscillation stop detection function"]
2412 pub const _1: Self = Self::new(1);
2413 }
2414}
2415#[doc(hidden)]
2416#[derive(Copy, Clone, Eq, PartialEq)]
2417pub struct Ostdsr_SPEC;
2418impl crate::sealed::RegSpec for Ostdsr_SPEC {
2419 type DataType = u8;
2420}
2421
2422#[doc = "Oscillation Stop Detection Status Register"]
2423pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
2424
2425impl Ostdsr {
2426 #[doc = "Oscillation Stop Detection Flag"]
2427 #[inline(always)]
2428 pub fn ostdf(
2429 self,
2430 ) -> crate::common::RegisterField<
2431 0,
2432 0x1,
2433 1,
2434 0,
2435 ostdsr::Ostdf,
2436 ostdsr::Ostdf,
2437 Ostdsr_SPEC,
2438 crate::common::RW,
2439 > {
2440 crate::common::RegisterField::<
2441 0,
2442 0x1,
2443 1,
2444 0,
2445 ostdsr::Ostdf,
2446 ostdsr::Ostdf,
2447 Ostdsr_SPEC,
2448 crate::common::RW,
2449 >::from_register(self, 0)
2450 }
2451}
2452impl ::core::default::Default for Ostdsr {
2453 #[inline(always)]
2454 fn default() -> Ostdsr {
2455 <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
2456 }
2457}
2458pub mod ostdsr {
2459
2460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2461 pub struct Ostdf_SPEC;
2462 pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
2463 impl Ostdf {
2464 #[doc = "Main clock oscillation stop not detected"]
2465 pub const _0: Self = Self::new(0);
2466
2467 #[doc = "Main clock oscillation stop detected"]
2468 pub const _1: Self = Self::new(1);
2469 }
2470}
2471#[doc(hidden)]
2472#[derive(Copy, Clone, Eq, PartialEq)]
2473pub struct Pll2Ccr_SPEC;
2474impl crate::sealed::RegSpec for Pll2Ccr_SPEC {
2475 type DataType = u16;
2476}
2477
2478#[doc = "PLL2 Clock Control Register"]
2479pub type Pll2Ccr = crate::RegValueT<Pll2Ccr_SPEC>;
2480
2481impl Pll2Ccr {
2482 #[doc = "PLL2 Input Frequency Division Ratio Select"]
2483 #[inline(always)]
2484 pub fn pl2idiv(
2485 self,
2486 ) -> crate::common::RegisterField<
2487 0,
2488 0x3,
2489 1,
2490 0,
2491 pll2ccr::Pl2Idiv,
2492 pll2ccr::Pl2Idiv,
2493 Pll2Ccr_SPEC,
2494 crate::common::RW,
2495 > {
2496 crate::common::RegisterField::<
2497 0,
2498 0x3,
2499 1,
2500 0,
2501 pll2ccr::Pl2Idiv,
2502 pll2ccr::Pl2Idiv,
2503 Pll2Ccr_SPEC,
2504 crate::common::RW,
2505 >::from_register(self, 0)
2506 }
2507
2508 #[doc = "PLL2 Clock Source Select"]
2509 #[inline(always)]
2510 pub fn pl2srcsel(
2511 self,
2512 ) -> crate::common::RegisterField<
2513 4,
2514 0x1,
2515 1,
2516 0,
2517 pll2ccr::Pl2Srcsel,
2518 pll2ccr::Pl2Srcsel,
2519 Pll2Ccr_SPEC,
2520 crate::common::RW,
2521 > {
2522 crate::common::RegisterField::<
2523 4,
2524 0x1,
2525 1,
2526 0,
2527 pll2ccr::Pl2Srcsel,
2528 pll2ccr::Pl2Srcsel,
2529 Pll2Ccr_SPEC,
2530 crate::common::RW,
2531 >::from_register(self, 0)
2532 }
2533
2534 #[doc = "PLL2 Frequency Multiplication Factor Select"]
2535 #[inline(always)]
2536 pub fn pll2mul(
2537 self,
2538 ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Pll2Ccr_SPEC, crate::common::RW> {
2539 crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Pll2Ccr_SPEC,crate::common::RW>::from_register(self,0)
2540 }
2541}
2542impl ::core::default::Default for Pll2Ccr {
2543 #[inline(always)]
2544 fn default() -> Pll2Ccr {
2545 <crate::RegValueT<Pll2Ccr_SPEC> as RegisterValue<_>>::new(4864)
2546 }
2547}
2548pub mod pll2ccr {
2549
2550 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2551 pub struct Pl2Idiv_SPEC;
2552 pub type Pl2Idiv = crate::EnumBitfieldStruct<u8, Pl2Idiv_SPEC>;
2553 impl Pl2Idiv {
2554 #[doc = "∕ 1 (value after reset)"]
2555 pub const _00: Self = Self::new(0);
2556
2557 #[doc = "∕ 2"]
2558 pub const _01: Self = Self::new(1);
2559
2560 #[doc = "∕ 3"]
2561 pub const _10: Self = Self::new(2);
2562
2563 #[doc = "Setting prohibited."]
2564 pub const OTHERS: Self = Self::new(0);
2565 }
2566 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2567 pub struct Pl2Srcsel_SPEC;
2568 pub type Pl2Srcsel = crate::EnumBitfieldStruct<u8, Pl2Srcsel_SPEC>;
2569 impl Pl2Srcsel {
2570 #[doc = "Main clock oscillator"]
2571 pub const _0: Self = Self::new(0);
2572
2573 #[doc = "HOCO"]
2574 pub const _1: Self = Self::new(1);
2575 }
2576}
2577#[doc(hidden)]
2578#[derive(Copy, Clone, Eq, PartialEq)]
2579pub struct Pll2Cr_SPEC;
2580impl crate::sealed::RegSpec for Pll2Cr_SPEC {
2581 type DataType = u8;
2582}
2583
2584#[doc = "PLL2 Control Register"]
2585pub type Pll2Cr = crate::RegValueT<Pll2Cr_SPEC>;
2586
2587impl Pll2Cr {
2588 #[doc = "PLL2 Stop Control"]
2589 #[inline(always)]
2590 pub fn pll2stp(
2591 self,
2592 ) -> crate::common::RegisterField<
2593 0,
2594 0x1,
2595 1,
2596 0,
2597 pll2cr::Pll2Stp,
2598 pll2cr::Pll2Stp,
2599 Pll2Cr_SPEC,
2600 crate::common::RW,
2601 > {
2602 crate::common::RegisterField::<
2603 0,
2604 0x1,
2605 1,
2606 0,
2607 pll2cr::Pll2Stp,
2608 pll2cr::Pll2Stp,
2609 Pll2Cr_SPEC,
2610 crate::common::RW,
2611 >::from_register(self, 0)
2612 }
2613}
2614impl ::core::default::Default for Pll2Cr {
2615 #[inline(always)]
2616 fn default() -> Pll2Cr {
2617 <crate::RegValueT<Pll2Cr_SPEC> as RegisterValue<_>>::new(1)
2618 }
2619}
2620pub mod pll2cr {
2621
2622 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2623 pub struct Pll2Stp_SPEC;
2624 pub type Pll2Stp = crate::EnumBitfieldStruct<u8, Pll2Stp_SPEC>;
2625 impl Pll2Stp {
2626 #[doc = "PLL2 is operating"]
2627 pub const _0: Self = Self::new(0);
2628
2629 #[doc = "PLL2 is stopped."]
2630 pub const _1: Self = Self::new(1);
2631 }
2632}
2633#[doc(hidden)]
2634#[derive(Copy, Clone, Eq, PartialEq)]
2635pub struct Mocoutcr_SPEC;
2636impl crate::sealed::RegSpec for Mocoutcr_SPEC {
2637 type DataType = u8;
2638}
2639
2640#[doc = "MOCO User Trimming Control Register"]
2641pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
2642
2643impl Mocoutcr {
2644 #[doc = "MOCO User Trimming"]
2645 #[inline(always)]
2646 pub fn mocoutrm(
2647 self,
2648 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
2649 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2650 }
2651}
2652impl ::core::default::Default for Mocoutcr {
2653 #[inline(always)]
2654 fn default() -> Mocoutcr {
2655 <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
2656 }
2657}
2658
2659#[doc(hidden)]
2660#[derive(Copy, Clone, Eq, PartialEq)]
2661pub struct Hocoutcr_SPEC;
2662impl crate::sealed::RegSpec for Hocoutcr_SPEC {
2663 type DataType = u8;
2664}
2665
2666#[doc = "HOCO User Trimming Control Register"]
2667pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
2668
2669impl Hocoutcr {
2670 #[doc = "HOCO User Trimming"]
2671 #[inline(always)]
2672 pub fn hocoutrm(
2673 self,
2674 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
2675 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2676 }
2677}
2678impl ::core::default::Default for Hocoutcr {
2679 #[inline(always)]
2680 fn default() -> Hocoutcr {
2681 <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
2682 }
2683}
2684
2685#[doc(hidden)]
2686#[derive(Copy, Clone, Eq, PartialEq)]
2687pub struct Usbckdivcr_SPEC;
2688impl crate::sealed::RegSpec for Usbckdivcr_SPEC {
2689 type DataType = u8;
2690}
2691
2692#[doc = "USB Clock Division Control Register"]
2693pub type Usbckdivcr = crate::RegValueT<Usbckdivcr_SPEC>;
2694
2695impl Usbckdivcr {
2696 #[doc = "USB Clock (USBCLK) Division Select"]
2697 #[inline(always)]
2698 pub fn usbckdiv(
2699 self,
2700 ) -> crate::common::RegisterField<
2701 0,
2702 0x7,
2703 1,
2704 0,
2705 usbckdivcr::Usbckdiv,
2706 usbckdivcr::Usbckdiv,
2707 Usbckdivcr_SPEC,
2708 crate::common::RW,
2709 > {
2710 crate::common::RegisterField::<
2711 0,
2712 0x7,
2713 1,
2714 0,
2715 usbckdivcr::Usbckdiv,
2716 usbckdivcr::Usbckdiv,
2717 Usbckdivcr_SPEC,
2718 crate::common::RW,
2719 >::from_register(self, 0)
2720 }
2721}
2722impl ::core::default::Default for Usbckdivcr {
2723 #[inline(always)]
2724 fn default() -> Usbckdivcr {
2725 <crate::RegValueT<Usbckdivcr_SPEC> as RegisterValue<_>>::new(0)
2726 }
2727}
2728pub mod usbckdivcr {
2729
2730 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2731 pub struct Usbckdiv_SPEC;
2732 pub type Usbckdiv = crate::EnumBitfieldStruct<u8, Usbckdiv_SPEC>;
2733 impl Usbckdiv {
2734 #[doc = "∕ 4"]
2735 pub const _010: Self = Self::new(2);
2736
2737 #[doc = "∕ 3"]
2738 pub const _101: Self = Self::new(5);
2739
2740 #[doc = "∕ 5"]
2741 pub const _110: Self = Self::new(6);
2742
2743 #[doc = "Setting prohibited."]
2744 pub const OTHERS: Self = Self::new(0);
2745 }
2746}
2747#[doc(hidden)]
2748#[derive(Copy, Clone, Eq, PartialEq)]
2749pub struct Usbckcr_SPEC;
2750impl crate::sealed::RegSpec for Usbckcr_SPEC {
2751 type DataType = u8;
2752}
2753
2754#[doc = "USB Clock Control Register"]
2755pub type Usbckcr = crate::RegValueT<Usbckcr_SPEC>;
2756
2757impl Usbckcr {
2758 #[doc = "USB Clock (USBCLK) Source Select"]
2759 #[inline(always)]
2760 pub fn usbcksel(
2761 self,
2762 ) -> crate::common::RegisterField<
2763 0,
2764 0x7,
2765 1,
2766 0,
2767 usbckcr::Usbcksel,
2768 usbckcr::Usbcksel,
2769 Usbckcr_SPEC,
2770 crate::common::RW,
2771 > {
2772 crate::common::RegisterField::<
2773 0,
2774 0x7,
2775 1,
2776 0,
2777 usbckcr::Usbcksel,
2778 usbckcr::Usbcksel,
2779 Usbckcr_SPEC,
2780 crate::common::RW,
2781 >::from_register(self, 0)
2782 }
2783
2784 #[doc = "USB Clock (USBCLK) Switching Request"]
2785 #[inline(always)]
2786 pub fn usbcksreq(
2787 self,
2788 ) -> crate::common::RegisterField<
2789 6,
2790 0x1,
2791 1,
2792 0,
2793 usbckcr::Usbcksreq,
2794 usbckcr::Usbcksreq,
2795 Usbckcr_SPEC,
2796 crate::common::RW,
2797 > {
2798 crate::common::RegisterField::<
2799 6,
2800 0x1,
2801 1,
2802 0,
2803 usbckcr::Usbcksreq,
2804 usbckcr::Usbcksreq,
2805 Usbckcr_SPEC,
2806 crate::common::RW,
2807 >::from_register(self, 0)
2808 }
2809
2810 #[doc = "USB Clock (USBCLK) Switching Ready state flag"]
2811 #[inline(always)]
2812 pub fn usbcksrdy(
2813 self,
2814 ) -> crate::common::RegisterField<
2815 7,
2816 0x1,
2817 1,
2818 0,
2819 usbckcr::Usbcksrdy,
2820 usbckcr::Usbcksrdy,
2821 Usbckcr_SPEC,
2822 crate::common::R,
2823 > {
2824 crate::common::RegisterField::<
2825 7,
2826 0x1,
2827 1,
2828 0,
2829 usbckcr::Usbcksrdy,
2830 usbckcr::Usbcksrdy,
2831 Usbckcr_SPEC,
2832 crate::common::R,
2833 >::from_register(self, 0)
2834 }
2835}
2836impl ::core::default::Default for Usbckcr {
2837 #[inline(always)]
2838 fn default() -> Usbckcr {
2839 <crate::RegValueT<Usbckcr_SPEC> as RegisterValue<_>>::new(1)
2840 }
2841}
2842pub mod usbckcr {
2843
2844 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2845 pub struct Usbcksel_SPEC;
2846 pub type Usbcksel = crate::EnumBitfieldStruct<u8, Usbcksel_SPEC>;
2847 impl Usbcksel {
2848 #[doc = "PLL"]
2849 pub const _101: Self = Self::new(5);
2850
2851 #[doc = "PLL2"]
2852 pub const _110: Self = Self::new(6);
2853
2854 #[doc = "Setting prohibited."]
2855 pub const OTHERS: Self = Self::new(0);
2856 }
2857 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2858 pub struct Usbcksreq_SPEC;
2859 pub type Usbcksreq = crate::EnumBitfieldStruct<u8, Usbcksreq_SPEC>;
2860 impl Usbcksreq {
2861 #[doc = "No request"]
2862 pub const _0: Self = Self::new(0);
2863
2864 #[doc = "Request switching."]
2865 pub const _1: Self = Self::new(1);
2866 }
2867 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2868 pub struct Usbcksrdy_SPEC;
2869 pub type Usbcksrdy = crate::EnumBitfieldStruct<u8, Usbcksrdy_SPEC>;
2870 impl Usbcksrdy {
2871 #[doc = "Impossible to Switch"]
2872 pub const _0: Self = Self::new(0);
2873
2874 #[doc = "Possible to Switch"]
2875 pub const _1: Self = Self::new(1);
2876 }
2877}
2878#[doc(hidden)]
2879#[derive(Copy, Clone, Eq, PartialEq)]
2880pub struct Snzreqcr1_SPEC;
2881impl crate::sealed::RegSpec for Snzreqcr1_SPEC {
2882 type DataType = u32;
2883}
2884
2885#[doc = "Snooze Request Control Register 1"]
2886pub type Snzreqcr1 = crate::RegValueT<Snzreqcr1_SPEC>;
2887
2888impl Snzreqcr1 {
2889 #[doc = "Enable AGT3 underflow snooze request"]
2890 #[inline(always)]
2891 pub fn snzreqen0(
2892 self,
2893 ) -> crate::common::RegisterField<
2894 0,
2895 0x1,
2896 1,
2897 0,
2898 snzreqcr1::Snzreqen0,
2899 snzreqcr1::Snzreqen0,
2900 Snzreqcr1_SPEC,
2901 crate::common::RW,
2902 > {
2903 crate::common::RegisterField::<
2904 0,
2905 0x1,
2906 1,
2907 0,
2908 snzreqcr1::Snzreqen0,
2909 snzreqcr1::Snzreqen0,
2910 Snzreqcr1_SPEC,
2911 crate::common::RW,
2912 >::from_register(self, 0)
2913 }
2914
2915 #[doc = "Enable AGT3 compare match A snooze request"]
2916 #[inline(always)]
2917 pub fn snzreqen1(
2918 self,
2919 ) -> crate::common::RegisterField<
2920 1,
2921 0x1,
2922 1,
2923 0,
2924 snzreqcr1::Snzreqen1,
2925 snzreqcr1::Snzreqen1,
2926 Snzreqcr1_SPEC,
2927 crate::common::RW,
2928 > {
2929 crate::common::RegisterField::<
2930 1,
2931 0x1,
2932 1,
2933 0,
2934 snzreqcr1::Snzreqen1,
2935 snzreqcr1::Snzreqen1,
2936 Snzreqcr1_SPEC,
2937 crate::common::RW,
2938 >::from_register(self, 0)
2939 }
2940
2941 #[doc = "Enable AGT3 compare match B snooze request"]
2942 #[inline(always)]
2943 pub fn snzreqen2(
2944 self,
2945 ) -> crate::common::RegisterField<
2946 2,
2947 0x1,
2948 1,
2949 0,
2950 snzreqcr1::Snzreqen2,
2951 snzreqcr1::Snzreqen2,
2952 Snzreqcr1_SPEC,
2953 crate::common::RW,
2954 > {
2955 crate::common::RegisterField::<
2956 2,
2957 0x1,
2958 1,
2959 0,
2960 snzreqcr1::Snzreqen2,
2961 snzreqcr1::Snzreqen2,
2962 Snzreqcr1_SPEC,
2963 crate::common::RW,
2964 >::from_register(self, 0)
2965 }
2966}
2967impl ::core::default::Default for Snzreqcr1 {
2968 #[inline(always)]
2969 fn default() -> Snzreqcr1 {
2970 <crate::RegValueT<Snzreqcr1_SPEC> as RegisterValue<_>>::new(0)
2971 }
2972}
2973pub mod snzreqcr1 {
2974
2975 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2976 pub struct Snzreqen0_SPEC;
2977 pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
2978 impl Snzreqen0 {
2979 #[doc = "Disable the snooze request"]
2980 pub const _0: Self = Self::new(0);
2981
2982 #[doc = "Enable the snooze request"]
2983 pub const _1: Self = Self::new(1);
2984 }
2985 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2986 pub struct Snzreqen1_SPEC;
2987 pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
2988 impl Snzreqen1 {
2989 #[doc = "Disable the snooze request"]
2990 pub const _0: Self = Self::new(0);
2991
2992 #[doc = "Enable the snooze request"]
2993 pub const _1: Self = Self::new(1);
2994 }
2995 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2996 pub struct Snzreqen2_SPEC;
2997 pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
2998 impl Snzreqen2 {
2999 #[doc = "Disable the snooze request"]
3000 pub const _0: Self = Self::new(0);
3001
3002 #[doc = "Enable the snooze request"]
3003 pub const _1: Self = Self::new(1);
3004 }
3005}
3006#[doc(hidden)]
3007#[derive(Copy, Clone, Eq, PartialEq)]
3008pub struct Snzcr_SPEC;
3009impl crate::sealed::RegSpec for Snzcr_SPEC {
3010 type DataType = u8;
3011}
3012
3013#[doc = "Snooze Control Register"]
3014pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
3015
3016impl Snzcr {
3017 #[doc = "RXD0 Snooze Request Enable"]
3018 #[inline(always)]
3019 pub fn rxdreqen(
3020 self,
3021 ) -> crate::common::RegisterField<
3022 0,
3023 0x1,
3024 1,
3025 0,
3026 snzcr::Rxdreqen,
3027 snzcr::Rxdreqen,
3028 Snzcr_SPEC,
3029 crate::common::RW,
3030 > {
3031 crate::common::RegisterField::<
3032 0,
3033 0x1,
3034 1,
3035 0,
3036 snzcr::Rxdreqen,
3037 snzcr::Rxdreqen,
3038 Snzcr_SPEC,
3039 crate::common::RW,
3040 >::from_register(self, 0)
3041 }
3042
3043 #[doc = "DTC Enable in Snooze mode"]
3044 #[inline(always)]
3045 pub fn snzdtcen(
3046 self,
3047 ) -> crate::common::RegisterField<
3048 1,
3049 0x1,
3050 1,
3051 0,
3052 snzcr::Snzdtcen,
3053 snzcr::Snzdtcen,
3054 Snzcr_SPEC,
3055 crate::common::RW,
3056 > {
3057 crate::common::RegisterField::<
3058 1,
3059 0x1,
3060 1,
3061 0,
3062 snzcr::Snzdtcen,
3063 snzcr::Snzdtcen,
3064 Snzcr_SPEC,
3065 crate::common::RW,
3066 >::from_register(self, 0)
3067 }
3068
3069 #[doc = "Snooze mode Enable"]
3070 #[inline(always)]
3071 pub fn snze(
3072 self,
3073 ) -> crate::common::RegisterField<
3074 7,
3075 0x1,
3076 1,
3077 0,
3078 snzcr::Snze,
3079 snzcr::Snze,
3080 Snzcr_SPEC,
3081 crate::common::RW,
3082 > {
3083 crate::common::RegisterField::<
3084 7,
3085 0x1,
3086 1,
3087 0,
3088 snzcr::Snze,
3089 snzcr::Snze,
3090 Snzcr_SPEC,
3091 crate::common::RW,
3092 >::from_register(self, 0)
3093 }
3094}
3095impl ::core::default::Default for Snzcr {
3096 #[inline(always)]
3097 fn default() -> Snzcr {
3098 <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
3099 }
3100}
3101pub mod snzcr {
3102
3103 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3104 pub struct Rxdreqen_SPEC;
3105 pub type Rxdreqen = crate::EnumBitfieldStruct<u8, Rxdreqen_SPEC>;
3106 impl Rxdreqen {
3107 #[doc = "Ignore RXD0 falling edge in Software Standby mode"]
3108 pub const _0: Self = Self::new(0);
3109
3110 #[doc = "Detect RXD0 falling edge in Software Standby mode"]
3111 pub const _1: Self = Self::new(1);
3112 }
3113 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3114 pub struct Snzdtcen_SPEC;
3115 pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
3116 impl Snzdtcen {
3117 #[doc = "Disable DTC operation"]
3118 pub const _0: Self = Self::new(0);
3119
3120 #[doc = "Enable DTC operation"]
3121 pub const _1: Self = Self::new(1);
3122 }
3123 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3124 pub struct Snze_SPEC;
3125 pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
3126 impl Snze {
3127 #[doc = "Disable Snooze mode"]
3128 pub const _0: Self = Self::new(0);
3129
3130 #[doc = "Enable Snooze mode"]
3131 pub const _1: Self = Self::new(1);
3132 }
3133}
3134#[doc(hidden)]
3135#[derive(Copy, Clone, Eq, PartialEq)]
3136pub struct Snzedcr0_SPEC;
3137impl crate::sealed::RegSpec for Snzedcr0_SPEC {
3138 type DataType = u8;
3139}
3140
3141#[doc = "Snooze End Control Register 0"]
3142pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
3143
3144impl Snzedcr0 {
3145 #[doc = "AGT1 Underflow Snooze End Enable"]
3146 #[inline(always)]
3147 pub fn agtunfed(
3148 self,
3149 ) -> crate::common::RegisterField<
3150 0,
3151 0x1,
3152 1,
3153 0,
3154 snzedcr0::Agtunfed,
3155 snzedcr0::Agtunfed,
3156 Snzedcr0_SPEC,
3157 crate::common::RW,
3158 > {
3159 crate::common::RegisterField::<
3160 0,
3161 0x1,
3162 1,
3163 0,
3164 snzedcr0::Agtunfed,
3165 snzedcr0::Agtunfed,
3166 Snzedcr0_SPEC,
3167 crate::common::RW,
3168 >::from_register(self, 0)
3169 }
3170
3171 #[doc = "Last DTC Transmission Completion Snooze End Enable"]
3172 #[inline(always)]
3173 pub fn dtczred(
3174 self,
3175 ) -> crate::common::RegisterField<
3176 1,
3177 0x1,
3178 1,
3179 0,
3180 snzedcr0::Dtczred,
3181 snzedcr0::Dtczred,
3182 Snzedcr0_SPEC,
3183 crate::common::RW,
3184 > {
3185 crate::common::RegisterField::<
3186 1,
3187 0x1,
3188 1,
3189 0,
3190 snzedcr0::Dtczred,
3191 snzedcr0::Dtczred,
3192 Snzedcr0_SPEC,
3193 crate::common::RW,
3194 >::from_register(self, 0)
3195 }
3196
3197 #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
3198 #[inline(always)]
3199 pub fn dtcnzred(
3200 self,
3201 ) -> crate::common::RegisterField<
3202 2,
3203 0x1,
3204 1,
3205 0,
3206 snzedcr0::Dtcnzred,
3207 snzedcr0::Dtcnzred,
3208 Snzedcr0_SPEC,
3209 crate::common::RW,
3210 > {
3211 crate::common::RegisterField::<
3212 2,
3213 0x1,
3214 1,
3215 0,
3216 snzedcr0::Dtcnzred,
3217 snzedcr0::Dtcnzred,
3218 Snzedcr0_SPEC,
3219 crate::common::RW,
3220 >::from_register(self, 0)
3221 }
3222
3223 #[doc = "ADC12 Compare Match Snooze End Enable"]
3224 #[inline(always)]
3225 pub fn ad0mated(
3226 self,
3227 ) -> crate::common::RegisterField<
3228 3,
3229 0x1,
3230 1,
3231 0,
3232 snzedcr0::Ad0Mated,
3233 snzedcr0::Ad0Mated,
3234 Snzedcr0_SPEC,
3235 crate::common::RW,
3236 > {
3237 crate::common::RegisterField::<
3238 3,
3239 0x1,
3240 1,
3241 0,
3242 snzedcr0::Ad0Mated,
3243 snzedcr0::Ad0Mated,
3244 Snzedcr0_SPEC,
3245 crate::common::RW,
3246 >::from_register(self, 0)
3247 }
3248
3249 #[doc = "ADC12 Compare Mismatch Snooze End Enable"]
3250 #[inline(always)]
3251 pub fn ad0umted(
3252 self,
3253 ) -> crate::common::RegisterField<
3254 4,
3255 0x1,
3256 1,
3257 0,
3258 snzedcr0::Ad0Umted,
3259 snzedcr0::Ad0Umted,
3260 Snzedcr0_SPEC,
3261 crate::common::RW,
3262 > {
3263 crate::common::RegisterField::<
3264 4,
3265 0x1,
3266 1,
3267 0,
3268 snzedcr0::Ad0Umted,
3269 snzedcr0::Ad0Umted,
3270 Snzedcr0_SPEC,
3271 crate::common::RW,
3272 >::from_register(self, 0)
3273 }
3274
3275 #[doc = "SCI0 Address Mismatch Snooze End Enable"]
3276 #[inline(always)]
3277 pub fn sci0umted(
3278 self,
3279 ) -> crate::common::RegisterField<
3280 7,
3281 0x1,
3282 1,
3283 0,
3284 snzedcr0::Sci0Umted,
3285 snzedcr0::Sci0Umted,
3286 Snzedcr0_SPEC,
3287 crate::common::RW,
3288 > {
3289 crate::common::RegisterField::<
3290 7,
3291 0x1,
3292 1,
3293 0,
3294 snzedcr0::Sci0Umted,
3295 snzedcr0::Sci0Umted,
3296 Snzedcr0_SPEC,
3297 crate::common::RW,
3298 >::from_register(self, 0)
3299 }
3300}
3301impl ::core::default::Default for Snzedcr0 {
3302 #[inline(always)]
3303 fn default() -> Snzedcr0 {
3304 <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
3305 }
3306}
3307pub mod snzedcr0 {
3308
3309 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3310 pub struct Agtunfed_SPEC;
3311 pub type Agtunfed = crate::EnumBitfieldStruct<u8, Agtunfed_SPEC>;
3312 impl Agtunfed {
3313 #[doc = "Disable the snooze end request"]
3314 pub const _0: Self = Self::new(0);
3315
3316 #[doc = "Enable the snooze end request"]
3317 pub const _1: Self = Self::new(1);
3318 }
3319 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3320 pub struct Dtczred_SPEC;
3321 pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
3322 impl Dtczred {
3323 #[doc = "Disable the snooze end request"]
3324 pub const _0: Self = Self::new(0);
3325
3326 #[doc = "Enable the snooze end request"]
3327 pub const _1: Self = Self::new(1);
3328 }
3329 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3330 pub struct Dtcnzred_SPEC;
3331 pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
3332 impl Dtcnzred {
3333 #[doc = "Disable the snooze end request"]
3334 pub const _0: Self = Self::new(0);
3335
3336 #[doc = "Enable the snooze end request"]
3337 pub const _1: Self = Self::new(1);
3338 }
3339 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3340 pub struct Ad0Mated_SPEC;
3341 pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
3342 impl Ad0Mated {
3343 #[doc = "Disable the snooze end request"]
3344 pub const _0: Self = Self::new(0);
3345
3346 #[doc = "Enable the snooze end request"]
3347 pub const _1: Self = Self::new(1);
3348 }
3349 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3350 pub struct Ad0Umted_SPEC;
3351 pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
3352 impl Ad0Umted {
3353 #[doc = "Disable the snooze end request"]
3354 pub const _0: Self = Self::new(0);
3355
3356 #[doc = "Enable the snooze end request"]
3357 pub const _1: Self = Self::new(1);
3358 }
3359 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3360 pub struct Sci0Umted_SPEC;
3361 pub type Sci0Umted = crate::EnumBitfieldStruct<u8, Sci0Umted_SPEC>;
3362 impl Sci0Umted {
3363 #[doc = "Disable the snooze end request"]
3364 pub const _0: Self = Self::new(0);
3365
3366 #[doc = "Enable the snooze end request"]
3367 pub const _1: Self = Self::new(1);
3368 }
3369}
3370#[doc(hidden)]
3371#[derive(Copy, Clone, Eq, PartialEq)]
3372pub struct Snzedcr1_SPEC;
3373impl crate::sealed::RegSpec for Snzedcr1_SPEC {
3374 type DataType = u8;
3375}
3376
3377#[doc = "Snooze End Control Register 1"]
3378pub type Snzedcr1 = crate::RegValueT<Snzedcr1_SPEC>;
3379
3380impl Snzedcr1 {
3381 #[doc = "AGT3 underflow Snooze End Enable"]
3382 #[inline(always)]
3383 pub fn agt3unfed(
3384 self,
3385 ) -> crate::common::RegisterField<
3386 0,
3387 0x1,
3388 1,
3389 0,
3390 snzedcr1::Agt3Unfed,
3391 snzedcr1::Agt3Unfed,
3392 Snzedcr1_SPEC,
3393 crate::common::RW,
3394 > {
3395 crate::common::RegisterField::<
3396 0,
3397 0x1,
3398 1,
3399 0,
3400 snzedcr1::Agt3Unfed,
3401 snzedcr1::Agt3Unfed,
3402 Snzedcr1_SPEC,
3403 crate::common::RW,
3404 >::from_register(self, 0)
3405 }
3406}
3407impl ::core::default::Default for Snzedcr1 {
3408 #[inline(always)]
3409 fn default() -> Snzedcr1 {
3410 <crate::RegValueT<Snzedcr1_SPEC> as RegisterValue<_>>::new(0)
3411 }
3412}
3413pub mod snzedcr1 {
3414
3415 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3416 pub struct Agt3Unfed_SPEC;
3417 pub type Agt3Unfed = crate::EnumBitfieldStruct<u8, Agt3Unfed_SPEC>;
3418 impl Agt3Unfed {
3419 #[doc = "Disable the Snooze End request"]
3420 pub const _0: Self = Self::new(0);
3421
3422 #[doc = "Enable the Snooze End request"]
3423 pub const _1: Self = Self::new(1);
3424 }
3425}
3426#[doc(hidden)]
3427#[derive(Copy, Clone, Eq, PartialEq)]
3428pub struct Snzreqcr0_SPEC;
3429impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
3430 type DataType = u32;
3431}
3432
3433#[doc = "Snooze Request Control Register 0"]
3434pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
3435
3436impl Snzreqcr0 {
3437 #[doc = "Enable IRQ0 pin snooze request"]
3438 #[inline(always)]
3439 pub fn snzreqen0(
3440 self,
3441 ) -> crate::common::RegisterField<
3442 0,
3443 0x1,
3444 1,
3445 0,
3446 snzreqcr0::Snzreqen0,
3447 snzreqcr0::Snzreqen0,
3448 Snzreqcr0_SPEC,
3449 crate::common::RW,
3450 > {
3451 crate::common::RegisterField::<
3452 0,
3453 0x1,
3454 1,
3455 0,
3456 snzreqcr0::Snzreqen0,
3457 snzreqcr0::Snzreqen0,
3458 Snzreqcr0_SPEC,
3459 crate::common::RW,
3460 >::from_register(self, 0)
3461 }
3462
3463 #[doc = "Enable IRQ1 pin snooze request"]
3464 #[inline(always)]
3465 pub fn snzreqen1(
3466 self,
3467 ) -> crate::common::RegisterField<
3468 1,
3469 0x1,
3470 1,
3471 0,
3472 snzreqcr0::Snzreqen1,
3473 snzreqcr0::Snzreqen1,
3474 Snzreqcr0_SPEC,
3475 crate::common::RW,
3476 > {
3477 crate::common::RegisterField::<
3478 1,
3479 0x1,
3480 1,
3481 0,
3482 snzreqcr0::Snzreqen1,
3483 snzreqcr0::Snzreqen1,
3484 Snzreqcr0_SPEC,
3485 crate::common::RW,
3486 >::from_register(self, 0)
3487 }
3488
3489 #[doc = "Enable IRQ2 pin snooze request"]
3490 #[inline(always)]
3491 pub fn snzreqen2(
3492 self,
3493 ) -> crate::common::RegisterField<
3494 2,
3495 0x1,
3496 1,
3497 0,
3498 snzreqcr0::Snzreqen2,
3499 snzreqcr0::Snzreqen2,
3500 Snzreqcr0_SPEC,
3501 crate::common::RW,
3502 > {
3503 crate::common::RegisterField::<
3504 2,
3505 0x1,
3506 1,
3507 0,
3508 snzreqcr0::Snzreqen2,
3509 snzreqcr0::Snzreqen2,
3510 Snzreqcr0_SPEC,
3511 crate::common::RW,
3512 >::from_register(self, 0)
3513 }
3514
3515 #[doc = "Enable IRQ3 pin snooze request"]
3516 #[inline(always)]
3517 pub fn snzreqen3(
3518 self,
3519 ) -> crate::common::RegisterField<
3520 3,
3521 0x1,
3522 1,
3523 0,
3524 snzreqcr0::Snzreqen3,
3525 snzreqcr0::Snzreqen3,
3526 Snzreqcr0_SPEC,
3527 crate::common::RW,
3528 > {
3529 crate::common::RegisterField::<
3530 3,
3531 0x1,
3532 1,
3533 0,
3534 snzreqcr0::Snzreqen3,
3535 snzreqcr0::Snzreqen3,
3536 Snzreqcr0_SPEC,
3537 crate::common::RW,
3538 >::from_register(self, 0)
3539 }
3540
3541 #[doc = "Enable IRQ4 pin snooze request"]
3542 #[inline(always)]
3543 pub fn snzreqen4(
3544 self,
3545 ) -> crate::common::RegisterField<
3546 4,
3547 0x1,
3548 1,
3549 0,
3550 snzreqcr0::Snzreqen4,
3551 snzreqcr0::Snzreqen4,
3552 Snzreqcr0_SPEC,
3553 crate::common::RW,
3554 > {
3555 crate::common::RegisterField::<
3556 4,
3557 0x1,
3558 1,
3559 0,
3560 snzreqcr0::Snzreqen4,
3561 snzreqcr0::Snzreqen4,
3562 Snzreqcr0_SPEC,
3563 crate::common::RW,
3564 >::from_register(self, 0)
3565 }
3566
3567 #[doc = "Enable IRQ5 pin snooze request"]
3568 #[inline(always)]
3569 pub fn snzreqen5(
3570 self,
3571 ) -> crate::common::RegisterField<
3572 5,
3573 0x1,
3574 1,
3575 0,
3576 snzreqcr0::Snzreqen5,
3577 snzreqcr0::Snzreqen5,
3578 Snzreqcr0_SPEC,
3579 crate::common::RW,
3580 > {
3581 crate::common::RegisterField::<
3582 5,
3583 0x1,
3584 1,
3585 0,
3586 snzreqcr0::Snzreqen5,
3587 snzreqcr0::Snzreqen5,
3588 Snzreqcr0_SPEC,
3589 crate::common::RW,
3590 >::from_register(self, 0)
3591 }
3592
3593 #[doc = "Enable IRQ6 pin snooze request"]
3594 #[inline(always)]
3595 pub fn snzreqen6(
3596 self,
3597 ) -> crate::common::RegisterField<
3598 6,
3599 0x1,
3600 1,
3601 0,
3602 snzreqcr0::Snzreqen6,
3603 snzreqcr0::Snzreqen6,
3604 Snzreqcr0_SPEC,
3605 crate::common::RW,
3606 > {
3607 crate::common::RegisterField::<
3608 6,
3609 0x1,
3610 1,
3611 0,
3612 snzreqcr0::Snzreqen6,
3613 snzreqcr0::Snzreqen6,
3614 Snzreqcr0_SPEC,
3615 crate::common::RW,
3616 >::from_register(self, 0)
3617 }
3618
3619 #[doc = "Enable IRQ7 pin snooze request"]
3620 #[inline(always)]
3621 pub fn snzreqen7(
3622 self,
3623 ) -> crate::common::RegisterField<
3624 7,
3625 0x1,
3626 1,
3627 0,
3628 snzreqcr0::Snzreqen7,
3629 snzreqcr0::Snzreqen7,
3630 Snzreqcr0_SPEC,
3631 crate::common::RW,
3632 > {
3633 crate::common::RegisterField::<
3634 7,
3635 0x1,
3636 1,
3637 0,
3638 snzreqcr0::Snzreqen7,
3639 snzreqcr0::Snzreqen7,
3640 Snzreqcr0_SPEC,
3641 crate::common::RW,
3642 >::from_register(self, 0)
3643 }
3644
3645 #[doc = "Enable IRQ8 pin snooze request"]
3646 #[inline(always)]
3647 pub fn snzreqen8(
3648 self,
3649 ) -> crate::common::RegisterField<
3650 8,
3651 0x1,
3652 1,
3653 0,
3654 snzreqcr0::Snzreqen8,
3655 snzreqcr0::Snzreqen8,
3656 Snzreqcr0_SPEC,
3657 crate::common::RW,
3658 > {
3659 crate::common::RegisterField::<
3660 8,
3661 0x1,
3662 1,
3663 0,
3664 snzreqcr0::Snzreqen8,
3665 snzreqcr0::Snzreqen8,
3666 Snzreqcr0_SPEC,
3667 crate::common::RW,
3668 >::from_register(self, 0)
3669 }
3670
3671 #[doc = "Enable IRQ9 pin snooze request"]
3672 #[inline(always)]
3673 pub fn snzreqen9(
3674 self,
3675 ) -> crate::common::RegisterField<
3676 9,
3677 0x1,
3678 1,
3679 0,
3680 snzreqcr0::Snzreqen9,
3681 snzreqcr0::Snzreqen9,
3682 Snzreqcr0_SPEC,
3683 crate::common::RW,
3684 > {
3685 crate::common::RegisterField::<
3686 9,
3687 0x1,
3688 1,
3689 0,
3690 snzreqcr0::Snzreqen9,
3691 snzreqcr0::Snzreqen9,
3692 Snzreqcr0_SPEC,
3693 crate::common::RW,
3694 >::from_register(self, 0)
3695 }
3696
3697 #[doc = "Enable IRQ10 pin snooze request"]
3698 #[inline(always)]
3699 pub fn snzreqen10(
3700 self,
3701 ) -> crate::common::RegisterField<
3702 10,
3703 0x1,
3704 1,
3705 0,
3706 snzreqcr0::Snzreqen10,
3707 snzreqcr0::Snzreqen10,
3708 Snzreqcr0_SPEC,
3709 crate::common::RW,
3710 > {
3711 crate::common::RegisterField::<
3712 10,
3713 0x1,
3714 1,
3715 0,
3716 snzreqcr0::Snzreqen10,
3717 snzreqcr0::Snzreqen10,
3718 Snzreqcr0_SPEC,
3719 crate::common::RW,
3720 >::from_register(self, 0)
3721 }
3722
3723 #[doc = "Enable IRQ11 pin snooze request"]
3724 #[inline(always)]
3725 pub fn snzreqen11(
3726 self,
3727 ) -> crate::common::RegisterField<
3728 11,
3729 0x1,
3730 1,
3731 0,
3732 snzreqcr0::Snzreqen11,
3733 snzreqcr0::Snzreqen11,
3734 Snzreqcr0_SPEC,
3735 crate::common::RW,
3736 > {
3737 crate::common::RegisterField::<
3738 11,
3739 0x1,
3740 1,
3741 0,
3742 snzreqcr0::Snzreqen11,
3743 snzreqcr0::Snzreqen11,
3744 Snzreqcr0_SPEC,
3745 crate::common::RW,
3746 >::from_register(self, 0)
3747 }
3748
3749 #[doc = "Enable IRQ12 pin snooze request"]
3750 #[inline(always)]
3751 pub fn snzreqen12(
3752 self,
3753 ) -> crate::common::RegisterField<
3754 12,
3755 0x1,
3756 1,
3757 0,
3758 snzreqcr0::Snzreqen12,
3759 snzreqcr0::Snzreqen12,
3760 Snzreqcr0_SPEC,
3761 crate::common::RW,
3762 > {
3763 crate::common::RegisterField::<
3764 12,
3765 0x1,
3766 1,
3767 0,
3768 snzreqcr0::Snzreqen12,
3769 snzreqcr0::Snzreqen12,
3770 Snzreqcr0_SPEC,
3771 crate::common::RW,
3772 >::from_register(self, 0)
3773 }
3774
3775 #[doc = "Enable IRQ13 pin snooze request"]
3776 #[inline(always)]
3777 pub fn snzreqen13(
3778 self,
3779 ) -> crate::common::RegisterField<
3780 13,
3781 0x1,
3782 1,
3783 0,
3784 snzreqcr0::Snzreqen13,
3785 snzreqcr0::Snzreqen13,
3786 Snzreqcr0_SPEC,
3787 crate::common::RW,
3788 > {
3789 crate::common::RegisterField::<
3790 13,
3791 0x1,
3792 1,
3793 0,
3794 snzreqcr0::Snzreqen13,
3795 snzreqcr0::Snzreqen13,
3796 Snzreqcr0_SPEC,
3797 crate::common::RW,
3798 >::from_register(self, 0)
3799 }
3800
3801 #[doc = "Enable IRQ14 pin snooze request"]
3802 #[inline(always)]
3803 pub fn snzreqen14(
3804 self,
3805 ) -> crate::common::RegisterField<
3806 14,
3807 0x1,
3808 1,
3809 0,
3810 snzreqcr0::Snzreqen14,
3811 snzreqcr0::Snzreqen14,
3812 Snzreqcr0_SPEC,
3813 crate::common::RW,
3814 > {
3815 crate::common::RegisterField::<
3816 14,
3817 0x1,
3818 1,
3819 0,
3820 snzreqcr0::Snzreqen14,
3821 snzreqcr0::Snzreqen14,
3822 Snzreqcr0_SPEC,
3823 crate::common::RW,
3824 >::from_register(self, 0)
3825 }
3826
3827 #[doc = "Enable IRQ15 pin snooze request"]
3828 #[inline(always)]
3829 pub fn snzreqen15(
3830 self,
3831 ) -> crate::common::RegisterField<
3832 15,
3833 0x1,
3834 1,
3835 0,
3836 snzreqcr0::Snzreqen15,
3837 snzreqcr0::Snzreqen15,
3838 Snzreqcr0_SPEC,
3839 crate::common::RW,
3840 > {
3841 crate::common::RegisterField::<
3842 15,
3843 0x1,
3844 1,
3845 0,
3846 snzreqcr0::Snzreqen15,
3847 snzreqcr0::Snzreqen15,
3848 Snzreqcr0_SPEC,
3849 crate::common::RW,
3850 >::from_register(self, 0)
3851 }
3852
3853 #[doc = "Enable RTC alarm snooze request"]
3854 #[inline(always)]
3855 pub fn snzreqen24(
3856 self,
3857 ) -> crate::common::RegisterField<
3858 24,
3859 0x1,
3860 1,
3861 0,
3862 snzreqcr0::Snzreqen24,
3863 snzreqcr0::Snzreqen24,
3864 Snzreqcr0_SPEC,
3865 crate::common::RW,
3866 > {
3867 crate::common::RegisterField::<
3868 24,
3869 0x1,
3870 1,
3871 0,
3872 snzreqcr0::Snzreqen24,
3873 snzreqcr0::Snzreqen24,
3874 Snzreqcr0_SPEC,
3875 crate::common::RW,
3876 >::from_register(self, 0)
3877 }
3878
3879 #[doc = "Enable RTC period snooze request"]
3880 #[inline(always)]
3881 pub fn snzreqen25(
3882 self,
3883 ) -> crate::common::RegisterField<
3884 25,
3885 0x1,
3886 1,
3887 0,
3888 snzreqcr0::Snzreqen25,
3889 snzreqcr0::Snzreqen25,
3890 Snzreqcr0_SPEC,
3891 crate::common::RW,
3892 > {
3893 crate::common::RegisterField::<
3894 25,
3895 0x1,
3896 1,
3897 0,
3898 snzreqcr0::Snzreqen25,
3899 snzreqcr0::Snzreqen25,
3900 Snzreqcr0_SPEC,
3901 crate::common::RW,
3902 >::from_register(self, 0)
3903 }
3904
3905 #[doc = "Enable AGT1 underflow snooze request"]
3906 #[inline(always)]
3907 pub fn snzreqen28(
3908 self,
3909 ) -> crate::common::RegisterField<
3910 28,
3911 0x1,
3912 1,
3913 0,
3914 snzreqcr0::Snzreqen28,
3915 snzreqcr0::Snzreqen28,
3916 Snzreqcr0_SPEC,
3917 crate::common::RW,
3918 > {
3919 crate::common::RegisterField::<
3920 28,
3921 0x1,
3922 1,
3923 0,
3924 snzreqcr0::Snzreqen28,
3925 snzreqcr0::Snzreqen28,
3926 Snzreqcr0_SPEC,
3927 crate::common::RW,
3928 >::from_register(self, 0)
3929 }
3930
3931 #[doc = "Enable AGT1 compare match A snooze request"]
3932 #[inline(always)]
3933 pub fn snzreqen29(
3934 self,
3935 ) -> crate::common::RegisterField<
3936 29,
3937 0x1,
3938 1,
3939 0,
3940 snzreqcr0::Snzreqen29,
3941 snzreqcr0::Snzreqen29,
3942 Snzreqcr0_SPEC,
3943 crate::common::RW,
3944 > {
3945 crate::common::RegisterField::<
3946 29,
3947 0x1,
3948 1,
3949 0,
3950 snzreqcr0::Snzreqen29,
3951 snzreqcr0::Snzreqen29,
3952 Snzreqcr0_SPEC,
3953 crate::common::RW,
3954 >::from_register(self, 0)
3955 }
3956
3957 #[doc = "Enable AGT1 compare match B snooze request"]
3958 #[inline(always)]
3959 pub fn snzreqen30(
3960 self,
3961 ) -> crate::common::RegisterField<
3962 30,
3963 0x1,
3964 1,
3965 0,
3966 snzreqcr0::Snzreqen30,
3967 snzreqcr0::Snzreqen30,
3968 Snzreqcr0_SPEC,
3969 crate::common::RW,
3970 > {
3971 crate::common::RegisterField::<
3972 30,
3973 0x1,
3974 1,
3975 0,
3976 snzreqcr0::Snzreqen30,
3977 snzreqcr0::Snzreqen30,
3978 Snzreqcr0_SPEC,
3979 crate::common::RW,
3980 >::from_register(self, 0)
3981 }
3982}
3983impl ::core::default::Default for Snzreqcr0 {
3984 #[inline(always)]
3985 fn default() -> Snzreqcr0 {
3986 <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
3987 }
3988}
3989pub mod snzreqcr0 {
3990
3991 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3992 pub struct Snzreqen0_SPEC;
3993 pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
3994 impl Snzreqen0 {
3995 #[doc = "Disable the snooze request"]
3996 pub const _0: Self = Self::new(0);
3997
3998 #[doc = "Enable the snooze request"]
3999 pub const _1: Self = Self::new(1);
4000 }
4001 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4002 pub struct Snzreqen1_SPEC;
4003 pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
4004 impl Snzreqen1 {
4005 #[doc = "Disable the snooze request"]
4006 pub const _0: Self = Self::new(0);
4007
4008 #[doc = "Enable the snooze request"]
4009 pub const _1: Self = Self::new(1);
4010 }
4011 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4012 pub struct Snzreqen2_SPEC;
4013 pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
4014 impl Snzreqen2 {
4015 #[doc = "Disable the snooze request"]
4016 pub const _0: Self = Self::new(0);
4017
4018 #[doc = "Enable the snooze request"]
4019 pub const _1: Self = Self::new(1);
4020 }
4021 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4022 pub struct Snzreqen3_SPEC;
4023 pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
4024 impl Snzreqen3 {
4025 #[doc = "Disable the snooze request"]
4026 pub const _0: Self = Self::new(0);
4027
4028 #[doc = "Enable the snooze request"]
4029 pub const _1: Self = Self::new(1);
4030 }
4031 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4032 pub struct Snzreqen4_SPEC;
4033 pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
4034 impl Snzreqen4 {
4035 #[doc = "Disable the snooze request"]
4036 pub const _0: Self = Self::new(0);
4037
4038 #[doc = "Enable the snooze request"]
4039 pub const _1: Self = Self::new(1);
4040 }
4041 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4042 pub struct Snzreqen5_SPEC;
4043 pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
4044 impl Snzreqen5 {
4045 #[doc = "Disable the snooze request"]
4046 pub const _0: Self = Self::new(0);
4047
4048 #[doc = "Enable the snooze request"]
4049 pub const _1: Self = Self::new(1);
4050 }
4051 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4052 pub struct Snzreqen6_SPEC;
4053 pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
4054 impl Snzreqen6 {
4055 #[doc = "Disable the snooze request"]
4056 pub const _0: Self = Self::new(0);
4057
4058 #[doc = "Enable the snooze request"]
4059 pub const _1: Self = Self::new(1);
4060 }
4061 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4062 pub struct Snzreqen7_SPEC;
4063 pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
4064 impl Snzreqen7 {
4065 #[doc = "Disable the snooze request"]
4066 pub const _0: Self = Self::new(0);
4067
4068 #[doc = "Enable the snooze request"]
4069 pub const _1: Self = Self::new(1);
4070 }
4071 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4072 pub struct Snzreqen8_SPEC;
4073 pub type Snzreqen8 = crate::EnumBitfieldStruct<u8, Snzreqen8_SPEC>;
4074 impl Snzreqen8 {
4075 #[doc = "Disable the snooze request"]
4076 pub const _0: Self = Self::new(0);
4077
4078 #[doc = "Enable the snooze request"]
4079 pub const _1: Self = Self::new(1);
4080 }
4081 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4082 pub struct Snzreqen9_SPEC;
4083 pub type Snzreqen9 = crate::EnumBitfieldStruct<u8, Snzreqen9_SPEC>;
4084 impl Snzreqen9 {
4085 #[doc = "Disable the snooze request"]
4086 pub const _0: Self = Self::new(0);
4087
4088 #[doc = "Enable the snooze request"]
4089 pub const _1: Self = Self::new(1);
4090 }
4091 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4092 pub struct Snzreqen10_SPEC;
4093 pub type Snzreqen10 = crate::EnumBitfieldStruct<u8, Snzreqen10_SPEC>;
4094 impl Snzreqen10 {
4095 #[doc = "Disable the snooze request"]
4096 pub const _0: Self = Self::new(0);
4097
4098 #[doc = "Enable the snooze request"]
4099 pub const _1: Self = Self::new(1);
4100 }
4101 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4102 pub struct Snzreqen11_SPEC;
4103 pub type Snzreqen11 = crate::EnumBitfieldStruct<u8, Snzreqen11_SPEC>;
4104 impl Snzreqen11 {
4105 #[doc = "Disable the snooze request"]
4106 pub const _0: Self = Self::new(0);
4107
4108 #[doc = "Enable the snooze request"]
4109 pub const _1: Self = Self::new(1);
4110 }
4111 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4112 pub struct Snzreqen12_SPEC;
4113 pub type Snzreqen12 = crate::EnumBitfieldStruct<u8, Snzreqen12_SPEC>;
4114 impl Snzreqen12 {
4115 #[doc = "Disable the snooze request"]
4116 pub const _0: Self = Self::new(0);
4117
4118 #[doc = "Enable the snooze request"]
4119 pub const _1: Self = Self::new(1);
4120 }
4121 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4122 pub struct Snzreqen13_SPEC;
4123 pub type Snzreqen13 = crate::EnumBitfieldStruct<u8, Snzreqen13_SPEC>;
4124 impl Snzreqen13 {
4125 #[doc = "Disable the snooze request"]
4126 pub const _0: Self = Self::new(0);
4127
4128 #[doc = "Enable the snooze request"]
4129 pub const _1: Self = Self::new(1);
4130 }
4131 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4132 pub struct Snzreqen14_SPEC;
4133 pub type Snzreqen14 = crate::EnumBitfieldStruct<u8, Snzreqen14_SPEC>;
4134 impl Snzreqen14 {
4135 #[doc = "Disable the snooze request"]
4136 pub const _0: Self = Self::new(0);
4137
4138 #[doc = "Enable the snooze request"]
4139 pub const _1: Self = Self::new(1);
4140 }
4141 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4142 pub struct Snzreqen15_SPEC;
4143 pub type Snzreqen15 = crate::EnumBitfieldStruct<u8, Snzreqen15_SPEC>;
4144 impl Snzreqen15 {
4145 #[doc = "Disable the snooze request"]
4146 pub const _0: Self = Self::new(0);
4147
4148 #[doc = "Enable the snooze request"]
4149 pub const _1: Self = Self::new(1);
4150 }
4151 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4152 pub struct Snzreqen24_SPEC;
4153 pub type Snzreqen24 = crate::EnumBitfieldStruct<u8, Snzreqen24_SPEC>;
4154 impl Snzreqen24 {
4155 #[doc = "Disable the snooze request"]
4156 pub const _0: Self = Self::new(0);
4157
4158 #[doc = "Enable the snooze request"]
4159 pub const _1: Self = Self::new(1);
4160 }
4161 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4162 pub struct Snzreqen25_SPEC;
4163 pub type Snzreqen25 = crate::EnumBitfieldStruct<u8, Snzreqen25_SPEC>;
4164 impl Snzreqen25 {
4165 #[doc = "Disable the snooze request"]
4166 pub const _0: Self = Self::new(0);
4167
4168 #[doc = "Enable the snooze request"]
4169 pub const _1: Self = Self::new(1);
4170 }
4171 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4172 pub struct Snzreqen28_SPEC;
4173 pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
4174 impl Snzreqen28 {
4175 #[doc = "Disable the snooze request"]
4176 pub const _0: Self = Self::new(0);
4177
4178 #[doc = "Enable the snooze request"]
4179 pub const _1: Self = Self::new(1);
4180 }
4181 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4182 pub struct Snzreqen29_SPEC;
4183 pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
4184 impl Snzreqen29 {
4185 #[doc = "Disable the snooze request"]
4186 pub const _0: Self = Self::new(0);
4187
4188 #[doc = "Enable the snooze request"]
4189 pub const _1: Self = Self::new(1);
4190 }
4191 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4192 pub struct Snzreqen30_SPEC;
4193 pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
4194 impl Snzreqen30 {
4195 #[doc = "Disable the snooze request"]
4196 pub const _0: Self = Self::new(0);
4197
4198 #[doc = "Enable the snooze request"]
4199 pub const _1: Self = Self::new(1);
4200 }
4201}
4202#[doc(hidden)]
4203#[derive(Copy, Clone, Eq, PartialEq)]
4204pub struct Opccr_SPEC;
4205impl crate::sealed::RegSpec for Opccr_SPEC {
4206 type DataType = u8;
4207}
4208
4209#[doc = "Operating Power Control Register"]
4210pub type Opccr = crate::RegValueT<Opccr_SPEC>;
4211
4212impl Opccr {
4213 #[doc = "Operating Power Control Mode Select"]
4214 #[inline(always)]
4215 pub fn opcm(
4216 self,
4217 ) -> crate::common::RegisterField<
4218 0,
4219 0x3,
4220 1,
4221 0,
4222 opccr::Opcm,
4223 opccr::Opcm,
4224 Opccr_SPEC,
4225 crate::common::RW,
4226 > {
4227 crate::common::RegisterField::<
4228 0,
4229 0x3,
4230 1,
4231 0,
4232 opccr::Opcm,
4233 opccr::Opcm,
4234 Opccr_SPEC,
4235 crate::common::RW,
4236 >::from_register(self, 0)
4237 }
4238
4239 #[doc = "Operating Power Control Mode Transition Status Flag"]
4240 #[inline(always)]
4241 pub fn opcmtsf(
4242 self,
4243 ) -> crate::common::RegisterField<
4244 4,
4245 0x1,
4246 1,
4247 0,
4248 opccr::Opcmtsf,
4249 opccr::Opcmtsf,
4250 Opccr_SPEC,
4251 crate::common::R,
4252 > {
4253 crate::common::RegisterField::<
4254 4,
4255 0x1,
4256 1,
4257 0,
4258 opccr::Opcmtsf,
4259 opccr::Opcmtsf,
4260 Opccr_SPEC,
4261 crate::common::R,
4262 >::from_register(self, 0)
4263 }
4264}
4265impl ::core::default::Default for Opccr {
4266 #[inline(always)]
4267 fn default() -> Opccr {
4268 <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(0)
4269 }
4270}
4271pub mod opccr {
4272
4273 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4274 pub struct Opcm_SPEC;
4275 pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
4276 impl Opcm {
4277 #[doc = "High-speed mode"]
4278 pub const _00: Self = Self::new(0);
4279
4280 #[doc = "Setting prohibited"]
4281 pub const _01: Self = Self::new(1);
4282
4283 #[doc = "Setting prohibited"]
4284 pub const _10: Self = Self::new(2);
4285
4286 #[doc = "Low-speed mode"]
4287 pub const _11: Self = Self::new(3);
4288 }
4289 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4290 pub struct Opcmtsf_SPEC;
4291 pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
4292 impl Opcmtsf {
4293 #[doc = "Transition completed"]
4294 pub const _0: Self = Self::new(0);
4295
4296 #[doc = "During transition"]
4297 pub const _1: Self = Self::new(1);
4298 }
4299}
4300#[doc(hidden)]
4301#[derive(Copy, Clone, Eq, PartialEq)]
4302pub struct Moscwtcr_SPEC;
4303impl crate::sealed::RegSpec for Moscwtcr_SPEC {
4304 type DataType = u8;
4305}
4306
4307#[doc = "Main Clock Oscillator Wait Control Register"]
4308pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
4309
4310impl Moscwtcr {
4311 #[doc = "Main Clock Oscillator Wait Time Setting"]
4312 #[inline(always)]
4313 pub fn msts(
4314 self,
4315 ) -> crate::common::RegisterField<
4316 0,
4317 0xf,
4318 1,
4319 0,
4320 moscwtcr::Msts,
4321 moscwtcr::Msts,
4322 Moscwtcr_SPEC,
4323 crate::common::RW,
4324 > {
4325 crate::common::RegisterField::<
4326 0,
4327 0xf,
4328 1,
4329 0,
4330 moscwtcr::Msts,
4331 moscwtcr::Msts,
4332 Moscwtcr_SPEC,
4333 crate::common::RW,
4334 >::from_register(self, 0)
4335 }
4336}
4337impl ::core::default::Default for Moscwtcr {
4338 #[inline(always)]
4339 fn default() -> Moscwtcr {
4340 <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
4341 }
4342}
4343pub mod moscwtcr {
4344
4345 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4346 pub struct Msts_SPEC;
4347 pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
4348 impl Msts {
4349 #[doc = "Wait time = 3 cycles (11.4 us)"]
4350 pub const _0_X_0: Self = Self::new(0);
4351
4352 #[doc = "Wait time = 35 cycles (133.5 us)"]
4353 pub const _0_X_1: Self = Self::new(1);
4354
4355 #[doc = "Wait time = 67 cycles (255.6 us)"]
4356 pub const _0_X_2: Self = Self::new(2);
4357
4358 #[doc = "Wait time = 131 cycles (499.7 us)"]
4359 pub const _0_X_3: Self = Self::new(3);
4360
4361 #[doc = "Wait time = 259 cycles (988.0 us)"]
4362 pub const _0_X_4: Self = Self::new(4);
4363
4364 #[doc = "Wait time = 547 cycles (2086.6 us)"]
4365 pub const _0_X_5: Self = Self::new(5);
4366
4367 #[doc = "Wait time = 1059 cycles (4039.8 us)"]
4368 pub const _0_X_6: Self = Self::new(6);
4369
4370 #[doc = "Wait time = 2147 cycles (8190.2 us)"]
4371 pub const _0_X_7: Self = Self::new(7);
4372
4373 #[doc = "Wait time = 4291 cycles (16368.9 us)"]
4374 pub const _0_X_8: Self = Self::new(8);
4375
4376 #[doc = "Wait time = 8163 cycles (31139.4 us)"]
4377 pub const _0_X_9: Self = Self::new(9);
4378
4379 #[doc = "Setting prohibited"]
4380 pub const OTHERS: Self = Self::new(0);
4381 }
4382}
4383#[doc(hidden)]
4384#[derive(Copy, Clone, Eq, PartialEq)]
4385pub struct Sopccr_SPEC;
4386impl crate::sealed::RegSpec for Sopccr_SPEC {
4387 type DataType = u8;
4388}
4389
4390#[doc = "Sub Operating Power Control Register"]
4391pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
4392
4393impl Sopccr {
4394 #[doc = "Sub Operating Power Control Mode Select"]
4395 #[inline(always)]
4396 pub fn sopcm(
4397 self,
4398 ) -> crate::common::RegisterField<
4399 0,
4400 0x1,
4401 1,
4402 0,
4403 sopccr::Sopcm,
4404 sopccr::Sopcm,
4405 Sopccr_SPEC,
4406 crate::common::RW,
4407 > {
4408 crate::common::RegisterField::<
4409 0,
4410 0x1,
4411 1,
4412 0,
4413 sopccr::Sopcm,
4414 sopccr::Sopcm,
4415 Sopccr_SPEC,
4416 crate::common::RW,
4417 >::from_register(self, 0)
4418 }
4419
4420 #[doc = "Operating Power Control Mode Transition Status Flag"]
4421 #[inline(always)]
4422 pub fn sopcmtsf(
4423 self,
4424 ) -> crate::common::RegisterField<
4425 4,
4426 0x1,
4427 1,
4428 0,
4429 sopccr::Sopcmtsf,
4430 sopccr::Sopcmtsf,
4431 Sopccr_SPEC,
4432 crate::common::R,
4433 > {
4434 crate::common::RegisterField::<
4435 4,
4436 0x1,
4437 1,
4438 0,
4439 sopccr::Sopcmtsf,
4440 sopccr::Sopcmtsf,
4441 Sopccr_SPEC,
4442 crate::common::R,
4443 >::from_register(self, 0)
4444 }
4445}
4446impl ::core::default::Default for Sopccr {
4447 #[inline(always)]
4448 fn default() -> Sopccr {
4449 <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
4450 }
4451}
4452pub mod sopccr {
4453
4454 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4455 pub struct Sopcm_SPEC;
4456 pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
4457 impl Sopcm {
4458 #[doc = "Other than Subosc-speed mode"]
4459 pub const _0: Self = Self::new(0);
4460
4461 #[doc = "Subosc-speed mode"]
4462 pub const _1: Self = Self::new(1);
4463 }
4464 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4465 pub struct Sopcmtsf_SPEC;
4466 pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
4467 impl Sopcmtsf {
4468 #[doc = "Transition completed"]
4469 pub const _0: Self = Self::new(0);
4470
4471 #[doc = "During transition"]
4472 pub const _1: Self = Self::new(1);
4473 }
4474}
4475#[doc(hidden)]
4476#[derive(Copy, Clone, Eq, PartialEq)]
4477pub struct Rstsr1_SPEC;
4478impl crate::sealed::RegSpec for Rstsr1_SPEC {
4479 type DataType = u16;
4480}
4481
4482#[doc = "Reset Status Register 1"]
4483pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
4484
4485impl Rstsr1 {
4486 #[doc = "Independent Watchdog Timer Reset Detect Flag"]
4487 #[inline(always)]
4488 pub fn iwdtrf(
4489 self,
4490 ) -> crate::common::RegisterField<
4491 0,
4492 0x1,
4493 1,
4494 0,
4495 rstsr1::Iwdtrf,
4496 rstsr1::Iwdtrf,
4497 Rstsr1_SPEC,
4498 crate::common::RW,
4499 > {
4500 crate::common::RegisterField::<
4501 0,
4502 0x1,
4503 1,
4504 0,
4505 rstsr1::Iwdtrf,
4506 rstsr1::Iwdtrf,
4507 Rstsr1_SPEC,
4508 crate::common::RW,
4509 >::from_register(self, 0)
4510 }
4511
4512 #[doc = "Watchdog Timer Reset Detect Flag"]
4513 #[inline(always)]
4514 pub fn wdtrf(
4515 self,
4516 ) -> crate::common::RegisterField<
4517 1,
4518 0x1,
4519 1,
4520 0,
4521 rstsr1::Wdtrf,
4522 rstsr1::Wdtrf,
4523 Rstsr1_SPEC,
4524 crate::common::RW,
4525 > {
4526 crate::common::RegisterField::<
4527 1,
4528 0x1,
4529 1,
4530 0,
4531 rstsr1::Wdtrf,
4532 rstsr1::Wdtrf,
4533 Rstsr1_SPEC,
4534 crate::common::RW,
4535 >::from_register(self, 0)
4536 }
4537
4538 #[doc = "Software Reset Detect Flag"]
4539 #[inline(always)]
4540 pub fn swrf(
4541 self,
4542 ) -> crate::common::RegisterField<
4543 2,
4544 0x1,
4545 1,
4546 0,
4547 rstsr1::Swrf,
4548 rstsr1::Swrf,
4549 Rstsr1_SPEC,
4550 crate::common::RW,
4551 > {
4552 crate::common::RegisterField::<
4553 2,
4554 0x1,
4555 1,
4556 0,
4557 rstsr1::Swrf,
4558 rstsr1::Swrf,
4559 Rstsr1_SPEC,
4560 crate::common::RW,
4561 >::from_register(self, 0)
4562 }
4563
4564 #[doc = "SRAM Parity Error Reset Detect Flag"]
4565 #[inline(always)]
4566 pub fn rperf(
4567 self,
4568 ) -> crate::common::RegisterField<
4569 8,
4570 0x1,
4571 1,
4572 0,
4573 rstsr1::Rperf,
4574 rstsr1::Rperf,
4575 Rstsr1_SPEC,
4576 crate::common::RW,
4577 > {
4578 crate::common::RegisterField::<
4579 8,
4580 0x1,
4581 1,
4582 0,
4583 rstsr1::Rperf,
4584 rstsr1::Rperf,
4585 Rstsr1_SPEC,
4586 crate::common::RW,
4587 >::from_register(self, 0)
4588 }
4589
4590 #[doc = "Bus Master MPU Error Reset Detect Flag"]
4591 #[inline(always)]
4592 pub fn busmrf(
4593 self,
4594 ) -> crate::common::RegisterField<
4595 11,
4596 0x1,
4597 1,
4598 0,
4599 rstsr1::Busmrf,
4600 rstsr1::Busmrf,
4601 Rstsr1_SPEC,
4602 crate::common::RW,
4603 > {
4604 crate::common::RegisterField::<
4605 11,
4606 0x1,
4607 1,
4608 0,
4609 rstsr1::Busmrf,
4610 rstsr1::Busmrf,
4611 Rstsr1_SPEC,
4612 crate::common::RW,
4613 >::from_register(self, 0)
4614 }
4615
4616 #[doc = "TrustZone Error Reset Detect Flag"]
4617 #[inline(always)]
4618 pub fn tzerf(
4619 self,
4620 ) -> crate::common::RegisterField<
4621 13,
4622 0x1,
4623 1,
4624 0,
4625 rstsr1::Tzerf,
4626 rstsr1::Tzerf,
4627 Rstsr1_SPEC,
4628 crate::common::RW,
4629 > {
4630 crate::common::RegisterField::<
4631 13,
4632 0x1,
4633 1,
4634 0,
4635 rstsr1::Tzerf,
4636 rstsr1::Tzerf,
4637 Rstsr1_SPEC,
4638 crate::common::RW,
4639 >::from_register(self, 0)
4640 }
4641
4642 #[doc = "Cache Parity Error Reset Detect Flag"]
4643 #[inline(always)]
4644 pub fn cperf(
4645 self,
4646 ) -> crate::common::RegisterField<
4647 15,
4648 0x1,
4649 1,
4650 0,
4651 rstsr1::Cperf,
4652 rstsr1::Cperf,
4653 Rstsr1_SPEC,
4654 crate::common::RW,
4655 > {
4656 crate::common::RegisterField::<
4657 15,
4658 0x1,
4659 1,
4660 0,
4661 rstsr1::Cperf,
4662 rstsr1::Cperf,
4663 Rstsr1_SPEC,
4664 crate::common::RW,
4665 >::from_register(self, 0)
4666 }
4667}
4668impl ::core::default::Default for Rstsr1 {
4669 #[inline(always)]
4670 fn default() -> Rstsr1 {
4671 <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
4672 }
4673}
4674pub mod rstsr1 {
4675
4676 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4677 pub struct Iwdtrf_SPEC;
4678 pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
4679 impl Iwdtrf {
4680 #[doc = "Independent watchdog timer reset not detected"]
4681 pub const _0: Self = Self::new(0);
4682
4683 #[doc = "Independent watchdog timer reset detected"]
4684 pub const _1: Self = Self::new(1);
4685 }
4686 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4687 pub struct Wdtrf_SPEC;
4688 pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
4689 impl Wdtrf {
4690 #[doc = "Watchdog timer reset not detected"]
4691 pub const _0: Self = Self::new(0);
4692
4693 #[doc = "Watchdog timer reset detected"]
4694 pub const _1: Self = Self::new(1);
4695 }
4696 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4697 pub struct Swrf_SPEC;
4698 pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
4699 impl Swrf {
4700 #[doc = "Software reset not detected"]
4701 pub const _0: Self = Self::new(0);
4702
4703 #[doc = "Software reset detected"]
4704 pub const _1: Self = Self::new(1);
4705 }
4706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4707 pub struct Rperf_SPEC;
4708 pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
4709 impl Rperf {
4710 #[doc = "SRAM parity error reset not detected"]
4711 pub const _0: Self = Self::new(0);
4712
4713 #[doc = "SRAM parity error reset detected"]
4714 pub const _1: Self = Self::new(1);
4715 }
4716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4717 pub struct Busmrf_SPEC;
4718 pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
4719 impl Busmrf {
4720 #[doc = "Bus master MPU error reset not detected"]
4721 pub const _0: Self = Self::new(0);
4722
4723 #[doc = "Bus master MPU error reset detected"]
4724 pub const _1: Self = Self::new(1);
4725 }
4726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4727 pub struct Tzerf_SPEC;
4728 pub type Tzerf = crate::EnumBitfieldStruct<u8, Tzerf_SPEC>;
4729 impl Tzerf {
4730 #[doc = "TrustZone error reset not detected."]
4731 pub const _0: Self = Self::new(0);
4732
4733 #[doc = "TrustZone error reset detected."]
4734 pub const _1: Self = Self::new(1);
4735 }
4736 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4737 pub struct Cperf_SPEC;
4738 pub type Cperf = crate::EnumBitfieldStruct<u8, Cperf_SPEC>;
4739 impl Cperf {
4740 #[doc = "Cache Parity error reset not detected."]
4741 pub const _0: Self = Self::new(0);
4742
4743 #[doc = "Cache Parity error reset detected."]
4744 pub const _1: Self = Self::new(1);
4745 }
4746}
4747#[doc(hidden)]
4748#[derive(Copy, Clone, Eq, PartialEq)]
4749pub struct Lvd1Cr1_SPEC;
4750impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
4751 type DataType = u8;
4752}
4753
4754#[doc = "Voltage Monitor 1 Circuit Control Register 1"]
4755pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
4756
4757impl Lvd1Cr1 {
4758 #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
4759 #[inline(always)]
4760 pub fn idtsel(
4761 self,
4762 ) -> crate::common::RegisterField<
4763 0,
4764 0x3,
4765 1,
4766 0,
4767 lvd1cr1::Idtsel,
4768 lvd1cr1::Idtsel,
4769 Lvd1Cr1_SPEC,
4770 crate::common::RW,
4771 > {
4772 crate::common::RegisterField::<
4773 0,
4774 0x3,
4775 1,
4776 0,
4777 lvd1cr1::Idtsel,
4778 lvd1cr1::Idtsel,
4779 Lvd1Cr1_SPEC,
4780 crate::common::RW,
4781 >::from_register(self, 0)
4782 }
4783
4784 #[doc = "Voltage Monitor 1 Interrupt Type Select"]
4785 #[inline(always)]
4786 pub fn irqsel(
4787 self,
4788 ) -> crate::common::RegisterField<
4789 2,
4790 0x1,
4791 1,
4792 0,
4793 lvd1cr1::Irqsel,
4794 lvd1cr1::Irqsel,
4795 Lvd1Cr1_SPEC,
4796 crate::common::RW,
4797 > {
4798 crate::common::RegisterField::<
4799 2,
4800 0x1,
4801 1,
4802 0,
4803 lvd1cr1::Irqsel,
4804 lvd1cr1::Irqsel,
4805 Lvd1Cr1_SPEC,
4806 crate::common::RW,
4807 >::from_register(self, 0)
4808 }
4809}
4810impl ::core::default::Default for Lvd1Cr1 {
4811 #[inline(always)]
4812 fn default() -> Lvd1Cr1 {
4813 <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
4814 }
4815}
4816pub mod lvd1cr1 {
4817
4818 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4819 pub struct Idtsel_SPEC;
4820 pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4821 impl Idtsel {
4822 #[doc = "When VCC >= Vdet1 (rise) is detected"]
4823 pub const _00: Self = Self::new(0);
4824
4825 #[doc = "When VCC < Vdet1 (fall) is detected"]
4826 pub const _01: Self = Self::new(1);
4827
4828 #[doc = "When fall and rise are detected"]
4829 pub const _10: Self = Self::new(2);
4830
4831 #[doc = "Settings prohibited"]
4832 pub const _11: Self = Self::new(3);
4833 }
4834 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4835 pub struct Irqsel_SPEC;
4836 pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
4837 impl Irqsel {
4838 #[doc = "Non-maskable interrupt"]
4839 pub const _0: Self = Self::new(0);
4840
4841 #[doc = "Maskable interrupt"]
4842 pub const _1: Self = Self::new(1);
4843 }
4844}
4845#[doc(hidden)]
4846#[derive(Copy, Clone, Eq, PartialEq)]
4847pub struct Lvd1Sr_SPEC;
4848impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
4849 type DataType = u8;
4850}
4851
4852#[doc = "Voltage Monitor 1 Circuit Status Register"]
4853pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
4854
4855impl Lvd1Sr {
4856 #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
4857 #[inline(always)]
4858 pub fn det(
4859 self,
4860 ) -> crate::common::RegisterField<
4861 0,
4862 0x1,
4863 1,
4864 0,
4865 lvd1sr::Det,
4866 lvd1sr::Det,
4867 Lvd1Sr_SPEC,
4868 crate::common::RW,
4869 > {
4870 crate::common::RegisterField::<
4871 0,
4872 0x1,
4873 1,
4874 0,
4875 lvd1sr::Det,
4876 lvd1sr::Det,
4877 Lvd1Sr_SPEC,
4878 crate::common::RW,
4879 >::from_register(self, 0)
4880 }
4881
4882 #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
4883 #[inline(always)]
4884 pub fn mon(
4885 self,
4886 ) -> crate::common::RegisterField<
4887 1,
4888 0x1,
4889 1,
4890 0,
4891 lvd1sr::Mon,
4892 lvd1sr::Mon,
4893 Lvd1Sr_SPEC,
4894 crate::common::R,
4895 > {
4896 crate::common::RegisterField::<
4897 1,
4898 0x1,
4899 1,
4900 0,
4901 lvd1sr::Mon,
4902 lvd1sr::Mon,
4903 Lvd1Sr_SPEC,
4904 crate::common::R,
4905 >::from_register(self, 0)
4906 }
4907}
4908impl ::core::default::Default for Lvd1Sr {
4909 #[inline(always)]
4910 fn default() -> Lvd1Sr {
4911 <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
4912 }
4913}
4914pub mod lvd1sr {
4915
4916 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4917 pub struct Det_SPEC;
4918 pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
4919 impl Det {
4920 #[doc = "Not detected"]
4921 pub const _0: Self = Self::new(0);
4922
4923 #[doc = "Vdet1 crossing is detected"]
4924 pub const _1: Self = Self::new(1);
4925 }
4926 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4927 pub struct Mon_SPEC;
4928 pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
4929 impl Mon {
4930 #[doc = "VCC < Vdet1"]
4931 pub const _0: Self = Self::new(0);
4932
4933 #[doc = "VCC >= Vdet1 or MON is disabled"]
4934 pub const _1: Self = Self::new(1);
4935 }
4936}
4937#[doc(hidden)]
4938#[derive(Copy, Clone, Eq, PartialEq)]
4939pub struct Lvd2Cr1_SPEC;
4940impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
4941 type DataType = u8;
4942}
4943
4944#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
4945pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
4946
4947impl Lvd2Cr1 {
4948 #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
4949 #[inline(always)]
4950 pub fn idtsel(
4951 self,
4952 ) -> crate::common::RegisterField<
4953 0,
4954 0x3,
4955 1,
4956 0,
4957 lvd2cr1::Idtsel,
4958 lvd2cr1::Idtsel,
4959 Lvd2Cr1_SPEC,
4960 crate::common::RW,
4961 > {
4962 crate::common::RegisterField::<
4963 0,
4964 0x3,
4965 1,
4966 0,
4967 lvd2cr1::Idtsel,
4968 lvd2cr1::Idtsel,
4969 Lvd2Cr1_SPEC,
4970 crate::common::RW,
4971 >::from_register(self, 0)
4972 }
4973
4974 #[doc = "Voltage Monitor 2 Interrupt Type Select"]
4975 #[inline(always)]
4976 pub fn irqsel(
4977 self,
4978 ) -> crate::common::RegisterField<
4979 2,
4980 0x1,
4981 1,
4982 0,
4983 lvd2cr1::Irqsel,
4984 lvd2cr1::Irqsel,
4985 Lvd2Cr1_SPEC,
4986 crate::common::RW,
4987 > {
4988 crate::common::RegisterField::<
4989 2,
4990 0x1,
4991 1,
4992 0,
4993 lvd2cr1::Irqsel,
4994 lvd2cr1::Irqsel,
4995 Lvd2Cr1_SPEC,
4996 crate::common::RW,
4997 >::from_register(self, 0)
4998 }
4999}
5000impl ::core::default::Default for Lvd2Cr1 {
5001 #[inline(always)]
5002 fn default() -> Lvd2Cr1 {
5003 <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
5004 }
5005}
5006pub mod lvd2cr1 {
5007
5008 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5009 pub struct Idtsel_SPEC;
5010 pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
5011 impl Idtsel {
5012 #[doc = "When VCC>= Vdet2 (rise) is detected"]
5013 pub const _00: Self = Self::new(0);
5014
5015 #[doc = "When VCC < Vdet2 (fall) is detected"]
5016 pub const _01: Self = Self::new(1);
5017
5018 #[doc = "When fall and rise are detected"]
5019 pub const _10: Self = Self::new(2);
5020
5021 #[doc = "Settings prohibited"]
5022 pub const _11: Self = Self::new(3);
5023 }
5024 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5025 pub struct Irqsel_SPEC;
5026 pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
5027 impl Irqsel {
5028 #[doc = "Non-maskable interrupt"]
5029 pub const _0: Self = Self::new(0);
5030
5031 #[doc = "Maskable interrupt"]
5032 pub const _1: Self = Self::new(1);
5033 }
5034}
5035#[doc(hidden)]
5036#[derive(Copy, Clone, Eq, PartialEq)]
5037pub struct Lvd2Sr_SPEC;
5038impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
5039 type DataType = u8;
5040}
5041
5042#[doc = "Voltage Monitor 2 Circuit Status Register"]
5043pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
5044
5045impl Lvd2Sr {
5046 #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
5047 #[inline(always)]
5048 pub fn det(
5049 self,
5050 ) -> crate::common::RegisterField<
5051 0,
5052 0x1,
5053 1,
5054 0,
5055 lvd2sr::Det,
5056 lvd2sr::Det,
5057 Lvd2Sr_SPEC,
5058 crate::common::RW,
5059 > {
5060 crate::common::RegisterField::<
5061 0,
5062 0x1,
5063 1,
5064 0,
5065 lvd2sr::Det,
5066 lvd2sr::Det,
5067 Lvd2Sr_SPEC,
5068 crate::common::RW,
5069 >::from_register(self, 0)
5070 }
5071
5072 #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
5073 #[inline(always)]
5074 pub fn mon(
5075 self,
5076 ) -> crate::common::RegisterField<
5077 1,
5078 0x1,
5079 1,
5080 0,
5081 lvd2sr::Mon,
5082 lvd2sr::Mon,
5083 Lvd2Sr_SPEC,
5084 crate::common::R,
5085 > {
5086 crate::common::RegisterField::<
5087 1,
5088 0x1,
5089 1,
5090 0,
5091 lvd2sr::Mon,
5092 lvd2sr::Mon,
5093 Lvd2Sr_SPEC,
5094 crate::common::R,
5095 >::from_register(self, 0)
5096 }
5097}
5098impl ::core::default::Default for Lvd2Sr {
5099 #[inline(always)]
5100 fn default() -> Lvd2Sr {
5101 <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
5102 }
5103}
5104pub mod lvd2sr {
5105
5106 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5107 pub struct Det_SPEC;
5108 pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
5109 impl Det {
5110 #[doc = "Not detected"]
5111 pub const _0: Self = Self::new(0);
5112
5113 #[doc = "Vdet2 crossing is detected"]
5114 pub const _1: Self = Self::new(1);
5115 }
5116 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5117 pub struct Mon_SPEC;
5118 pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
5119 impl Mon {
5120 #[doc = "VCC < Vdet2"]
5121 pub const _0: Self = Self::new(0);
5122
5123 #[doc = "VCC>= Vdet2 or MON is disabled"]
5124 pub const _1: Self = Self::new(1);
5125 }
5126}
5127#[doc(hidden)]
5128#[derive(Copy, Clone, Eq, PartialEq)]
5129pub struct Cgfsar_SPEC;
5130impl crate::sealed::RegSpec for Cgfsar_SPEC {
5131 type DataType = u32;
5132}
5133
5134#[doc = "Clock Generation Function Security Attribute Register"]
5135pub type Cgfsar = crate::RegValueT<Cgfsar_SPEC>;
5136
5137impl Cgfsar {
5138 #[doc = "Non Secure Attribute bit 00"]
5139 #[inline(always)]
5140 pub fn nonsec00(
5141 self,
5142 ) -> crate::common::RegisterField<
5143 0,
5144 0x1,
5145 1,
5146 0,
5147 cgfsar::Nonsec00,
5148 cgfsar::Nonsec00,
5149 Cgfsar_SPEC,
5150 crate::common::RW,
5151 > {
5152 crate::common::RegisterField::<
5153 0,
5154 0x1,
5155 1,
5156 0,
5157 cgfsar::Nonsec00,
5158 cgfsar::Nonsec00,
5159 Cgfsar_SPEC,
5160 crate::common::RW,
5161 >::from_register(self, 0)
5162 }
5163
5164 #[doc = "Non Secure Attribute bit 02"]
5165 #[inline(always)]
5166 pub fn nonsec02(
5167 self,
5168 ) -> crate::common::RegisterField<
5169 2,
5170 0x1,
5171 1,
5172 0,
5173 cgfsar::Nonsec02,
5174 cgfsar::Nonsec02,
5175 Cgfsar_SPEC,
5176 crate::common::RW,
5177 > {
5178 crate::common::RegisterField::<
5179 2,
5180 0x1,
5181 1,
5182 0,
5183 cgfsar::Nonsec02,
5184 cgfsar::Nonsec02,
5185 Cgfsar_SPEC,
5186 crate::common::RW,
5187 >::from_register(self, 0)
5188 }
5189
5190 #[doc = "Non Secure Attribute bit 03"]
5191 #[inline(always)]
5192 pub fn nonsec03(
5193 self,
5194 ) -> crate::common::RegisterField<
5195 3,
5196 0x1,
5197 1,
5198 0,
5199 cgfsar::Nonsec03,
5200 cgfsar::Nonsec03,
5201 Cgfsar_SPEC,
5202 crate::common::RW,
5203 > {
5204 crate::common::RegisterField::<
5205 3,
5206 0x1,
5207 1,
5208 0,
5209 cgfsar::Nonsec03,
5210 cgfsar::Nonsec03,
5211 Cgfsar_SPEC,
5212 crate::common::RW,
5213 >::from_register(self, 0)
5214 }
5215
5216 #[doc = "Non Secure Attribute bit 04"]
5217 #[inline(always)]
5218 pub fn nonsec04(
5219 self,
5220 ) -> crate::common::RegisterField<
5221 4,
5222 0x1,
5223 1,
5224 0,
5225 cgfsar::Nonsec04,
5226 cgfsar::Nonsec04,
5227 Cgfsar_SPEC,
5228 crate::common::RW,
5229 > {
5230 crate::common::RegisterField::<
5231 4,
5232 0x1,
5233 1,
5234 0,
5235 cgfsar::Nonsec04,
5236 cgfsar::Nonsec04,
5237 Cgfsar_SPEC,
5238 crate::common::RW,
5239 >::from_register(self, 0)
5240 }
5241
5242 #[doc = "Non Secure Attribute bit 05"]
5243 #[inline(always)]
5244 pub fn nonsec05(
5245 self,
5246 ) -> crate::common::RegisterField<
5247 5,
5248 0x1,
5249 1,
5250 0,
5251 cgfsar::Nonsec05,
5252 cgfsar::Nonsec05,
5253 Cgfsar_SPEC,
5254 crate::common::RW,
5255 > {
5256 crate::common::RegisterField::<
5257 5,
5258 0x1,
5259 1,
5260 0,
5261 cgfsar::Nonsec05,
5262 cgfsar::Nonsec05,
5263 Cgfsar_SPEC,
5264 crate::common::RW,
5265 >::from_register(self, 0)
5266 }
5267
5268 #[doc = "Non Secure Attribute bit 06"]
5269 #[inline(always)]
5270 pub fn nonsec06(
5271 self,
5272 ) -> crate::common::RegisterField<
5273 6,
5274 0x1,
5275 1,
5276 0,
5277 cgfsar::Nonsec06,
5278 cgfsar::Nonsec06,
5279 Cgfsar_SPEC,
5280 crate::common::RW,
5281 > {
5282 crate::common::RegisterField::<
5283 6,
5284 0x1,
5285 1,
5286 0,
5287 cgfsar::Nonsec06,
5288 cgfsar::Nonsec06,
5289 Cgfsar_SPEC,
5290 crate::common::RW,
5291 >::from_register(self, 0)
5292 }
5293
5294 #[doc = "Non Secure Attribute bit 07"]
5295 #[inline(always)]
5296 pub fn nonsec07(
5297 self,
5298 ) -> crate::common::RegisterField<
5299 7,
5300 0x1,
5301 1,
5302 0,
5303 cgfsar::Nonsec07,
5304 cgfsar::Nonsec07,
5305 Cgfsar_SPEC,
5306 crate::common::RW,
5307 > {
5308 crate::common::RegisterField::<
5309 7,
5310 0x1,
5311 1,
5312 0,
5313 cgfsar::Nonsec07,
5314 cgfsar::Nonsec07,
5315 Cgfsar_SPEC,
5316 crate::common::RW,
5317 >::from_register(self, 0)
5318 }
5319
5320 #[doc = "Non Secure Attribute bit 08"]
5321 #[inline(always)]
5322 pub fn nonsec08(
5323 self,
5324 ) -> crate::common::RegisterField<
5325 8,
5326 0x1,
5327 1,
5328 0,
5329 cgfsar::Nonsec08,
5330 cgfsar::Nonsec08,
5331 Cgfsar_SPEC,
5332 crate::common::RW,
5333 > {
5334 crate::common::RegisterField::<
5335 8,
5336 0x1,
5337 1,
5338 0,
5339 cgfsar::Nonsec08,
5340 cgfsar::Nonsec08,
5341 Cgfsar_SPEC,
5342 crate::common::RW,
5343 >::from_register(self, 0)
5344 }
5345
5346 #[doc = "Non Secure Attribute bit 09"]
5347 #[inline(always)]
5348 pub fn nonsec09(
5349 self,
5350 ) -> crate::common::RegisterField<
5351 9,
5352 0x1,
5353 1,
5354 0,
5355 cgfsar::Nonsec09,
5356 cgfsar::Nonsec09,
5357 Cgfsar_SPEC,
5358 crate::common::RW,
5359 > {
5360 crate::common::RegisterField::<
5361 9,
5362 0x1,
5363 1,
5364 0,
5365 cgfsar::Nonsec09,
5366 cgfsar::Nonsec09,
5367 Cgfsar_SPEC,
5368 crate::common::RW,
5369 >::from_register(self, 0)
5370 }
5371
5372 #[doc = "Non Secure Attribute bit 11"]
5373 #[inline(always)]
5374 pub fn nonsec11(
5375 self,
5376 ) -> crate::common::RegisterField<
5377 11,
5378 0x1,
5379 1,
5380 0,
5381 cgfsar::Nonsec11,
5382 cgfsar::Nonsec11,
5383 Cgfsar_SPEC,
5384 crate::common::RW,
5385 > {
5386 crate::common::RegisterField::<
5387 11,
5388 0x1,
5389 1,
5390 0,
5391 cgfsar::Nonsec11,
5392 cgfsar::Nonsec11,
5393 Cgfsar_SPEC,
5394 crate::common::RW,
5395 >::from_register(self, 0)
5396 }
5397
5398 #[doc = "Non Secure Attribute bit 16"]
5399 #[inline(always)]
5400 pub fn nonsec16(
5401 self,
5402 ) -> crate::common::RegisterField<
5403 16,
5404 0x1,
5405 1,
5406 0,
5407 cgfsar::Nonsec16,
5408 cgfsar::Nonsec16,
5409 Cgfsar_SPEC,
5410 crate::common::RW,
5411 > {
5412 crate::common::RegisterField::<
5413 16,
5414 0x1,
5415 1,
5416 0,
5417 cgfsar::Nonsec16,
5418 cgfsar::Nonsec16,
5419 Cgfsar_SPEC,
5420 crate::common::RW,
5421 >::from_register(self, 0)
5422 }
5423}
5424impl ::core::default::Default for Cgfsar {
5425 #[inline(always)]
5426 fn default() -> Cgfsar {
5427 <crate::RegValueT<Cgfsar_SPEC> as RegisterValue<_>>::new(4294967295)
5428 }
5429}
5430pub mod cgfsar {
5431
5432 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5433 pub struct Nonsec00_SPEC;
5434 pub type Nonsec00 = crate::EnumBitfieldStruct<u8, Nonsec00_SPEC>;
5435 impl Nonsec00 {
5436 #[doc = "Secure"]
5437 pub const _0: Self = Self::new(0);
5438
5439 #[doc = "Non Secure"]
5440 pub const _1: Self = Self::new(1);
5441 }
5442 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5443 pub struct Nonsec02_SPEC;
5444 pub type Nonsec02 = crate::EnumBitfieldStruct<u8, Nonsec02_SPEC>;
5445 impl Nonsec02 {
5446 #[doc = "Secure"]
5447 pub const _0: Self = Self::new(0);
5448
5449 #[doc = "Non Secure"]
5450 pub const _1: Self = Self::new(1);
5451 }
5452 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5453 pub struct Nonsec03_SPEC;
5454 pub type Nonsec03 = crate::EnumBitfieldStruct<u8, Nonsec03_SPEC>;
5455 impl Nonsec03 {
5456 #[doc = "Secure"]
5457 pub const _0: Self = Self::new(0);
5458
5459 #[doc = "Non Secure"]
5460 pub const _1: Self = Self::new(1);
5461 }
5462 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5463 pub struct Nonsec04_SPEC;
5464 pub type Nonsec04 = crate::EnumBitfieldStruct<u8, Nonsec04_SPEC>;
5465 impl Nonsec04 {
5466 #[doc = "Secure"]
5467 pub const _0: Self = Self::new(0);
5468
5469 #[doc = "Non Secure"]
5470 pub const _1: Self = Self::new(1);
5471 }
5472 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5473 pub struct Nonsec05_SPEC;
5474 pub type Nonsec05 = crate::EnumBitfieldStruct<u8, Nonsec05_SPEC>;
5475 impl Nonsec05 {
5476 #[doc = "Secure"]
5477 pub const _0: Self = Self::new(0);
5478
5479 #[doc = "Non Secure"]
5480 pub const _1: Self = Self::new(1);
5481 }
5482 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5483 pub struct Nonsec06_SPEC;
5484 pub type Nonsec06 = crate::EnumBitfieldStruct<u8, Nonsec06_SPEC>;
5485 impl Nonsec06 {
5486 #[doc = "Secure"]
5487 pub const _0: Self = Self::new(0);
5488
5489 #[doc = "Non Secure"]
5490 pub const _1: Self = Self::new(1);
5491 }
5492 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5493 pub struct Nonsec07_SPEC;
5494 pub type Nonsec07 = crate::EnumBitfieldStruct<u8, Nonsec07_SPEC>;
5495 impl Nonsec07 {
5496 #[doc = "Secure"]
5497 pub const _0: Self = Self::new(0);
5498
5499 #[doc = "Non Secure"]
5500 pub const _1: Self = Self::new(1);
5501 }
5502 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5503 pub struct Nonsec08_SPEC;
5504 pub type Nonsec08 = crate::EnumBitfieldStruct<u8, Nonsec08_SPEC>;
5505 impl Nonsec08 {
5506 #[doc = "Secure"]
5507 pub const _0: Self = Self::new(0);
5508
5509 #[doc = "Non Secure"]
5510 pub const _1: Self = Self::new(1);
5511 }
5512 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5513 pub struct Nonsec09_SPEC;
5514 pub type Nonsec09 = crate::EnumBitfieldStruct<u8, Nonsec09_SPEC>;
5515 impl Nonsec09 {
5516 #[doc = "Secure"]
5517 pub const _0: Self = Self::new(0);
5518
5519 #[doc = "Non Secure"]
5520 pub const _1: Self = Self::new(1);
5521 }
5522 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5523 pub struct Nonsec11_SPEC;
5524 pub type Nonsec11 = crate::EnumBitfieldStruct<u8, Nonsec11_SPEC>;
5525 impl Nonsec11 {
5526 #[doc = "Secure"]
5527 pub const _0: Self = Self::new(0);
5528
5529 #[doc = "Non Secure"]
5530 pub const _1: Self = Self::new(1);
5531 }
5532 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5533 pub struct Nonsec16_SPEC;
5534 pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
5535 impl Nonsec16 {
5536 #[doc = "Secure"]
5537 pub const _0: Self = Self::new(0);
5538
5539 #[doc = "Non Secure"]
5540 pub const _1: Self = Self::new(1);
5541 }
5542}
5543#[doc(hidden)]
5544#[derive(Copy, Clone, Eq, PartialEq)]
5545pub struct Rstsar_SPEC;
5546impl crate::sealed::RegSpec for Rstsar_SPEC {
5547 type DataType = u32;
5548}
5549
5550#[doc = "Reset Security Attribution Register"]
5551pub type Rstsar = crate::RegValueT<Rstsar_SPEC>;
5552
5553impl Rstsar {
5554 #[doc = "Non Secure Attribute bit 0"]
5555 #[inline(always)]
5556 pub fn nonsec0(
5557 self,
5558 ) -> crate::common::RegisterField<
5559 0,
5560 0x1,
5561 1,
5562 0,
5563 rstsar::Nonsec0,
5564 rstsar::Nonsec0,
5565 Rstsar_SPEC,
5566 crate::common::RW,
5567 > {
5568 crate::common::RegisterField::<
5569 0,
5570 0x1,
5571 1,
5572 0,
5573 rstsar::Nonsec0,
5574 rstsar::Nonsec0,
5575 Rstsar_SPEC,
5576 crate::common::RW,
5577 >::from_register(self, 0)
5578 }
5579
5580 #[doc = "Non Secure Attribute bit 1"]
5581 #[inline(always)]
5582 pub fn nonsec1(
5583 self,
5584 ) -> crate::common::RegisterField<
5585 1,
5586 0x1,
5587 1,
5588 0,
5589 rstsar::Nonsec1,
5590 rstsar::Nonsec1,
5591 Rstsar_SPEC,
5592 crate::common::RW,
5593 > {
5594 crate::common::RegisterField::<
5595 1,
5596 0x1,
5597 1,
5598 0,
5599 rstsar::Nonsec1,
5600 rstsar::Nonsec1,
5601 Rstsar_SPEC,
5602 crate::common::RW,
5603 >::from_register(self, 0)
5604 }
5605
5606 #[doc = "Non Secure Attribute bit 2"]
5607 #[inline(always)]
5608 pub fn nonsec2(
5609 self,
5610 ) -> crate::common::RegisterField<
5611 2,
5612 0x1,
5613 1,
5614 0,
5615 rstsar::Nonsec2,
5616 rstsar::Nonsec2,
5617 Rstsar_SPEC,
5618 crate::common::RW,
5619 > {
5620 crate::common::RegisterField::<
5621 2,
5622 0x1,
5623 1,
5624 0,
5625 rstsar::Nonsec2,
5626 rstsar::Nonsec2,
5627 Rstsar_SPEC,
5628 crate::common::RW,
5629 >::from_register(self, 0)
5630 }
5631}
5632impl ::core::default::Default for Rstsar {
5633 #[inline(always)]
5634 fn default() -> Rstsar {
5635 <crate::RegValueT<Rstsar_SPEC> as RegisterValue<_>>::new(4294967295)
5636 }
5637}
5638pub mod rstsar {
5639
5640 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5641 pub struct Nonsec0_SPEC;
5642 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5643 impl Nonsec0 {
5644 #[doc = "Secure"]
5645 pub const _0: Self = Self::new(0);
5646
5647 #[doc = "Non Secure"]
5648 pub const _1: Self = Self::new(1);
5649 }
5650 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5651 pub struct Nonsec1_SPEC;
5652 pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5653 impl Nonsec1 {
5654 #[doc = "Secure"]
5655 pub const _0: Self = Self::new(0);
5656
5657 #[doc = "Non Secure"]
5658 pub const _1: Self = Self::new(1);
5659 }
5660 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5661 pub struct Nonsec2_SPEC;
5662 pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5663 impl Nonsec2 {
5664 #[doc = "Secure"]
5665 pub const _0: Self = Self::new(0);
5666
5667 #[doc = "Non Secure"]
5668 pub const _1: Self = Self::new(1);
5669 }
5670}
5671#[doc(hidden)]
5672#[derive(Copy, Clone, Eq, PartialEq)]
5673pub struct Lpmsar_SPEC;
5674impl crate::sealed::RegSpec for Lpmsar_SPEC {
5675 type DataType = u32;
5676}
5677
5678#[doc = "Low Power Mode Security Attribution Register"]
5679pub type Lpmsar = crate::RegValueT<Lpmsar_SPEC>;
5680
5681impl Lpmsar {
5682 #[doc = "Non Secure Attribute bit 0"]
5683 #[inline(always)]
5684 pub fn nonsec0(
5685 self,
5686 ) -> crate::common::RegisterField<
5687 0,
5688 0x1,
5689 1,
5690 0,
5691 lpmsar::Nonsec0,
5692 lpmsar::Nonsec0,
5693 Lpmsar_SPEC,
5694 crate::common::RW,
5695 > {
5696 crate::common::RegisterField::<
5697 0,
5698 0x1,
5699 1,
5700 0,
5701 lpmsar::Nonsec0,
5702 lpmsar::Nonsec0,
5703 Lpmsar_SPEC,
5704 crate::common::RW,
5705 >::from_register(self, 0)
5706 }
5707
5708 #[doc = "Non Secure Attribute bit 2"]
5709 #[inline(always)]
5710 pub fn nonsec2(
5711 self,
5712 ) -> crate::common::RegisterField<
5713 2,
5714 0x1,
5715 1,
5716 0,
5717 lpmsar::Nonsec2,
5718 lpmsar::Nonsec2,
5719 Lpmsar_SPEC,
5720 crate::common::RW,
5721 > {
5722 crate::common::RegisterField::<
5723 2,
5724 0x1,
5725 1,
5726 0,
5727 lpmsar::Nonsec2,
5728 lpmsar::Nonsec2,
5729 Lpmsar_SPEC,
5730 crate::common::RW,
5731 >::from_register(self, 0)
5732 }
5733
5734 #[doc = "Non Secure Attribute bit 4"]
5735 #[inline(always)]
5736 pub fn nonsec4(
5737 self,
5738 ) -> crate::common::RegisterField<
5739 4,
5740 0x1,
5741 1,
5742 0,
5743 lpmsar::Nonsec4,
5744 lpmsar::Nonsec4,
5745 Lpmsar_SPEC,
5746 crate::common::RW,
5747 > {
5748 crate::common::RegisterField::<
5749 4,
5750 0x1,
5751 1,
5752 0,
5753 lpmsar::Nonsec4,
5754 lpmsar::Nonsec4,
5755 Lpmsar_SPEC,
5756 crate::common::RW,
5757 >::from_register(self, 0)
5758 }
5759
5760 #[doc = "Non Secure Attribute bit 8"]
5761 #[inline(always)]
5762 pub fn nonsec8(
5763 self,
5764 ) -> crate::common::RegisterField<
5765 8,
5766 0x1,
5767 1,
5768 0,
5769 lpmsar::Nonsec8,
5770 lpmsar::Nonsec8,
5771 Lpmsar_SPEC,
5772 crate::common::RW,
5773 > {
5774 crate::common::RegisterField::<
5775 8,
5776 0x1,
5777 1,
5778 0,
5779 lpmsar::Nonsec8,
5780 lpmsar::Nonsec8,
5781 Lpmsar_SPEC,
5782 crate::common::RW,
5783 >::from_register(self, 0)
5784 }
5785
5786 #[doc = "Non Secure Attribute bit 9"]
5787 #[inline(always)]
5788 pub fn nonsec9(
5789 self,
5790 ) -> crate::common::RegisterField<
5791 9,
5792 0x1,
5793 1,
5794 0,
5795 lpmsar::Nonsec9,
5796 lpmsar::Nonsec9,
5797 Lpmsar_SPEC,
5798 crate::common::RW,
5799 > {
5800 crate::common::RegisterField::<
5801 9,
5802 0x1,
5803 1,
5804 0,
5805 lpmsar::Nonsec9,
5806 lpmsar::Nonsec9,
5807 Lpmsar_SPEC,
5808 crate::common::RW,
5809 >::from_register(self, 0)
5810 }
5811}
5812impl ::core::default::Default for Lpmsar {
5813 #[inline(always)]
5814 fn default() -> Lpmsar {
5815 <crate::RegValueT<Lpmsar_SPEC> as RegisterValue<_>>::new(4294967295)
5816 }
5817}
5818pub mod lpmsar {
5819
5820 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5821 pub struct Nonsec0_SPEC;
5822 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5823 impl Nonsec0 {
5824 #[doc = "Secure"]
5825 pub const _0: Self = Self::new(0);
5826
5827 #[doc = "Non Secure"]
5828 pub const _1: Self = Self::new(1);
5829 }
5830 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5831 pub struct Nonsec2_SPEC;
5832 pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5833 impl Nonsec2 {
5834 #[doc = "Secure"]
5835 pub const _0: Self = Self::new(0);
5836
5837 #[doc = "Non Secure"]
5838 pub const _1: Self = Self::new(1);
5839 }
5840 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5841 pub struct Nonsec4_SPEC;
5842 pub type Nonsec4 = crate::EnumBitfieldStruct<u8, Nonsec4_SPEC>;
5843 impl Nonsec4 {
5844 #[doc = "Secure"]
5845 pub const _0: Self = Self::new(0);
5846
5847 #[doc = "Non Secure"]
5848 pub const _1: Self = Self::new(1);
5849 }
5850 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5851 pub struct Nonsec8_SPEC;
5852 pub type Nonsec8 = crate::EnumBitfieldStruct<u8, Nonsec8_SPEC>;
5853 impl Nonsec8 {
5854 #[doc = "Secure"]
5855 pub const _0: Self = Self::new(0);
5856
5857 #[doc = "Non Secure"]
5858 pub const _1: Self = Self::new(1);
5859 }
5860 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5861 pub struct Nonsec9_SPEC;
5862 pub type Nonsec9 = crate::EnumBitfieldStruct<u8, Nonsec9_SPEC>;
5863 impl Nonsec9 {
5864 #[doc = "Secure"]
5865 pub const _0: Self = Self::new(0);
5866
5867 #[doc = "Non Secure"]
5868 pub const _1: Self = Self::new(1);
5869 }
5870}
5871#[doc(hidden)]
5872#[derive(Copy, Clone, Eq, PartialEq)]
5873pub struct Lvdsar_SPEC;
5874impl crate::sealed::RegSpec for Lvdsar_SPEC {
5875 type DataType = u32;
5876}
5877
5878#[doc = "Low Voltage Detection Security Attribution Register"]
5879pub type Lvdsar = crate::RegValueT<Lvdsar_SPEC>;
5880
5881impl Lvdsar {
5882 #[doc = "Non Secure Attribute bit 0"]
5883 #[inline(always)]
5884 pub fn nonsec0(
5885 self,
5886 ) -> crate::common::RegisterField<
5887 0,
5888 0x1,
5889 1,
5890 0,
5891 lvdsar::Nonsec0,
5892 lvdsar::Nonsec0,
5893 Lvdsar_SPEC,
5894 crate::common::RW,
5895 > {
5896 crate::common::RegisterField::<
5897 0,
5898 0x1,
5899 1,
5900 0,
5901 lvdsar::Nonsec0,
5902 lvdsar::Nonsec0,
5903 Lvdsar_SPEC,
5904 crate::common::RW,
5905 >::from_register(self, 0)
5906 }
5907
5908 #[doc = "Non Secure Attribute bit 1"]
5909 #[inline(always)]
5910 pub fn nonsec1(
5911 self,
5912 ) -> crate::common::RegisterField<
5913 1,
5914 0x1,
5915 1,
5916 0,
5917 lvdsar::Nonsec1,
5918 lvdsar::Nonsec1,
5919 Lvdsar_SPEC,
5920 crate::common::RW,
5921 > {
5922 crate::common::RegisterField::<
5923 1,
5924 0x1,
5925 1,
5926 0,
5927 lvdsar::Nonsec1,
5928 lvdsar::Nonsec1,
5929 Lvdsar_SPEC,
5930 crate::common::RW,
5931 >::from_register(self, 0)
5932 }
5933}
5934impl ::core::default::Default for Lvdsar {
5935 #[inline(always)]
5936 fn default() -> Lvdsar {
5937 <crate::RegValueT<Lvdsar_SPEC> as RegisterValue<_>>::new(4294967295)
5938 }
5939}
5940pub mod lvdsar {
5941
5942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5943 pub struct Nonsec0_SPEC;
5944 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5945 impl Nonsec0 {
5946 #[doc = "Secure"]
5947 pub const _0: Self = Self::new(0);
5948
5949 #[doc = "Non Secure"]
5950 pub const _1: Self = Self::new(1);
5951 }
5952 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5953 pub struct Nonsec1_SPEC;
5954 pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5955 impl Nonsec1 {
5956 #[doc = "Secure"]
5957 pub const _0: Self = Self::new(0);
5958
5959 #[doc = "Non Secure"]
5960 pub const _1: Self = Self::new(1);
5961 }
5962}
5963#[doc(hidden)]
5964#[derive(Copy, Clone, Eq, PartialEq)]
5965pub struct Bbfsar_SPEC;
5966impl crate::sealed::RegSpec for Bbfsar_SPEC {
5967 type DataType = u32;
5968}
5969
5970#[doc = "Battery Backup Function Security Attribute Register"]
5971pub type Bbfsar = crate::RegValueT<Bbfsar_SPEC>;
5972
5973impl Bbfsar {
5974 #[doc = "Non Secure Attribute bit 0"]
5975 #[inline(always)]
5976 pub fn nonsec0(
5977 self,
5978 ) -> crate::common::RegisterField<
5979 0,
5980 0x1,
5981 1,
5982 0,
5983 bbfsar::Nonsec0,
5984 bbfsar::Nonsec0,
5985 Bbfsar_SPEC,
5986 crate::common::RW,
5987 > {
5988 crate::common::RegisterField::<
5989 0,
5990 0x1,
5991 1,
5992 0,
5993 bbfsar::Nonsec0,
5994 bbfsar::Nonsec0,
5995 Bbfsar_SPEC,
5996 crate::common::RW,
5997 >::from_register(self, 0)
5998 }
5999
6000 #[doc = "Non Secure Attribute bit 1"]
6001 #[inline(always)]
6002 pub fn nonsec1(
6003 self,
6004 ) -> crate::common::RegisterField<
6005 1,
6006 0x1,
6007 1,
6008 0,
6009 bbfsar::Nonsec1,
6010 bbfsar::Nonsec1,
6011 Bbfsar_SPEC,
6012 crate::common::RW,
6013 > {
6014 crate::common::RegisterField::<
6015 1,
6016 0x1,
6017 1,
6018 0,
6019 bbfsar::Nonsec1,
6020 bbfsar::Nonsec1,
6021 Bbfsar_SPEC,
6022 crate::common::RW,
6023 >::from_register(self, 0)
6024 }
6025
6026 #[doc = "Non Secure Attribute bit 2"]
6027 #[inline(always)]
6028 pub fn nonsec2(
6029 self,
6030 ) -> crate::common::RegisterField<
6031 2,
6032 0x1,
6033 1,
6034 0,
6035 bbfsar::Nonsec2,
6036 bbfsar::Nonsec2,
6037 Bbfsar_SPEC,
6038 crate::common::RW,
6039 > {
6040 crate::common::RegisterField::<
6041 2,
6042 0x1,
6043 1,
6044 0,
6045 bbfsar::Nonsec2,
6046 bbfsar::Nonsec2,
6047 Bbfsar_SPEC,
6048 crate::common::RW,
6049 >::from_register(self, 0)
6050 }
6051
6052 #[doc = "Non Secure Attribute bit 16"]
6053 #[inline(always)]
6054 pub fn nonsec16(
6055 self,
6056 ) -> crate::common::RegisterField<
6057 16,
6058 0x1,
6059 1,
6060 0,
6061 bbfsar::Nonsec16,
6062 bbfsar::Nonsec16,
6063 Bbfsar_SPEC,
6064 crate::common::RW,
6065 > {
6066 crate::common::RegisterField::<
6067 16,
6068 0x1,
6069 1,
6070 0,
6071 bbfsar::Nonsec16,
6072 bbfsar::Nonsec16,
6073 Bbfsar_SPEC,
6074 crate::common::RW,
6075 >::from_register(self, 0)
6076 }
6077
6078 #[doc = "Non Secure Attribute bit 17"]
6079 #[inline(always)]
6080 pub fn nonsec17(
6081 self,
6082 ) -> crate::common::RegisterField<
6083 17,
6084 0x1,
6085 1,
6086 0,
6087 bbfsar::Nonsec17,
6088 bbfsar::Nonsec17,
6089 Bbfsar_SPEC,
6090 crate::common::RW,
6091 > {
6092 crate::common::RegisterField::<
6093 17,
6094 0x1,
6095 1,
6096 0,
6097 bbfsar::Nonsec17,
6098 bbfsar::Nonsec17,
6099 Bbfsar_SPEC,
6100 crate::common::RW,
6101 >::from_register(self, 0)
6102 }
6103
6104 #[doc = "Non Secure Attribute bit 18"]
6105 #[inline(always)]
6106 pub fn nonsec18(
6107 self,
6108 ) -> crate::common::RegisterField<
6109 18,
6110 0x1,
6111 1,
6112 0,
6113 bbfsar::Nonsec18,
6114 bbfsar::Nonsec18,
6115 Bbfsar_SPEC,
6116 crate::common::RW,
6117 > {
6118 crate::common::RegisterField::<
6119 18,
6120 0x1,
6121 1,
6122 0,
6123 bbfsar::Nonsec18,
6124 bbfsar::Nonsec18,
6125 Bbfsar_SPEC,
6126 crate::common::RW,
6127 >::from_register(self, 0)
6128 }
6129
6130 #[doc = "Non Secure Attribute bit 19"]
6131 #[inline(always)]
6132 pub fn nonsec19(
6133 self,
6134 ) -> crate::common::RegisterField<
6135 19,
6136 0x1,
6137 1,
6138 0,
6139 bbfsar::Nonsec19,
6140 bbfsar::Nonsec19,
6141 Bbfsar_SPEC,
6142 crate::common::RW,
6143 > {
6144 crate::common::RegisterField::<
6145 19,
6146 0x1,
6147 1,
6148 0,
6149 bbfsar::Nonsec19,
6150 bbfsar::Nonsec19,
6151 Bbfsar_SPEC,
6152 crate::common::RW,
6153 >::from_register(self, 0)
6154 }
6155
6156 #[doc = "Non Secure Attribute bit 20"]
6157 #[inline(always)]
6158 pub fn nonsec20(
6159 self,
6160 ) -> crate::common::RegisterField<
6161 20,
6162 0x1,
6163 1,
6164 0,
6165 bbfsar::Nonsec20,
6166 bbfsar::Nonsec20,
6167 Bbfsar_SPEC,
6168 crate::common::RW,
6169 > {
6170 crate::common::RegisterField::<
6171 20,
6172 0x1,
6173 1,
6174 0,
6175 bbfsar::Nonsec20,
6176 bbfsar::Nonsec20,
6177 Bbfsar_SPEC,
6178 crate::common::RW,
6179 >::from_register(self, 0)
6180 }
6181
6182 #[doc = "Non Secure Attribute bit 21"]
6183 #[inline(always)]
6184 pub fn nonsec21(
6185 self,
6186 ) -> crate::common::RegisterField<
6187 21,
6188 0x1,
6189 1,
6190 0,
6191 bbfsar::Nonsec21,
6192 bbfsar::Nonsec21,
6193 Bbfsar_SPEC,
6194 crate::common::RW,
6195 > {
6196 crate::common::RegisterField::<
6197 21,
6198 0x1,
6199 1,
6200 0,
6201 bbfsar::Nonsec21,
6202 bbfsar::Nonsec21,
6203 Bbfsar_SPEC,
6204 crate::common::RW,
6205 >::from_register(self, 0)
6206 }
6207
6208 #[doc = "Non Secure Attribute bit 22"]
6209 #[inline(always)]
6210 pub fn nonsec22(
6211 self,
6212 ) -> crate::common::RegisterField<
6213 22,
6214 0x1,
6215 1,
6216 0,
6217 bbfsar::Nonsec22,
6218 bbfsar::Nonsec22,
6219 Bbfsar_SPEC,
6220 crate::common::RW,
6221 > {
6222 crate::common::RegisterField::<
6223 22,
6224 0x1,
6225 1,
6226 0,
6227 bbfsar::Nonsec22,
6228 bbfsar::Nonsec22,
6229 Bbfsar_SPEC,
6230 crate::common::RW,
6231 >::from_register(self, 0)
6232 }
6233
6234 #[doc = "Non Secure Attribute bit 23"]
6235 #[inline(always)]
6236 pub fn nonsec23(
6237 self,
6238 ) -> crate::common::RegisterField<
6239 23,
6240 0x1,
6241 1,
6242 0,
6243 bbfsar::Nonsec23,
6244 bbfsar::Nonsec23,
6245 Bbfsar_SPEC,
6246 crate::common::RW,
6247 > {
6248 crate::common::RegisterField::<
6249 23,
6250 0x1,
6251 1,
6252 0,
6253 bbfsar::Nonsec23,
6254 bbfsar::Nonsec23,
6255 Bbfsar_SPEC,
6256 crate::common::RW,
6257 >::from_register(self, 0)
6258 }
6259}
6260impl ::core::default::Default for Bbfsar {
6261 #[inline(always)]
6262 fn default() -> Bbfsar {
6263 <crate::RegValueT<Bbfsar_SPEC> as RegisterValue<_>>::new(65535)
6264 }
6265}
6266pub mod bbfsar {
6267
6268 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6269 pub struct Nonsec0_SPEC;
6270 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
6271 impl Nonsec0 {
6272 #[doc = "Secure"]
6273 pub const _0: Self = Self::new(0);
6274
6275 #[doc = "Non Secure"]
6276 pub const _1: Self = Self::new(1);
6277 }
6278 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6279 pub struct Nonsec1_SPEC;
6280 pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
6281 impl Nonsec1 {
6282 #[doc = "Secure"]
6283 pub const _0: Self = Self::new(0);
6284
6285 #[doc = "Non Secure"]
6286 pub const _1: Self = Self::new(1);
6287 }
6288 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6289 pub struct Nonsec2_SPEC;
6290 pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
6291 impl Nonsec2 {
6292 #[doc = "Secure"]
6293 pub const _0: Self = Self::new(0);
6294
6295 #[doc = "Non Secure"]
6296 pub const _1: Self = Self::new(1);
6297 }
6298 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6299 pub struct Nonsec16_SPEC;
6300 pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
6301 impl Nonsec16 {
6302 #[doc = "Secure"]
6303 pub const _0: Self = Self::new(0);
6304
6305 #[doc = "Non Secure"]
6306 pub const _1: Self = Self::new(1);
6307 }
6308 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6309 pub struct Nonsec17_SPEC;
6310 pub type Nonsec17 = crate::EnumBitfieldStruct<u8, Nonsec17_SPEC>;
6311 impl Nonsec17 {
6312 #[doc = "Secure"]
6313 pub const _0: Self = Self::new(0);
6314
6315 #[doc = "Non Secure"]
6316 pub const _1: Self = Self::new(1);
6317 }
6318 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6319 pub struct Nonsec18_SPEC;
6320 pub type Nonsec18 = crate::EnumBitfieldStruct<u8, Nonsec18_SPEC>;
6321 impl Nonsec18 {
6322 #[doc = "Secure"]
6323 pub const _0: Self = Self::new(0);
6324
6325 #[doc = "Non Secure"]
6326 pub const _1: Self = Self::new(1);
6327 }
6328 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6329 pub struct Nonsec19_SPEC;
6330 pub type Nonsec19 = crate::EnumBitfieldStruct<u8, Nonsec19_SPEC>;
6331 impl Nonsec19 {
6332 #[doc = "Secure"]
6333 pub const _0: Self = Self::new(0);
6334
6335 #[doc = "Non Secure"]
6336 pub const _1: Self = Self::new(1);
6337 }
6338 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6339 pub struct Nonsec20_SPEC;
6340 pub type Nonsec20 = crate::EnumBitfieldStruct<u8, Nonsec20_SPEC>;
6341 impl Nonsec20 {
6342 #[doc = "Secure"]
6343 pub const _0: Self = Self::new(0);
6344
6345 #[doc = "Non Secure"]
6346 pub const _1: Self = Self::new(1);
6347 }
6348 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6349 pub struct Nonsec21_SPEC;
6350 pub type Nonsec21 = crate::EnumBitfieldStruct<u8, Nonsec21_SPEC>;
6351 impl Nonsec21 {
6352 #[doc = "Secure"]
6353 pub const _0: Self = Self::new(0);
6354
6355 #[doc = "Non Secure"]
6356 pub const _1: Self = Self::new(1);
6357 }
6358 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6359 pub struct Nonsec22_SPEC;
6360 pub type Nonsec22 = crate::EnumBitfieldStruct<u8, Nonsec22_SPEC>;
6361 impl Nonsec22 {
6362 #[doc = "Secure"]
6363 pub const _0: Self = Self::new(0);
6364
6365 #[doc = "Non Secure"]
6366 pub const _1: Self = Self::new(1);
6367 }
6368 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6369 pub struct Nonsec23_SPEC;
6370 pub type Nonsec23 = crate::EnumBitfieldStruct<u8, Nonsec23_SPEC>;
6371 impl Nonsec23 {
6372 #[doc = "Secure"]
6373 pub const _0: Self = Self::new(0);
6374
6375 #[doc = "Non Secure"]
6376 pub const _1: Self = Self::new(1);
6377 }
6378}
6379#[doc(hidden)]
6380#[derive(Copy, Clone, Eq, PartialEq)]
6381pub struct Dpfsar_SPEC;
6382impl crate::sealed::RegSpec for Dpfsar_SPEC {
6383 type DataType = u32;
6384}
6385
6386#[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
6387pub type Dpfsar = crate::RegValueT<Dpfsar_SPEC>;
6388
6389impl Dpfsar {
6390 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 0"]
6391 #[inline(always)]
6392 pub fn dpfsa00(
6393 self,
6394 ) -> crate::common::RegisterField<
6395 0,
6396 0x1,
6397 1,
6398 0,
6399 dpfsar::Dpfsa00,
6400 dpfsar::Dpfsa00,
6401 Dpfsar_SPEC,
6402 crate::common::RW,
6403 > {
6404 crate::common::RegisterField::<
6405 0,
6406 0x1,
6407 1,
6408 0,
6409 dpfsar::Dpfsa00,
6410 dpfsar::Dpfsa00,
6411 Dpfsar_SPEC,
6412 crate::common::RW,
6413 >::from_register(self, 0)
6414 }
6415
6416 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 1"]
6417 #[inline(always)]
6418 pub fn dpfsa01(
6419 self,
6420 ) -> crate::common::RegisterField<
6421 1,
6422 0x1,
6423 1,
6424 0,
6425 dpfsar::Dpfsa01,
6426 dpfsar::Dpfsa01,
6427 Dpfsar_SPEC,
6428 crate::common::RW,
6429 > {
6430 crate::common::RegisterField::<
6431 1,
6432 0x1,
6433 1,
6434 0,
6435 dpfsar::Dpfsa01,
6436 dpfsar::Dpfsa01,
6437 Dpfsar_SPEC,
6438 crate::common::RW,
6439 >::from_register(self, 0)
6440 }
6441
6442 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6443 #[inline(always)]
6444 pub fn dpfsa04(
6445 self,
6446 ) -> crate::common::RegisterField<
6447 4,
6448 0x1,
6449 1,
6450 0,
6451 dpfsar::Dpfsa04,
6452 dpfsar::Dpfsa04,
6453 Dpfsar_SPEC,
6454 crate::common::RW,
6455 > {
6456 crate::common::RegisterField::<
6457 4,
6458 0x1,
6459 1,
6460 0,
6461 dpfsar::Dpfsa04,
6462 dpfsar::Dpfsa04,
6463 Dpfsar_SPEC,
6464 crate::common::RW,
6465 >::from_register(self, 0)
6466 }
6467
6468 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6469 #[inline(always)]
6470 pub fn dpfsa05(
6471 self,
6472 ) -> crate::common::RegisterField<
6473 5,
6474 0x1,
6475 1,
6476 0,
6477 dpfsar::Dpfsa05,
6478 dpfsar::Dpfsa05,
6479 Dpfsar_SPEC,
6480 crate::common::RW,
6481 > {
6482 crate::common::RegisterField::<
6483 5,
6484 0x1,
6485 1,
6486 0,
6487 dpfsar::Dpfsa05,
6488 dpfsar::Dpfsa05,
6489 Dpfsar_SPEC,
6490 crate::common::RW,
6491 >::from_register(self, 0)
6492 }
6493
6494 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6495 #[inline(always)]
6496 pub fn dpfsa06(
6497 self,
6498 ) -> crate::common::RegisterField<
6499 6,
6500 0x1,
6501 1,
6502 0,
6503 dpfsar::Dpfsa06,
6504 dpfsar::Dpfsa06,
6505 Dpfsar_SPEC,
6506 crate::common::RW,
6507 > {
6508 crate::common::RegisterField::<
6509 6,
6510 0x1,
6511 1,
6512 0,
6513 dpfsar::Dpfsa06,
6514 dpfsar::Dpfsa06,
6515 Dpfsar_SPEC,
6516 crate::common::RW,
6517 >::from_register(self, 0)
6518 }
6519
6520 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6521 #[inline(always)]
6522 pub fn dpfsa07(
6523 self,
6524 ) -> crate::common::RegisterField<
6525 7,
6526 0x1,
6527 1,
6528 0,
6529 dpfsar::Dpfsa07,
6530 dpfsar::Dpfsa07,
6531 Dpfsar_SPEC,
6532 crate::common::RW,
6533 > {
6534 crate::common::RegisterField::<
6535 7,
6536 0x1,
6537 1,
6538 0,
6539 dpfsar::Dpfsa07,
6540 dpfsar::Dpfsa07,
6541 Dpfsar_SPEC,
6542 crate::common::RW,
6543 >::from_register(self, 0)
6544 }
6545
6546 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6547 #[inline(always)]
6548 pub fn dpfsa08(
6549 self,
6550 ) -> crate::common::RegisterField<
6551 8,
6552 0x1,
6553 1,
6554 0,
6555 dpfsar::Dpfsa08,
6556 dpfsar::Dpfsa08,
6557 Dpfsar_SPEC,
6558 crate::common::RW,
6559 > {
6560 crate::common::RegisterField::<
6561 8,
6562 0x1,
6563 1,
6564 0,
6565 dpfsar::Dpfsa08,
6566 dpfsar::Dpfsa08,
6567 Dpfsar_SPEC,
6568 crate::common::RW,
6569 >::from_register(self, 0)
6570 }
6571
6572 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6573 #[inline(always)]
6574 pub fn dpfsa09(
6575 self,
6576 ) -> crate::common::RegisterField<
6577 9,
6578 0x1,
6579 1,
6580 0,
6581 dpfsar::Dpfsa09,
6582 dpfsar::Dpfsa09,
6583 Dpfsar_SPEC,
6584 crate::common::RW,
6585 > {
6586 crate::common::RegisterField::<
6587 9,
6588 0x1,
6589 1,
6590 0,
6591 dpfsar::Dpfsa09,
6592 dpfsar::Dpfsa09,
6593 Dpfsar_SPEC,
6594 crate::common::RW,
6595 >::from_register(self, 0)
6596 }
6597
6598 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6599 #[inline(always)]
6600 pub fn dpfsa10(
6601 self,
6602 ) -> crate::common::RegisterField<
6603 10,
6604 0x1,
6605 1,
6606 0,
6607 dpfsar::Dpfsa10,
6608 dpfsar::Dpfsa10,
6609 Dpfsar_SPEC,
6610 crate::common::RW,
6611 > {
6612 crate::common::RegisterField::<
6613 10,
6614 0x1,
6615 1,
6616 0,
6617 dpfsar::Dpfsa10,
6618 dpfsar::Dpfsa10,
6619 Dpfsar_SPEC,
6620 crate::common::RW,
6621 >::from_register(self, 0)
6622 }
6623
6624 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6625 #[inline(always)]
6626 pub fn dpfsa11(
6627 self,
6628 ) -> crate::common::RegisterField<
6629 11,
6630 0x1,
6631 1,
6632 0,
6633 dpfsar::Dpfsa11,
6634 dpfsar::Dpfsa11,
6635 Dpfsar_SPEC,
6636 crate::common::RW,
6637 > {
6638 crate::common::RegisterField::<
6639 11,
6640 0x1,
6641 1,
6642 0,
6643 dpfsar::Dpfsa11,
6644 dpfsar::Dpfsa11,
6645 Dpfsar_SPEC,
6646 crate::common::RW,
6647 >::from_register(self, 0)
6648 }
6649
6650 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6651 #[inline(always)]
6652 pub fn dpfsa12(
6653 self,
6654 ) -> crate::common::RegisterField<
6655 12,
6656 0x1,
6657 1,
6658 0,
6659 dpfsar::Dpfsa12,
6660 dpfsar::Dpfsa12,
6661 Dpfsar_SPEC,
6662 crate::common::RW,
6663 > {
6664 crate::common::RegisterField::<
6665 12,
6666 0x1,
6667 1,
6668 0,
6669 dpfsar::Dpfsa12,
6670 dpfsar::Dpfsa12,
6671 Dpfsar_SPEC,
6672 crate::common::RW,
6673 >::from_register(self, 0)
6674 }
6675
6676 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 14"]
6677 #[inline(always)]
6678 pub fn dpfsa14(
6679 self,
6680 ) -> crate::common::RegisterField<
6681 14,
6682 0x1,
6683 1,
6684 0,
6685 dpfsar::Dpfsa14,
6686 dpfsar::Dpfsa14,
6687 Dpfsar_SPEC,
6688 crate::common::RW,
6689 > {
6690 crate::common::RegisterField::<
6691 14,
6692 0x1,
6693 1,
6694 0,
6695 dpfsar::Dpfsa14,
6696 dpfsar::Dpfsa14,
6697 Dpfsar_SPEC,
6698 crate::common::RW,
6699 >::from_register(self, 0)
6700 }
6701
6702 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 15"]
6703 #[inline(always)]
6704 pub fn dpfsa15(
6705 self,
6706 ) -> crate::common::RegisterField<
6707 15,
6708 0x1,
6709 1,
6710 0,
6711 dpfsar::Dpfsa15,
6712 dpfsar::Dpfsa15,
6713 Dpfsar_SPEC,
6714 crate::common::RW,
6715 > {
6716 crate::common::RegisterField::<
6717 15,
6718 0x1,
6719 1,
6720 0,
6721 dpfsar::Dpfsa15,
6722 dpfsar::Dpfsa15,
6723 Dpfsar_SPEC,
6724 crate::common::RW,
6725 >::from_register(self, 0)
6726 }
6727
6728 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 16"]
6729 #[inline(always)]
6730 pub fn dpfsa16(
6731 self,
6732 ) -> crate::common::RegisterField<
6733 16,
6734 0x1,
6735 1,
6736 0,
6737 dpfsar::Dpfsa16,
6738 dpfsar::Dpfsa16,
6739 Dpfsar_SPEC,
6740 crate::common::RW,
6741 > {
6742 crate::common::RegisterField::<
6743 16,
6744 0x1,
6745 1,
6746 0,
6747 dpfsar::Dpfsa16,
6748 dpfsar::Dpfsa16,
6749 Dpfsar_SPEC,
6750 crate::common::RW,
6751 >::from_register(self, 0)
6752 }
6753
6754 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 17"]
6755 #[inline(always)]
6756 pub fn dpfsa17(
6757 self,
6758 ) -> crate::common::RegisterField<
6759 17,
6760 0x1,
6761 1,
6762 0,
6763 dpfsar::Dpfsa17,
6764 dpfsar::Dpfsa17,
6765 Dpfsar_SPEC,
6766 crate::common::RW,
6767 > {
6768 crate::common::RegisterField::<
6769 17,
6770 0x1,
6771 1,
6772 0,
6773 dpfsar::Dpfsa17,
6774 dpfsar::Dpfsa17,
6775 Dpfsar_SPEC,
6776 crate::common::RW,
6777 >::from_register(self, 0)
6778 }
6779
6780 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 18"]
6781 #[inline(always)]
6782 pub fn dpfsa18(
6783 self,
6784 ) -> crate::common::RegisterField<
6785 18,
6786 0x1,
6787 1,
6788 0,
6789 dpfsar::Dpfsa18,
6790 dpfsar::Dpfsa18,
6791 Dpfsar_SPEC,
6792 crate::common::RW,
6793 > {
6794 crate::common::RegisterField::<
6795 18,
6796 0x1,
6797 1,
6798 0,
6799 dpfsar::Dpfsa18,
6800 dpfsar::Dpfsa18,
6801 Dpfsar_SPEC,
6802 crate::common::RW,
6803 >::from_register(self, 0)
6804 }
6805
6806 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 19"]
6807 #[inline(always)]
6808 pub fn dpfsa19(
6809 self,
6810 ) -> crate::common::RegisterField<
6811 19,
6812 0x1,
6813 1,
6814 0,
6815 dpfsar::Dpfsa19,
6816 dpfsar::Dpfsa19,
6817 Dpfsar_SPEC,
6818 crate::common::RW,
6819 > {
6820 crate::common::RegisterField::<
6821 19,
6822 0x1,
6823 1,
6824 0,
6825 dpfsar::Dpfsa19,
6826 dpfsar::Dpfsa19,
6827 Dpfsar_SPEC,
6828 crate::common::RW,
6829 >::from_register(self, 0)
6830 }
6831
6832 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 20"]
6833 #[inline(always)]
6834 pub fn dpfsa20(
6835 self,
6836 ) -> crate::common::RegisterField<
6837 20,
6838 0x1,
6839 1,
6840 0,
6841 dpfsar::Dpfsa20,
6842 dpfsar::Dpfsa20,
6843 Dpfsar_SPEC,
6844 crate::common::RW,
6845 > {
6846 crate::common::RegisterField::<
6847 20,
6848 0x1,
6849 1,
6850 0,
6851 dpfsar::Dpfsa20,
6852 dpfsar::Dpfsa20,
6853 Dpfsar_SPEC,
6854 crate::common::RW,
6855 >::from_register(self, 0)
6856 }
6857
6858 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 24"]
6859 #[inline(always)]
6860 pub fn dpfsa24(
6861 self,
6862 ) -> crate::common::RegisterField<
6863 24,
6864 0x1,
6865 1,
6866 0,
6867 dpfsar::Dpfsa24,
6868 dpfsar::Dpfsa24,
6869 Dpfsar_SPEC,
6870 crate::common::RW,
6871 > {
6872 crate::common::RegisterField::<
6873 24,
6874 0x1,
6875 1,
6876 0,
6877 dpfsar::Dpfsa24,
6878 dpfsar::Dpfsa24,
6879 Dpfsar_SPEC,
6880 crate::common::RW,
6881 >::from_register(self, 0)
6882 }
6883
6884 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 26"]
6885 #[inline(always)]
6886 pub fn dpfsa26(
6887 self,
6888 ) -> crate::common::RegisterField<
6889 26,
6890 0x1,
6891 1,
6892 0,
6893 dpfsar::Dpfsa26,
6894 dpfsar::Dpfsa26,
6895 Dpfsar_SPEC,
6896 crate::common::RW,
6897 > {
6898 crate::common::RegisterField::<
6899 26,
6900 0x1,
6901 1,
6902 0,
6903 dpfsar::Dpfsa26,
6904 dpfsar::Dpfsa26,
6905 Dpfsar_SPEC,
6906 crate::common::RW,
6907 >::from_register(self, 0)
6908 }
6909
6910 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 27"]
6911 #[inline(always)]
6912 pub fn dpfsa27(
6913 self,
6914 ) -> crate::common::RegisterField<
6915 27,
6916 0x1,
6917 1,
6918 0,
6919 dpfsar::Dpfsa27,
6920 dpfsar::Dpfsa27,
6921 Dpfsar_SPEC,
6922 crate::common::RW,
6923 > {
6924 crate::common::RegisterField::<
6925 27,
6926 0x1,
6927 1,
6928 0,
6929 dpfsar::Dpfsa27,
6930 dpfsar::Dpfsa27,
6931 Dpfsar_SPEC,
6932 crate::common::RW,
6933 >::from_register(self, 0)
6934 }
6935}
6936impl ::core::default::Default for Dpfsar {
6937 #[inline(always)]
6938 fn default() -> Dpfsar {
6939 <crate::RegValueT<Dpfsar_SPEC> as RegisterValue<_>>::new(4294967295)
6940 }
6941}
6942pub mod dpfsar {
6943
6944 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6945 pub struct Dpfsa00_SPEC;
6946 pub type Dpfsa00 = crate::EnumBitfieldStruct<u8, Dpfsa00_SPEC>;
6947 impl Dpfsa00 {
6948 #[doc = "Secure"]
6949 pub const _0: Self = Self::new(0);
6950
6951 #[doc = "Non Secure"]
6952 pub const _1: Self = Self::new(1);
6953 }
6954 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6955 pub struct Dpfsa01_SPEC;
6956 pub type Dpfsa01 = crate::EnumBitfieldStruct<u8, Dpfsa01_SPEC>;
6957 impl Dpfsa01 {
6958 #[doc = "Secure"]
6959 pub const _0: Self = Self::new(0);
6960
6961 #[doc = "Non Secure"]
6962 pub const _1: Self = Self::new(1);
6963 }
6964 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6965 pub struct Dpfsa04_SPEC;
6966 pub type Dpfsa04 = crate::EnumBitfieldStruct<u8, Dpfsa04_SPEC>;
6967 impl Dpfsa04 {
6968 #[doc = "Secure"]
6969 pub const _0: Self = Self::new(0);
6970
6971 #[doc = "Non Secure"]
6972 pub const _1: Self = Self::new(1);
6973 }
6974 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6975 pub struct Dpfsa05_SPEC;
6976 pub type Dpfsa05 = crate::EnumBitfieldStruct<u8, Dpfsa05_SPEC>;
6977 impl Dpfsa05 {
6978 #[doc = "Secure"]
6979 pub const _0: Self = Self::new(0);
6980
6981 #[doc = "Non Secure"]
6982 pub const _1: Self = Self::new(1);
6983 }
6984 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6985 pub struct Dpfsa06_SPEC;
6986 pub type Dpfsa06 = crate::EnumBitfieldStruct<u8, Dpfsa06_SPEC>;
6987 impl Dpfsa06 {
6988 #[doc = "Secure"]
6989 pub const _0: Self = Self::new(0);
6990
6991 #[doc = "Non Secure"]
6992 pub const _1: Self = Self::new(1);
6993 }
6994 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6995 pub struct Dpfsa07_SPEC;
6996 pub type Dpfsa07 = crate::EnumBitfieldStruct<u8, Dpfsa07_SPEC>;
6997 impl Dpfsa07 {
6998 #[doc = "Secure"]
6999 pub const _0: Self = Self::new(0);
7000
7001 #[doc = "Non Secure"]
7002 pub const _1: Self = Self::new(1);
7003 }
7004 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7005 pub struct Dpfsa08_SPEC;
7006 pub type Dpfsa08 = crate::EnumBitfieldStruct<u8, Dpfsa08_SPEC>;
7007 impl Dpfsa08 {
7008 #[doc = "Secure"]
7009 pub const _0: Self = Self::new(0);
7010
7011 #[doc = "Non Secure"]
7012 pub const _1: Self = Self::new(1);
7013 }
7014 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7015 pub struct Dpfsa09_SPEC;
7016 pub type Dpfsa09 = crate::EnumBitfieldStruct<u8, Dpfsa09_SPEC>;
7017 impl Dpfsa09 {
7018 #[doc = "Secure"]
7019 pub const _0: Self = Self::new(0);
7020
7021 #[doc = "Non Secure"]
7022 pub const _1: Self = Self::new(1);
7023 }
7024 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7025 pub struct Dpfsa10_SPEC;
7026 pub type Dpfsa10 = crate::EnumBitfieldStruct<u8, Dpfsa10_SPEC>;
7027 impl Dpfsa10 {
7028 #[doc = "Secure"]
7029 pub const _0: Self = Self::new(0);
7030
7031 #[doc = "Non Secure"]
7032 pub const _1: Self = Self::new(1);
7033 }
7034 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7035 pub struct Dpfsa11_SPEC;
7036 pub type Dpfsa11 = crate::EnumBitfieldStruct<u8, Dpfsa11_SPEC>;
7037 impl Dpfsa11 {
7038 #[doc = "Secure"]
7039 pub const _0: Self = Self::new(0);
7040
7041 #[doc = "Non Secure"]
7042 pub const _1: Self = Self::new(1);
7043 }
7044 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7045 pub struct Dpfsa12_SPEC;
7046 pub type Dpfsa12 = crate::EnumBitfieldStruct<u8, Dpfsa12_SPEC>;
7047 impl Dpfsa12 {
7048 #[doc = "Secure"]
7049 pub const _0: Self = Self::new(0);
7050
7051 #[doc = "Non Secure"]
7052 pub const _1: Self = Self::new(1);
7053 }
7054 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7055 pub struct Dpfsa14_SPEC;
7056 pub type Dpfsa14 = crate::EnumBitfieldStruct<u8, Dpfsa14_SPEC>;
7057 impl Dpfsa14 {
7058 #[doc = "Secure"]
7059 pub const _0: Self = Self::new(0);
7060
7061 #[doc = "Non Secure"]
7062 pub const _1: Self = Self::new(1);
7063 }
7064 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7065 pub struct Dpfsa15_SPEC;
7066 pub type Dpfsa15 = crate::EnumBitfieldStruct<u8, Dpfsa15_SPEC>;
7067 impl Dpfsa15 {
7068 #[doc = "Secure"]
7069 pub const _0: Self = Self::new(0);
7070
7071 #[doc = "Non Secure"]
7072 pub const _1: Self = Self::new(1);
7073 }
7074 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7075 pub struct Dpfsa16_SPEC;
7076 pub type Dpfsa16 = crate::EnumBitfieldStruct<u8, Dpfsa16_SPEC>;
7077 impl Dpfsa16 {
7078 #[doc = "Secure"]
7079 pub const _0: Self = Self::new(0);
7080
7081 #[doc = "Non Secure"]
7082 pub const _1: Self = Self::new(1);
7083 }
7084 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7085 pub struct Dpfsa17_SPEC;
7086 pub type Dpfsa17 = crate::EnumBitfieldStruct<u8, Dpfsa17_SPEC>;
7087 impl Dpfsa17 {
7088 #[doc = "Secure"]
7089 pub const _0: Self = Self::new(0);
7090
7091 #[doc = "Non Secure"]
7092 pub const _1: Self = Self::new(1);
7093 }
7094 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7095 pub struct Dpfsa18_SPEC;
7096 pub type Dpfsa18 = crate::EnumBitfieldStruct<u8, Dpfsa18_SPEC>;
7097 impl Dpfsa18 {
7098 #[doc = "Secure"]
7099 pub const _0: Self = Self::new(0);
7100
7101 #[doc = "Non Secure"]
7102 pub const _1: Self = Self::new(1);
7103 }
7104 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7105 pub struct Dpfsa19_SPEC;
7106 pub type Dpfsa19 = crate::EnumBitfieldStruct<u8, Dpfsa19_SPEC>;
7107 impl Dpfsa19 {
7108 #[doc = "Secure"]
7109 pub const _0: Self = Self::new(0);
7110
7111 #[doc = "Non Secure"]
7112 pub const _1: Self = Self::new(1);
7113 }
7114 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7115 pub struct Dpfsa20_SPEC;
7116 pub type Dpfsa20 = crate::EnumBitfieldStruct<u8, Dpfsa20_SPEC>;
7117 impl Dpfsa20 {
7118 #[doc = "Secure"]
7119 pub const _0: Self = Self::new(0);
7120
7121 #[doc = "Non Secure"]
7122 pub const _1: Self = Self::new(1);
7123 }
7124 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7125 pub struct Dpfsa24_SPEC;
7126 pub type Dpfsa24 = crate::EnumBitfieldStruct<u8, Dpfsa24_SPEC>;
7127 impl Dpfsa24 {
7128 #[doc = "Secure"]
7129 pub const _0: Self = Self::new(0);
7130
7131 #[doc = "Non Secure"]
7132 pub const _1: Self = Self::new(1);
7133 }
7134 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7135 pub struct Dpfsa26_SPEC;
7136 pub type Dpfsa26 = crate::EnumBitfieldStruct<u8, Dpfsa26_SPEC>;
7137 impl Dpfsa26 {
7138 #[doc = "Secure"]
7139 pub const _0: Self = Self::new(0);
7140
7141 #[doc = "Non Secure"]
7142 pub const _1: Self = Self::new(1);
7143 }
7144 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7145 pub struct Dpfsa27_SPEC;
7146 pub type Dpfsa27 = crate::EnumBitfieldStruct<u8, Dpfsa27_SPEC>;
7147 impl Dpfsa27 {
7148 #[doc = "Secure"]
7149 pub const _0: Self = Self::new(0);
7150
7151 #[doc = "Non Secure"]
7152 pub const _1: Self = Self::new(1);
7153 }
7154}
7155#[doc(hidden)]
7156#[derive(Copy, Clone, Eq, PartialEq)]
7157pub struct Prcr_SPEC;
7158impl crate::sealed::RegSpec for Prcr_SPEC {
7159 type DataType = u16;
7160}
7161
7162#[doc = "Protect Register"]
7163pub type Prcr = crate::RegValueT<Prcr_SPEC>;
7164
7165impl Prcr {
7166 #[doc = "Enable writing to the registers related to the clock generation circuit"]
7167 #[inline(always)]
7168 pub fn prc0(
7169 self,
7170 ) -> crate::common::RegisterField<
7171 0,
7172 0x1,
7173 1,
7174 0,
7175 prcr::Prc0,
7176 prcr::Prc0,
7177 Prcr_SPEC,
7178 crate::common::RW,
7179 > {
7180 crate::common::RegisterField::<
7181 0,
7182 0x1,
7183 1,
7184 0,
7185 prcr::Prc0,
7186 prcr::Prc0,
7187 Prcr_SPEC,
7188 crate::common::RW,
7189 >::from_register(self, 0)
7190 }
7191
7192 #[doc = "Enable writing to the registers related to the low power modes, and the battery backup function"]
7193 #[inline(always)]
7194 pub fn prc1(
7195 self,
7196 ) -> crate::common::RegisterField<
7197 1,
7198 0x1,
7199 1,
7200 0,
7201 prcr::Prc1,
7202 prcr::Prc1,
7203 Prcr_SPEC,
7204 crate::common::RW,
7205 > {
7206 crate::common::RegisterField::<
7207 1,
7208 0x1,
7209 1,
7210 0,
7211 prcr::Prc1,
7212 prcr::Prc1,
7213 Prcr_SPEC,
7214 crate::common::RW,
7215 >::from_register(self, 0)
7216 }
7217
7218 #[doc = "Enable writing to the registers related to the LVD"]
7219 #[inline(always)]
7220 pub fn prc3(
7221 self,
7222 ) -> crate::common::RegisterField<
7223 3,
7224 0x1,
7225 1,
7226 0,
7227 prcr::Prc3,
7228 prcr::Prc3,
7229 Prcr_SPEC,
7230 crate::common::RW,
7231 > {
7232 crate::common::RegisterField::<
7233 3,
7234 0x1,
7235 1,
7236 0,
7237 prcr::Prc3,
7238 prcr::Prc3,
7239 Prcr_SPEC,
7240 crate::common::RW,
7241 >::from_register(self, 0)
7242 }
7243
7244 #[inline(always)]
7245 pub fn prc4(
7246 self,
7247 ) -> crate::common::RegisterField<
7248 4,
7249 0x1,
7250 1,
7251 0,
7252 prcr::Prc4,
7253 prcr::Prc4,
7254 Prcr_SPEC,
7255 crate::common::RW,
7256 > {
7257 crate::common::RegisterField::<
7258 4,
7259 0x1,
7260 1,
7261 0,
7262 prcr::Prc4,
7263 prcr::Prc4,
7264 Prcr_SPEC,
7265 crate::common::RW,
7266 >::from_register(self, 0)
7267 }
7268
7269 #[doc = "PRC Key Code"]
7270 #[inline(always)]
7271 pub fn prkey(
7272 self,
7273 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
7274 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
7275 }
7276}
7277impl ::core::default::Default for Prcr {
7278 #[inline(always)]
7279 fn default() -> Prcr {
7280 <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
7281 }
7282}
7283pub mod prcr {
7284
7285 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7286 pub struct Prc0_SPEC;
7287 pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
7288 impl Prc0 {
7289 #[doc = "Disable writes"]
7290 pub const _0: Self = Self::new(0);
7291
7292 #[doc = "Enable writes"]
7293 pub const _1: Self = Self::new(1);
7294 }
7295 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7296 pub struct Prc1_SPEC;
7297 pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
7298 impl Prc1 {
7299 #[doc = "Disable writes"]
7300 pub const _0: Self = Self::new(0);
7301
7302 #[doc = "Enable writes"]
7303 pub const _1: Self = Self::new(1);
7304 }
7305 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7306 pub struct Prc3_SPEC;
7307 pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
7308 impl Prc3 {
7309 #[doc = "Disable writes"]
7310 pub const _0: Self = Self::new(0);
7311
7312 #[doc = "Enable writes"]
7313 pub const _1: Self = Self::new(1);
7314 }
7315 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7316 pub struct Prc4_SPEC;
7317 pub type Prc4 = crate::EnumBitfieldStruct<u8, Prc4_SPEC>;
7318 impl Prc4 {
7319 #[doc = "Disable writes"]
7320 pub const _0: Self = Self::new(0);
7321
7322 #[doc = "Enable writes"]
7323 pub const _1: Self = Self::new(1);
7324 }
7325}
7326#[doc(hidden)]
7327#[derive(Copy, Clone, Eq, PartialEq)]
7328pub struct Dpsbycr_SPEC;
7329impl crate::sealed::RegSpec for Dpsbycr_SPEC {
7330 type DataType = u8;
7331}
7332
7333#[doc = "Deep Software Standby Control Register"]
7334pub type Dpsbycr = crate::RegValueT<Dpsbycr_SPEC>;
7335
7336impl Dpsbycr {
7337 #[doc = "Power-Supply Control"]
7338 #[inline(always)]
7339 pub fn deepcut(
7340 self,
7341 ) -> crate::common::RegisterField<
7342 0,
7343 0x3,
7344 1,
7345 0,
7346 dpsbycr::Deepcut,
7347 dpsbycr::Deepcut,
7348 Dpsbycr_SPEC,
7349 crate::common::RW,
7350 > {
7351 crate::common::RegisterField::<
7352 0,
7353 0x3,
7354 1,
7355 0,
7356 dpsbycr::Deepcut,
7357 dpsbycr::Deepcut,
7358 Dpsbycr_SPEC,
7359 crate::common::RW,
7360 >::from_register(self, 0)
7361 }
7362
7363 #[doc = "I/O Port Retention"]
7364 #[inline(always)]
7365 pub fn iokeep(
7366 self,
7367 ) -> crate::common::RegisterField<
7368 6,
7369 0x1,
7370 1,
7371 0,
7372 dpsbycr::Iokeep,
7373 dpsbycr::Iokeep,
7374 Dpsbycr_SPEC,
7375 crate::common::RW,
7376 > {
7377 crate::common::RegisterField::<
7378 6,
7379 0x1,
7380 1,
7381 0,
7382 dpsbycr::Iokeep,
7383 dpsbycr::Iokeep,
7384 Dpsbycr_SPEC,
7385 crate::common::RW,
7386 >::from_register(self, 0)
7387 }
7388
7389 #[doc = "Deep Software Standby"]
7390 #[inline(always)]
7391 pub fn dpsby(
7392 self,
7393 ) -> crate::common::RegisterField<
7394 7,
7395 0x1,
7396 1,
7397 0,
7398 dpsbycr::Dpsby,
7399 dpsbycr::Dpsby,
7400 Dpsbycr_SPEC,
7401 crate::common::RW,
7402 > {
7403 crate::common::RegisterField::<
7404 7,
7405 0x1,
7406 1,
7407 0,
7408 dpsbycr::Dpsby,
7409 dpsbycr::Dpsby,
7410 Dpsbycr_SPEC,
7411 crate::common::RW,
7412 >::from_register(self, 0)
7413 }
7414}
7415impl ::core::default::Default for Dpsbycr {
7416 #[inline(always)]
7417 fn default() -> Dpsbycr {
7418 <crate::RegValueT<Dpsbycr_SPEC> as RegisterValue<_>>::new(1)
7419 }
7420}
7421pub mod dpsbycr {
7422
7423 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7424 pub struct Deepcut_SPEC;
7425 pub type Deepcut = crate::EnumBitfieldStruct<u8, Deepcut_SPEC>;
7426 impl Deepcut {
7427 #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGTn (n = 0 to 3), and USBFS resume detecting unit is supplied in Deep Software Standby mode."]
7428 pub const _00: Self = Self::new(0);
7429
7430 #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode."]
7431 pub const _01: Self = Self::new(1);
7432
7433 #[doc = "Setting prohibited"]
7434 pub const _10: Self = Self::new(2);
7435
7436 #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode. In addition, LVD is disabled and the low power function in a power-on reset circuit is enabled."]
7437 pub const _11: Self = Self::new(3);
7438 }
7439 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7440 pub struct Iokeep_SPEC;
7441 pub type Iokeep = crate::EnumBitfieldStruct<u8, Iokeep_SPEC>;
7442 impl Iokeep {
7443 #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the reset state."]
7444 pub const _0: Self = Self::new(0);
7445
7446 #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the same state as in the Deep Software Standby mode."]
7447 pub const _1: Self = Self::new(1);
7448 }
7449 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7450 pub struct Dpsby_SPEC;
7451 pub type Dpsby = crate::EnumBitfieldStruct<u8, Dpsby_SPEC>;
7452 impl Dpsby {
7453 #[doc = "Sleep mode (SBYCR.SSBY=0) / Software Standby mode (SBYCR.SSBY=1)"]
7454 pub const _0: Self = Self::new(0);
7455
7456 #[doc = "Sleep mode (SBYCR.SSBY=0) / Deep Software Standby mode (SBYCR.SSBY=1)"]
7457 pub const _1: Self = Self::new(1);
7458 }
7459}
7460#[doc(hidden)]
7461#[derive(Copy, Clone, Eq, PartialEq)]
7462pub struct Dpswcr_SPEC;
7463impl crate::sealed::RegSpec for Dpswcr_SPEC {
7464 type DataType = u8;
7465}
7466
7467#[doc = "Deep Software Standby Wait Control Register"]
7468pub type Dpswcr = crate::RegValueT<Dpswcr_SPEC>;
7469
7470impl Dpswcr {
7471 #[doc = "Deep Software Wait Standby Time Setting Bit"]
7472 #[inline(always)]
7473 pub fn wtsts(
7474 self,
7475 ) -> crate::common::RegisterField<
7476 0,
7477 0x3f,
7478 1,
7479 0,
7480 dpswcr::Wtsts,
7481 dpswcr::Wtsts,
7482 Dpswcr_SPEC,
7483 crate::common::RW,
7484 > {
7485 crate::common::RegisterField::<
7486 0,
7487 0x3f,
7488 1,
7489 0,
7490 dpswcr::Wtsts,
7491 dpswcr::Wtsts,
7492 Dpswcr_SPEC,
7493 crate::common::RW,
7494 >::from_register(self, 0)
7495 }
7496}
7497impl ::core::default::Default for Dpswcr {
7498 #[inline(always)]
7499 fn default() -> Dpswcr {
7500 <crate::RegValueT<Dpswcr_SPEC> as RegisterValue<_>>::new(25)
7501 }
7502}
7503pub mod dpswcr {
7504
7505 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7506 pub struct Wtsts_SPEC;
7507 pub type Wtsts = crate::EnumBitfieldStruct<u8, Wtsts_SPEC>;
7508 impl Wtsts {
7509 #[doc = "Wait cycle for fast recovery"]
7510 pub const _0_X_0_E: Self = Self::new(14);
7511
7512 #[doc = "Wait cycle for slow recovery"]
7513 pub const _0_X_19: Self = Self::new(25);
7514
7515 #[doc = "Setting prohibited"]
7516 pub const OTHERS: Self = Self::new(0);
7517 }
7518}
7519#[doc(hidden)]
7520#[derive(Copy, Clone, Eq, PartialEq)]
7521pub struct Dpsier0_SPEC;
7522impl crate::sealed::RegSpec for Dpsier0_SPEC {
7523 type DataType = u8;
7524}
7525
7526#[doc = "Deep Software Standby Interrupt Enable Register 0"]
7527pub type Dpsier0 = crate::RegValueT<Dpsier0_SPEC>;
7528
7529impl Dpsier0 {
7530 #[doc = "IRQ0-DS Pin Enable"]
7531 #[inline(always)]
7532 pub fn dirq0e(
7533 self,
7534 ) -> crate::common::RegisterField<
7535 0,
7536 0x1,
7537 1,
7538 0,
7539 dpsier0::Dirq0E,
7540 dpsier0::Dirq0E,
7541 Dpsier0_SPEC,
7542 crate::common::RW,
7543 > {
7544 crate::common::RegisterField::<
7545 0,
7546 0x1,
7547 1,
7548 0,
7549 dpsier0::Dirq0E,
7550 dpsier0::Dirq0E,
7551 Dpsier0_SPEC,
7552 crate::common::RW,
7553 >::from_register(self, 0)
7554 }
7555
7556 #[doc = "IRQ1-DS Pin Enable"]
7557 #[inline(always)]
7558 pub fn dirq1e(
7559 self,
7560 ) -> crate::common::RegisterField<
7561 1,
7562 0x1,
7563 1,
7564 0,
7565 dpsier0::Dirq1E,
7566 dpsier0::Dirq1E,
7567 Dpsier0_SPEC,
7568 crate::common::RW,
7569 > {
7570 crate::common::RegisterField::<
7571 1,
7572 0x1,
7573 1,
7574 0,
7575 dpsier0::Dirq1E,
7576 dpsier0::Dirq1E,
7577 Dpsier0_SPEC,
7578 crate::common::RW,
7579 >::from_register(self, 0)
7580 }
7581
7582 #[doc = "IRQ4-DS Pin Enable"]
7583 #[inline(always)]
7584 pub fn dirq4e(
7585 self,
7586 ) -> crate::common::RegisterField<
7587 4,
7588 0x1,
7589 1,
7590 0,
7591 dpsier0::Dirq4E,
7592 dpsier0::Dirq4E,
7593 Dpsier0_SPEC,
7594 crate::common::RW,
7595 > {
7596 crate::common::RegisterField::<
7597 4,
7598 0x1,
7599 1,
7600 0,
7601 dpsier0::Dirq4E,
7602 dpsier0::Dirq4E,
7603 Dpsier0_SPEC,
7604 crate::common::RW,
7605 >::from_register(self, 0)
7606 }
7607
7608 #[doc = "IRQ5-DS Pin Enable"]
7609 #[inline(always)]
7610 pub fn dirq5e(
7611 self,
7612 ) -> crate::common::RegisterField<
7613 5,
7614 0x1,
7615 1,
7616 0,
7617 dpsier0::Dirq5E,
7618 dpsier0::Dirq5E,
7619 Dpsier0_SPEC,
7620 crate::common::RW,
7621 > {
7622 crate::common::RegisterField::<
7623 5,
7624 0x1,
7625 1,
7626 0,
7627 dpsier0::Dirq5E,
7628 dpsier0::Dirq5E,
7629 Dpsier0_SPEC,
7630 crate::common::RW,
7631 >::from_register(self, 0)
7632 }
7633
7634 #[doc = "IRQ6-DS Pin Enable"]
7635 #[inline(always)]
7636 pub fn dirq6e(
7637 self,
7638 ) -> crate::common::RegisterField<
7639 6,
7640 0x1,
7641 1,
7642 0,
7643 dpsier0::Dirq6E,
7644 dpsier0::Dirq6E,
7645 Dpsier0_SPEC,
7646 crate::common::RW,
7647 > {
7648 crate::common::RegisterField::<
7649 6,
7650 0x1,
7651 1,
7652 0,
7653 dpsier0::Dirq6E,
7654 dpsier0::Dirq6E,
7655 Dpsier0_SPEC,
7656 crate::common::RW,
7657 >::from_register(self, 0)
7658 }
7659
7660 #[doc = "IRQ7-DS Pin Enable"]
7661 #[inline(always)]
7662 pub fn dirq7e(
7663 self,
7664 ) -> crate::common::RegisterField<
7665 7,
7666 0x1,
7667 1,
7668 0,
7669 dpsier0::Dirq7E,
7670 dpsier0::Dirq7E,
7671 Dpsier0_SPEC,
7672 crate::common::RW,
7673 > {
7674 crate::common::RegisterField::<
7675 7,
7676 0x1,
7677 1,
7678 0,
7679 dpsier0::Dirq7E,
7680 dpsier0::Dirq7E,
7681 Dpsier0_SPEC,
7682 crate::common::RW,
7683 >::from_register(self, 0)
7684 }
7685}
7686impl ::core::default::Default for Dpsier0 {
7687 #[inline(always)]
7688 fn default() -> Dpsier0 {
7689 <crate::RegValueT<Dpsier0_SPEC> as RegisterValue<_>>::new(0)
7690 }
7691}
7692pub mod dpsier0 {
7693
7694 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7695 pub struct Dirq0E_SPEC;
7696 pub type Dirq0E = crate::EnumBitfieldStruct<u8, Dirq0E_SPEC>;
7697 impl Dirq0E {
7698 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7699 pub const _0: Self = Self::new(0);
7700
7701 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7702 pub const _1: Self = Self::new(1);
7703 }
7704 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7705 pub struct Dirq1E_SPEC;
7706 pub type Dirq1E = crate::EnumBitfieldStruct<u8, Dirq1E_SPEC>;
7707 impl Dirq1E {
7708 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7709 pub const _0: Self = Self::new(0);
7710
7711 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7712 pub const _1: Self = Self::new(1);
7713 }
7714 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7715 pub struct Dirq4E_SPEC;
7716 pub type Dirq4E = crate::EnumBitfieldStruct<u8, Dirq4E_SPEC>;
7717 impl Dirq4E {
7718 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7719 pub const _0: Self = Self::new(0);
7720
7721 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7722 pub const _1: Self = Self::new(1);
7723 }
7724 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7725 pub struct Dirq5E_SPEC;
7726 pub type Dirq5E = crate::EnumBitfieldStruct<u8, Dirq5E_SPEC>;
7727 impl Dirq5E {
7728 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7729 pub const _0: Self = Self::new(0);
7730
7731 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7732 pub const _1: Self = Self::new(1);
7733 }
7734 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7735 pub struct Dirq6E_SPEC;
7736 pub type Dirq6E = crate::EnumBitfieldStruct<u8, Dirq6E_SPEC>;
7737 impl Dirq6E {
7738 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7739 pub const _0: Self = Self::new(0);
7740
7741 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7742 pub const _1: Self = Self::new(1);
7743 }
7744 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7745 pub struct Dirq7E_SPEC;
7746 pub type Dirq7E = crate::EnumBitfieldStruct<u8, Dirq7E_SPEC>;
7747 impl Dirq7E {
7748 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7749 pub const _0: Self = Self::new(0);
7750
7751 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7752 pub const _1: Self = Self::new(1);
7753 }
7754}
7755#[doc(hidden)]
7756#[derive(Copy, Clone, Eq, PartialEq)]
7757pub struct Dpsier1_SPEC;
7758impl crate::sealed::RegSpec for Dpsier1_SPEC {
7759 type DataType = u8;
7760}
7761
7762#[doc = "Deep Software Standby Interrupt Enable Register 1"]
7763pub type Dpsier1 = crate::RegValueT<Dpsier1_SPEC>;
7764
7765impl Dpsier1 {
7766 #[doc = "IRQ8-DS Pin Enable"]
7767 #[inline(always)]
7768 pub fn dirq8e(
7769 self,
7770 ) -> crate::common::RegisterField<
7771 0,
7772 0x1,
7773 1,
7774 0,
7775 dpsier1::Dirq8E,
7776 dpsier1::Dirq8E,
7777 Dpsier1_SPEC,
7778 crate::common::RW,
7779 > {
7780 crate::common::RegisterField::<
7781 0,
7782 0x1,
7783 1,
7784 0,
7785 dpsier1::Dirq8E,
7786 dpsier1::Dirq8E,
7787 Dpsier1_SPEC,
7788 crate::common::RW,
7789 >::from_register(self, 0)
7790 }
7791
7792 #[doc = "IRQ9-DS Pin Enable"]
7793 #[inline(always)]
7794 pub fn dirq9e(
7795 self,
7796 ) -> crate::common::RegisterField<
7797 1,
7798 0x1,
7799 1,
7800 0,
7801 dpsier1::Dirq9E,
7802 dpsier1::Dirq9E,
7803 Dpsier1_SPEC,
7804 crate::common::RW,
7805 > {
7806 crate::common::RegisterField::<
7807 1,
7808 0x1,
7809 1,
7810 0,
7811 dpsier1::Dirq9E,
7812 dpsier1::Dirq9E,
7813 Dpsier1_SPEC,
7814 crate::common::RW,
7815 >::from_register(self, 0)
7816 }
7817
7818 #[doc = "IRQ10-DS Pin Enable"]
7819 #[inline(always)]
7820 pub fn dirq10e(
7821 self,
7822 ) -> crate::common::RegisterField<
7823 2,
7824 0x1,
7825 1,
7826 0,
7827 dpsier1::Dirq10E,
7828 dpsier1::Dirq10E,
7829 Dpsier1_SPEC,
7830 crate::common::RW,
7831 > {
7832 crate::common::RegisterField::<
7833 2,
7834 0x1,
7835 1,
7836 0,
7837 dpsier1::Dirq10E,
7838 dpsier1::Dirq10E,
7839 Dpsier1_SPEC,
7840 crate::common::RW,
7841 >::from_register(self, 0)
7842 }
7843
7844 #[doc = "IRQ11-DS Pin Enable"]
7845 #[inline(always)]
7846 pub fn dirq11e(
7847 self,
7848 ) -> crate::common::RegisterField<
7849 3,
7850 0x1,
7851 1,
7852 0,
7853 dpsier1::Dirq11E,
7854 dpsier1::Dirq11E,
7855 Dpsier1_SPEC,
7856 crate::common::RW,
7857 > {
7858 crate::common::RegisterField::<
7859 3,
7860 0x1,
7861 1,
7862 0,
7863 dpsier1::Dirq11E,
7864 dpsier1::Dirq11E,
7865 Dpsier1_SPEC,
7866 crate::common::RW,
7867 >::from_register(self, 0)
7868 }
7869
7870 #[doc = "IRQ12-DS Pin Enable"]
7871 #[inline(always)]
7872 pub fn dirq12e(
7873 self,
7874 ) -> crate::common::RegisterField<
7875 4,
7876 0x1,
7877 1,
7878 0,
7879 dpsier1::Dirq12E,
7880 dpsier1::Dirq12E,
7881 Dpsier1_SPEC,
7882 crate::common::RW,
7883 > {
7884 crate::common::RegisterField::<
7885 4,
7886 0x1,
7887 1,
7888 0,
7889 dpsier1::Dirq12E,
7890 dpsier1::Dirq12E,
7891 Dpsier1_SPEC,
7892 crate::common::RW,
7893 >::from_register(self, 0)
7894 }
7895
7896 #[doc = "IRQ14-DS Pin Enable"]
7897 #[inline(always)]
7898 pub fn dirq14e(
7899 self,
7900 ) -> crate::common::RegisterField<
7901 6,
7902 0x1,
7903 1,
7904 0,
7905 dpsier1::Dirq14E,
7906 dpsier1::Dirq14E,
7907 Dpsier1_SPEC,
7908 crate::common::RW,
7909 > {
7910 crate::common::RegisterField::<
7911 6,
7912 0x1,
7913 1,
7914 0,
7915 dpsier1::Dirq14E,
7916 dpsier1::Dirq14E,
7917 Dpsier1_SPEC,
7918 crate::common::RW,
7919 >::from_register(self, 0)
7920 }
7921
7922 #[doc = "IRQ15-DS Pin Enable"]
7923 #[inline(always)]
7924 pub fn dirq15e(
7925 self,
7926 ) -> crate::common::RegisterField<
7927 7,
7928 0x1,
7929 1,
7930 0,
7931 dpsier1::Dirq15E,
7932 dpsier1::Dirq15E,
7933 Dpsier1_SPEC,
7934 crate::common::RW,
7935 > {
7936 crate::common::RegisterField::<
7937 7,
7938 0x1,
7939 1,
7940 0,
7941 dpsier1::Dirq15E,
7942 dpsier1::Dirq15E,
7943 Dpsier1_SPEC,
7944 crate::common::RW,
7945 >::from_register(self, 0)
7946 }
7947}
7948impl ::core::default::Default for Dpsier1 {
7949 #[inline(always)]
7950 fn default() -> Dpsier1 {
7951 <crate::RegValueT<Dpsier1_SPEC> as RegisterValue<_>>::new(0)
7952 }
7953}
7954pub mod dpsier1 {
7955
7956 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7957 pub struct Dirq8E_SPEC;
7958 pub type Dirq8E = crate::EnumBitfieldStruct<u8, Dirq8E_SPEC>;
7959 impl Dirq8E {
7960 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7961 pub const _0: Self = Self::new(0);
7962
7963 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7964 pub const _1: Self = Self::new(1);
7965 }
7966 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7967 pub struct Dirq9E_SPEC;
7968 pub type Dirq9E = crate::EnumBitfieldStruct<u8, Dirq9E_SPEC>;
7969 impl Dirq9E {
7970 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7971 pub const _0: Self = Self::new(0);
7972
7973 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7974 pub const _1: Self = Self::new(1);
7975 }
7976 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7977 pub struct Dirq10E_SPEC;
7978 pub type Dirq10E = crate::EnumBitfieldStruct<u8, Dirq10E_SPEC>;
7979 impl Dirq10E {
7980 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7981 pub const _0: Self = Self::new(0);
7982
7983 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7984 pub const _1: Self = Self::new(1);
7985 }
7986 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7987 pub struct Dirq11E_SPEC;
7988 pub type Dirq11E = crate::EnumBitfieldStruct<u8, Dirq11E_SPEC>;
7989 impl Dirq11E {
7990 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7991 pub const _0: Self = Self::new(0);
7992
7993 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7994 pub const _1: Self = Self::new(1);
7995 }
7996 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7997 pub struct Dirq12E_SPEC;
7998 pub type Dirq12E = crate::EnumBitfieldStruct<u8, Dirq12E_SPEC>;
7999 impl Dirq12E {
8000 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8001 pub const _0: Self = Self::new(0);
8002
8003 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8004 pub const _1: Self = Self::new(1);
8005 }
8006 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8007 pub struct Dirq14E_SPEC;
8008 pub type Dirq14E = crate::EnumBitfieldStruct<u8, Dirq14E_SPEC>;
8009 impl Dirq14E {
8010 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8011 pub const _0: Self = Self::new(0);
8012
8013 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8014 pub const _1: Self = Self::new(1);
8015 }
8016 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8017 pub struct Dirq15E_SPEC;
8018 pub type Dirq15E = crate::EnumBitfieldStruct<u8, Dirq15E_SPEC>;
8019 impl Dirq15E {
8020 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8021 pub const _0: Self = Self::new(0);
8022
8023 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8024 pub const _1: Self = Self::new(1);
8025 }
8026}
8027#[doc(hidden)]
8028#[derive(Copy, Clone, Eq, PartialEq)]
8029pub struct Dpsier2_SPEC;
8030impl crate::sealed::RegSpec for Dpsier2_SPEC {
8031 type DataType = u8;
8032}
8033
8034#[doc = "Deep Software Standby Interrupt Enable Register 2"]
8035pub type Dpsier2 = crate::RegValueT<Dpsier2_SPEC>;
8036
8037impl Dpsier2 {
8038 #[doc = "LVD1 Deep Software Standby Cancel Signal Enable"]
8039 #[inline(always)]
8040 pub fn dlvd1ie(
8041 self,
8042 ) -> crate::common::RegisterField<
8043 0,
8044 0x1,
8045 1,
8046 0,
8047 dpsier2::Dlvd1Ie,
8048 dpsier2::Dlvd1Ie,
8049 Dpsier2_SPEC,
8050 crate::common::RW,
8051 > {
8052 crate::common::RegisterField::<
8053 0,
8054 0x1,
8055 1,
8056 0,
8057 dpsier2::Dlvd1Ie,
8058 dpsier2::Dlvd1Ie,
8059 Dpsier2_SPEC,
8060 crate::common::RW,
8061 >::from_register(self, 0)
8062 }
8063
8064 #[doc = "LVD2 Deep Software Standby Cancel Signal Enable"]
8065 #[inline(always)]
8066 pub fn dlvd2ie(
8067 self,
8068 ) -> crate::common::RegisterField<
8069 1,
8070 0x1,
8071 1,
8072 0,
8073 dpsier2::Dlvd2Ie,
8074 dpsier2::Dlvd2Ie,
8075 Dpsier2_SPEC,
8076 crate::common::RW,
8077 > {
8078 crate::common::RegisterField::<
8079 1,
8080 0x1,
8081 1,
8082 0,
8083 dpsier2::Dlvd2Ie,
8084 dpsier2::Dlvd2Ie,
8085 Dpsier2_SPEC,
8086 crate::common::RW,
8087 >::from_register(self, 0)
8088 }
8089
8090 #[doc = "RTC Interval interrupt Deep Software Standby Cancel Signal Enable"]
8091 #[inline(always)]
8092 pub fn drtciie(
8093 self,
8094 ) -> crate::common::RegisterField<
8095 2,
8096 0x1,
8097 1,
8098 0,
8099 dpsier2::Drtciie,
8100 dpsier2::Drtciie,
8101 Dpsier2_SPEC,
8102 crate::common::RW,
8103 > {
8104 crate::common::RegisterField::<
8105 2,
8106 0x1,
8107 1,
8108 0,
8109 dpsier2::Drtciie,
8110 dpsier2::Drtciie,
8111 Dpsier2_SPEC,
8112 crate::common::RW,
8113 >::from_register(self, 0)
8114 }
8115
8116 #[doc = "RTC Alarm interrupt Deep Software Standby Cancel Signal Enable"]
8117 #[inline(always)]
8118 pub fn drtcaie(
8119 self,
8120 ) -> crate::common::RegisterField<
8121 3,
8122 0x1,
8123 1,
8124 0,
8125 dpsier2::Drtcaie,
8126 dpsier2::Drtcaie,
8127 Dpsier2_SPEC,
8128 crate::common::RW,
8129 > {
8130 crate::common::RegisterField::<
8131 3,
8132 0x1,
8133 1,
8134 0,
8135 dpsier2::Drtcaie,
8136 dpsier2::Drtcaie,
8137 Dpsier2_SPEC,
8138 crate::common::RW,
8139 >::from_register(self, 0)
8140 }
8141
8142 #[doc = "NMI Pin Enable"]
8143 #[inline(always)]
8144 pub fn dnmie(
8145 self,
8146 ) -> crate::common::RegisterField<
8147 4,
8148 0x1,
8149 1,
8150 0,
8151 dpsier2::Dnmie,
8152 dpsier2::Dnmie,
8153 Dpsier2_SPEC,
8154 crate::common::RW,
8155 > {
8156 crate::common::RegisterField::<
8157 4,
8158 0x1,
8159 1,
8160 0,
8161 dpsier2::Dnmie,
8162 dpsier2::Dnmie,
8163 Dpsier2_SPEC,
8164 crate::common::RW,
8165 >::from_register(self, 0)
8166 }
8167}
8168impl ::core::default::Default for Dpsier2 {
8169 #[inline(always)]
8170 fn default() -> Dpsier2 {
8171 <crate::RegValueT<Dpsier2_SPEC> as RegisterValue<_>>::new(0)
8172 }
8173}
8174pub mod dpsier2 {
8175
8176 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8177 pub struct Dlvd1Ie_SPEC;
8178 pub type Dlvd1Ie = crate::EnumBitfieldStruct<u8, Dlvd1Ie_SPEC>;
8179 impl Dlvd1Ie {
8180 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8181 pub const _0: Self = Self::new(0);
8182
8183 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8184 pub const _1: Self = Self::new(1);
8185 }
8186 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8187 pub struct Dlvd2Ie_SPEC;
8188 pub type Dlvd2Ie = crate::EnumBitfieldStruct<u8, Dlvd2Ie_SPEC>;
8189 impl Dlvd2Ie {
8190 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8191 pub const _0: Self = Self::new(0);
8192
8193 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8194 pub const _1: Self = Self::new(1);
8195 }
8196 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8197 pub struct Drtciie_SPEC;
8198 pub type Drtciie = crate::EnumBitfieldStruct<u8, Drtciie_SPEC>;
8199 impl Drtciie {
8200 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8201 pub const _0: Self = Self::new(0);
8202
8203 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8204 pub const _1: Self = Self::new(1);
8205 }
8206 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8207 pub struct Drtcaie_SPEC;
8208 pub type Drtcaie = crate::EnumBitfieldStruct<u8, Drtcaie_SPEC>;
8209 impl Drtcaie {
8210 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8211 pub const _0: Self = Self::new(0);
8212
8213 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8214 pub const _1: Self = Self::new(1);
8215 }
8216 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8217 pub struct Dnmie_SPEC;
8218 pub type Dnmie = crate::EnumBitfieldStruct<u8, Dnmie_SPEC>;
8219 impl Dnmie {
8220 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8221 pub const _0: Self = Self::new(0);
8222
8223 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8224 pub const _1: Self = Self::new(1);
8225 }
8226}
8227#[doc(hidden)]
8228#[derive(Copy, Clone, Eq, PartialEq)]
8229pub struct Dpsier3_SPEC;
8230impl crate::sealed::RegSpec for Dpsier3_SPEC {
8231 type DataType = u8;
8232}
8233
8234#[doc = "Deep Software Standby Interrupt Enable Register 3"]
8235pub type Dpsier3 = crate::RegValueT<Dpsier3_SPEC>;
8236
8237impl Dpsier3 {
8238 #[doc = "USBFS0 Suspend/Resume Deep Software Standby Cancel Signal Enable"]
8239 #[inline(always)]
8240 pub fn dusbfs0ie(
8241 self,
8242 ) -> crate::common::RegisterField<
8243 0,
8244 0x1,
8245 1,
8246 0,
8247 dpsier3::Dusbfs0Ie,
8248 dpsier3::Dusbfs0Ie,
8249 Dpsier3_SPEC,
8250 crate::common::RW,
8251 > {
8252 crate::common::RegisterField::<
8253 0,
8254 0x1,
8255 1,
8256 0,
8257 dpsier3::Dusbfs0Ie,
8258 dpsier3::Dusbfs0Ie,
8259 Dpsier3_SPEC,
8260 crate::common::RW,
8261 >::from_register(self, 0)
8262 }
8263
8264 #[doc = "AGT1 Underflow Deep Software Standby Cancel Signal Enable"]
8265 #[inline(always)]
8266 pub fn dagt1ie(
8267 self,
8268 ) -> crate::common::RegisterField<
8269 2,
8270 0x1,
8271 1,
8272 0,
8273 dpsier3::Dagt1Ie,
8274 dpsier3::Dagt1Ie,
8275 Dpsier3_SPEC,
8276 crate::common::RW,
8277 > {
8278 crate::common::RegisterField::<
8279 2,
8280 0x1,
8281 1,
8282 0,
8283 dpsier3::Dagt1Ie,
8284 dpsier3::Dagt1Ie,
8285 Dpsier3_SPEC,
8286 crate::common::RW,
8287 >::from_register(self, 0)
8288 }
8289
8290 #[doc = "AGT3 Underflow Deep Software Standby Cancel Signal Enable"]
8291 #[inline(always)]
8292 pub fn dagt3ie(
8293 self,
8294 ) -> crate::common::RegisterField<
8295 3,
8296 0x1,
8297 1,
8298 0,
8299 dpsier3::Dagt3Ie,
8300 dpsier3::Dagt3Ie,
8301 Dpsier3_SPEC,
8302 crate::common::RW,
8303 > {
8304 crate::common::RegisterField::<
8305 3,
8306 0x1,
8307 1,
8308 0,
8309 dpsier3::Dagt3Ie,
8310 dpsier3::Dagt3Ie,
8311 Dpsier3_SPEC,
8312 crate::common::RW,
8313 >::from_register(self, 0)
8314 }
8315}
8316impl ::core::default::Default for Dpsier3 {
8317 #[inline(always)]
8318 fn default() -> Dpsier3 {
8319 <crate::RegValueT<Dpsier3_SPEC> as RegisterValue<_>>::new(0)
8320 }
8321}
8322pub mod dpsier3 {
8323
8324 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8325 pub struct Dusbfs0Ie_SPEC;
8326 pub type Dusbfs0Ie = crate::EnumBitfieldStruct<u8, Dusbfs0Ie_SPEC>;
8327 impl Dusbfs0Ie {
8328 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8329 pub const _0: Self = Self::new(0);
8330
8331 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8332 pub const _1: Self = Self::new(1);
8333 }
8334 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8335 pub struct Dagt1Ie_SPEC;
8336 pub type Dagt1Ie = crate::EnumBitfieldStruct<u8, Dagt1Ie_SPEC>;
8337 impl Dagt1Ie {
8338 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8339 pub const _0: Self = Self::new(0);
8340
8341 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8342 pub const _1: Self = Self::new(1);
8343 }
8344 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8345 pub struct Dagt3Ie_SPEC;
8346 pub type Dagt3Ie = crate::EnumBitfieldStruct<u8, Dagt3Ie_SPEC>;
8347 impl Dagt3Ie {
8348 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8349 pub const _0: Self = Self::new(0);
8350
8351 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8352 pub const _1: Self = Self::new(1);
8353 }
8354}
8355#[doc(hidden)]
8356#[derive(Copy, Clone, Eq, PartialEq)]
8357pub struct Dpsifr0_SPEC;
8358impl crate::sealed::RegSpec for Dpsifr0_SPEC {
8359 type DataType = u8;
8360}
8361
8362#[doc = "Deep Software Standby Interrupt Flag Register 0"]
8363pub type Dpsifr0 = crate::RegValueT<Dpsifr0_SPEC>;
8364
8365impl Dpsifr0 {
8366 #[doc = "IRQ0-DS Pin Deep Software Standby Cancel Flag"]
8367 #[inline(always)]
8368 pub fn dirq0f(
8369 self,
8370 ) -> crate::common::RegisterField<
8371 0,
8372 0x1,
8373 1,
8374 0,
8375 dpsifr0::Dirq0F,
8376 dpsifr0::Dirq0F,
8377 Dpsifr0_SPEC,
8378 crate::common::RW,
8379 > {
8380 crate::common::RegisterField::<
8381 0,
8382 0x1,
8383 1,
8384 0,
8385 dpsifr0::Dirq0F,
8386 dpsifr0::Dirq0F,
8387 Dpsifr0_SPEC,
8388 crate::common::RW,
8389 >::from_register(self, 0)
8390 }
8391
8392 #[doc = "IRQ1-DS Pin Deep Software Standby Cancel Flag"]
8393 #[inline(always)]
8394 pub fn dirq1f(
8395 self,
8396 ) -> crate::common::RegisterField<
8397 1,
8398 0x1,
8399 1,
8400 0,
8401 dpsifr0::Dirq1F,
8402 dpsifr0::Dirq1F,
8403 Dpsifr0_SPEC,
8404 crate::common::RW,
8405 > {
8406 crate::common::RegisterField::<
8407 1,
8408 0x1,
8409 1,
8410 0,
8411 dpsifr0::Dirq1F,
8412 dpsifr0::Dirq1F,
8413 Dpsifr0_SPEC,
8414 crate::common::RW,
8415 >::from_register(self, 0)
8416 }
8417
8418 #[doc = "IRQ4-DS Pin Deep Software Standby Cancel Flag"]
8419 #[inline(always)]
8420 pub fn dirq4f(
8421 self,
8422 ) -> crate::common::RegisterField<
8423 4,
8424 0x1,
8425 1,
8426 0,
8427 dpsifr0::Dirq4F,
8428 dpsifr0::Dirq4F,
8429 Dpsifr0_SPEC,
8430 crate::common::RW,
8431 > {
8432 crate::common::RegisterField::<
8433 4,
8434 0x1,
8435 1,
8436 0,
8437 dpsifr0::Dirq4F,
8438 dpsifr0::Dirq4F,
8439 Dpsifr0_SPEC,
8440 crate::common::RW,
8441 >::from_register(self, 0)
8442 }
8443
8444 #[doc = "IRQ5-DS Pin Deep Software Standby Cancel Flag"]
8445 #[inline(always)]
8446 pub fn dirq5f(
8447 self,
8448 ) -> crate::common::RegisterField<
8449 5,
8450 0x1,
8451 1,
8452 0,
8453 dpsifr0::Dirq5F,
8454 dpsifr0::Dirq5F,
8455 Dpsifr0_SPEC,
8456 crate::common::RW,
8457 > {
8458 crate::common::RegisterField::<
8459 5,
8460 0x1,
8461 1,
8462 0,
8463 dpsifr0::Dirq5F,
8464 dpsifr0::Dirq5F,
8465 Dpsifr0_SPEC,
8466 crate::common::RW,
8467 >::from_register(self, 0)
8468 }
8469
8470 #[doc = "IRQ6-DS Pin Deep Software Standby Cancel Flag"]
8471 #[inline(always)]
8472 pub fn dirq6f(
8473 self,
8474 ) -> crate::common::RegisterField<
8475 6,
8476 0x1,
8477 1,
8478 0,
8479 dpsifr0::Dirq6F,
8480 dpsifr0::Dirq6F,
8481 Dpsifr0_SPEC,
8482 crate::common::RW,
8483 > {
8484 crate::common::RegisterField::<
8485 6,
8486 0x1,
8487 1,
8488 0,
8489 dpsifr0::Dirq6F,
8490 dpsifr0::Dirq6F,
8491 Dpsifr0_SPEC,
8492 crate::common::RW,
8493 >::from_register(self, 0)
8494 }
8495
8496 #[doc = "IRQ7-DS Pin Deep Software Standby Cancel Flag"]
8497 #[inline(always)]
8498 pub fn dirq7f(
8499 self,
8500 ) -> crate::common::RegisterField<
8501 7,
8502 0x1,
8503 1,
8504 0,
8505 dpsifr0::Dirq7F,
8506 dpsifr0::Dirq7F,
8507 Dpsifr0_SPEC,
8508 crate::common::RW,
8509 > {
8510 crate::common::RegisterField::<
8511 7,
8512 0x1,
8513 1,
8514 0,
8515 dpsifr0::Dirq7F,
8516 dpsifr0::Dirq7F,
8517 Dpsifr0_SPEC,
8518 crate::common::RW,
8519 >::from_register(self, 0)
8520 }
8521}
8522impl ::core::default::Default for Dpsifr0 {
8523 #[inline(always)]
8524 fn default() -> Dpsifr0 {
8525 <crate::RegValueT<Dpsifr0_SPEC> as RegisterValue<_>>::new(0)
8526 }
8527}
8528pub mod dpsifr0 {
8529
8530 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8531 pub struct Dirq0F_SPEC;
8532 pub type Dirq0F = crate::EnumBitfieldStruct<u8, Dirq0F_SPEC>;
8533 impl Dirq0F {
8534 #[doc = "The cancel request is not generated"]
8535 pub const _0: Self = Self::new(0);
8536
8537 #[doc = "The cancel request is generated"]
8538 pub const _1: Self = Self::new(1);
8539 }
8540 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8541 pub struct Dirq1F_SPEC;
8542 pub type Dirq1F = crate::EnumBitfieldStruct<u8, Dirq1F_SPEC>;
8543 impl Dirq1F {
8544 #[doc = "The cancel request is not generated"]
8545 pub const _0: Self = Self::new(0);
8546
8547 #[doc = "The cancel request is generated"]
8548 pub const _1: Self = Self::new(1);
8549 }
8550 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8551 pub struct Dirq4F_SPEC;
8552 pub type Dirq4F = crate::EnumBitfieldStruct<u8, Dirq4F_SPEC>;
8553 impl Dirq4F {
8554 #[doc = "The cancel request is not generated"]
8555 pub const _0: Self = Self::new(0);
8556
8557 #[doc = "The cancel request is generated"]
8558 pub const _1: Self = Self::new(1);
8559 }
8560 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8561 pub struct Dirq5F_SPEC;
8562 pub type Dirq5F = crate::EnumBitfieldStruct<u8, Dirq5F_SPEC>;
8563 impl Dirq5F {
8564 #[doc = "The cancel request is not generated"]
8565 pub const _0: Self = Self::new(0);
8566
8567 #[doc = "The cancel request is generated"]
8568 pub const _1: Self = Self::new(1);
8569 }
8570 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8571 pub struct Dirq6F_SPEC;
8572 pub type Dirq6F = crate::EnumBitfieldStruct<u8, Dirq6F_SPEC>;
8573 impl Dirq6F {
8574 #[doc = "The cancel request is not generated"]
8575 pub const _0: Self = Self::new(0);
8576
8577 #[doc = "The cancel request is generated"]
8578 pub const _1: Self = Self::new(1);
8579 }
8580 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8581 pub struct Dirq7F_SPEC;
8582 pub type Dirq7F = crate::EnumBitfieldStruct<u8, Dirq7F_SPEC>;
8583 impl Dirq7F {
8584 #[doc = "The cancel request is not generated"]
8585 pub const _0: Self = Self::new(0);
8586
8587 #[doc = "The cancel request is generated"]
8588 pub const _1: Self = Self::new(1);
8589 }
8590}
8591#[doc(hidden)]
8592#[derive(Copy, Clone, Eq, PartialEq)]
8593pub struct Dpsifr1_SPEC;
8594impl crate::sealed::RegSpec for Dpsifr1_SPEC {
8595 type DataType = u8;
8596}
8597
8598#[doc = "Deep Software Standby Interrupt Flag Register 1"]
8599pub type Dpsifr1 = crate::RegValueT<Dpsifr1_SPEC>;
8600
8601impl Dpsifr1 {
8602 #[doc = "IRQ8-DS Pin Deep Software Standby Cancel Flag"]
8603 #[inline(always)]
8604 pub fn dirq8f(
8605 self,
8606 ) -> crate::common::RegisterField<
8607 0,
8608 0x1,
8609 1,
8610 0,
8611 dpsifr1::Dirq8F,
8612 dpsifr1::Dirq8F,
8613 Dpsifr1_SPEC,
8614 crate::common::RW,
8615 > {
8616 crate::common::RegisterField::<
8617 0,
8618 0x1,
8619 1,
8620 0,
8621 dpsifr1::Dirq8F,
8622 dpsifr1::Dirq8F,
8623 Dpsifr1_SPEC,
8624 crate::common::RW,
8625 >::from_register(self, 0)
8626 }
8627
8628 #[doc = "IRQ9-DS Pin Deep Software Standby Cancel Flag"]
8629 #[inline(always)]
8630 pub fn dirq9f(
8631 self,
8632 ) -> crate::common::RegisterField<
8633 1,
8634 0x1,
8635 1,
8636 0,
8637 dpsifr1::Dirq9F,
8638 dpsifr1::Dirq9F,
8639 Dpsifr1_SPEC,
8640 crate::common::RW,
8641 > {
8642 crate::common::RegisterField::<
8643 1,
8644 0x1,
8645 1,
8646 0,
8647 dpsifr1::Dirq9F,
8648 dpsifr1::Dirq9F,
8649 Dpsifr1_SPEC,
8650 crate::common::RW,
8651 >::from_register(self, 0)
8652 }
8653
8654 #[doc = "IRQ10-DS Pin Deep Software Standby Cancel Flag"]
8655 #[inline(always)]
8656 pub fn dirq10f(
8657 self,
8658 ) -> crate::common::RegisterField<
8659 2,
8660 0x1,
8661 1,
8662 0,
8663 dpsifr1::Dirq10F,
8664 dpsifr1::Dirq10F,
8665 Dpsifr1_SPEC,
8666 crate::common::RW,
8667 > {
8668 crate::common::RegisterField::<
8669 2,
8670 0x1,
8671 1,
8672 0,
8673 dpsifr1::Dirq10F,
8674 dpsifr1::Dirq10F,
8675 Dpsifr1_SPEC,
8676 crate::common::RW,
8677 >::from_register(self, 0)
8678 }
8679
8680 #[doc = "IRQ11-DS Pin Deep Software Standby Cancel Flag"]
8681 #[inline(always)]
8682 pub fn dirq11f(
8683 self,
8684 ) -> crate::common::RegisterField<
8685 3,
8686 0x1,
8687 1,
8688 0,
8689 dpsifr1::Dirq11F,
8690 dpsifr1::Dirq11F,
8691 Dpsifr1_SPEC,
8692 crate::common::RW,
8693 > {
8694 crate::common::RegisterField::<
8695 3,
8696 0x1,
8697 1,
8698 0,
8699 dpsifr1::Dirq11F,
8700 dpsifr1::Dirq11F,
8701 Dpsifr1_SPEC,
8702 crate::common::RW,
8703 >::from_register(self, 0)
8704 }
8705
8706 #[doc = "IRQ12-DS Pin Deep Software Standby Cancel Flag"]
8707 #[inline(always)]
8708 pub fn dirq12f(
8709 self,
8710 ) -> crate::common::RegisterField<
8711 4,
8712 0x1,
8713 1,
8714 0,
8715 dpsifr1::Dirq12F,
8716 dpsifr1::Dirq12F,
8717 Dpsifr1_SPEC,
8718 crate::common::RW,
8719 > {
8720 crate::common::RegisterField::<
8721 4,
8722 0x1,
8723 1,
8724 0,
8725 dpsifr1::Dirq12F,
8726 dpsifr1::Dirq12F,
8727 Dpsifr1_SPEC,
8728 crate::common::RW,
8729 >::from_register(self, 0)
8730 }
8731
8732 #[doc = "IRQ14-DS Pin Deep Software Standby Cancel Flag"]
8733 #[inline(always)]
8734 pub fn dirq14f(
8735 self,
8736 ) -> crate::common::RegisterField<
8737 6,
8738 0x1,
8739 1,
8740 0,
8741 dpsifr1::Dirq14F,
8742 dpsifr1::Dirq14F,
8743 Dpsifr1_SPEC,
8744 crate::common::RW,
8745 > {
8746 crate::common::RegisterField::<
8747 6,
8748 0x1,
8749 1,
8750 0,
8751 dpsifr1::Dirq14F,
8752 dpsifr1::Dirq14F,
8753 Dpsifr1_SPEC,
8754 crate::common::RW,
8755 >::from_register(self, 0)
8756 }
8757
8758 #[doc = "IRQ15-DS Pin Deep Software Standby Cancel Flag"]
8759 #[inline(always)]
8760 pub fn dirq15f(
8761 self,
8762 ) -> crate::common::RegisterField<
8763 7,
8764 0x1,
8765 1,
8766 0,
8767 dpsifr1::Dirq15F,
8768 dpsifr1::Dirq15F,
8769 Dpsifr1_SPEC,
8770 crate::common::RW,
8771 > {
8772 crate::common::RegisterField::<
8773 7,
8774 0x1,
8775 1,
8776 0,
8777 dpsifr1::Dirq15F,
8778 dpsifr1::Dirq15F,
8779 Dpsifr1_SPEC,
8780 crate::common::RW,
8781 >::from_register(self, 0)
8782 }
8783}
8784impl ::core::default::Default for Dpsifr1 {
8785 #[inline(always)]
8786 fn default() -> Dpsifr1 {
8787 <crate::RegValueT<Dpsifr1_SPEC> as RegisterValue<_>>::new(0)
8788 }
8789}
8790pub mod dpsifr1 {
8791
8792 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8793 pub struct Dirq8F_SPEC;
8794 pub type Dirq8F = crate::EnumBitfieldStruct<u8, Dirq8F_SPEC>;
8795 impl Dirq8F {
8796 #[doc = "The cancel request is not generated"]
8797 pub const _0: Self = Self::new(0);
8798
8799 #[doc = "The cancel request is generated"]
8800 pub const _1: Self = Self::new(1);
8801 }
8802 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8803 pub struct Dirq9F_SPEC;
8804 pub type Dirq9F = crate::EnumBitfieldStruct<u8, Dirq9F_SPEC>;
8805 impl Dirq9F {
8806 #[doc = "The cancel request is not generated"]
8807 pub const _0: Self = Self::new(0);
8808
8809 #[doc = "The cancel request is generated"]
8810 pub const _1: Self = Self::new(1);
8811 }
8812 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8813 pub struct Dirq10F_SPEC;
8814 pub type Dirq10F = crate::EnumBitfieldStruct<u8, Dirq10F_SPEC>;
8815 impl Dirq10F {
8816 #[doc = "The cancel request is not generated"]
8817 pub const _0: Self = Self::new(0);
8818
8819 #[doc = "The cancel request is generated"]
8820 pub const _1: Self = Self::new(1);
8821 }
8822 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8823 pub struct Dirq11F_SPEC;
8824 pub type Dirq11F = crate::EnumBitfieldStruct<u8, Dirq11F_SPEC>;
8825 impl Dirq11F {
8826 #[doc = "The cancel request is not generated"]
8827 pub const _0: Self = Self::new(0);
8828
8829 #[doc = "The cancel request is generated"]
8830 pub const _1: Self = Self::new(1);
8831 }
8832 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8833 pub struct Dirq12F_SPEC;
8834 pub type Dirq12F = crate::EnumBitfieldStruct<u8, Dirq12F_SPEC>;
8835 impl Dirq12F {
8836 #[doc = "The cancel request is not generated"]
8837 pub const _0: Self = Self::new(0);
8838
8839 #[doc = "The cancel request is generated"]
8840 pub const _1: Self = Self::new(1);
8841 }
8842 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8843 pub struct Dirq14F_SPEC;
8844 pub type Dirq14F = crate::EnumBitfieldStruct<u8, Dirq14F_SPEC>;
8845 impl Dirq14F {
8846 #[doc = "The cancel request is not generated"]
8847 pub const _0: Self = Self::new(0);
8848
8849 #[doc = "The cancel request is generated"]
8850 pub const _1: Self = Self::new(1);
8851 }
8852 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8853 pub struct Dirq15F_SPEC;
8854 pub type Dirq15F = crate::EnumBitfieldStruct<u8, Dirq15F_SPEC>;
8855 impl Dirq15F {
8856 #[doc = "The cancel request is not generated"]
8857 pub const _0: Self = Self::new(0);
8858
8859 #[doc = "The cancel request is generated"]
8860 pub const _1: Self = Self::new(1);
8861 }
8862}
8863#[doc(hidden)]
8864#[derive(Copy, Clone, Eq, PartialEq)]
8865pub struct Dpsifr2_SPEC;
8866impl crate::sealed::RegSpec for Dpsifr2_SPEC {
8867 type DataType = u8;
8868}
8869
8870#[doc = "Deep Software Standby Interrupt Flag Register 2"]
8871pub type Dpsifr2 = crate::RegValueT<Dpsifr2_SPEC>;
8872
8873impl Dpsifr2 {
8874 #[doc = "LVD1 Deep Software Standby Cancel Flag"]
8875 #[inline(always)]
8876 pub fn dlvd1if(
8877 self,
8878 ) -> crate::common::RegisterField<
8879 0,
8880 0x1,
8881 1,
8882 0,
8883 dpsifr2::Dlvd1If,
8884 dpsifr2::Dlvd1If,
8885 Dpsifr2_SPEC,
8886 crate::common::RW,
8887 > {
8888 crate::common::RegisterField::<
8889 0,
8890 0x1,
8891 1,
8892 0,
8893 dpsifr2::Dlvd1If,
8894 dpsifr2::Dlvd1If,
8895 Dpsifr2_SPEC,
8896 crate::common::RW,
8897 >::from_register(self, 0)
8898 }
8899
8900 #[doc = "LVD2 Deep Software Standby Cancel Flag"]
8901 #[inline(always)]
8902 pub fn dlvd2if(
8903 self,
8904 ) -> crate::common::RegisterField<
8905 1,
8906 0x1,
8907 1,
8908 0,
8909 dpsifr2::Dlvd2If,
8910 dpsifr2::Dlvd2If,
8911 Dpsifr2_SPEC,
8912 crate::common::RW,
8913 > {
8914 crate::common::RegisterField::<
8915 1,
8916 0x1,
8917 1,
8918 0,
8919 dpsifr2::Dlvd2If,
8920 dpsifr2::Dlvd2If,
8921 Dpsifr2_SPEC,
8922 crate::common::RW,
8923 >::from_register(self, 0)
8924 }
8925
8926 #[doc = "RTC Interval Interrupt Deep Software Standby Cancel Flag"]
8927 #[inline(always)]
8928 pub fn drtciif(
8929 self,
8930 ) -> crate::common::RegisterField<
8931 2,
8932 0x1,
8933 1,
8934 0,
8935 dpsifr2::Drtciif,
8936 dpsifr2::Drtciif,
8937 Dpsifr2_SPEC,
8938 crate::common::RW,
8939 > {
8940 crate::common::RegisterField::<
8941 2,
8942 0x1,
8943 1,
8944 0,
8945 dpsifr2::Drtciif,
8946 dpsifr2::Drtciif,
8947 Dpsifr2_SPEC,
8948 crate::common::RW,
8949 >::from_register(self, 0)
8950 }
8951
8952 #[doc = "RTC Alarm Interrupt Deep Software Standby Cancel Flag"]
8953 #[inline(always)]
8954 pub fn drtcaif(
8955 self,
8956 ) -> crate::common::RegisterField<
8957 3,
8958 0x1,
8959 1,
8960 0,
8961 dpsifr2::Drtcaif,
8962 dpsifr2::Drtcaif,
8963 Dpsifr2_SPEC,
8964 crate::common::RW,
8965 > {
8966 crate::common::RegisterField::<
8967 3,
8968 0x1,
8969 1,
8970 0,
8971 dpsifr2::Drtcaif,
8972 dpsifr2::Drtcaif,
8973 Dpsifr2_SPEC,
8974 crate::common::RW,
8975 >::from_register(self, 0)
8976 }
8977
8978 #[doc = "NMI Pin Deep Software Standby Cancel Flag"]
8979 #[inline(always)]
8980 pub fn dnmif(
8981 self,
8982 ) -> crate::common::RegisterField<
8983 4,
8984 0x1,
8985 1,
8986 0,
8987 dpsifr2::Dnmif,
8988 dpsifr2::Dnmif,
8989 Dpsifr2_SPEC,
8990 crate::common::RW,
8991 > {
8992 crate::common::RegisterField::<
8993 4,
8994 0x1,
8995 1,
8996 0,
8997 dpsifr2::Dnmif,
8998 dpsifr2::Dnmif,
8999 Dpsifr2_SPEC,
9000 crate::common::RW,
9001 >::from_register(self, 0)
9002 }
9003}
9004impl ::core::default::Default for Dpsifr2 {
9005 #[inline(always)]
9006 fn default() -> Dpsifr2 {
9007 <crate::RegValueT<Dpsifr2_SPEC> as RegisterValue<_>>::new(0)
9008 }
9009}
9010pub mod dpsifr2 {
9011
9012 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9013 pub struct Dlvd1If_SPEC;
9014 pub type Dlvd1If = crate::EnumBitfieldStruct<u8, Dlvd1If_SPEC>;
9015 impl Dlvd1If {
9016 #[doc = "The cancel request is not generated"]
9017 pub const _0: Self = Self::new(0);
9018
9019 #[doc = "The cancel request is generated"]
9020 pub const _1: Self = Self::new(1);
9021 }
9022 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9023 pub struct Dlvd2If_SPEC;
9024 pub type Dlvd2If = crate::EnumBitfieldStruct<u8, Dlvd2If_SPEC>;
9025 impl Dlvd2If {
9026 #[doc = "The cancel request is not generated"]
9027 pub const _0: Self = Self::new(0);
9028
9029 #[doc = "The cancel request is generated"]
9030 pub const _1: Self = Self::new(1);
9031 }
9032 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9033 pub struct Drtciif_SPEC;
9034 pub type Drtciif = crate::EnumBitfieldStruct<u8, Drtciif_SPEC>;
9035 impl Drtciif {
9036 #[doc = "The cancel request is not generated"]
9037 pub const _0: Self = Self::new(0);
9038
9039 #[doc = "The cancel request is generated"]
9040 pub const _1: Self = Self::new(1);
9041 }
9042 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9043 pub struct Drtcaif_SPEC;
9044 pub type Drtcaif = crate::EnumBitfieldStruct<u8, Drtcaif_SPEC>;
9045 impl Drtcaif {
9046 #[doc = "The cancel request is not generated"]
9047 pub const _0: Self = Self::new(0);
9048
9049 #[doc = "The cancel request is generated"]
9050 pub const _1: Self = Self::new(1);
9051 }
9052 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9053 pub struct Dnmif_SPEC;
9054 pub type Dnmif = crate::EnumBitfieldStruct<u8, Dnmif_SPEC>;
9055 impl Dnmif {
9056 #[doc = "The cancel request is not generated"]
9057 pub const _0: Self = Self::new(0);
9058
9059 #[doc = "The cancel request is generated"]
9060 pub const _1: Self = Self::new(1);
9061 }
9062}
9063#[doc(hidden)]
9064#[derive(Copy, Clone, Eq, PartialEq)]
9065pub struct Dpsifr3_SPEC;
9066impl crate::sealed::RegSpec for Dpsifr3_SPEC {
9067 type DataType = u8;
9068}
9069
9070#[doc = "Deep Software Standby Interrupt Flag Register 3"]
9071pub type Dpsifr3 = crate::RegValueT<Dpsifr3_SPEC>;
9072
9073impl Dpsifr3 {
9074 #[doc = "USBFS0 Suspend/Resume Deep Software Standby Cancel Flag"]
9075 #[inline(always)]
9076 pub fn dusbfs0if(
9077 self,
9078 ) -> crate::common::RegisterField<
9079 0,
9080 0x1,
9081 1,
9082 0,
9083 dpsifr3::Dusbfs0If,
9084 dpsifr3::Dusbfs0If,
9085 Dpsifr3_SPEC,
9086 crate::common::RW,
9087 > {
9088 crate::common::RegisterField::<
9089 0,
9090 0x1,
9091 1,
9092 0,
9093 dpsifr3::Dusbfs0If,
9094 dpsifr3::Dusbfs0If,
9095 Dpsifr3_SPEC,
9096 crate::common::RW,
9097 >::from_register(self, 0)
9098 }
9099
9100 #[doc = "AGT1 Underflow Deep Software Standby Cancel Flag"]
9101 #[inline(always)]
9102 pub fn dagt1if(
9103 self,
9104 ) -> crate::common::RegisterField<
9105 2,
9106 0x1,
9107 1,
9108 0,
9109 dpsifr3::Dagt1If,
9110 dpsifr3::Dagt1If,
9111 Dpsifr3_SPEC,
9112 crate::common::RW,
9113 > {
9114 crate::common::RegisterField::<
9115 2,
9116 0x1,
9117 1,
9118 0,
9119 dpsifr3::Dagt1If,
9120 dpsifr3::Dagt1If,
9121 Dpsifr3_SPEC,
9122 crate::common::RW,
9123 >::from_register(self, 0)
9124 }
9125
9126 #[doc = "AGT3 Underflow Deep Software Standby Cancel Flag"]
9127 #[inline(always)]
9128 pub fn dagt3if(
9129 self,
9130 ) -> crate::common::RegisterField<
9131 3,
9132 0x1,
9133 1,
9134 0,
9135 dpsifr3::Dagt3If,
9136 dpsifr3::Dagt3If,
9137 Dpsifr3_SPEC,
9138 crate::common::RW,
9139 > {
9140 crate::common::RegisterField::<
9141 3,
9142 0x1,
9143 1,
9144 0,
9145 dpsifr3::Dagt3If,
9146 dpsifr3::Dagt3If,
9147 Dpsifr3_SPEC,
9148 crate::common::RW,
9149 >::from_register(self, 0)
9150 }
9151}
9152impl ::core::default::Default for Dpsifr3 {
9153 #[inline(always)]
9154 fn default() -> Dpsifr3 {
9155 <crate::RegValueT<Dpsifr3_SPEC> as RegisterValue<_>>::new(0)
9156 }
9157}
9158pub mod dpsifr3 {
9159
9160 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9161 pub struct Dusbfs0If_SPEC;
9162 pub type Dusbfs0If = crate::EnumBitfieldStruct<u8, Dusbfs0If_SPEC>;
9163 impl Dusbfs0If {
9164 #[doc = "The cancel request is not generated."]
9165 pub const _0: Self = Self::new(0);
9166
9167 #[doc = "The cancel request is generated."]
9168 pub const _1: Self = Self::new(1);
9169 }
9170 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9171 pub struct Dagt1If_SPEC;
9172 pub type Dagt1If = crate::EnumBitfieldStruct<u8, Dagt1If_SPEC>;
9173 impl Dagt1If {
9174 #[doc = "The cancel request is not generated."]
9175 pub const _0: Self = Self::new(0);
9176
9177 #[doc = "The cancel request is generated."]
9178 pub const _1: Self = Self::new(1);
9179 }
9180 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9181 pub struct Dagt3If_SPEC;
9182 pub type Dagt3If = crate::EnumBitfieldStruct<u8, Dagt3If_SPEC>;
9183 impl Dagt3If {
9184 #[doc = "The cancel request is not generated."]
9185 pub const _0: Self = Self::new(0);
9186
9187 #[doc = "The cancel request is generated."]
9188 pub const _1: Self = Self::new(1);
9189 }
9190}
9191#[doc(hidden)]
9192#[derive(Copy, Clone, Eq, PartialEq)]
9193pub struct Dpsiegr0_SPEC;
9194impl crate::sealed::RegSpec for Dpsiegr0_SPEC {
9195 type DataType = u8;
9196}
9197
9198#[doc = "Deep Software Standby Interrupt Edge Register 0"]
9199pub type Dpsiegr0 = crate::RegValueT<Dpsiegr0_SPEC>;
9200
9201impl Dpsiegr0 {
9202 #[doc = "IRQ0-DS Pin Edge Select"]
9203 #[inline(always)]
9204 pub fn dirq0eg(
9205 self,
9206 ) -> crate::common::RegisterField<
9207 0,
9208 0x1,
9209 1,
9210 0,
9211 dpsiegr0::Dirq0Eg,
9212 dpsiegr0::Dirq0Eg,
9213 Dpsiegr0_SPEC,
9214 crate::common::RW,
9215 > {
9216 crate::common::RegisterField::<
9217 0,
9218 0x1,
9219 1,
9220 0,
9221 dpsiegr0::Dirq0Eg,
9222 dpsiegr0::Dirq0Eg,
9223 Dpsiegr0_SPEC,
9224 crate::common::RW,
9225 >::from_register(self, 0)
9226 }
9227
9228 #[doc = "IRQ1-DS Pin Edge Select"]
9229 #[inline(always)]
9230 pub fn dirq1eg(
9231 self,
9232 ) -> crate::common::RegisterField<
9233 1,
9234 0x1,
9235 1,
9236 0,
9237 dpsiegr0::Dirq1Eg,
9238 dpsiegr0::Dirq1Eg,
9239 Dpsiegr0_SPEC,
9240 crate::common::RW,
9241 > {
9242 crate::common::RegisterField::<
9243 1,
9244 0x1,
9245 1,
9246 0,
9247 dpsiegr0::Dirq1Eg,
9248 dpsiegr0::Dirq1Eg,
9249 Dpsiegr0_SPEC,
9250 crate::common::RW,
9251 >::from_register(self, 0)
9252 }
9253
9254 #[doc = "IRQ4-DS Pin Edge Select"]
9255 #[inline(always)]
9256 pub fn dirq4eg(
9257 self,
9258 ) -> crate::common::RegisterField<
9259 4,
9260 0x1,
9261 1,
9262 0,
9263 dpsiegr0::Dirq4Eg,
9264 dpsiegr0::Dirq4Eg,
9265 Dpsiegr0_SPEC,
9266 crate::common::RW,
9267 > {
9268 crate::common::RegisterField::<
9269 4,
9270 0x1,
9271 1,
9272 0,
9273 dpsiegr0::Dirq4Eg,
9274 dpsiegr0::Dirq4Eg,
9275 Dpsiegr0_SPEC,
9276 crate::common::RW,
9277 >::from_register(self, 0)
9278 }
9279
9280 #[doc = "IRQ5-DS Pin Edge Select"]
9281 #[inline(always)]
9282 pub fn dirq5eg(
9283 self,
9284 ) -> crate::common::RegisterField<
9285 5,
9286 0x1,
9287 1,
9288 0,
9289 dpsiegr0::Dirq5Eg,
9290 dpsiegr0::Dirq5Eg,
9291 Dpsiegr0_SPEC,
9292 crate::common::RW,
9293 > {
9294 crate::common::RegisterField::<
9295 5,
9296 0x1,
9297 1,
9298 0,
9299 dpsiegr0::Dirq5Eg,
9300 dpsiegr0::Dirq5Eg,
9301 Dpsiegr0_SPEC,
9302 crate::common::RW,
9303 >::from_register(self, 0)
9304 }
9305
9306 #[doc = "IRQ6-DS Pin Edge Select"]
9307 #[inline(always)]
9308 pub fn dirq6eg(
9309 self,
9310 ) -> crate::common::RegisterField<
9311 6,
9312 0x1,
9313 1,
9314 0,
9315 dpsiegr0::Dirq6Eg,
9316 dpsiegr0::Dirq6Eg,
9317 Dpsiegr0_SPEC,
9318 crate::common::RW,
9319 > {
9320 crate::common::RegisterField::<
9321 6,
9322 0x1,
9323 1,
9324 0,
9325 dpsiegr0::Dirq6Eg,
9326 dpsiegr0::Dirq6Eg,
9327 Dpsiegr0_SPEC,
9328 crate::common::RW,
9329 >::from_register(self, 0)
9330 }
9331
9332 #[doc = "IRQ7-DS Pin Edge Select"]
9333 #[inline(always)]
9334 pub fn dirq7eg(
9335 self,
9336 ) -> crate::common::RegisterField<
9337 7,
9338 0x1,
9339 1,
9340 0,
9341 dpsiegr0::Dirq7Eg,
9342 dpsiegr0::Dirq7Eg,
9343 Dpsiegr0_SPEC,
9344 crate::common::RW,
9345 > {
9346 crate::common::RegisterField::<
9347 7,
9348 0x1,
9349 1,
9350 0,
9351 dpsiegr0::Dirq7Eg,
9352 dpsiegr0::Dirq7Eg,
9353 Dpsiegr0_SPEC,
9354 crate::common::RW,
9355 >::from_register(self, 0)
9356 }
9357}
9358impl ::core::default::Default for Dpsiegr0 {
9359 #[inline(always)]
9360 fn default() -> Dpsiegr0 {
9361 <crate::RegValueT<Dpsiegr0_SPEC> as RegisterValue<_>>::new(0)
9362 }
9363}
9364pub mod dpsiegr0 {
9365
9366 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9367 pub struct Dirq0Eg_SPEC;
9368 pub type Dirq0Eg = crate::EnumBitfieldStruct<u8, Dirq0Eg_SPEC>;
9369 impl Dirq0Eg {
9370 #[doc = "A cancel request is generated at a falling edge"]
9371 pub const _0: Self = Self::new(0);
9372
9373 #[doc = "A cancel request is generated at a rising edge"]
9374 pub const _1: Self = Self::new(1);
9375 }
9376 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9377 pub struct Dirq1Eg_SPEC;
9378 pub type Dirq1Eg = crate::EnumBitfieldStruct<u8, Dirq1Eg_SPEC>;
9379 impl Dirq1Eg {
9380 #[doc = "A cancel request is generated at a falling edge"]
9381 pub const _0: Self = Self::new(0);
9382
9383 #[doc = "A cancel request is generated at a rising edge"]
9384 pub const _1: Self = Self::new(1);
9385 }
9386 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9387 pub struct Dirq4Eg_SPEC;
9388 pub type Dirq4Eg = crate::EnumBitfieldStruct<u8, Dirq4Eg_SPEC>;
9389 impl Dirq4Eg {
9390 #[doc = "A cancel request is generated at a falling edge"]
9391 pub const _0: Self = Self::new(0);
9392
9393 #[doc = "A cancel request is generated at a rising edge"]
9394 pub const _1: Self = Self::new(1);
9395 }
9396 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9397 pub struct Dirq5Eg_SPEC;
9398 pub type Dirq5Eg = crate::EnumBitfieldStruct<u8, Dirq5Eg_SPEC>;
9399 impl Dirq5Eg {
9400 #[doc = "A cancel request is generated at a falling edge"]
9401 pub const _0: Self = Self::new(0);
9402
9403 #[doc = "A cancel request is generated at a rising edge"]
9404 pub const _1: Self = Self::new(1);
9405 }
9406 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9407 pub struct Dirq6Eg_SPEC;
9408 pub type Dirq6Eg = crate::EnumBitfieldStruct<u8, Dirq6Eg_SPEC>;
9409 impl Dirq6Eg {
9410 #[doc = "A cancel request is generated at a falling edge"]
9411 pub const _0: Self = Self::new(0);
9412
9413 #[doc = "A cancel request is generated at a rising edge"]
9414 pub const _1: Self = Self::new(1);
9415 }
9416 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9417 pub struct Dirq7Eg_SPEC;
9418 pub type Dirq7Eg = crate::EnumBitfieldStruct<u8, Dirq7Eg_SPEC>;
9419 impl Dirq7Eg {
9420 #[doc = "A cancel request is generated at a falling edge"]
9421 pub const _0: Self = Self::new(0);
9422
9423 #[doc = "A cancel request is generated at a rising edge"]
9424 pub const _1: Self = Self::new(1);
9425 }
9426}
9427#[doc(hidden)]
9428#[derive(Copy, Clone, Eq, PartialEq)]
9429pub struct Dpsiegr1_SPEC;
9430impl crate::sealed::RegSpec for Dpsiegr1_SPEC {
9431 type DataType = u8;
9432}
9433
9434#[doc = "Deep Software Standby Interrupt Edge Register 1"]
9435pub type Dpsiegr1 = crate::RegValueT<Dpsiegr1_SPEC>;
9436
9437impl Dpsiegr1 {
9438 #[doc = "IRQ8-DS Pin Edge Select"]
9439 #[inline(always)]
9440 pub fn dirq8eg(
9441 self,
9442 ) -> crate::common::RegisterField<
9443 0,
9444 0x1,
9445 1,
9446 0,
9447 dpsiegr1::Dirq8Eg,
9448 dpsiegr1::Dirq8Eg,
9449 Dpsiegr1_SPEC,
9450 crate::common::RW,
9451 > {
9452 crate::common::RegisterField::<
9453 0,
9454 0x1,
9455 1,
9456 0,
9457 dpsiegr1::Dirq8Eg,
9458 dpsiegr1::Dirq8Eg,
9459 Dpsiegr1_SPEC,
9460 crate::common::RW,
9461 >::from_register(self, 0)
9462 }
9463
9464 #[doc = "IRQ9-DS Pin Edge Select"]
9465 #[inline(always)]
9466 pub fn dirq9eg(
9467 self,
9468 ) -> crate::common::RegisterField<
9469 1,
9470 0x1,
9471 1,
9472 0,
9473 dpsiegr1::Dirq9Eg,
9474 dpsiegr1::Dirq9Eg,
9475 Dpsiegr1_SPEC,
9476 crate::common::RW,
9477 > {
9478 crate::common::RegisterField::<
9479 1,
9480 0x1,
9481 1,
9482 0,
9483 dpsiegr1::Dirq9Eg,
9484 dpsiegr1::Dirq9Eg,
9485 Dpsiegr1_SPEC,
9486 crate::common::RW,
9487 >::from_register(self, 0)
9488 }
9489
9490 #[doc = "IRQ10-DS Pin Edge Select"]
9491 #[inline(always)]
9492 pub fn dirq10eg(
9493 self,
9494 ) -> crate::common::RegisterField<
9495 2,
9496 0x1,
9497 1,
9498 0,
9499 dpsiegr1::Dirq10Eg,
9500 dpsiegr1::Dirq10Eg,
9501 Dpsiegr1_SPEC,
9502 crate::common::RW,
9503 > {
9504 crate::common::RegisterField::<
9505 2,
9506 0x1,
9507 1,
9508 0,
9509 dpsiegr1::Dirq10Eg,
9510 dpsiegr1::Dirq10Eg,
9511 Dpsiegr1_SPEC,
9512 crate::common::RW,
9513 >::from_register(self, 0)
9514 }
9515
9516 #[doc = "IRQ11-DS Pin Edge Select"]
9517 #[inline(always)]
9518 pub fn dirq11eg(
9519 self,
9520 ) -> crate::common::RegisterField<
9521 3,
9522 0x1,
9523 1,
9524 0,
9525 dpsiegr1::Dirq11Eg,
9526 dpsiegr1::Dirq11Eg,
9527 Dpsiegr1_SPEC,
9528 crate::common::RW,
9529 > {
9530 crate::common::RegisterField::<
9531 3,
9532 0x1,
9533 1,
9534 0,
9535 dpsiegr1::Dirq11Eg,
9536 dpsiegr1::Dirq11Eg,
9537 Dpsiegr1_SPEC,
9538 crate::common::RW,
9539 >::from_register(self, 0)
9540 }
9541
9542 #[doc = "IRQ12-DS Pin Edge Select"]
9543 #[inline(always)]
9544 pub fn dirq12eg(
9545 self,
9546 ) -> crate::common::RegisterField<
9547 4,
9548 0x1,
9549 1,
9550 0,
9551 dpsiegr1::Dirq12Eg,
9552 dpsiegr1::Dirq12Eg,
9553 Dpsiegr1_SPEC,
9554 crate::common::RW,
9555 > {
9556 crate::common::RegisterField::<
9557 4,
9558 0x1,
9559 1,
9560 0,
9561 dpsiegr1::Dirq12Eg,
9562 dpsiegr1::Dirq12Eg,
9563 Dpsiegr1_SPEC,
9564 crate::common::RW,
9565 >::from_register(self, 0)
9566 }
9567
9568 #[doc = "IRQ14-DS Pin Edge Select"]
9569 #[inline(always)]
9570 pub fn dirq14eg(
9571 self,
9572 ) -> crate::common::RegisterField<
9573 6,
9574 0x1,
9575 1,
9576 0,
9577 dpsiegr1::Dirq14Eg,
9578 dpsiegr1::Dirq14Eg,
9579 Dpsiegr1_SPEC,
9580 crate::common::RW,
9581 > {
9582 crate::common::RegisterField::<
9583 6,
9584 0x1,
9585 1,
9586 0,
9587 dpsiegr1::Dirq14Eg,
9588 dpsiegr1::Dirq14Eg,
9589 Dpsiegr1_SPEC,
9590 crate::common::RW,
9591 >::from_register(self, 0)
9592 }
9593
9594 #[doc = "IRQ15-DS Pin Edge Select"]
9595 #[inline(always)]
9596 pub fn dirq15eg(
9597 self,
9598 ) -> crate::common::RegisterField<
9599 7,
9600 0x1,
9601 1,
9602 0,
9603 dpsiegr1::Dirq15Eg,
9604 dpsiegr1::Dirq15Eg,
9605 Dpsiegr1_SPEC,
9606 crate::common::RW,
9607 > {
9608 crate::common::RegisterField::<
9609 7,
9610 0x1,
9611 1,
9612 0,
9613 dpsiegr1::Dirq15Eg,
9614 dpsiegr1::Dirq15Eg,
9615 Dpsiegr1_SPEC,
9616 crate::common::RW,
9617 >::from_register(self, 0)
9618 }
9619}
9620impl ::core::default::Default for Dpsiegr1 {
9621 #[inline(always)]
9622 fn default() -> Dpsiegr1 {
9623 <crate::RegValueT<Dpsiegr1_SPEC> as RegisterValue<_>>::new(0)
9624 }
9625}
9626pub mod dpsiegr1 {
9627
9628 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9629 pub struct Dirq8Eg_SPEC;
9630 pub type Dirq8Eg = crate::EnumBitfieldStruct<u8, Dirq8Eg_SPEC>;
9631 impl Dirq8Eg {
9632 #[doc = "A cancel request is generated at a falling edge."]
9633 pub const _0: Self = Self::new(0);
9634
9635 #[doc = "A cancel request is generated at a rising edge."]
9636 pub const _1: Self = Self::new(1);
9637 }
9638 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9639 pub struct Dirq9Eg_SPEC;
9640 pub type Dirq9Eg = crate::EnumBitfieldStruct<u8, Dirq9Eg_SPEC>;
9641 impl Dirq9Eg {
9642 #[doc = "A cancel request is generated at a falling edge."]
9643 pub const _0: Self = Self::new(0);
9644
9645 #[doc = "A cancel request is generated at a rising edge."]
9646 pub const _1: Self = Self::new(1);
9647 }
9648 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9649 pub struct Dirq10Eg_SPEC;
9650 pub type Dirq10Eg = crate::EnumBitfieldStruct<u8, Dirq10Eg_SPEC>;
9651 impl Dirq10Eg {
9652 #[doc = "A cancel request is generated at a falling edge."]
9653 pub const _0: Self = Self::new(0);
9654
9655 #[doc = "A cancel request is generated at a rising edge"]
9656 pub const _1: Self = Self::new(1);
9657 }
9658 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9659 pub struct Dirq11Eg_SPEC;
9660 pub type Dirq11Eg = crate::EnumBitfieldStruct<u8, Dirq11Eg_SPEC>;
9661 impl Dirq11Eg {
9662 #[doc = "A cancel request is generated at a falling edge."]
9663 pub const _0: Self = Self::new(0);
9664
9665 #[doc = "A cancel request is generated at a rising edge."]
9666 pub const _1: Self = Self::new(1);
9667 }
9668 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9669 pub struct Dirq12Eg_SPEC;
9670 pub type Dirq12Eg = crate::EnumBitfieldStruct<u8, Dirq12Eg_SPEC>;
9671 impl Dirq12Eg {
9672 #[doc = "A cancel request is generated at a falling edge."]
9673 pub const _0: Self = Self::new(0);
9674
9675 #[doc = "A cancel request is generated at a rising edge."]
9676 pub const _1: Self = Self::new(1);
9677 }
9678 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9679 pub struct Dirq14Eg_SPEC;
9680 pub type Dirq14Eg = crate::EnumBitfieldStruct<u8, Dirq14Eg_SPEC>;
9681 impl Dirq14Eg {
9682 #[doc = "A cancel request is generated at a falling edge."]
9683 pub const _0: Self = Self::new(0);
9684
9685 #[doc = "A cancel request is generated at a rising edge."]
9686 pub const _1: Self = Self::new(1);
9687 }
9688 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9689 pub struct Dirq15Eg_SPEC;
9690 pub type Dirq15Eg = crate::EnumBitfieldStruct<u8, Dirq15Eg_SPEC>;
9691 impl Dirq15Eg {
9692 #[doc = "A cancel request is generated at a falling edge."]
9693 pub const _0: Self = Self::new(0);
9694
9695 #[doc = "A cancel request is generated at a rising edge."]
9696 pub const _1: Self = Self::new(1);
9697 }
9698}
9699#[doc(hidden)]
9700#[derive(Copy, Clone, Eq, PartialEq)]
9701pub struct Dpsiegr2_SPEC;
9702impl crate::sealed::RegSpec for Dpsiegr2_SPEC {
9703 type DataType = u8;
9704}
9705
9706#[doc = "Deep Software Standby Interrupt Edge Register 2"]
9707pub type Dpsiegr2 = crate::RegValueT<Dpsiegr2_SPEC>;
9708
9709impl Dpsiegr2 {
9710 #[doc = "LVD1 Edge Select"]
9711 #[inline(always)]
9712 pub fn dlvd1eg(
9713 self,
9714 ) -> crate::common::RegisterField<
9715 0,
9716 0x1,
9717 1,
9718 0,
9719 dpsiegr2::Dlvd1Eg,
9720 dpsiegr2::Dlvd1Eg,
9721 Dpsiegr2_SPEC,
9722 crate::common::RW,
9723 > {
9724 crate::common::RegisterField::<
9725 0,
9726 0x1,
9727 1,
9728 0,
9729 dpsiegr2::Dlvd1Eg,
9730 dpsiegr2::Dlvd1Eg,
9731 Dpsiegr2_SPEC,
9732 crate::common::RW,
9733 >::from_register(self, 0)
9734 }
9735
9736 #[doc = "LVD2 Edge Select"]
9737 #[inline(always)]
9738 pub fn dlvd2eg(
9739 self,
9740 ) -> crate::common::RegisterField<
9741 1,
9742 0x1,
9743 1,
9744 0,
9745 dpsiegr2::Dlvd2Eg,
9746 dpsiegr2::Dlvd2Eg,
9747 Dpsiegr2_SPEC,
9748 crate::common::RW,
9749 > {
9750 crate::common::RegisterField::<
9751 1,
9752 0x1,
9753 1,
9754 0,
9755 dpsiegr2::Dlvd2Eg,
9756 dpsiegr2::Dlvd2Eg,
9757 Dpsiegr2_SPEC,
9758 crate::common::RW,
9759 >::from_register(self, 0)
9760 }
9761
9762 #[doc = "NMI Pin Edge Select"]
9763 #[inline(always)]
9764 pub fn dnmieg(
9765 self,
9766 ) -> crate::common::RegisterField<
9767 4,
9768 0x1,
9769 1,
9770 0,
9771 dpsiegr2::Dnmieg,
9772 dpsiegr2::Dnmieg,
9773 Dpsiegr2_SPEC,
9774 crate::common::RW,
9775 > {
9776 crate::common::RegisterField::<
9777 4,
9778 0x1,
9779 1,
9780 0,
9781 dpsiegr2::Dnmieg,
9782 dpsiegr2::Dnmieg,
9783 Dpsiegr2_SPEC,
9784 crate::common::RW,
9785 >::from_register(self, 0)
9786 }
9787}
9788impl ::core::default::Default for Dpsiegr2 {
9789 #[inline(always)]
9790 fn default() -> Dpsiegr2 {
9791 <crate::RegValueT<Dpsiegr2_SPEC> as RegisterValue<_>>::new(0)
9792 }
9793}
9794pub mod dpsiegr2 {
9795
9796 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9797 pub struct Dlvd1Eg_SPEC;
9798 pub type Dlvd1Eg = crate::EnumBitfieldStruct<u8, Dlvd1Eg_SPEC>;
9799 impl Dlvd1Eg {
9800 #[doc = "A cancel request is generated when VCC < Vdet1 (fall) is detected"]
9801 pub const _0: Self = Self::new(0);
9802
9803 #[doc = "A cancel request is generated when VCC ≥ Vdet1 (rise) is detected"]
9804 pub const _1: Self = Self::new(1);
9805 }
9806 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9807 pub struct Dlvd2Eg_SPEC;
9808 pub type Dlvd2Eg = crate::EnumBitfieldStruct<u8, Dlvd2Eg_SPEC>;
9809 impl Dlvd2Eg {
9810 #[doc = "A cancel request is generated when VCC < Vdet2 (fall) is detected"]
9811 pub const _0: Self = Self::new(0);
9812
9813 #[doc = "A cancel request is generated when VCC ≥ Vdet2 (rise) is detected"]
9814 pub const _1: Self = Self::new(1);
9815 }
9816 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9817 pub struct Dnmieg_SPEC;
9818 pub type Dnmieg = crate::EnumBitfieldStruct<u8, Dnmieg_SPEC>;
9819 impl Dnmieg {
9820 #[doc = "A cancel request is generated at a falling edge"]
9821 pub const _0: Self = Self::new(0);
9822
9823 #[doc = "A cancel request is generated at a rising edge"]
9824 pub const _1: Self = Self::new(1);
9825 }
9826}
9827#[doc(hidden)]
9828#[derive(Copy, Clone, Eq, PartialEq)]
9829pub struct Syocdcr_SPEC;
9830impl crate::sealed::RegSpec for Syocdcr_SPEC {
9831 type DataType = u8;
9832}
9833
9834#[doc = "System Control OCD Control Register"]
9835pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
9836
9837impl Syocdcr {
9838 #[doc = "Deep Software Standby OCD flag"]
9839 #[inline(always)]
9840 pub fn docdf(
9841 self,
9842 ) -> crate::common::RegisterField<
9843 0,
9844 0x1,
9845 1,
9846 0,
9847 syocdcr::Docdf,
9848 syocdcr::Docdf,
9849 Syocdcr_SPEC,
9850 crate::common::RW,
9851 > {
9852 crate::common::RegisterField::<
9853 0,
9854 0x1,
9855 1,
9856 0,
9857 syocdcr::Docdf,
9858 syocdcr::Docdf,
9859 Syocdcr_SPEC,
9860 crate::common::RW,
9861 >::from_register(self, 0)
9862 }
9863
9864 #[doc = "Debugger Enable bit"]
9865 #[inline(always)]
9866 pub fn dbgen(
9867 self,
9868 ) -> crate::common::RegisterField<
9869 7,
9870 0x1,
9871 1,
9872 0,
9873 syocdcr::Dbgen,
9874 syocdcr::Dbgen,
9875 Syocdcr_SPEC,
9876 crate::common::RW,
9877 > {
9878 crate::common::RegisterField::<
9879 7,
9880 0x1,
9881 1,
9882 0,
9883 syocdcr::Dbgen,
9884 syocdcr::Dbgen,
9885 Syocdcr_SPEC,
9886 crate::common::RW,
9887 >::from_register(self, 0)
9888 }
9889}
9890impl ::core::default::Default for Syocdcr {
9891 #[inline(always)]
9892 fn default() -> Syocdcr {
9893 <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
9894 }
9895}
9896pub mod syocdcr {
9897
9898 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9899 pub struct Docdf_SPEC;
9900 pub type Docdf = crate::EnumBitfieldStruct<u8, Docdf_SPEC>;
9901 impl Docdf {
9902 #[doc = "DBIRQ is not generated"]
9903 pub const _0: Self = Self::new(0);
9904
9905 #[doc = "DBIRQ is generated"]
9906 pub const _1: Self = Self::new(1);
9907 }
9908 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9909 pub struct Dbgen_SPEC;
9910 pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
9911 impl Dbgen {
9912 #[doc = "On-chip debugger is disabled"]
9913 pub const _0: Self = Self::new(0);
9914
9915 #[doc = "On-chip debugger is enabled"]
9916 pub const _1: Self = Self::new(1);
9917 }
9918}
9919#[doc(hidden)]
9920#[derive(Copy, Clone, Eq, PartialEq)]
9921pub struct Rstsr0_SPEC;
9922impl crate::sealed::RegSpec for Rstsr0_SPEC {
9923 type DataType = u8;
9924}
9925
9926#[doc = "Reset Status Register 0"]
9927pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
9928
9929impl Rstsr0 {
9930 #[doc = "Power-On Reset Detect Flag"]
9931 #[inline(always)]
9932 pub fn porf(
9933 self,
9934 ) -> crate::common::RegisterField<
9935 0,
9936 0x1,
9937 1,
9938 0,
9939 rstsr0::Porf,
9940 rstsr0::Porf,
9941 Rstsr0_SPEC,
9942 crate::common::RW,
9943 > {
9944 crate::common::RegisterField::<
9945 0,
9946 0x1,
9947 1,
9948 0,
9949 rstsr0::Porf,
9950 rstsr0::Porf,
9951 Rstsr0_SPEC,
9952 crate::common::RW,
9953 >::from_register(self, 0)
9954 }
9955
9956 #[doc = "Voltage Monitor 0 Reset Detect Flag"]
9957 #[inline(always)]
9958 pub fn lvd0rf(
9959 self,
9960 ) -> crate::common::RegisterField<
9961 1,
9962 0x1,
9963 1,
9964 0,
9965 rstsr0::Lvd0Rf,
9966 rstsr0::Lvd0Rf,
9967 Rstsr0_SPEC,
9968 crate::common::RW,
9969 > {
9970 crate::common::RegisterField::<
9971 1,
9972 0x1,
9973 1,
9974 0,
9975 rstsr0::Lvd0Rf,
9976 rstsr0::Lvd0Rf,
9977 Rstsr0_SPEC,
9978 crate::common::RW,
9979 >::from_register(self, 0)
9980 }
9981
9982 #[doc = "Voltage Monitor 1 Reset Detect Flag"]
9983 #[inline(always)]
9984 pub fn lvd1rf(
9985 self,
9986 ) -> crate::common::RegisterField<
9987 2,
9988 0x1,
9989 1,
9990 0,
9991 rstsr0::Lvd1Rf,
9992 rstsr0::Lvd1Rf,
9993 Rstsr0_SPEC,
9994 crate::common::RW,
9995 > {
9996 crate::common::RegisterField::<
9997 2,
9998 0x1,
9999 1,
10000 0,
10001 rstsr0::Lvd1Rf,
10002 rstsr0::Lvd1Rf,
10003 Rstsr0_SPEC,
10004 crate::common::RW,
10005 >::from_register(self, 0)
10006 }
10007
10008 #[doc = "Voltage Monitor 2 Reset Detect Flag"]
10009 #[inline(always)]
10010 pub fn lvd2rf(
10011 self,
10012 ) -> crate::common::RegisterField<
10013 3,
10014 0x1,
10015 1,
10016 0,
10017 rstsr0::Lvd2Rf,
10018 rstsr0::Lvd2Rf,
10019 Rstsr0_SPEC,
10020 crate::common::RW,
10021 > {
10022 crate::common::RegisterField::<
10023 3,
10024 0x1,
10025 1,
10026 0,
10027 rstsr0::Lvd2Rf,
10028 rstsr0::Lvd2Rf,
10029 Rstsr0_SPEC,
10030 crate::common::RW,
10031 >::from_register(self, 0)
10032 }
10033
10034 #[doc = "Deep Software Standby Reset Detect Flag"]
10035 #[inline(always)]
10036 pub fn dpsrstf(
10037 self,
10038 ) -> crate::common::RegisterField<
10039 7,
10040 0x1,
10041 1,
10042 0,
10043 rstsr0::Dpsrstf,
10044 rstsr0::Dpsrstf,
10045 Rstsr0_SPEC,
10046 crate::common::RW,
10047 > {
10048 crate::common::RegisterField::<
10049 7,
10050 0x1,
10051 1,
10052 0,
10053 rstsr0::Dpsrstf,
10054 rstsr0::Dpsrstf,
10055 Rstsr0_SPEC,
10056 crate::common::RW,
10057 >::from_register(self, 0)
10058 }
10059}
10060impl ::core::default::Default for Rstsr0 {
10061 #[inline(always)]
10062 fn default() -> Rstsr0 {
10063 <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
10064 }
10065}
10066pub mod rstsr0 {
10067
10068 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10069 pub struct Porf_SPEC;
10070 pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
10071 impl Porf {
10072 #[doc = "Power-on reset not detected"]
10073 pub const _0: Self = Self::new(0);
10074
10075 #[doc = "Power-on reset detected"]
10076 pub const _1: Self = Self::new(1);
10077 }
10078 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10079 pub struct Lvd0Rf_SPEC;
10080 pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
10081 impl Lvd0Rf {
10082 #[doc = "Voltage monitor 0 reset not detected"]
10083 pub const _0: Self = Self::new(0);
10084
10085 #[doc = "Voltage monitor 0 reset detected"]
10086 pub const _1: Self = Self::new(1);
10087 }
10088 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10089 pub struct Lvd1Rf_SPEC;
10090 pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
10091 impl Lvd1Rf {
10092 #[doc = "Voltage monitor 1 reset not detected"]
10093 pub const _0: Self = Self::new(0);
10094
10095 #[doc = "Voltage monitor 1 reset detected"]
10096 pub const _1: Self = Self::new(1);
10097 }
10098 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10099 pub struct Lvd2Rf_SPEC;
10100 pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
10101 impl Lvd2Rf {
10102 #[doc = "Voltage monitor 2 reset not detected"]
10103 pub const _0: Self = Self::new(0);
10104
10105 #[doc = "Voltage monitor 2 reset detected"]
10106 pub const _1: Self = Self::new(1);
10107 }
10108 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10109 pub struct Dpsrstf_SPEC;
10110 pub type Dpsrstf = crate::EnumBitfieldStruct<u8, Dpsrstf_SPEC>;
10111 impl Dpsrstf {
10112 #[doc = "Deep software standby mode cancellation not requested by an interrupt."]
10113 pub const _0: Self = Self::new(0);
10114
10115 #[doc = "Deep software standby mode cancellation requested by an interrupt."]
10116 pub const _1: Self = Self::new(1);
10117 }
10118}
10119#[doc(hidden)]
10120#[derive(Copy, Clone, Eq, PartialEq)]
10121pub struct Rstsr2_SPEC;
10122impl crate::sealed::RegSpec for Rstsr2_SPEC {
10123 type DataType = u8;
10124}
10125
10126#[doc = "Reset Status Register 2"]
10127pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
10128
10129impl Rstsr2 {
10130 #[doc = "Cold/Warm Start Determination Flag"]
10131 #[inline(always)]
10132 pub fn cwsf(
10133 self,
10134 ) -> crate::common::RegisterField<
10135 0,
10136 0x1,
10137 1,
10138 0,
10139 rstsr2::Cwsf,
10140 rstsr2::Cwsf,
10141 Rstsr2_SPEC,
10142 crate::common::RW,
10143 > {
10144 crate::common::RegisterField::<
10145 0,
10146 0x1,
10147 1,
10148 0,
10149 rstsr2::Cwsf,
10150 rstsr2::Cwsf,
10151 Rstsr2_SPEC,
10152 crate::common::RW,
10153 >::from_register(self, 0)
10154 }
10155}
10156impl ::core::default::Default for Rstsr2 {
10157 #[inline(always)]
10158 fn default() -> Rstsr2 {
10159 <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
10160 }
10161}
10162pub mod rstsr2 {
10163
10164 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10165 pub struct Cwsf_SPEC;
10166 pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
10167 impl Cwsf {
10168 #[doc = "Cold start"]
10169 pub const _0: Self = Self::new(0);
10170
10171 #[doc = "Warm start"]
10172 pub const _1: Self = Self::new(1);
10173 }
10174}
10175#[doc(hidden)]
10176#[derive(Copy, Clone, Eq, PartialEq)]
10177pub struct Momcr_SPEC;
10178impl crate::sealed::RegSpec for Momcr_SPEC {
10179 type DataType = u8;
10180}
10181
10182#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
10183pub type Momcr = crate::RegValueT<Momcr_SPEC>;
10184
10185impl Momcr {
10186 #[doc = "Main Clock Oscillator Drive Capability 0 Switching"]
10187 #[inline(always)]
10188 pub fn modrv(
10189 self,
10190 ) -> crate::common::RegisterField<
10191 4,
10192 0x3,
10193 1,
10194 0,
10195 momcr::Modrv,
10196 momcr::Modrv,
10197 Momcr_SPEC,
10198 crate::common::RW,
10199 > {
10200 crate::common::RegisterField::<
10201 4,
10202 0x3,
10203 1,
10204 0,
10205 momcr::Modrv,
10206 momcr::Modrv,
10207 Momcr_SPEC,
10208 crate::common::RW,
10209 >::from_register(self, 0)
10210 }
10211
10212 #[doc = "Main Clock Oscillator Switching"]
10213 #[inline(always)]
10214 pub fn mosel(
10215 self,
10216 ) -> crate::common::RegisterField<
10217 6,
10218 0x1,
10219 1,
10220 0,
10221 momcr::Mosel,
10222 momcr::Mosel,
10223 Momcr_SPEC,
10224 crate::common::RW,
10225 > {
10226 crate::common::RegisterField::<
10227 6,
10228 0x1,
10229 1,
10230 0,
10231 momcr::Mosel,
10232 momcr::Mosel,
10233 Momcr_SPEC,
10234 crate::common::RW,
10235 >::from_register(self, 0)
10236 }
10237}
10238impl ::core::default::Default for Momcr {
10239 #[inline(always)]
10240 fn default() -> Momcr {
10241 <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(0)
10242 }
10243}
10244pub mod momcr {
10245
10246 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10247 pub struct Modrv_SPEC;
10248 pub type Modrv = crate::EnumBitfieldStruct<u8, Modrv_SPEC>;
10249 impl Modrv {
10250 #[doc = "20 MHz to 24 MHz"]
10251 pub const _00: Self = Self::new(0);
10252
10253 #[doc = "16 MHz to 20 MHz"]
10254 pub const _01: Self = Self::new(1);
10255
10256 #[doc = "8 MHz to 16 MHz"]
10257 pub const _10: Self = Self::new(2);
10258
10259 #[doc = "8 MHz"]
10260 pub const _11: Self = Self::new(3);
10261 }
10262 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10263 pub struct Mosel_SPEC;
10264 pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
10265 impl Mosel {
10266 #[doc = "Resonator"]
10267 pub const _0: Self = Self::new(0);
10268
10269 #[doc = "External clock input"]
10270 pub const _1: Self = Self::new(1);
10271 }
10272}
10273#[doc(hidden)]
10274#[derive(Copy, Clone, Eq, PartialEq)]
10275pub struct Fwepror_SPEC;
10276impl crate::sealed::RegSpec for Fwepror_SPEC {
10277 type DataType = u8;
10278}
10279
10280#[doc = "Flash P/E Protect Register"]
10281pub type Fwepror = crate::RegValueT<Fwepror_SPEC>;
10282
10283impl Fwepror {
10284 #[doc = "Flash Programming and Erasure"]
10285 #[inline(always)]
10286 pub fn flwe(
10287 self,
10288 ) -> crate::common::RegisterField<
10289 0,
10290 0x3,
10291 1,
10292 0,
10293 fwepror::Flwe,
10294 fwepror::Flwe,
10295 Fwepror_SPEC,
10296 crate::common::RW,
10297 > {
10298 crate::common::RegisterField::<
10299 0,
10300 0x3,
10301 1,
10302 0,
10303 fwepror::Flwe,
10304 fwepror::Flwe,
10305 Fwepror_SPEC,
10306 crate::common::RW,
10307 >::from_register(self, 0)
10308 }
10309}
10310impl ::core::default::Default for Fwepror {
10311 #[inline(always)]
10312 fn default() -> Fwepror {
10313 <crate::RegValueT<Fwepror_SPEC> as RegisterValue<_>>::new(2)
10314 }
10315}
10316pub mod fwepror {
10317
10318 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10319 pub struct Flwe_SPEC;
10320 pub type Flwe = crate::EnumBitfieldStruct<u8, Flwe_SPEC>;
10321 impl Flwe {
10322 #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10323 pub const _00: Self = Self::new(0);
10324
10325 #[doc = "Permits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10326 pub const _01: Self = Self::new(1);
10327
10328 #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10329 pub const _10: Self = Self::new(2);
10330
10331 #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10332 pub const _11: Self = Self::new(3);
10333 }
10334}
10335#[doc(hidden)]
10336#[derive(Copy, Clone, Eq, PartialEq)]
10337pub struct Lvd1Cmpcr_SPEC;
10338impl crate::sealed::RegSpec for Lvd1Cmpcr_SPEC {
10339 type DataType = u8;
10340}
10341
10342#[doc = "Voltage Monitoring 1 Comparator Control Register"]
10343pub type Lvd1Cmpcr = crate::RegValueT<Lvd1Cmpcr_SPEC>;
10344
10345impl Lvd1Cmpcr {
10346 #[doc = "Voltage Detection 1 Level Select (Standard voltage during drop in voltage)"]
10347 #[inline(always)]
10348 pub fn lvd1lvl(
10349 self,
10350 ) -> crate::common::RegisterField<
10351 0,
10352 0x1f,
10353 1,
10354 0,
10355 lvd1cmpcr::Lvd1Lvl,
10356 lvd1cmpcr::Lvd1Lvl,
10357 Lvd1Cmpcr_SPEC,
10358 crate::common::RW,
10359 > {
10360 crate::common::RegisterField::<
10361 0,
10362 0x1f,
10363 1,
10364 0,
10365 lvd1cmpcr::Lvd1Lvl,
10366 lvd1cmpcr::Lvd1Lvl,
10367 Lvd1Cmpcr_SPEC,
10368 crate::common::RW,
10369 >::from_register(self, 0)
10370 }
10371
10372 #[doc = "Voltage Detection 1 Enable"]
10373 #[inline(always)]
10374 pub fn lvd1e(
10375 self,
10376 ) -> crate::common::RegisterField<
10377 7,
10378 0x1,
10379 1,
10380 0,
10381 lvd1cmpcr::Lvd1E,
10382 lvd1cmpcr::Lvd1E,
10383 Lvd1Cmpcr_SPEC,
10384 crate::common::RW,
10385 > {
10386 crate::common::RegisterField::<
10387 7,
10388 0x1,
10389 1,
10390 0,
10391 lvd1cmpcr::Lvd1E,
10392 lvd1cmpcr::Lvd1E,
10393 Lvd1Cmpcr_SPEC,
10394 crate::common::RW,
10395 >::from_register(self, 0)
10396 }
10397}
10398impl ::core::default::Default for Lvd1Cmpcr {
10399 #[inline(always)]
10400 fn default() -> Lvd1Cmpcr {
10401 <crate::RegValueT<Lvd1Cmpcr_SPEC> as RegisterValue<_>>::new(19)
10402 }
10403}
10404pub mod lvd1cmpcr {
10405
10406 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10407 pub struct Lvd1Lvl_SPEC;
10408 pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
10409 impl Lvd1Lvl {
10410 #[doc = "2.99 V (Vdet1_1)"]
10411 pub const _0_X_11: Self = Self::new(17);
10412
10413 #[doc = "2.92 V (Vdet1_2)"]
10414 pub const _0_X_12: Self = Self::new(18);
10415
10416 #[doc = "2.85 V (Vdet1_3)"]
10417 pub const _0_X_13: Self = Self::new(19);
10418
10419 #[doc = "Setting prohibited"]
10420 pub const OTHERS: Self = Self::new(0);
10421 }
10422 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10423 pub struct Lvd1E_SPEC;
10424 pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
10425 impl Lvd1E {
10426 #[doc = "Voltage detection 1 circuit disabled"]
10427 pub const _0: Self = Self::new(0);
10428
10429 #[doc = "Voltage detection 1 circuit enabled"]
10430 pub const _1: Self = Self::new(1);
10431 }
10432}
10433#[doc(hidden)]
10434#[derive(Copy, Clone, Eq, PartialEq)]
10435pub struct Lvd2Cmpcr_SPEC;
10436impl crate::sealed::RegSpec for Lvd2Cmpcr_SPEC {
10437 type DataType = u8;
10438}
10439
10440#[doc = "Voltage Monitoring 2 Comparator Control Register"]
10441pub type Lvd2Cmpcr = crate::RegValueT<Lvd2Cmpcr_SPEC>;
10442
10443impl Lvd2Cmpcr {
10444 #[doc = "Voltage Detection 2 Level Select (Standard voltage during drop in voltage)"]
10445 #[inline(always)]
10446 pub fn lvd2lvl(
10447 self,
10448 ) -> crate::common::RegisterField<
10449 0,
10450 0x7,
10451 1,
10452 0,
10453 lvd2cmpcr::Lvd2Lvl,
10454 lvd2cmpcr::Lvd2Lvl,
10455 Lvd2Cmpcr_SPEC,
10456 crate::common::RW,
10457 > {
10458 crate::common::RegisterField::<
10459 0,
10460 0x7,
10461 1,
10462 0,
10463 lvd2cmpcr::Lvd2Lvl,
10464 lvd2cmpcr::Lvd2Lvl,
10465 Lvd2Cmpcr_SPEC,
10466 crate::common::RW,
10467 >::from_register(self, 0)
10468 }
10469
10470 #[doc = "Voltage Detection 2 Enable"]
10471 #[inline(always)]
10472 pub fn lvd2e(
10473 self,
10474 ) -> crate::common::RegisterField<
10475 7,
10476 0x1,
10477 1,
10478 0,
10479 lvd2cmpcr::Lvd2E,
10480 lvd2cmpcr::Lvd2E,
10481 Lvd2Cmpcr_SPEC,
10482 crate::common::RW,
10483 > {
10484 crate::common::RegisterField::<
10485 7,
10486 0x1,
10487 1,
10488 0,
10489 lvd2cmpcr::Lvd2E,
10490 lvd2cmpcr::Lvd2E,
10491 Lvd2Cmpcr_SPEC,
10492 crate::common::RW,
10493 >::from_register(self, 0)
10494 }
10495}
10496impl ::core::default::Default for Lvd2Cmpcr {
10497 #[inline(always)]
10498 fn default() -> Lvd2Cmpcr {
10499 <crate::RegValueT<Lvd2Cmpcr_SPEC> as RegisterValue<_>>::new(7)
10500 }
10501}
10502pub mod lvd2cmpcr {
10503
10504 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10505 pub struct Lvd2Lvl_SPEC;
10506 pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
10507 impl Lvd2Lvl {
10508 #[doc = "2.99 V (Vdet2_1)"]
10509 pub const _101: Self = Self::new(5);
10510
10511 #[doc = "2.92 V (Vdet2_2)"]
10512 pub const _110: Self = Self::new(6);
10513
10514 #[doc = "2.85 V (Vdet2_3)"]
10515 pub const _111: Self = Self::new(7);
10516
10517 #[doc = "Setting prohibited"]
10518 pub const OTHERS: Self = Self::new(0);
10519 }
10520 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10521 pub struct Lvd2E_SPEC;
10522 pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
10523 impl Lvd2E {
10524 #[doc = "Voltage detection 2 circuit disabled"]
10525 pub const _0: Self = Self::new(0);
10526
10527 #[doc = "Voltage detection 2 circuit enabled"]
10528 pub const _1: Self = Self::new(1);
10529 }
10530}
10531#[doc(hidden)]
10532#[derive(Copy, Clone, Eq, PartialEq)]
10533pub struct Lvd1Cr0_SPEC;
10534impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
10535 type DataType = u8;
10536}
10537
10538#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
10539pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
10540
10541impl Lvd1Cr0 {
10542 #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
10543 #[inline(always)]
10544 pub fn rie(
10545 self,
10546 ) -> crate::common::RegisterField<
10547 0,
10548 0x1,
10549 1,
10550 0,
10551 lvd1cr0::Rie,
10552 lvd1cr0::Rie,
10553 Lvd1Cr0_SPEC,
10554 crate::common::RW,
10555 > {
10556 crate::common::RegisterField::<
10557 0,
10558 0x1,
10559 1,
10560 0,
10561 lvd1cr0::Rie,
10562 lvd1cr0::Rie,
10563 Lvd1Cr0_SPEC,
10564 crate::common::RW,
10565 >::from_register(self, 0)
10566 }
10567
10568 #[doc = "Voltage monitor 1 Digital Filter Disabled Mode Select"]
10569 #[inline(always)]
10570 pub fn dfdis(
10571 self,
10572 ) -> crate::common::RegisterField<
10573 1,
10574 0x1,
10575 1,
10576 0,
10577 lvd1cr0::Dfdis,
10578 lvd1cr0::Dfdis,
10579 Lvd1Cr0_SPEC,
10580 crate::common::RW,
10581 > {
10582 crate::common::RegisterField::<
10583 1,
10584 0x1,
10585 1,
10586 0,
10587 lvd1cr0::Dfdis,
10588 lvd1cr0::Dfdis,
10589 Lvd1Cr0_SPEC,
10590 crate::common::RW,
10591 >::from_register(self, 0)
10592 }
10593
10594 #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
10595 #[inline(always)]
10596 pub fn cmpe(
10597 self,
10598 ) -> crate::common::RegisterField<
10599 2,
10600 0x1,
10601 1,
10602 0,
10603 lvd1cr0::Cmpe,
10604 lvd1cr0::Cmpe,
10605 Lvd1Cr0_SPEC,
10606 crate::common::RW,
10607 > {
10608 crate::common::RegisterField::<
10609 2,
10610 0x1,
10611 1,
10612 0,
10613 lvd1cr0::Cmpe,
10614 lvd1cr0::Cmpe,
10615 Lvd1Cr0_SPEC,
10616 crate::common::RW,
10617 >::from_register(self, 0)
10618 }
10619
10620 #[doc = "Sampling Clock Select"]
10621 #[inline(always)]
10622 pub fn fsamp(
10623 self,
10624 ) -> crate::common::RegisterField<
10625 4,
10626 0x3,
10627 1,
10628 0,
10629 lvd1cr0::Fsamp,
10630 lvd1cr0::Fsamp,
10631 Lvd1Cr0_SPEC,
10632 crate::common::RW,
10633 > {
10634 crate::common::RegisterField::<
10635 4,
10636 0x3,
10637 1,
10638 0,
10639 lvd1cr0::Fsamp,
10640 lvd1cr0::Fsamp,
10641 Lvd1Cr0_SPEC,
10642 crate::common::RW,
10643 >::from_register(self, 0)
10644 }
10645
10646 #[doc = "Voltage Monitor 1 Circuit Mode Select"]
10647 #[inline(always)]
10648 pub fn ri(
10649 self,
10650 ) -> crate::common::RegisterField<
10651 6,
10652 0x1,
10653 1,
10654 0,
10655 lvd1cr0::Ri,
10656 lvd1cr0::Ri,
10657 Lvd1Cr0_SPEC,
10658 crate::common::RW,
10659 > {
10660 crate::common::RegisterField::<
10661 6,
10662 0x1,
10663 1,
10664 0,
10665 lvd1cr0::Ri,
10666 lvd1cr0::Ri,
10667 Lvd1Cr0_SPEC,
10668 crate::common::RW,
10669 >::from_register(self, 0)
10670 }
10671
10672 #[doc = "Voltage Monitor 1 Reset Negate Select"]
10673 #[inline(always)]
10674 pub fn rn(
10675 self,
10676 ) -> crate::common::RegisterField<
10677 7,
10678 0x1,
10679 1,
10680 0,
10681 lvd1cr0::Rn,
10682 lvd1cr0::Rn,
10683 Lvd1Cr0_SPEC,
10684 crate::common::RW,
10685 > {
10686 crate::common::RegisterField::<
10687 7,
10688 0x1,
10689 1,
10690 0,
10691 lvd1cr0::Rn,
10692 lvd1cr0::Rn,
10693 Lvd1Cr0_SPEC,
10694 crate::common::RW,
10695 >::from_register(self, 0)
10696 }
10697}
10698impl ::core::default::Default for Lvd1Cr0 {
10699 #[inline(always)]
10700 fn default() -> Lvd1Cr0 {
10701 <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(130)
10702 }
10703}
10704pub mod lvd1cr0 {
10705
10706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10707 pub struct Rie_SPEC;
10708 pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
10709 impl Rie {
10710 #[doc = "Disable"]
10711 pub const _0: Self = Self::new(0);
10712
10713 #[doc = "Enable"]
10714 pub const _1: Self = Self::new(1);
10715 }
10716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10717 pub struct Dfdis_SPEC;
10718 pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
10719 impl Dfdis {
10720 #[doc = "Enable the digital filter"]
10721 pub const _0: Self = Self::new(0);
10722
10723 #[doc = "Disable the digital filter"]
10724 pub const _1: Self = Self::new(1);
10725 }
10726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10727 pub struct Cmpe_SPEC;
10728 pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
10729 impl Cmpe {
10730 #[doc = "Disable voltage monitor 1 circuit comparison result output"]
10731 pub const _0: Self = Self::new(0);
10732
10733 #[doc = "Enable voltage monitor 1 circuit comparison result output"]
10734 pub const _1: Self = Self::new(1);
10735 }
10736 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10737 pub struct Fsamp_SPEC;
10738 pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
10739 impl Fsamp {
10740 #[doc = "1/2 LOCO frequency"]
10741 pub const _00: Self = Self::new(0);
10742
10743 #[doc = "1/4 LOCO frequency"]
10744 pub const _01: Self = Self::new(1);
10745
10746 #[doc = "1/8 LOCO frequency"]
10747 pub const _10: Self = Self::new(2);
10748
10749 #[doc = "1/16 LOCO frequency"]
10750 pub const _11: Self = Self::new(3);
10751 }
10752 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10753 pub struct Ri_SPEC;
10754 pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
10755 impl Ri {
10756 #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
10757 pub const _0: Self = Self::new(0);
10758
10759 #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
10760 pub const _1: Self = Self::new(1);
10761 }
10762 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10763 pub struct Rn_SPEC;
10764 pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
10765 impl Rn {
10766 #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
10767 pub const _0: Self = Self::new(0);
10768
10769 #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
10770 pub const _1: Self = Self::new(1);
10771 }
10772}
10773#[doc(hidden)]
10774#[derive(Copy, Clone, Eq, PartialEq)]
10775pub struct Lvd2Cr0_SPEC;
10776impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
10777 type DataType = u8;
10778}
10779
10780#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
10781pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
10782
10783impl Lvd2Cr0 {
10784 #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
10785 #[inline(always)]
10786 pub fn rie(
10787 self,
10788 ) -> crate::common::RegisterField<
10789 0,
10790 0x1,
10791 1,
10792 0,
10793 lvd2cr0::Rie,
10794 lvd2cr0::Rie,
10795 Lvd2Cr0_SPEC,
10796 crate::common::RW,
10797 > {
10798 crate::common::RegisterField::<
10799 0,
10800 0x1,
10801 1,
10802 0,
10803 lvd2cr0::Rie,
10804 lvd2cr0::Rie,
10805 Lvd2Cr0_SPEC,
10806 crate::common::RW,
10807 >::from_register(self, 0)
10808 }
10809
10810 #[doc = "Voltage monitor 2 Digital Filter Disabled Mode Select"]
10811 #[inline(always)]
10812 pub fn dfdis(
10813 self,
10814 ) -> crate::common::RegisterField<
10815 1,
10816 0x1,
10817 1,
10818 0,
10819 lvd2cr0::Dfdis,
10820 lvd2cr0::Dfdis,
10821 Lvd2Cr0_SPEC,
10822 crate::common::RW,
10823 > {
10824 crate::common::RegisterField::<
10825 1,
10826 0x1,
10827 1,
10828 0,
10829 lvd2cr0::Dfdis,
10830 lvd2cr0::Dfdis,
10831 Lvd2Cr0_SPEC,
10832 crate::common::RW,
10833 >::from_register(self, 0)
10834 }
10835
10836 #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
10837 #[inline(always)]
10838 pub fn cmpe(
10839 self,
10840 ) -> crate::common::RegisterField<
10841 2,
10842 0x1,
10843 1,
10844 0,
10845 lvd2cr0::Cmpe,
10846 lvd2cr0::Cmpe,
10847 Lvd2Cr0_SPEC,
10848 crate::common::RW,
10849 > {
10850 crate::common::RegisterField::<
10851 2,
10852 0x1,
10853 1,
10854 0,
10855 lvd2cr0::Cmpe,
10856 lvd2cr0::Cmpe,
10857 Lvd2Cr0_SPEC,
10858 crate::common::RW,
10859 >::from_register(self, 0)
10860 }
10861
10862 #[doc = "Sampling Clock Select"]
10863 #[inline(always)]
10864 pub fn fsamp(
10865 self,
10866 ) -> crate::common::RegisterField<
10867 4,
10868 0x3,
10869 1,
10870 0,
10871 lvd2cr0::Fsamp,
10872 lvd2cr0::Fsamp,
10873 Lvd2Cr0_SPEC,
10874 crate::common::RW,
10875 > {
10876 crate::common::RegisterField::<
10877 4,
10878 0x3,
10879 1,
10880 0,
10881 lvd2cr0::Fsamp,
10882 lvd2cr0::Fsamp,
10883 Lvd2Cr0_SPEC,
10884 crate::common::RW,
10885 >::from_register(self, 0)
10886 }
10887
10888 #[doc = "Voltage Monitor 2 Circuit Mode Select"]
10889 #[inline(always)]
10890 pub fn ri(
10891 self,
10892 ) -> crate::common::RegisterField<
10893 6,
10894 0x1,
10895 1,
10896 0,
10897 lvd2cr0::Ri,
10898 lvd2cr0::Ri,
10899 Lvd2Cr0_SPEC,
10900 crate::common::RW,
10901 > {
10902 crate::common::RegisterField::<
10903 6,
10904 0x1,
10905 1,
10906 0,
10907 lvd2cr0::Ri,
10908 lvd2cr0::Ri,
10909 Lvd2Cr0_SPEC,
10910 crate::common::RW,
10911 >::from_register(self, 0)
10912 }
10913
10914 #[doc = "Voltage Monitor 2 Reset Negate Select"]
10915 #[inline(always)]
10916 pub fn rn(
10917 self,
10918 ) -> crate::common::RegisterField<
10919 7,
10920 0x1,
10921 1,
10922 0,
10923 lvd2cr0::Rn,
10924 lvd2cr0::Rn,
10925 Lvd2Cr0_SPEC,
10926 crate::common::RW,
10927 > {
10928 crate::common::RegisterField::<
10929 7,
10930 0x1,
10931 1,
10932 0,
10933 lvd2cr0::Rn,
10934 lvd2cr0::Rn,
10935 Lvd2Cr0_SPEC,
10936 crate::common::RW,
10937 >::from_register(self, 0)
10938 }
10939}
10940impl ::core::default::Default for Lvd2Cr0 {
10941 #[inline(always)]
10942 fn default() -> Lvd2Cr0 {
10943 <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(130)
10944 }
10945}
10946pub mod lvd2cr0 {
10947
10948 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10949 pub struct Rie_SPEC;
10950 pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
10951 impl Rie {
10952 #[doc = "Disable"]
10953 pub const _0: Self = Self::new(0);
10954
10955 #[doc = "Enable"]
10956 pub const _1: Self = Self::new(1);
10957 }
10958 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10959 pub struct Dfdis_SPEC;
10960 pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
10961 impl Dfdis {
10962 #[doc = "Enable the digital filter"]
10963 pub const _0: Self = Self::new(0);
10964
10965 #[doc = "Disable the digital filter"]
10966 pub const _1: Self = Self::new(1);
10967 }
10968 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10969 pub struct Cmpe_SPEC;
10970 pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
10971 impl Cmpe {
10972 #[doc = "Disable voltage monitor 2 circuit comparison result output"]
10973 pub const _0: Self = Self::new(0);
10974
10975 #[doc = "Enable voltage monitor 2 circuit comparison result output"]
10976 pub const _1: Self = Self::new(1);
10977 }
10978 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10979 pub struct Fsamp_SPEC;
10980 pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
10981 impl Fsamp {
10982 #[doc = "1/2 LOCO frequency"]
10983 pub const _00: Self = Self::new(0);
10984
10985 #[doc = "1/4 LOCO frequency"]
10986 pub const _01: Self = Self::new(1);
10987
10988 #[doc = "1/8 LOCO frequency"]
10989 pub const _10: Self = Self::new(2);
10990
10991 #[doc = "1/16 LOCO frequency"]
10992 pub const _11: Self = Self::new(3);
10993 }
10994 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10995 pub struct Ri_SPEC;
10996 pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
10997 impl Ri {
10998 #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
10999 pub const _0: Self = Self::new(0);
11000
11001 #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
11002 pub const _1: Self = Self::new(1);
11003 }
11004 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11005 pub struct Rn_SPEC;
11006 pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
11007 impl Rn {
11008 #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
11009 pub const _0: Self = Self::new(0);
11010
11011 #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
11012 pub const _1: Self = Self::new(1);
11013 }
11014}
11015#[doc(hidden)]
11016#[derive(Copy, Clone, Eq, PartialEq)]
11017pub struct Vbattmnselr_SPEC;
11018impl crate::sealed::RegSpec for Vbattmnselr_SPEC {
11019 type DataType = u8;
11020}
11021
11022#[doc = "Battery Backup Voltage Monitor Function Select Register"]
11023pub type Vbattmnselr = crate::RegValueT<Vbattmnselr_SPEC>;
11024
11025impl Vbattmnselr {
11026 #[doc = "VBATT Low Voltage Detect Function Select Bit"]
11027 #[inline(always)]
11028 pub fn vbattmnsel(
11029 self,
11030 ) -> crate::common::RegisterField<
11031 0,
11032 0x1,
11033 1,
11034 0,
11035 vbattmnselr::Vbattmnsel,
11036 vbattmnselr::Vbattmnsel,
11037 Vbattmnselr_SPEC,
11038 crate::common::RW,
11039 > {
11040 crate::common::RegisterField::<
11041 0,
11042 0x1,
11043 1,
11044 0,
11045 vbattmnselr::Vbattmnsel,
11046 vbattmnselr::Vbattmnsel,
11047 Vbattmnselr_SPEC,
11048 crate::common::RW,
11049 >::from_register(self, 0)
11050 }
11051}
11052impl ::core::default::Default for Vbattmnselr {
11053 #[inline(always)]
11054 fn default() -> Vbattmnselr {
11055 <crate::RegValueT<Vbattmnselr_SPEC> as RegisterValue<_>>::new(0)
11056 }
11057}
11058pub mod vbattmnselr {
11059
11060 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11061 pub struct Vbattmnsel_SPEC;
11062 pub type Vbattmnsel = crate::EnumBitfieldStruct<u8, Vbattmnsel_SPEC>;
11063 impl Vbattmnsel {
11064 #[doc = "Disables VBATT low voltage detect function"]
11065 pub const _0: Self = Self::new(0);
11066
11067 #[doc = "Enables VBATT low voltage detect function"]
11068 pub const _1: Self = Self::new(1);
11069 }
11070}
11071#[doc(hidden)]
11072#[derive(Copy, Clone, Eq, PartialEq)]
11073pub struct Vbattmonr_SPEC;
11074impl crate::sealed::RegSpec for Vbattmonr_SPEC {
11075 type DataType = u8;
11076}
11077
11078#[doc = "Battery Backup Voltage Monitor Register"]
11079pub type Vbattmonr = crate::RegValueT<Vbattmonr_SPEC>;
11080
11081impl Vbattmonr {
11082 #[doc = "VBATT Voltage Monitor Bit"]
11083 #[inline(always)]
11084 pub fn vbattmon(
11085 self,
11086 ) -> crate::common::RegisterField<
11087 0,
11088 0x1,
11089 1,
11090 0,
11091 vbattmonr::Vbattmon,
11092 vbattmonr::Vbattmon,
11093 Vbattmonr_SPEC,
11094 crate::common::R,
11095 > {
11096 crate::common::RegisterField::<
11097 0,
11098 0x1,
11099 1,
11100 0,
11101 vbattmonr::Vbattmon,
11102 vbattmonr::Vbattmon,
11103 Vbattmonr_SPEC,
11104 crate::common::R,
11105 >::from_register(self, 0)
11106 }
11107}
11108impl ::core::default::Default for Vbattmonr {
11109 #[inline(always)]
11110 fn default() -> Vbattmonr {
11111 <crate::RegValueT<Vbattmonr_SPEC> as RegisterValue<_>>::new(0)
11112 }
11113}
11114pub mod vbattmonr {
11115
11116 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11117 pub struct Vbattmon_SPEC;
11118 pub type Vbattmon = crate::EnumBitfieldStruct<u8, Vbattmon_SPEC>;
11119 impl Vbattmon {
11120 #[doc = "VBATT ≥ Vbattldet"]
11121 pub const _0: Self = Self::new(0);
11122
11123 #[doc = "VBATT < Vbattldet"]
11124 pub const _1: Self = Self::new(1);
11125 }
11126}
11127#[doc(hidden)]
11128#[derive(Copy, Clone, Eq, PartialEq)]
11129pub struct Sosccr_SPEC;
11130impl crate::sealed::RegSpec for Sosccr_SPEC {
11131 type DataType = u8;
11132}
11133
11134#[doc = "Sub-Clock Oscillator Control Register"]
11135pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
11136
11137impl Sosccr {
11138 #[doc = "Sub Clock Oscillator Stop"]
11139 #[inline(always)]
11140 pub fn sostp(
11141 self,
11142 ) -> crate::common::RegisterField<
11143 0,
11144 0x1,
11145 1,
11146 0,
11147 sosccr::Sostp,
11148 sosccr::Sostp,
11149 Sosccr_SPEC,
11150 crate::common::RW,
11151 > {
11152 crate::common::RegisterField::<
11153 0,
11154 0x1,
11155 1,
11156 0,
11157 sosccr::Sostp,
11158 sosccr::Sostp,
11159 Sosccr_SPEC,
11160 crate::common::RW,
11161 >::from_register(self, 0)
11162 }
11163}
11164impl ::core::default::Default for Sosccr {
11165 #[inline(always)]
11166 fn default() -> Sosccr {
11167 <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(0)
11168 }
11169}
11170pub mod sosccr {
11171
11172 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11173 pub struct Sostp_SPEC;
11174 pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
11175 impl Sostp {
11176 #[doc = "Operate the sub-clock oscillator"]
11177 pub const _0: Self = Self::new(0);
11178
11179 #[doc = "Stop the sub-clock oscillator"]
11180 pub const _1: Self = Self::new(1);
11181 }
11182}
11183#[doc(hidden)]
11184#[derive(Copy, Clone, Eq, PartialEq)]
11185pub struct Somcr_SPEC;
11186impl crate::sealed::RegSpec for Somcr_SPEC {
11187 type DataType = u8;
11188}
11189
11190#[doc = "Sub-Clock Oscillator Mode Control Register"]
11191pub type Somcr = crate::RegValueT<Somcr_SPEC>;
11192
11193impl Somcr {
11194 #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
11195 #[inline(always)]
11196 pub fn sodrv(
11197 self,
11198 ) -> crate::common::RegisterField<
11199 1,
11200 0x1,
11201 1,
11202 0,
11203 somcr::Sodrv,
11204 somcr::Sodrv,
11205 Somcr_SPEC,
11206 crate::common::RW,
11207 > {
11208 crate::common::RegisterField::<
11209 1,
11210 0x1,
11211 1,
11212 0,
11213 somcr::Sodrv,
11214 somcr::Sodrv,
11215 Somcr_SPEC,
11216 crate::common::RW,
11217 >::from_register(self, 0)
11218 }
11219}
11220impl ::core::default::Default for Somcr {
11221 #[inline(always)]
11222 fn default() -> Somcr {
11223 <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
11224 }
11225}
11226pub mod somcr {
11227
11228 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11229 pub struct Sodrv_SPEC;
11230 pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
11231 impl Sodrv {
11232 #[doc = "Standard"]
11233 pub const _0: Self = Self::new(0);
11234
11235 #[doc = "Low"]
11236 pub const _1: Self = Self::new(1);
11237 }
11238}
11239#[doc(hidden)]
11240#[derive(Copy, Clone, Eq, PartialEq)]
11241pub struct Lococr_SPEC;
11242impl crate::sealed::RegSpec for Lococr_SPEC {
11243 type DataType = u8;
11244}
11245
11246#[doc = "Low-Speed On-Chip Oscillator Control Register"]
11247pub type Lococr = crate::RegValueT<Lococr_SPEC>;
11248
11249impl Lococr {
11250 #[doc = "LOCO Stop"]
11251 #[inline(always)]
11252 pub fn lcstp(
11253 self,
11254 ) -> crate::common::RegisterField<
11255 0,
11256 0x1,
11257 1,
11258 0,
11259 lococr::Lcstp,
11260 lococr::Lcstp,
11261 Lococr_SPEC,
11262 crate::common::RW,
11263 > {
11264 crate::common::RegisterField::<
11265 0,
11266 0x1,
11267 1,
11268 0,
11269 lococr::Lcstp,
11270 lococr::Lcstp,
11271 Lococr_SPEC,
11272 crate::common::RW,
11273 >::from_register(self, 0)
11274 }
11275}
11276impl ::core::default::Default for Lococr {
11277 #[inline(always)]
11278 fn default() -> Lococr {
11279 <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
11280 }
11281}
11282pub mod lococr {
11283
11284 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11285 pub struct Lcstp_SPEC;
11286 pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
11287 impl Lcstp {
11288 #[doc = "Operate the LOCO clock"]
11289 pub const _0: Self = Self::new(0);
11290
11291 #[doc = "Stop the LOCO clock"]
11292 pub const _1: Self = Self::new(1);
11293 }
11294}
11295#[doc(hidden)]
11296#[derive(Copy, Clone, Eq, PartialEq)]
11297pub struct Locoutcr_SPEC;
11298impl crate::sealed::RegSpec for Locoutcr_SPEC {
11299 type DataType = u8;
11300}
11301
11302#[doc = "LOCO User Trimming Control Register"]
11303pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
11304
11305impl Locoutcr {
11306 #[doc = "LOCO User Trimming"]
11307 #[inline(always)]
11308 pub fn locoutrm(
11309 self,
11310 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
11311 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
11312 }
11313}
11314impl ::core::default::Default for Locoutcr {
11315 #[inline(always)]
11316 fn default() -> Locoutcr {
11317 <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
11318 }
11319}
11320
11321#[doc(hidden)]
11322#[derive(Copy, Clone, Eq, PartialEq)]
11323pub struct Vbtictlr_SPEC;
11324impl crate::sealed::RegSpec for Vbtictlr_SPEC {
11325 type DataType = u8;
11326}
11327
11328#[doc = "VBATT Input Control Register"]
11329pub type Vbtictlr = crate::RegValueT<Vbtictlr_SPEC>;
11330
11331impl Vbtictlr {
11332 #[doc = "VBATT CH0 Input Enable"]
11333 #[inline(always)]
11334 pub fn vch0inen(
11335 self,
11336 ) -> crate::common::RegisterField<
11337 0,
11338 0x1,
11339 1,
11340 0,
11341 vbtictlr::Vch0Inen,
11342 vbtictlr::Vch0Inen,
11343 Vbtictlr_SPEC,
11344 crate::common::RW,
11345 > {
11346 crate::common::RegisterField::<
11347 0,
11348 0x1,
11349 1,
11350 0,
11351 vbtictlr::Vch0Inen,
11352 vbtictlr::Vch0Inen,
11353 Vbtictlr_SPEC,
11354 crate::common::RW,
11355 >::from_register(self, 0)
11356 }
11357
11358 #[doc = "VBATT CH1 Input Enable"]
11359 #[inline(always)]
11360 pub fn vch1inen(
11361 self,
11362 ) -> crate::common::RegisterField<
11363 1,
11364 0x1,
11365 1,
11366 0,
11367 vbtictlr::Vch1Inen,
11368 vbtictlr::Vch1Inen,
11369 Vbtictlr_SPEC,
11370 crate::common::RW,
11371 > {
11372 crate::common::RegisterField::<
11373 1,
11374 0x1,
11375 1,
11376 0,
11377 vbtictlr::Vch1Inen,
11378 vbtictlr::Vch1Inen,
11379 Vbtictlr_SPEC,
11380 crate::common::RW,
11381 >::from_register(self, 0)
11382 }
11383
11384 #[doc = "VBATT CH2 Input Enable"]
11385 #[inline(always)]
11386 pub fn vch2inen(
11387 self,
11388 ) -> crate::common::RegisterField<
11389 2,
11390 0x1,
11391 1,
11392 0,
11393 vbtictlr::Vch2Inen,
11394 vbtictlr::Vch2Inen,
11395 Vbtictlr_SPEC,
11396 crate::common::RW,
11397 > {
11398 crate::common::RegisterField::<
11399 2,
11400 0x1,
11401 1,
11402 0,
11403 vbtictlr::Vch2Inen,
11404 vbtictlr::Vch2Inen,
11405 Vbtictlr_SPEC,
11406 crate::common::RW,
11407 >::from_register(self, 0)
11408 }
11409}
11410impl ::core::default::Default for Vbtictlr {
11411 #[inline(always)]
11412 fn default() -> Vbtictlr {
11413 <crate::RegValueT<Vbtictlr_SPEC> as RegisterValue<_>>::new(0)
11414 }
11415}
11416pub mod vbtictlr {
11417
11418 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11419 pub struct Vch0Inen_SPEC;
11420 pub type Vch0Inen = crate::EnumBitfieldStruct<u8, Vch0Inen_SPEC>;
11421 impl Vch0Inen {
11422 #[doc = "RTCIC0 input disable"]
11423 pub const _0: Self = Self::new(0);
11424
11425 #[doc = "RTCIC0 input enable"]
11426 pub const _1: Self = Self::new(1);
11427 }
11428 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11429 pub struct Vch1Inen_SPEC;
11430 pub type Vch1Inen = crate::EnumBitfieldStruct<u8, Vch1Inen_SPEC>;
11431 impl Vch1Inen {
11432 #[doc = "RTCIC1 input disable"]
11433 pub const _0: Self = Self::new(0);
11434
11435 #[doc = "RTCIC1 input enable"]
11436 pub const _1: Self = Self::new(1);
11437 }
11438 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11439 pub struct Vch2Inen_SPEC;
11440 pub type Vch2Inen = crate::EnumBitfieldStruct<u8, Vch2Inen_SPEC>;
11441 impl Vch2Inen {
11442 #[doc = "RTCIC2 input disable"]
11443 pub const _0: Self = Self::new(0);
11444
11445 #[doc = "RTCIC2 input enable"]
11446 pub const _1: Self = Self::new(1);
11447 }
11448}
11449#[doc(hidden)]
11450#[derive(Copy, Clone, Eq, PartialEq)]
11451pub struct Vbtber_SPEC;
11452impl crate::sealed::RegSpec for Vbtber_SPEC {
11453 type DataType = u8;
11454}
11455
11456#[doc = "VBATT Backup Enable Register"]
11457pub type Vbtber = crate::RegValueT<Vbtber_SPEC>;
11458
11459impl Vbtber {
11460 #[doc = "VBATT backup register access enable bit"]
11461 #[inline(always)]
11462 pub fn vbae(
11463 self,
11464 ) -> crate::common::RegisterField<
11465 3,
11466 0x1,
11467 1,
11468 0,
11469 vbtber::Vbae,
11470 vbtber::Vbae,
11471 Vbtber_SPEC,
11472 crate::common::RW,
11473 > {
11474 crate::common::RegisterField::<
11475 3,
11476 0x1,
11477 1,
11478 0,
11479 vbtber::Vbae,
11480 vbtber::Vbae,
11481 Vbtber_SPEC,
11482 crate::common::RW,
11483 >::from_register(self, 0)
11484 }
11485}
11486impl ::core::default::Default for Vbtber {
11487 #[inline(always)]
11488 fn default() -> Vbtber {
11489 <crate::RegValueT<Vbtber_SPEC> as RegisterValue<_>>::new(8)
11490 }
11491}
11492pub mod vbtber {
11493
11494 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11495 pub struct Vbae_SPEC;
11496 pub type Vbae = crate::EnumBitfieldStruct<u8, Vbae_SPEC>;
11497 impl Vbae {
11498 #[doc = "Disable to access VBTBKR"]
11499 pub const _0: Self = Self::new(0);
11500
11501 #[doc = "Enable to access VBTBKR"]
11502 pub const _1: Self = Self::new(1);
11503 }
11504}
11505#[doc(hidden)]
11506#[derive(Copy, Clone, Eq, PartialEq)]
11507pub struct Vbtbkr_SPEC;
11508impl crate::sealed::RegSpec for Vbtbkr_SPEC {
11509 type DataType = u8;
11510}
11511
11512#[doc = "VBATT Backup Register"]
11513pub type Vbtbkr = crate::RegValueT<Vbtbkr_SPEC>;
11514
11515impl Vbtbkr {
11516 #[doc = "VBATT Backup Register"]
11517 #[inline(always)]
11518 pub fn vbtbkr(
11519 self,
11520 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Vbtbkr_SPEC, crate::common::RW> {
11521 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Vbtbkr_SPEC,crate::common::RW>::from_register(self,0)
11522 }
11523}
11524impl ::core::default::Default for Vbtbkr {
11525 #[inline(always)]
11526 fn default() -> Vbtbkr {
11527 <crate::RegValueT<Vbtbkr_SPEC> as RegisterValue<_>>::new(0)
11528 }
11529}