ra4w1/acmplp/
compocr.rs

1#[doc = "Register `COMPOCR` reader"]
2pub struct R(crate::R<COMPOCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<COMPOCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<COMPOCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<COMPOCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `COMPOCR` writer"]
17pub struct W(crate::W<COMPOCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<COMPOCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<COMPOCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<COMPOCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `C0OE` reader - ACMPLP0 VCOUT Pin Output Enable"]
38pub type C0OE_R = crate::BitReader<C0OE_A>;
39#[doc = "ACMPLP0 VCOUT Pin Output Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum C0OE_A {
42    #[doc = "0: Disabled"]
43    _0 = 0,
44    #[doc = "1: Enabled"]
45    _1 = 1,
46}
47impl From<C0OE_A> for bool {
48    #[inline(always)]
49    fn from(variant: C0OE_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl C0OE_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> C0OE_A {
57        match self.bits {
58            false => C0OE_A::_0,
59            true => C0OE_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == C0OE_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == C0OE_A::_1
71    }
72}
73#[doc = "Field `C0OE` writer - ACMPLP0 VCOUT Pin Output Enable"]
74pub type C0OE_W<'a, const O: u8> = crate::BitWriter<'a, u8, COMPOCR_SPEC, C0OE_A, O>;
75impl<'a, const O: u8> C0OE_W<'a, O> {
76    #[doc = "Disabled"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(C0OE_A::_0)
80    }
81    #[doc = "Enabled"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(C0OE_A::_1)
85    }
86}
87#[doc = "Field `C0OP` reader - ACMPLP0 VCOUT Output Polarity Selection"]
88pub type C0OP_R = crate::BitReader<C0OP_A>;
89#[doc = "ACMPLP0 VCOUT Output Polarity Selection\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum C0OP_A {
92    #[doc = "0: Non inverted"]
93    _0 = 0,
94    #[doc = "1: Inverted"]
95    _1 = 1,
96}
97impl From<C0OP_A> for bool {
98    #[inline(always)]
99    fn from(variant: C0OP_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl C0OP_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> C0OP_A {
107        match self.bits {
108            false => C0OP_A::_0,
109            true => C0OP_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == C0OP_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == C0OP_A::_1
121    }
122}
123#[doc = "Field `C0OP` writer - ACMPLP0 VCOUT Output Polarity Selection"]
124pub type C0OP_W<'a, const O: u8> = crate::BitWriter<'a, u8, COMPOCR_SPEC, C0OP_A, O>;
125impl<'a, const O: u8> C0OP_W<'a, O> {
126    #[doc = "Non inverted"]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(C0OP_A::_0)
130    }
131    #[doc = "Inverted"]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(C0OP_A::_1)
135    }
136}
137#[doc = "Field `C1OE` reader - ACMPLP1 VCOUT Pin Output Enable"]
138pub type C1OE_R = crate::BitReader<C1OE_A>;
139#[doc = "ACMPLP1 VCOUT Pin Output Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum C1OE_A {
142    #[doc = "0: Disabled"]
143    _0 = 0,
144    #[doc = "1: Enabled"]
145    _1 = 1,
146}
147impl From<C1OE_A> for bool {
148    #[inline(always)]
149    fn from(variant: C1OE_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl C1OE_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> C1OE_A {
157        match self.bits {
158            false => C1OE_A::_0,
159            true => C1OE_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == C1OE_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == C1OE_A::_1
171    }
172}
173#[doc = "Field `C1OE` writer - ACMPLP1 VCOUT Pin Output Enable"]
174pub type C1OE_W<'a, const O: u8> = crate::BitWriter<'a, u8, COMPOCR_SPEC, C1OE_A, O>;
175impl<'a, const O: u8> C1OE_W<'a, O> {
176    #[doc = "Disabled"]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(C1OE_A::_0)
180    }
181    #[doc = "Enabled"]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(C1OE_A::_1)
185    }
186}
187#[doc = "Field `C1OP` reader - ACMPLP1 VCOUT Output Polarity Selection"]
188pub type C1OP_R = crate::BitReader<C1OP_A>;
189#[doc = "ACMPLP1 VCOUT Output Polarity Selection\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum C1OP_A {
192    #[doc = "0: Non inverted"]
193    _0 = 0,
194    #[doc = "1: Inverted"]
195    _1 = 1,
196}
197impl From<C1OP_A> for bool {
198    #[inline(always)]
199    fn from(variant: C1OP_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl C1OP_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> C1OP_A {
207        match self.bits {
208            false => C1OP_A::_0,
209            true => C1OP_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == C1OP_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == C1OP_A::_1
221    }
222}
223#[doc = "Field `C1OP` writer - ACMPLP1 VCOUT Output Polarity Selection"]
224pub type C1OP_W<'a, const O: u8> = crate::BitWriter<'a, u8, COMPOCR_SPEC, C1OP_A, O>;
225impl<'a, const O: u8> C1OP_W<'a, O> {
226    #[doc = "Non inverted"]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(C1OP_A::_0)
230    }
231    #[doc = "Inverted"]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(C1OP_A::_1)
235    }
236}
237#[doc = "Field `SPDMD` reader - ACMPLP0/ACMPLP1 Speed Selection"]
238pub type SPDMD_R = crate::BitReader<SPDMD_A>;
239#[doc = "ACMPLP0/ACMPLP1 Speed Selection\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum SPDMD_A {
242    #[doc = "0: Comparator low-speed mode"]
243    _0 = 0,
244    #[doc = "1: Comparator high-speed mode"]
245    _1 = 1,
246}
247impl From<SPDMD_A> for bool {
248    #[inline(always)]
249    fn from(variant: SPDMD_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl SPDMD_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> SPDMD_A {
257        match self.bits {
258            false => SPDMD_A::_0,
259            true => SPDMD_A::_1,
260        }
261    }
262    #[doc = "Checks if the value of the field is `_0`"]
263    #[inline(always)]
264    pub fn is_0(&self) -> bool {
265        *self == SPDMD_A::_0
266    }
267    #[doc = "Checks if the value of the field is `_1`"]
268    #[inline(always)]
269    pub fn is_1(&self) -> bool {
270        *self == SPDMD_A::_1
271    }
272}
273#[doc = "Field `SPDMD` writer - ACMPLP0/ACMPLP1 Speed Selection"]
274pub type SPDMD_W<'a, const O: u8> = crate::BitWriter<'a, u8, COMPOCR_SPEC, SPDMD_A, O>;
275impl<'a, const O: u8> SPDMD_W<'a, O> {
276    #[doc = "Comparator low-speed mode"]
277    #[inline(always)]
278    pub fn _0(self) -> &'a mut W {
279        self.variant(SPDMD_A::_0)
280    }
281    #[doc = "Comparator high-speed mode"]
282    #[inline(always)]
283    pub fn _1(self) -> &'a mut W {
284        self.variant(SPDMD_A::_1)
285    }
286}
287impl R {
288    #[doc = "Bit 1 - ACMPLP0 VCOUT Pin Output Enable"]
289    #[inline(always)]
290    pub fn c0oe(&self) -> C0OE_R {
291        C0OE_R::new(((self.bits >> 1) & 1) != 0)
292    }
293    #[doc = "Bit 2 - ACMPLP0 VCOUT Output Polarity Selection"]
294    #[inline(always)]
295    pub fn c0op(&self) -> C0OP_R {
296        C0OP_R::new(((self.bits >> 2) & 1) != 0)
297    }
298    #[doc = "Bit 5 - ACMPLP1 VCOUT Pin Output Enable"]
299    #[inline(always)]
300    pub fn c1oe(&self) -> C1OE_R {
301        C1OE_R::new(((self.bits >> 5) & 1) != 0)
302    }
303    #[doc = "Bit 6 - ACMPLP1 VCOUT Output Polarity Selection"]
304    #[inline(always)]
305    pub fn c1op(&self) -> C1OP_R {
306        C1OP_R::new(((self.bits >> 6) & 1) != 0)
307    }
308    #[doc = "Bit 7 - ACMPLP0/ACMPLP1 Speed Selection"]
309    #[inline(always)]
310    pub fn spdmd(&self) -> SPDMD_R {
311        SPDMD_R::new(((self.bits >> 7) & 1) != 0)
312    }
313}
314impl W {
315    #[doc = "Bit 1 - ACMPLP0 VCOUT Pin Output Enable"]
316    #[inline(always)]
317    #[must_use]
318    pub fn c0oe(&mut self) -> C0OE_W<1> {
319        C0OE_W::new(self)
320    }
321    #[doc = "Bit 2 - ACMPLP0 VCOUT Output Polarity Selection"]
322    #[inline(always)]
323    #[must_use]
324    pub fn c0op(&mut self) -> C0OP_W<2> {
325        C0OP_W::new(self)
326    }
327    #[doc = "Bit 5 - ACMPLP1 VCOUT Pin Output Enable"]
328    #[inline(always)]
329    #[must_use]
330    pub fn c1oe(&mut self) -> C1OE_W<5> {
331        C1OE_W::new(self)
332    }
333    #[doc = "Bit 6 - ACMPLP1 VCOUT Output Polarity Selection"]
334    #[inline(always)]
335    #[must_use]
336    pub fn c1op(&mut self) -> C1OP_W<6> {
337        C1OP_W::new(self)
338    }
339    #[doc = "Bit 7 - ACMPLP0/ACMPLP1 Speed Selection"]
340    #[inline(always)]
341    #[must_use]
342    pub fn spdmd(&mut self) -> SPDMD_W<7> {
343        SPDMD_W::new(self)
344    }
345    #[doc = "Writes raw bits to the register."]
346    #[inline(always)]
347    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
348        self.0.bits(bits);
349        self
350    }
351}
352#[doc = "ACMPLP Output Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [compocr](index.html) module"]
353pub struct COMPOCR_SPEC;
354impl crate::RegisterSpec for COMPOCR_SPEC {
355    type Ux = u8;
356}
357#[doc = "`read()` method returns [compocr::R](R) reader structure"]
358impl crate::Readable for COMPOCR_SPEC {
359    type Reader = R;
360}
361#[doc = "`write(|w| ..)` method takes [compocr::W](W) writer structure"]
362impl crate::Writable for COMPOCR_SPEC {
363    type Writer = W;
364    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
365    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
366}
367#[doc = "`reset()` method sets COMPOCR to value 0"]
368impl crate::Resettable for COMPOCR_SPEC {
369    const RESET_VALUE: Self::Ux = 0;
370}
ra4w1/acmplp/compocr.rs

ra4w1/acmplp/
compocr.rs
