ra4m3/sci0/
simr3.rs

1#[doc = "Register `SIMR3` reader"]
2pub struct R(crate::R<SIMR3_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SIMR3_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SIMR3_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SIMR3_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SIMR3` writer"]
17pub struct W(crate::W<SIMR3_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SIMR3_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SIMR3_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SIMR3_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `IICSTAREQ` reader - Start Condition Generation"]
38pub type IICSTAREQ_R = crate::BitReader<IICSTAREQ_A>;
39#[doc = "Start Condition Generation\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum IICSTAREQ_A {
42    #[doc = "0: Do not generate start condition"]
43    _0 = 0,
44    #[doc = "1: Generate start condition"]
45    _1 = 1,
46}
47impl From<IICSTAREQ_A> for bool {
48    #[inline(always)]
49    fn from(variant: IICSTAREQ_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl IICSTAREQ_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> IICSTAREQ_A {
57        match self.bits {
58            false => IICSTAREQ_A::_0,
59            true => IICSTAREQ_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == IICSTAREQ_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == IICSTAREQ_A::_1
71    }
72}
73#[doc = "Field `IICSTAREQ` writer - Start Condition Generation"]
74pub type IICSTAREQ_W<'a, const O: u8> = crate::BitWriter<'a, u8, SIMR3_SPEC, IICSTAREQ_A, O>;
75impl<'a, const O: u8> IICSTAREQ_W<'a, O> {
76    #[doc = "Do not generate start condition"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(IICSTAREQ_A::_0)
80    }
81    #[doc = "Generate start condition"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(IICSTAREQ_A::_1)
85    }
86}
87#[doc = "Field `IICRSTAREQ` reader - Restart Condition Generation"]
88pub type IICRSTAREQ_R = crate::BitReader<IICRSTAREQ_A>;
89#[doc = "Restart Condition Generation\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum IICRSTAREQ_A {
92    #[doc = "0: Do not generate restart condition"]
93    _0 = 0,
94    #[doc = "1: Generate restart condition"]
95    _1 = 1,
96}
97impl From<IICRSTAREQ_A> for bool {
98    #[inline(always)]
99    fn from(variant: IICRSTAREQ_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl IICRSTAREQ_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> IICRSTAREQ_A {
107        match self.bits {
108            false => IICRSTAREQ_A::_0,
109            true => IICRSTAREQ_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == IICRSTAREQ_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == IICRSTAREQ_A::_1
121    }
122}
123#[doc = "Field `IICRSTAREQ` writer - Restart Condition Generation"]
124pub type IICRSTAREQ_W<'a, const O: u8> = crate::BitWriter<'a, u8, SIMR3_SPEC, IICRSTAREQ_A, O>;
125impl<'a, const O: u8> IICRSTAREQ_W<'a, O> {
126    #[doc = "Do not generate restart condition"]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(IICRSTAREQ_A::_0)
130    }
131    #[doc = "Generate restart condition"]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(IICRSTAREQ_A::_1)
135    }
136}
137#[doc = "Field `IICSTPREQ` reader - Stop Condition Generation"]
138pub type IICSTPREQ_R = crate::BitReader<IICSTPREQ_A>;
139#[doc = "Stop Condition Generation\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum IICSTPREQ_A {
142    #[doc = "0: Do not generate stop condition"]
143    _0 = 0,
144    #[doc = "1: Generate stop condition"]
145    _1 = 1,
146}
147impl From<IICSTPREQ_A> for bool {
148    #[inline(always)]
149    fn from(variant: IICSTPREQ_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl IICSTPREQ_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> IICSTPREQ_A {
157        match self.bits {
158            false => IICSTPREQ_A::_0,
159            true => IICSTPREQ_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == IICSTPREQ_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == IICSTPREQ_A::_1
171    }
172}
173#[doc = "Field `IICSTPREQ` writer - Stop Condition Generation"]
174pub type IICSTPREQ_W<'a, const O: u8> = crate::BitWriter<'a, u8, SIMR3_SPEC, IICSTPREQ_A, O>;
175impl<'a, const O: u8> IICSTPREQ_W<'a, O> {
176    #[doc = "Do not generate stop condition"]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(IICSTPREQ_A::_0)
180    }
181    #[doc = "Generate stop condition"]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(IICSTPREQ_A::_1)
185    }
186}
187#[doc = "Field `IICSTIF` reader - Issuing of Start, Restart, or Stop Condition Completed Flag"]
188pub type IICSTIF_R = crate::BitReader<IICSTIF_A>;
189#[doc = "Issuing of Start, Restart, or Stop Condition Completed Flag\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum IICSTIF_A {
192    #[doc = "0: No requests are being made for generating conditions, or a condition is being generated"]
193    _0 = 0,
194    #[doc = "1: Generation of start, restart, or stop condition is complete. When 0 is written to IICSTIF, it is set to 0"]
195    _1 = 1,
196}
197impl From<IICSTIF_A> for bool {
198    #[inline(always)]
199    fn from(variant: IICSTIF_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl IICSTIF_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> IICSTIF_A {
207        match self.bits {
208            false => IICSTIF_A::_0,
209            true => IICSTIF_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == IICSTIF_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == IICSTIF_A::_1
221    }
222}
223#[doc = "Field `IICSTIF` writer - Issuing of Start, Restart, or Stop Condition Completed Flag"]
224pub type IICSTIF_W<'a, const O: u8> = crate::BitWriter<'a, u8, SIMR3_SPEC, IICSTIF_A, O>;
225impl<'a, const O: u8> IICSTIF_W<'a, O> {
226    #[doc = "No requests are being made for generating conditions, or a condition is being generated"]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(IICSTIF_A::_0)
230    }
231    #[doc = "Generation of start, restart, or stop condition is complete. When 0 is written to IICSTIF, it is set to 0"]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(IICSTIF_A::_1)
235    }
236}
237#[doc = "Field `IICSDAS` reader - SDAn Output Select"]
238pub type IICSDAS_R = crate::FieldReader<u8, IICSDAS_A>;
239#[doc = "SDAn Output Select\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241#[repr(u8)]
242pub enum IICSDAS_A {
243    #[doc = "0: Output serial data"]
244    _00 = 0,
245    #[doc = "1: Generate start, restart, or stop condition"]
246    _01 = 1,
247    #[doc = "2: Output low on SDAn pin"]
248    _10 = 2,
249    #[doc = "3: Drive SDAn pin to high-impedance state"]
250    _11 = 3,
251}
252impl From<IICSDAS_A> for u8 {
253    #[inline(always)]
254    fn from(variant: IICSDAS_A) -> Self {
255        variant as _
256    }
257}
258impl IICSDAS_R {
259    #[doc = "Get enumerated values variant"]
260    #[inline(always)]
261    pub fn variant(&self) -> IICSDAS_A {
262        match self.bits {
263            0 => IICSDAS_A::_00,
264            1 => IICSDAS_A::_01,
265            2 => IICSDAS_A::_10,
266            3 => IICSDAS_A::_11,
267            _ => unreachable!(),
268        }
269    }
270    #[doc = "Checks if the value of the field is `_00`"]
271    #[inline(always)]
272    pub fn is_00(&self) -> bool {
273        *self == IICSDAS_A::_00
274    }
275    #[doc = "Checks if the value of the field is `_01`"]
276    #[inline(always)]
277    pub fn is_01(&self) -> bool {
278        *self == IICSDAS_A::_01
279    }
280    #[doc = "Checks if the value of the field is `_10`"]
281    #[inline(always)]
282    pub fn is_10(&self) -> bool {
283        *self == IICSDAS_A::_10
284    }
285    #[doc = "Checks if the value of the field is `_11`"]
286    #[inline(always)]
287    pub fn is_11(&self) -> bool {
288        *self == IICSDAS_A::_11
289    }
290}
291#[doc = "Field `IICSDAS` writer - SDAn Output Select"]
292pub type IICSDAS_W<'a, const O: u8> =
293    crate::FieldWriterSafe<'a, u8, SIMR3_SPEC, u8, IICSDAS_A, 2, O>;
294impl<'a, const O: u8> IICSDAS_W<'a, O> {
295    #[doc = "Output serial data"]
296    #[inline(always)]
297    pub fn _00(self) -> &'a mut W {
298        self.variant(IICSDAS_A::_00)
299    }
300    #[doc = "Generate start, restart, or stop condition"]
301    #[inline(always)]
302    pub fn _01(self) -> &'a mut W {
303        self.variant(IICSDAS_A::_01)
304    }
305    #[doc = "Output low on SDAn pin"]
306    #[inline(always)]
307    pub fn _10(self) -> &'a mut W {
308        self.variant(IICSDAS_A::_10)
309    }
310    #[doc = "Drive SDAn pin to high-impedance state"]
311    #[inline(always)]
312    pub fn _11(self) -> &'a mut W {
313        self.variant(IICSDAS_A::_11)
314    }
315}
316#[doc = "Field `IICSCLS` reader - SCLn Output Select"]
317pub type IICSCLS_R = crate::FieldReader<u8, IICSCLS_A>;
318#[doc = "SCLn Output Select\n\nValue on reset: 0"]
319#[derive(Clone, Copy, Debug, PartialEq, Eq)]
320#[repr(u8)]
321pub enum IICSCLS_A {
322    #[doc = "0: Output serial clock"]
323    _00 = 0,
324    #[doc = "1: Generate start, restart, or stop condition"]
325    _01 = 1,
326    #[doc = "2: Output low on SCLn pin"]
327    _10 = 2,
328    #[doc = "3: Drive SCLn pin to high-impedance state"]
329    _11 = 3,
330}
331impl From<IICSCLS_A> for u8 {
332    #[inline(always)]
333    fn from(variant: IICSCLS_A) -> Self {
334        variant as _
335    }
336}
337impl IICSCLS_R {
338    #[doc = "Get enumerated values variant"]
339    #[inline(always)]
340    pub fn variant(&self) -> IICSCLS_A {
341        match self.bits {
342            0 => IICSCLS_A::_00,
343            1 => IICSCLS_A::_01,
344            2 => IICSCLS_A::_10,
345            3 => IICSCLS_A::_11,
346            _ => unreachable!(),
347        }
348    }
349    #[doc = "Checks if the value of the field is `_00`"]
350    #[inline(always)]
351    pub fn is_00(&self) -> bool {
352        *self == IICSCLS_A::_00
353    }
354    #[doc = "Checks if the value of the field is `_01`"]
355    #[inline(always)]
356    pub fn is_01(&self) -> bool {
357        *self == IICSCLS_A::_01
358    }
359    #[doc = "Checks if the value of the field is `_10`"]
360    #[inline(always)]
361    pub fn is_10(&self) -> bool {
362        *self == IICSCLS_A::_10
363    }
364    #[doc = "Checks if the value of the field is `_11`"]
365    #[inline(always)]
366    pub fn is_11(&self) -> bool {
367        *self == IICSCLS_A::_11
368    }
369}
370#[doc = "Field `IICSCLS` writer - SCLn Output Select"]
371pub type IICSCLS_W<'a, const O: u8> =
372    crate::FieldWriterSafe<'a, u8, SIMR3_SPEC, u8, IICSCLS_A, 2, O>;
373impl<'a, const O: u8> IICSCLS_W<'a, O> {
374    #[doc = "Output serial clock"]
375    #[inline(always)]
376    pub fn _00(self) -> &'a mut W {
377        self.variant(IICSCLS_A::_00)
378    }
379    #[doc = "Generate start, restart, or stop condition"]
380    #[inline(always)]
381    pub fn _01(self) -> &'a mut W {
382        self.variant(IICSCLS_A::_01)
383    }
384    #[doc = "Output low on SCLn pin"]
385    #[inline(always)]
386    pub fn _10(self) -> &'a mut W {
387        self.variant(IICSCLS_A::_10)
388    }
389    #[doc = "Drive SCLn pin to high-impedance state"]
390    #[inline(always)]
391    pub fn _11(self) -> &'a mut W {
392        self.variant(IICSCLS_A::_11)
393    }
394}
395impl R {
396    #[doc = "Bit 0 - Start Condition Generation"]
397    #[inline(always)]
398    pub fn iicstareq(&self) -> IICSTAREQ_R {
399        IICSTAREQ_R::new((self.bits & 1) != 0)
400    }
401    #[doc = "Bit 1 - Restart Condition Generation"]
402    #[inline(always)]
403    pub fn iicrstareq(&self) -> IICRSTAREQ_R {
404        IICRSTAREQ_R::new(((self.bits >> 1) & 1) != 0)
405    }
406    #[doc = "Bit 2 - Stop Condition Generation"]
407    #[inline(always)]
408    pub fn iicstpreq(&self) -> IICSTPREQ_R {
409        IICSTPREQ_R::new(((self.bits >> 2) & 1) != 0)
410    }
411    #[doc = "Bit 3 - Issuing of Start, Restart, or Stop Condition Completed Flag"]
412    #[inline(always)]
413    pub fn iicstif(&self) -> IICSTIF_R {
414        IICSTIF_R::new(((self.bits >> 3) & 1) != 0)
415    }
416    #[doc = "Bits 4:5 - SDAn Output Select"]
417    #[inline(always)]
418    pub fn iicsdas(&self) -> IICSDAS_R {
419        IICSDAS_R::new((self.bits >> 4) & 3)
420    }
421    #[doc = "Bits 6:7 - SCLn Output Select"]
422    #[inline(always)]
423    pub fn iicscls(&self) -> IICSCLS_R {
424        IICSCLS_R::new((self.bits >> 6) & 3)
425    }
426}
427impl W {
428    #[doc = "Bit 0 - Start Condition Generation"]
429    #[inline(always)]
430    #[must_use]
431    pub fn iicstareq(&mut self) -> IICSTAREQ_W<0> {
432        IICSTAREQ_W::new(self)
433    }
434    #[doc = "Bit 1 - Restart Condition Generation"]
435    #[inline(always)]
436    #[must_use]
437    pub fn iicrstareq(&mut self) -> IICRSTAREQ_W<1> {
438        IICRSTAREQ_W::new(self)
439    }
440    #[doc = "Bit 2 - Stop Condition Generation"]
441    #[inline(always)]
442    #[must_use]
443    pub fn iicstpreq(&mut self) -> IICSTPREQ_W<2> {
444        IICSTPREQ_W::new(self)
445    }
446    #[doc = "Bit 3 - Issuing of Start, Restart, or Stop Condition Completed Flag"]
447    #[inline(always)]
448    #[must_use]
449    pub fn iicstif(&mut self) -> IICSTIF_W<3> {
450        IICSTIF_W::new(self)
451    }
452    #[doc = "Bits 4:5 - SDAn Output Select"]
453    #[inline(always)]
454    #[must_use]
455    pub fn iicsdas(&mut self) -> IICSDAS_W<4> {
456        IICSDAS_W::new(self)
457    }
458    #[doc = "Bits 6:7 - SCLn Output Select"]
459    #[inline(always)]
460    #[must_use]
461    pub fn iicscls(&mut self) -> IICSCLS_W<6> {
462        IICSCLS_W::new(self)
463    }
464    #[doc = "Writes raw bits to the register."]
465    #[inline(always)]
466    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
467        self.0.bits(bits);
468        self
469    }
470}
471#[doc = "IIC Mode Register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [simr3](index.html) module"]
472pub struct SIMR3_SPEC;
473impl crate::RegisterSpec for SIMR3_SPEC {
474    type Ux = u8;
475}
476#[doc = "`read()` method returns [simr3::R](R) reader structure"]
477impl crate::Readable for SIMR3_SPEC {
478    type Reader = R;
479}
480#[doc = "`write(|w| ..)` method takes [simr3::W](W) writer structure"]
481impl crate::Writable for SIMR3_SPEC {
482    type Writer = W;
483    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
484    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
485}
486#[doc = "`reset()` method sets SIMR3 to value 0"]
487impl crate::Resettable for SIMR3_SPEC {
488    const RESET_VALUE: Self::Ux = 0;
489}
ra4m3/sci0/simr3.rs

ra4m3/sci0/
simr3.rs
