1#[doc = "Register `DOCR` reader"]
2pub struct R(crate::R<DOCR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DOCR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DOCR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DOCR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DOCR` writer"]
17pub struct W(crate::W<DOCR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DOCR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DOCR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DOCR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `OMS` reader - Operating Mode Select"]
38pub type OMS_R = crate::FieldReader<u8, OMS_A>;
39#[doc = "Operating Mode Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum OMS_A {
43 #[doc = "0: Data comparison mode"]
44 _00 = 0,
45 #[doc = "1: Data addition mode"]
46 _01 = 1,
47 #[doc = "2: Data subtraction mode"]
48 _10 = 2,
49 #[doc = "3: Setting prohibited"]
50 _11 = 3,
51}
52impl From<OMS_A> for u8 {
53 #[inline(always)]
54 fn from(variant: OMS_A) -> Self {
55 variant as _
56 }
57}
58impl OMS_R {
59 #[doc = "Get enumerated values variant"]
60 #[inline(always)]
61 pub fn variant(&self) -> OMS_A {
62 match self.bits {
63 0 => OMS_A::_00,
64 1 => OMS_A::_01,
65 2 => OMS_A::_10,
66 3 => OMS_A::_11,
67 _ => unreachable!(),
68 }
69 }
70 #[doc = "Checks if the value of the field is `_00`"]
71 #[inline(always)]
72 pub fn is_00(&self) -> bool {
73 *self == OMS_A::_00
74 }
75 #[doc = "Checks if the value of the field is `_01`"]
76 #[inline(always)]
77 pub fn is_01(&self) -> bool {
78 *self == OMS_A::_01
79 }
80 #[doc = "Checks if the value of the field is `_10`"]
81 #[inline(always)]
82 pub fn is_10(&self) -> bool {
83 *self == OMS_A::_10
84 }
85 #[doc = "Checks if the value of the field is `_11`"]
86 #[inline(always)]
87 pub fn is_11(&self) -> bool {
88 *self == OMS_A::_11
89 }
90}
91#[doc = "Field `OMS` writer - Operating Mode Select"]
92pub type OMS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, DOCR_SPEC, u8, OMS_A, 2, O>;
93impl<'a, const O: u8> OMS_W<'a, O> {
94 #[doc = "Data comparison mode"]
95 #[inline(always)]
96 pub fn _00(self) -> &'a mut W {
97 self.variant(OMS_A::_00)
98 }
99 #[doc = "Data addition mode"]
100 #[inline(always)]
101 pub fn _01(self) -> &'a mut W {
102 self.variant(OMS_A::_01)
103 }
104 #[doc = "Data subtraction mode"]
105 #[inline(always)]
106 pub fn _10(self) -> &'a mut W {
107 self.variant(OMS_A::_10)
108 }
109 #[doc = "Setting prohibited"]
110 #[inline(always)]
111 pub fn _11(self) -> &'a mut W {
112 self.variant(OMS_A::_11)
113 }
114}
115#[doc = "Field `DCSEL` reader - Detection Condition Select"]
116pub type DCSEL_R = crate::BitReader<DCSEL_A>;
117#[doc = "Detection Condition Select\n\nValue on reset: 0"]
118#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119pub enum DCSEL_A {
120 #[doc = "0: Set DOPCF flag when data mismatch is detected"]
121 _0 = 0,
122 #[doc = "1: Set DOPCF flag when data match is detected"]
123 _1 = 1,
124}
125impl From<DCSEL_A> for bool {
126 #[inline(always)]
127 fn from(variant: DCSEL_A) -> Self {
128 variant as u8 != 0
129 }
130}
131impl DCSEL_R {
132 #[doc = "Get enumerated values variant"]
133 #[inline(always)]
134 pub fn variant(&self) -> DCSEL_A {
135 match self.bits {
136 false => DCSEL_A::_0,
137 true => DCSEL_A::_1,
138 }
139 }
140 #[doc = "Checks if the value of the field is `_0`"]
141 #[inline(always)]
142 pub fn is_0(&self) -> bool {
143 *self == DCSEL_A::_0
144 }
145 #[doc = "Checks if the value of the field is `_1`"]
146 #[inline(always)]
147 pub fn is_1(&self) -> bool {
148 *self == DCSEL_A::_1
149 }
150}
151#[doc = "Field `DCSEL` writer - Detection Condition Select"]
152pub type DCSEL_W<'a, const O: u8> = crate::BitWriter<'a, u8, DOCR_SPEC, DCSEL_A, O>;
153impl<'a, const O: u8> DCSEL_W<'a, O> {
154 #[doc = "Set DOPCF flag when data mismatch is detected"]
155 #[inline(always)]
156 pub fn _0(self) -> &'a mut W {
157 self.variant(DCSEL_A::_0)
158 }
159 #[doc = "Set DOPCF flag when data match is detected"]
160 #[inline(always)]
161 pub fn _1(self) -> &'a mut W {
162 self.variant(DCSEL_A::_1)
163 }
164}
165#[doc = "Field `DOPCF` reader - DOC Flag"]
166pub type DOPCF_R = crate::BitReader<bool>;
167#[doc = "Field `DOPCFCL` reader - DOPCF Clear"]
168pub type DOPCFCL_R = crate::BitReader<DOPCFCL_A>;
169#[doc = "DOPCF Clear\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq, Eq)]
171pub enum DOPCFCL_A {
172 #[doc = "0: Retain DOPCF flag state"]
173 _0 = 0,
174 #[doc = "1: Clear DOPCF flag"]
175 _1 = 1,
176}
177impl From<DOPCFCL_A> for bool {
178 #[inline(always)]
179 fn from(variant: DOPCFCL_A) -> Self {
180 variant as u8 != 0
181 }
182}
183impl DOPCFCL_R {
184 #[doc = "Get enumerated values variant"]
185 #[inline(always)]
186 pub fn variant(&self) -> DOPCFCL_A {
187 match self.bits {
188 false => DOPCFCL_A::_0,
189 true => DOPCFCL_A::_1,
190 }
191 }
192 #[doc = "Checks if the value of the field is `_0`"]
193 #[inline(always)]
194 pub fn is_0(&self) -> bool {
195 *self == DOPCFCL_A::_0
196 }
197 #[doc = "Checks if the value of the field is `_1`"]
198 #[inline(always)]
199 pub fn is_1(&self) -> bool {
200 *self == DOPCFCL_A::_1
201 }
202}
203#[doc = "Field `DOPCFCL` writer - DOPCF Clear"]
204pub type DOPCFCL_W<'a, const O: u8> = crate::BitWriter<'a, u8, DOCR_SPEC, DOPCFCL_A, O>;
205impl<'a, const O: u8> DOPCFCL_W<'a, O> {
206 #[doc = "Retain DOPCF flag state"]
207 #[inline(always)]
208 pub fn _0(self) -> &'a mut W {
209 self.variant(DOPCFCL_A::_0)
210 }
211 #[doc = "Clear DOPCF flag"]
212 #[inline(always)]
213 pub fn _1(self) -> &'a mut W {
214 self.variant(DOPCFCL_A::_1)
215 }
216}
217impl R {
218 #[doc = "Bits 0:1 - Operating Mode Select"]
219 #[inline(always)]
220 pub fn oms(&self) -> OMS_R {
221 OMS_R::new(self.bits & 3)
222 }
223 #[doc = "Bit 2 - Detection Condition Select"]
224 #[inline(always)]
225 pub fn dcsel(&self) -> DCSEL_R {
226 DCSEL_R::new(((self.bits >> 2) & 1) != 0)
227 }
228 #[doc = "Bit 5 - DOC Flag"]
229 #[inline(always)]
230 pub fn dopcf(&self) -> DOPCF_R {
231 DOPCF_R::new(((self.bits >> 5) & 1) != 0)
232 }
233 #[doc = "Bit 6 - DOPCF Clear"]
234 #[inline(always)]
235 pub fn dopcfcl(&self) -> DOPCFCL_R {
236 DOPCFCL_R::new(((self.bits >> 6) & 1) != 0)
237 }
238}
239impl W {
240 #[doc = "Bits 0:1 - Operating Mode Select"]
241 #[inline(always)]
242 #[must_use]
243 pub fn oms(&mut self) -> OMS_W<0> {
244 OMS_W::new(self)
245 }
246 #[doc = "Bit 2 - Detection Condition Select"]
247 #[inline(always)]
248 #[must_use]
249 pub fn dcsel(&mut self) -> DCSEL_W<2> {
250 DCSEL_W::new(self)
251 }
252 #[doc = "Bit 6 - DOPCF Clear"]
253 #[inline(always)]
254 #[must_use]
255 pub fn dopcfcl(&mut self) -> DOPCFCL_W<6> {
256 DOPCFCL_W::new(self)
257 }
258 #[doc = "Writes raw bits to the register."]
259 #[inline(always)]
260 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
261 self.0.bits(bits);
262 self
263 }
264}
265#[doc = "DOC Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [docr](index.html) module"]
266pub struct DOCR_SPEC;
267impl crate::RegisterSpec for DOCR_SPEC {
268 type Ux = u8;
269}
270#[doc = "`read()` method returns [docr::R](R) reader structure"]
271impl crate::Readable for DOCR_SPEC {
272 type Reader = R;
273}
274#[doc = "`write(|w| ..)` method takes [docr::W](W) writer structure"]
275impl crate::Writable for DOCR_SPEC {
276 type Writer = W;
277 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
278 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
279}
280#[doc = "`reset()` method sets DOCR to value 0"]
281impl crate::Resettable for DOCR_SPEC {
282 const RESET_VALUE: Self::Ux = 0;
283}