1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 _reserved_0_smr: [u8; 0x01],
5 #[doc = "0x01 - Bit Rate Register"]
6 pub brr: BRR,
7 _reserved_2_scr: [u8; 0x01],
8 #[doc = "0x03 - Transmit Data Register"]
9 pub tdr: TDR,
10 _reserved_4_ssr: [u8; 0x01],
11 #[doc = "0x05 - Receive Data Register"]
12 pub rdr: RDR,
13 #[doc = "0x06 - Smart Card Mode Register"]
14 pub scmr: SCMR,
15 #[doc = "0x07 - Serial Extended Mode Register"]
16 pub semr: SEMR,
17 #[doc = "0x08 - Noise Filter Setting Register"]
18 pub snfr: SNFR,
19 #[doc = "0x09 - IIC Mode Register 1"]
20 pub simr1: SIMR1,
21 #[doc = "0x0a - IIC Mode Register 2"]
22 pub simr2: SIMR2,
23 #[doc = "0x0b - IIC Mode Register 3"]
24 pub simr3: SIMR3,
25 #[doc = "0x0c - IIC Status Register"]
26 pub sisr: SISR,
27 #[doc = "0x0d - SPI Mode Register"]
28 pub spmr: SPMR,
29 #[doc = "0x0e - Transmit Data Register for Non-Manchester mode (MMR.MANEN = 0)"]
30 pub tdrhl: TDRHL,
31 #[doc = "0x10 - Receive Data Register for Non-Manchester mode (MMR.MANEN = 0)"]
32 pub rdrhl: RDRHL,
33 #[doc = "0x12 - Modulation Duty Register"]
34 pub mddr: MDDR,
35 _reserved17: [u8; 0x0d],
36 #[doc = "0x20 - Extended Serial Module Enable Register"]
37 pub esmer: ESMER,
38 #[doc = "0x21 - Control Register 0"]
39 pub cr0: CR0,
40 #[doc = "0x22 - Control Register 1"]
41 pub cr1: CR1,
42 #[doc = "0x23 - Control Register 2"]
43 pub cr2: CR2,
44 #[doc = "0x24 - Control Register 3"]
45 pub cr3: CR3,
46 #[doc = "0x25 - Port Control Register"]
47 pub pcr: PCR,
48 #[doc = "0x26 - Interrupt Control Register"]
49 pub icr: ICR,
50 #[doc = "0x27 - Status Register"]
51 pub str: STR,
52 #[doc = "0x28 - Status Clear Register"]
53 pub stcr: STCR,
54 #[doc = "0x29 - Control Field 0 Data Register"]
55 pub cf0dr: CF0DR,
56 #[doc = "0x2a - Control Field 0 Compare Enable Register"]
57 pub cf0cr: CF0CR,
58 #[doc = "0x2b - Control Field 0 Receive Data Register"]
59 pub cf0rr: CF0RR,
60 #[doc = "0x2c - Primary Control Field 1 Data Register"]
61 pub pcf1dr: PCF1DR,
62 #[doc = "0x2d - Secondary Control Field 1 Data Register"]
63 pub scf1dr: SCF1DR,
64 #[doc = "0x2e - Control Field 1 Compare Enable Register"]
65 pub cf1cr: CF1CR,
66 #[doc = "0x2f - Control Field 1 Receive Data Register"]
67 pub cf1rr: CF1RR,
68 #[doc = "0x30 - Timer Control Register"]
69 pub tcr: TCR,
70 #[doc = "0x31 - Timer Mode Register"]
71 pub tmr: TMR,
72 #[doc = "0x32 - Timer Prescaler Register"]
73 pub tpre: TPRE,
74 #[doc = "0x33 - Timer Count Register"]
75 pub tcnt: TCNT,
76}
77impl RegisterBlock {
78 #[doc = "0x00 - Serial Mode Register for Smart Card Interface Mode (SCMR.SMIF = 1)"]
79 #[inline(always)]
80 pub const fn smr_smci(&self) -> &SMR_SMCI {
81 unsafe { &*(self as *const Self).cast::<u8>().add(0usize).cast() }
82 }
83 #[doc = "0x00 - Serial Mode Register for Non-Smart Card Interface Mode (SCMR.SMIF = 0)"]
84 #[inline(always)]
85 pub const fn smr(&self) -> &SMR {
86 unsafe { &*(self as *const Self).cast::<u8>().add(0usize).cast() }
87 }
88 #[doc = "0x02 - Serial Control Register for Smart Card Interface Mode (SCMR.SMIF = 1)"]
89 #[inline(always)]
90 pub const fn scr_smci(&self) -> &SCR_SMCI {
91 unsafe { &*(self as *const Self).cast::<u8>().add(2usize).cast() }
92 }
93 #[doc = "0x02 - Serial Control Register for Non-Smart Card Interface Mode (SCMR.SMIF = 0)"]
94 #[inline(always)]
95 pub const fn scr(&self) -> &SCR {
96 unsafe { &*(self as *const Self).cast::<u8>().add(2usize).cast() }
97 }
98 #[doc = "0x04 - Serial Status Register for Smart Card Interface Mode (SCMR.SMIF = 1, and MMR.MANEN = 0)"]
99 #[inline(always)]
100 pub const fn ssr_smci(&self) -> &SSR_SMCI {
101 unsafe { &*(self as *const Self).cast::<u8>().add(4usize).cast() }
102 }
103 #[doc = "0x04 - Serial Status Register for Non-Smart Card Interface and Non-FIFO Mode (SCMR.SMIF = 0, FCR.FM = 0, and MMR.MANEN = 0)"]
104 #[inline(always)]
105 pub const fn ssr(&self) -> &SSR {
106 unsafe { &*(self as *const Self).cast::<u8>().add(4usize).cast() }
107 }
108}
109#[doc = "SMR (rw) register accessor: an alias for `Reg<SMR_SPEC>`"]
110pub type SMR = crate::Reg<smr::SMR_SPEC>;
111#[doc = "Serial Mode Register for Non-Smart Card Interface Mode (SCMR.SMIF = 0)"]
112pub mod smr;
113#[doc = "SMR_SMCI (rw) register accessor: an alias for `Reg<SMR_SMCI_SPEC>`"]
114pub type SMR_SMCI = crate::Reg<smr_smci::SMR_SMCI_SPEC>;
115#[doc = "Serial Mode Register for Smart Card Interface Mode (SCMR.SMIF = 1)"]
116pub mod smr_smci;
117#[doc = "BRR (rw) register accessor: an alias for `Reg<BRR_SPEC>`"]
118pub type BRR = crate::Reg<brr::BRR_SPEC>;
119#[doc = "Bit Rate Register"]
120pub mod brr;
121#[doc = "SCR (rw) register accessor: an alias for `Reg<SCR_SPEC>`"]
122pub type SCR = crate::Reg<scr::SCR_SPEC>;
123#[doc = "Serial Control Register for Non-Smart Card Interface Mode (SCMR.SMIF = 0)"]
124pub mod scr;
125#[doc = "SCR_SMCI (rw) register accessor: an alias for `Reg<SCR_SMCI_SPEC>`"]
126pub type SCR_SMCI = crate::Reg<scr_smci::SCR_SMCI_SPEC>;
127#[doc = "Serial Control Register for Smart Card Interface Mode (SCMR.SMIF = 1)"]
128pub mod scr_smci;
129#[doc = "TDR (rw) register accessor: an alias for `Reg<TDR_SPEC>`"]
130pub type TDR = crate::Reg<tdr::TDR_SPEC>;
131#[doc = "Transmit Data Register"]
132pub mod tdr;
133#[doc = "SSR (rw) register accessor: an alias for `Reg<SSR_SPEC>`"]
134pub type SSR = crate::Reg<ssr::SSR_SPEC>;
135#[doc = "Serial Status Register for Non-Smart Card Interface and Non-FIFO Mode (SCMR.SMIF = 0, FCR.FM = 0, and MMR.MANEN = 0)"]
136pub mod ssr;
137#[doc = "SSR_SMCI (rw) register accessor: an alias for `Reg<SSR_SMCI_SPEC>`"]
138pub type SSR_SMCI = crate::Reg<ssr_smci::SSR_SMCI_SPEC>;
139#[doc = "Serial Status Register for Smart Card Interface Mode (SCMR.SMIF = 1, and MMR.MANEN = 0)"]
140pub mod ssr_smci;
141#[doc = "RDR (r) register accessor: an alias for `Reg<RDR_SPEC>`"]
142pub type RDR = crate::Reg<rdr::RDR_SPEC>;
143#[doc = "Receive Data Register"]
144pub mod rdr;
145#[doc = "SCMR (rw) register accessor: an alias for `Reg<SCMR_SPEC>`"]
146pub type SCMR = crate::Reg<scmr::SCMR_SPEC>;
147#[doc = "Smart Card Mode Register"]
148pub mod scmr;
149#[doc = "SEMR (rw) register accessor: an alias for `Reg<SEMR_SPEC>`"]
150pub type SEMR = crate::Reg<semr::SEMR_SPEC>;
151#[doc = "Serial Extended Mode Register"]
152pub mod semr;
153#[doc = "SNFR (rw) register accessor: an alias for `Reg<SNFR_SPEC>`"]
154pub type SNFR = crate::Reg<snfr::SNFR_SPEC>;
155#[doc = "Noise Filter Setting Register"]
156pub mod snfr;
157#[doc = "SIMR1 (rw) register accessor: an alias for `Reg<SIMR1_SPEC>`"]
158pub type SIMR1 = crate::Reg<simr1::SIMR1_SPEC>;
159#[doc = "IIC Mode Register 1"]
160pub mod simr1;
161#[doc = "SIMR2 (rw) register accessor: an alias for `Reg<SIMR2_SPEC>`"]
162pub type SIMR2 = crate::Reg<simr2::SIMR2_SPEC>;
163#[doc = "IIC Mode Register 2"]
164pub mod simr2;
165#[doc = "SIMR3 (rw) register accessor: an alias for `Reg<SIMR3_SPEC>`"]
166pub type SIMR3 = crate::Reg<simr3::SIMR3_SPEC>;
167#[doc = "IIC Mode Register 3"]
168pub mod simr3;
169#[doc = "SISR (r) register accessor: an alias for `Reg<SISR_SPEC>`"]
170pub type SISR = crate::Reg<sisr::SISR_SPEC>;
171#[doc = "IIC Status Register"]
172pub mod sisr;
173#[doc = "SPMR (rw) register accessor: an alias for `Reg<SPMR_SPEC>`"]
174pub type SPMR = crate::Reg<spmr::SPMR_SPEC>;
175#[doc = "SPI Mode Register"]
176pub mod spmr;
177#[doc = "TDRHL (rw) register accessor: an alias for `Reg<TDRHL_SPEC>`"]
178pub type TDRHL = crate::Reg<tdrhl::TDRHL_SPEC>;
179#[doc = "Transmit Data Register for Non-Manchester mode (MMR.MANEN = 0)"]
180pub mod tdrhl;
181#[doc = "RDRHL (r) register accessor: an alias for `Reg<RDRHL_SPEC>`"]
182pub type RDRHL = crate::Reg<rdrhl::RDRHL_SPEC>;
183#[doc = "Receive Data Register for Non-Manchester mode (MMR.MANEN = 0)"]
184pub mod rdrhl;
185#[doc = "MDDR (rw) register accessor: an alias for `Reg<MDDR_SPEC>`"]
186pub type MDDR = crate::Reg<mddr::MDDR_SPEC>;
187#[doc = "Modulation Duty Register"]
188pub mod mddr;
189#[doc = "ESMER (rw) register accessor: an alias for `Reg<ESMER_SPEC>`"]
190pub type ESMER = crate::Reg<esmer::ESMER_SPEC>;
191#[doc = "Extended Serial Module Enable Register"]
192pub mod esmer;
193#[doc = "CR0 (rw) register accessor: an alias for `Reg<CR0_SPEC>`"]
194pub type CR0 = crate::Reg<cr0::CR0_SPEC>;
195#[doc = "Control Register 0"]
196pub mod cr0;
197#[doc = "CR1 (rw) register accessor: an alias for `Reg<CR1_SPEC>`"]
198pub type CR1 = crate::Reg<cr1::CR1_SPEC>;
199#[doc = "Control Register 1"]
200pub mod cr1;
201#[doc = "CR2 (rw) register accessor: an alias for `Reg<CR2_SPEC>`"]
202pub type CR2 = crate::Reg<cr2::CR2_SPEC>;
203#[doc = "Control Register 2"]
204pub mod cr2;
205#[doc = "CR3 (rw) register accessor: an alias for `Reg<CR3_SPEC>`"]
206pub type CR3 = crate::Reg<cr3::CR3_SPEC>;
207#[doc = "Control Register 3"]
208pub mod cr3;
209#[doc = "PCR (rw) register accessor: an alias for `Reg<PCR_SPEC>`"]
210pub type PCR = crate::Reg<pcr::PCR_SPEC>;
211#[doc = "Port Control Register"]
212pub mod pcr;
213#[doc = "ICR (rw) register accessor: an alias for `Reg<ICR_SPEC>`"]
214pub type ICR = crate::Reg<icr::ICR_SPEC>;
215#[doc = "Interrupt Control Register"]
216pub mod icr;
217#[doc = "STR (r) register accessor: an alias for `Reg<STR_SPEC>`"]
218pub type STR = crate::Reg<str::STR_SPEC>;
219#[doc = "Status Register"]
220pub mod str;
221#[doc = "STCR (rw) register accessor: an alias for `Reg<STCR_SPEC>`"]
222pub type STCR = crate::Reg<stcr::STCR_SPEC>;
223#[doc = "Status Clear Register"]
224pub mod stcr;
225#[doc = "CF0DR (rw) register accessor: an alias for `Reg<CF0DR_SPEC>`"]
226pub type CF0DR = crate::Reg<cf0dr::CF0DR_SPEC>;
227#[doc = "Control Field 0 Data Register"]
228pub mod cf0dr;
229#[doc = "CF0CR (rw) register accessor: an alias for `Reg<CF0CR_SPEC>`"]
230pub type CF0CR = crate::Reg<cf0cr::CF0CR_SPEC>;
231#[doc = "Control Field 0 Compare Enable Register"]
232pub mod cf0cr;
233#[doc = "CF0RR (rw) register accessor: an alias for `Reg<CF0RR_SPEC>`"]
234pub type CF0RR = crate::Reg<cf0rr::CF0RR_SPEC>;
235#[doc = "Control Field 0 Receive Data Register"]
236pub mod cf0rr;
237#[doc = "PCF1DR (rw) register accessor: an alias for `Reg<PCF1DR_SPEC>`"]
238pub type PCF1DR = crate::Reg<pcf1dr::PCF1DR_SPEC>;
239#[doc = "Primary Control Field 1 Data Register"]
240pub mod pcf1dr;
241#[doc = "SCF1DR (rw) register accessor: an alias for `Reg<SCF1DR_SPEC>`"]
242pub type SCF1DR = crate::Reg<scf1dr::SCF1DR_SPEC>;
243#[doc = "Secondary Control Field 1 Data Register"]
244pub mod scf1dr;
245#[doc = "CF1CR (rw) register accessor: an alias for `Reg<CF1CR_SPEC>`"]
246pub type CF1CR = crate::Reg<cf1cr::CF1CR_SPEC>;
247#[doc = "Control Field 1 Compare Enable Register"]
248pub mod cf1cr;
249#[doc = "CF1RR (rw) register accessor: an alias for `Reg<CF1RR_SPEC>`"]
250pub type CF1RR = crate::Reg<cf1rr::CF1RR_SPEC>;
251#[doc = "Control Field 1 Receive Data Register"]
252pub mod cf1rr;
253#[doc = "TCR (rw) register accessor: an alias for `Reg<TCR_SPEC>`"]
254pub type TCR = crate::Reg<tcr::TCR_SPEC>;
255#[doc = "Timer Control Register"]
256pub mod tcr;
257#[doc = "TMR (rw) register accessor: an alias for `Reg<TMR_SPEC>`"]
258pub type TMR = crate::Reg<tmr::TMR_SPEC>;
259#[doc = "Timer Mode Register"]
260pub mod tmr;
261#[doc = "TPRE (rw) register accessor: an alias for `Reg<TPRE_SPEC>`"]
262pub type TPRE = crate::Reg<tpre::TPRE_SPEC>;
263#[doc = "Timer Prescaler Register"]
264pub mod tpre;
265#[doc = "TCNT (rw) register accessor: an alias for `Reg<TCNT_SPEC>`"]
266pub type TCNT = crate::Reg<tcnt::TCNT_SPEC>;
267#[doc = "Timer Count Register"]
268pub mod tcnt;