1#[doc = "Register `SSR_SMCI` reader"]
2pub struct R(crate::R<SSR_SMCI_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SSR_SMCI_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SSR_SMCI_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SSR_SMCI_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SSR_SMCI` writer"]
17pub struct W(crate::W<SSR_SMCI_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SSR_SMCI_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SSR_SMCI_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SSR_SMCI_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `MPBT` reader - Multi-Processor Bit Transfer"]
38pub type MPBT_R = crate::BitReader<bool>;
39#[doc = "Field `MPBT` writer - Multi-Processor Bit Transfer"]
40pub type MPBT_W<'a, const O: u8> = crate::BitWriter<'a, u8, SSR_SMCI_SPEC, bool, O>;
41#[doc = "Field `MPB` reader - Multi-Processor"]
42pub type MPB_R = crate::BitReader<bool>;
43#[doc = "Field `TEND` reader - Transmit End Flag"]
44pub type TEND_R = crate::BitReader<TEND_A>;
45#[doc = "Transmit End Flag\n\nValue on reset: 1"]
46#[derive(Clone, Copy, Debug, PartialEq, Eq)]
47pub enum TEND_A {
48 #[doc = "0: A character is being transmitted"]
49 _0 = 0,
50 #[doc = "1: Character transfer is complete"]
51 _1 = 1,
52}
53impl From<TEND_A> for bool {
54 #[inline(always)]
55 fn from(variant: TEND_A) -> Self {
56 variant as u8 != 0
57 }
58}
59impl TEND_R {
60 #[doc = "Get enumerated values variant"]
61 #[inline(always)]
62 pub fn variant(&self) -> TEND_A {
63 match self.bits {
64 false => TEND_A::_0,
65 true => TEND_A::_1,
66 }
67 }
68 #[doc = "Checks if the value of the field is `_0`"]
69 #[inline(always)]
70 pub fn is_0(&self) -> bool {
71 *self == TEND_A::_0
72 }
73 #[doc = "Checks if the value of the field is `_1`"]
74 #[inline(always)]
75 pub fn is_1(&self) -> bool {
76 *self == TEND_A::_1
77 }
78}
79#[doc = "Field `PER` reader - Parity Error Flag"]
80pub type PER_R = crate::BitReader<PER_A>;
81#[doc = "Parity Error Flag\n\nValue on reset: 0"]
82#[derive(Clone, Copy, Debug, PartialEq, Eq)]
83pub enum PER_A {
84 #[doc = "0: No parity error occurred"]
85 _0 = 0,
86 #[doc = "1: Parity error occurred"]
87 _1 = 1,
88}
89impl From<PER_A> for bool {
90 #[inline(always)]
91 fn from(variant: PER_A) -> Self {
92 variant as u8 != 0
93 }
94}
95impl PER_R {
96 #[doc = "Get enumerated values variant"]
97 #[inline(always)]
98 pub fn variant(&self) -> PER_A {
99 match self.bits {
100 false => PER_A::_0,
101 true => PER_A::_1,
102 }
103 }
104 #[doc = "Checks if the value of the field is `_0`"]
105 #[inline(always)]
106 pub fn is_0(&self) -> bool {
107 *self == PER_A::_0
108 }
109 #[doc = "Checks if the value of the field is `_1`"]
110 #[inline(always)]
111 pub fn is_1(&self) -> bool {
112 *self == PER_A::_1
113 }
114}
115#[doc = "Field `PER` writer - Parity Error Flag"]
116pub type PER_W<'a, const O: u8> = crate::BitWriter<'a, u8, SSR_SMCI_SPEC, PER_A, O>;
117impl<'a, const O: u8> PER_W<'a, O> {
118 #[doc = "No parity error occurred"]
119 #[inline(always)]
120 pub fn _0(self) -> &'a mut W {
121 self.variant(PER_A::_0)
122 }
123 #[doc = "Parity error occurred"]
124 #[inline(always)]
125 pub fn _1(self) -> &'a mut W {
126 self.variant(PER_A::_1)
127 }
128}
129#[doc = "Field `ERS` reader - Error Signal Status Flag"]
130pub type ERS_R = crate::BitReader<ERS_A>;
131#[doc = "Error Signal Status Flag\n\nValue on reset: 0"]
132#[derive(Clone, Copy, Debug, PartialEq, Eq)]
133pub enum ERS_A {
134 #[doc = "0: No low error signal response"]
135 _0 = 0,
136 #[doc = "1: Low error signal response occurred"]
137 _1 = 1,
138}
139impl From<ERS_A> for bool {
140 #[inline(always)]
141 fn from(variant: ERS_A) -> Self {
142 variant as u8 != 0
143 }
144}
145impl ERS_R {
146 #[doc = "Get enumerated values variant"]
147 #[inline(always)]
148 pub fn variant(&self) -> ERS_A {
149 match self.bits {
150 false => ERS_A::_0,
151 true => ERS_A::_1,
152 }
153 }
154 #[doc = "Checks if the value of the field is `_0`"]
155 #[inline(always)]
156 pub fn is_0(&self) -> bool {
157 *self == ERS_A::_0
158 }
159 #[doc = "Checks if the value of the field is `_1`"]
160 #[inline(always)]
161 pub fn is_1(&self) -> bool {
162 *self == ERS_A::_1
163 }
164}
165#[doc = "Field `ERS` writer - Error Signal Status Flag"]
166pub type ERS_W<'a, const O: u8> = crate::BitWriter<'a, u8, SSR_SMCI_SPEC, ERS_A, O>;
167impl<'a, const O: u8> ERS_W<'a, O> {
168 #[doc = "No low error signal response"]
169 #[inline(always)]
170 pub fn _0(self) -> &'a mut W {
171 self.variant(ERS_A::_0)
172 }
173 #[doc = "Low error signal response occurred"]
174 #[inline(always)]
175 pub fn _1(self) -> &'a mut W {
176 self.variant(ERS_A::_1)
177 }
178}
179#[doc = "Field `ORER` reader - Overrun Error Flag"]
180pub type ORER_R = crate::BitReader<ORER_A>;
181#[doc = "Overrun Error Flag\n\nValue on reset: 0"]
182#[derive(Clone, Copy, Debug, PartialEq, Eq)]
183pub enum ORER_A {
184 #[doc = "0: No overrun error occurred"]
185 _0 = 0,
186 #[doc = "1: Overrun error occurred"]
187 _1 = 1,
188}
189impl From<ORER_A> for bool {
190 #[inline(always)]
191 fn from(variant: ORER_A) -> Self {
192 variant as u8 != 0
193 }
194}
195impl ORER_R {
196 #[doc = "Get enumerated values variant"]
197 #[inline(always)]
198 pub fn variant(&self) -> ORER_A {
199 match self.bits {
200 false => ORER_A::_0,
201 true => ORER_A::_1,
202 }
203 }
204 #[doc = "Checks if the value of the field is `_0`"]
205 #[inline(always)]
206 pub fn is_0(&self) -> bool {
207 *self == ORER_A::_0
208 }
209 #[doc = "Checks if the value of the field is `_1`"]
210 #[inline(always)]
211 pub fn is_1(&self) -> bool {
212 *self == ORER_A::_1
213 }
214}
215#[doc = "Field `ORER` writer - Overrun Error Flag"]
216pub type ORER_W<'a, const O: u8> = crate::BitWriter<'a, u8, SSR_SMCI_SPEC, ORER_A, O>;
217impl<'a, const O: u8> ORER_W<'a, O> {
218 #[doc = "No overrun error occurred"]
219 #[inline(always)]
220 pub fn _0(self) -> &'a mut W {
221 self.variant(ORER_A::_0)
222 }
223 #[doc = "Overrun error occurred"]
224 #[inline(always)]
225 pub fn _1(self) -> &'a mut W {
226 self.variant(ORER_A::_1)
227 }
228}
229#[doc = "Field `RDRF` reader - Receive Data Full Flag"]
230pub type RDRF_R = crate::BitReader<RDRF_A>;
231#[doc = "Receive Data Full Flag\n\nValue on reset: 0"]
232#[derive(Clone, Copy, Debug, PartialEq, Eq)]
233pub enum RDRF_A {
234 #[doc = "0: No received data in RDR register"]
235 _0 = 0,
236 #[doc = "1: Received data in RDR register"]
237 _1 = 1,
238}
239impl From<RDRF_A> for bool {
240 #[inline(always)]
241 fn from(variant: RDRF_A) -> Self {
242 variant as u8 != 0
243 }
244}
245impl RDRF_R {
246 #[doc = "Get enumerated values variant"]
247 #[inline(always)]
248 pub fn variant(&self) -> RDRF_A {
249 match self.bits {
250 false => RDRF_A::_0,
251 true => RDRF_A::_1,
252 }
253 }
254 #[doc = "Checks if the value of the field is `_0`"]
255 #[inline(always)]
256 pub fn is_0(&self) -> bool {
257 *self == RDRF_A::_0
258 }
259 #[doc = "Checks if the value of the field is `_1`"]
260 #[inline(always)]
261 pub fn is_1(&self) -> bool {
262 *self == RDRF_A::_1
263 }
264}
265#[doc = "Field `RDRF` writer - Receive Data Full Flag"]
266pub type RDRF_W<'a, const O: u8> = crate::BitWriter<'a, u8, SSR_SMCI_SPEC, RDRF_A, O>;
267impl<'a, const O: u8> RDRF_W<'a, O> {
268 #[doc = "No received data in RDR register"]
269 #[inline(always)]
270 pub fn _0(self) -> &'a mut W {
271 self.variant(RDRF_A::_0)
272 }
273 #[doc = "Received data in RDR register"]
274 #[inline(always)]
275 pub fn _1(self) -> &'a mut W {
276 self.variant(RDRF_A::_1)
277 }
278}
279#[doc = "Field `TDRE` reader - Transmit Data Empty Flag"]
280pub type TDRE_R = crate::BitReader<TDRE_A>;
281#[doc = "Transmit Data Empty Flag\n\nValue on reset: 1"]
282#[derive(Clone, Copy, Debug, PartialEq, Eq)]
283pub enum TDRE_A {
284 #[doc = "0: Transmit data in TDR register"]
285 _0 = 0,
286 #[doc = "1: No transmit data in TDR register"]
287 _1 = 1,
288}
289impl From<TDRE_A> for bool {
290 #[inline(always)]
291 fn from(variant: TDRE_A) -> Self {
292 variant as u8 != 0
293 }
294}
295impl TDRE_R {
296 #[doc = "Get enumerated values variant"]
297 #[inline(always)]
298 pub fn variant(&self) -> TDRE_A {
299 match self.bits {
300 false => TDRE_A::_0,
301 true => TDRE_A::_1,
302 }
303 }
304 #[doc = "Checks if the value of the field is `_0`"]
305 #[inline(always)]
306 pub fn is_0(&self) -> bool {
307 *self == TDRE_A::_0
308 }
309 #[doc = "Checks if the value of the field is `_1`"]
310 #[inline(always)]
311 pub fn is_1(&self) -> bool {
312 *self == TDRE_A::_1
313 }
314}
315#[doc = "Field `TDRE` writer - Transmit Data Empty Flag"]
316pub type TDRE_W<'a, const O: u8> = crate::BitWriter<'a, u8, SSR_SMCI_SPEC, TDRE_A, O>;
317impl<'a, const O: u8> TDRE_W<'a, O> {
318 #[doc = "Transmit data in TDR register"]
319 #[inline(always)]
320 pub fn _0(self) -> &'a mut W {
321 self.variant(TDRE_A::_0)
322 }
323 #[doc = "No transmit data in TDR register"]
324 #[inline(always)]
325 pub fn _1(self) -> &'a mut W {
326 self.variant(TDRE_A::_1)
327 }
328}
329impl R {
330 #[doc = "Bit 0 - Multi-Processor Bit Transfer"]
331 #[inline(always)]
332 pub fn mpbt(&self) -> MPBT_R {
333 MPBT_R::new((self.bits & 1) != 0)
334 }
335 #[doc = "Bit 1 - Multi-Processor"]
336 #[inline(always)]
337 pub fn mpb(&self) -> MPB_R {
338 MPB_R::new(((self.bits >> 1) & 1) != 0)
339 }
340 #[doc = "Bit 2 - Transmit End Flag"]
341 #[inline(always)]
342 pub fn tend(&self) -> TEND_R {
343 TEND_R::new(((self.bits >> 2) & 1) != 0)
344 }
345 #[doc = "Bit 3 - Parity Error Flag"]
346 #[inline(always)]
347 pub fn per(&self) -> PER_R {
348 PER_R::new(((self.bits >> 3) & 1) != 0)
349 }
350 #[doc = "Bit 4 - Error Signal Status Flag"]
351 #[inline(always)]
352 pub fn ers(&self) -> ERS_R {
353 ERS_R::new(((self.bits >> 4) & 1) != 0)
354 }
355 #[doc = "Bit 5 - Overrun Error Flag"]
356 #[inline(always)]
357 pub fn orer(&self) -> ORER_R {
358 ORER_R::new(((self.bits >> 5) & 1) != 0)
359 }
360 #[doc = "Bit 6 - Receive Data Full Flag"]
361 #[inline(always)]
362 pub fn rdrf(&self) -> RDRF_R {
363 RDRF_R::new(((self.bits >> 6) & 1) != 0)
364 }
365 #[doc = "Bit 7 - Transmit Data Empty Flag"]
366 #[inline(always)]
367 pub fn tdre(&self) -> TDRE_R {
368 TDRE_R::new(((self.bits >> 7) & 1) != 0)
369 }
370}
371impl W {
372 #[doc = "Bit 0 - Multi-Processor Bit Transfer"]
373 #[inline(always)]
374 #[must_use]
375 pub fn mpbt(&mut self) -> MPBT_W<0> {
376 MPBT_W::new(self)
377 }
378 #[doc = "Bit 3 - Parity Error Flag"]
379 #[inline(always)]
380 #[must_use]
381 pub fn per(&mut self) -> PER_W<3> {
382 PER_W::new(self)
383 }
384 #[doc = "Bit 4 - Error Signal Status Flag"]
385 #[inline(always)]
386 #[must_use]
387 pub fn ers(&mut self) -> ERS_W<4> {
388 ERS_W::new(self)
389 }
390 #[doc = "Bit 5 - Overrun Error Flag"]
391 #[inline(always)]
392 #[must_use]
393 pub fn orer(&mut self) -> ORER_W<5> {
394 ORER_W::new(self)
395 }
396 #[doc = "Bit 6 - Receive Data Full Flag"]
397 #[inline(always)]
398 #[must_use]
399 pub fn rdrf(&mut self) -> RDRF_W<6> {
400 RDRF_W::new(self)
401 }
402 #[doc = "Bit 7 - Transmit Data Empty Flag"]
403 #[inline(always)]
404 #[must_use]
405 pub fn tdre(&mut self) -> TDRE_W<7> {
406 TDRE_W::new(self)
407 }
408 #[doc = "Writes raw bits to the register."]
409 #[inline(always)]
410 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
411 self.0.bits(bits);
412 self
413 }
414}
415#[doc = "Serial Status Register for Smart Card Interface Mode (SCMR.SMIF = 1, and MMR.MANEN = 0)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssr_smci](index.html) module"]
416pub struct SSR_SMCI_SPEC;
417impl crate::RegisterSpec for SSR_SMCI_SPEC {
418 type Ux = u8;
419}
420#[doc = "`read()` method returns [ssr_smci::R](R) reader structure"]
421impl crate::Readable for SSR_SMCI_SPEC {
422 type Reader = R;
423}
424#[doc = "`write(|w| ..)` method takes [ssr_smci::W](W) writer structure"]
425impl crate::Writable for SSR_SMCI_SPEC {
426 type Writer = W;
427 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
428 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
429}
430#[doc = "`reset()` method sets SSR_SMCI to value 0x84"]
431impl crate::Resettable for SSR_SMCI_SPEC {
432 const RESET_VALUE: Self::Ux = 0x84;
433}