ra4m3/dtc/
dtccr.rs

1#[doc = "Register `DTCCR` reader"]
2pub struct R(crate::R<DTCCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DTCCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DTCCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DTCCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DTCCR` writer"]
17pub struct W(crate::W<DTCCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DTCCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DTCCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DTCCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `RRS` reader - DTC Transfer Information Read Skip Enable"]
38pub type RRS_R = crate::BitReader<RRS_A>;
39#[doc = "DTC Transfer Information Read Skip Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum RRS_A {
42    #[doc = "0: Transfer information read is not skipped"]
43    _0 = 0,
44    #[doc = "1: Transfer information read is skipped when vector numbers match"]
45    _1 = 1,
46}
47impl From<RRS_A> for bool {
48    #[inline(always)]
49    fn from(variant: RRS_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl RRS_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> RRS_A {
57        match self.bits {
58            false => RRS_A::_0,
59            true => RRS_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == RRS_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == RRS_A::_1
71    }
72}
73#[doc = "Field `RRS` writer - DTC Transfer Information Read Skip Enable"]
74pub type RRS_W<'a, const O: u8> = crate::BitWriter<'a, u8, DTCCR_SPEC, RRS_A, O>;
75impl<'a, const O: u8> RRS_W<'a, O> {
76    #[doc = "Transfer information read is not skipped"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(RRS_A::_0)
80    }
81    #[doc = "Transfer information read is skipped when vector numbers match"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(RRS_A::_1)
85    }
86}
87impl R {
88    #[doc = "Bit 4 - DTC Transfer Information Read Skip Enable"]
89    #[inline(always)]
90    pub fn rrs(&self) -> RRS_R {
91        RRS_R::new(((self.bits >> 4) & 1) != 0)
92    }
93}
94impl W {
95    #[doc = "Bit 4 - DTC Transfer Information Read Skip Enable"]
96    #[inline(always)]
97    #[must_use]
98    pub fn rrs(&mut self) -> RRS_W<4> {
99        RRS_W::new(self)
100    }
101    #[doc = "Writes raw bits to the register."]
102    #[inline(always)]
103    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
104        self.0.bits(bits);
105        self
106    }
107}
108#[doc = "DTC Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtccr](index.html) module"]
109pub struct DTCCR_SPEC;
110impl crate::RegisterSpec for DTCCR_SPEC {
111    type Ux = u8;
112}
113#[doc = "`read()` method returns [dtccr::R](R) reader structure"]
114impl crate::Readable for DTCCR_SPEC {
115    type Reader = R;
116}
117#[doc = "`write(|w| ..)` method takes [dtccr::W](W) writer structure"]
118impl crate::Writable for DTCCR_SPEC {
119    type Writer = W;
120    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
122}
123#[doc = "`reset()` method sets DTCCR to value 0x08"]
124impl crate::Resettable for DTCCR_SPEC {
125    const RESET_VALUE: Self::Ux = 0x08;
126}
ra4m3/dtc/dtccr.rs

ra4m3/dtc/
dtccr.rs
