1#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Arm Cortex-M33 based Microcontroller RA4M3 group"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "adc120")]
31pub mod adc120;
32#[cfg(feature = "adc121")]
33pub mod adc121;
34#[cfg(feature = "agt0")]
35pub mod agt0;
36#[cfg(feature = "bus")]
37pub mod bus;
38#[cfg(feature = "cac")]
39pub mod cac;
40#[cfg(feature = "cache")]
41pub mod cache;
42#[cfg(feature = "can0")]
43pub mod can0;
44#[cfg(feature = "cpscu")]
45pub mod cpscu;
46#[cfg(feature = "crc")]
47pub mod crc;
48#[cfg(feature = "ctsu")]
49pub mod ctsu;
50#[cfg(feature = "dac12")]
51pub mod dac12;
52#[cfg(feature = "dbg")]
53pub mod dbg;
54#[cfg(feature = "dma")]
55pub mod dma;
56#[cfg(feature = "dmac0")]
57pub mod dmac0;
58#[cfg(feature = "doc")]
59pub mod doc;
60#[cfg(feature = "dtc")]
61pub mod dtc;
62#[cfg(feature = "elc")]
63pub mod elc;
64#[cfg(feature = "faci")]
65pub mod faci;
66#[cfg(feature = "fcache")]
67pub mod fcache;
68#[cfg(feature = "flad")]
69pub mod flad;
70#[cfg(feature = "gpt164")]
71pub mod gpt164;
72#[cfg(feature = "gpt320")]
73pub mod gpt320;
74#[cfg(feature = "gpt_ops")]
75pub mod gpt_ops;
76#[cfg(feature = "icu")]
77pub mod icu;
78#[cfg(feature = "iic0")]
79pub mod iic0;
80#[cfg(feature = "iic0wu")]
81pub mod iic0wu;
82#[cfg(feature = "iwdt")]
83pub mod iwdt;
84#[cfg(feature = "mstp")]
85pub mod mstp;
86#[cfg(feature = "pfs")]
87pub mod pfs;
88#[cfg(feature = "poeg")]
89pub mod poeg;
90#[cfg(feature = "port0")]
91pub mod port0;
92#[cfg(feature = "port1")]
93pub mod port1;
94#[cfg(feature = "pscu")]
95pub mod pscu;
96#[cfg(feature = "qspi")]
97pub mod qspi;
98#[cfg(feature = "rmpu")]
99pub mod rmpu;
100#[cfg(feature = "rtc")]
101pub mod rtc;
102#[cfg(feature = "sci0")]
103pub mod sci0;
104#[cfg(feature = "sci1")]
105pub mod sci1;
106#[cfg(feature = "sci3")]
107pub mod sci3;
108#[cfg(feature = "sdhi0")]
109pub mod sdhi0;
110#[cfg(feature = "spi0")]
111pub mod spi0;
112#[cfg(feature = "sram")]
113pub mod sram;
114#[cfg(feature = "ssie0")]
115pub mod ssie0;
116#[cfg(feature = "sysc")]
117pub mod sysc;
118#[cfg(feature = "tsd")]
119pub mod tsd;
120#[cfg(feature = "tsn")]
121pub mod tsn;
122#[cfg(feature = "tzf")]
123pub mod tzf;
124#[cfg(feature = "usbfs")]
125pub mod usbfs;
126#[cfg(feature = "wdt")]
127pub mod wdt;
128
129#[cfg(feature = "rmpu")]
130#[derive(Copy, Clone, Eq, PartialEq)]
131pub struct Rmpu {
132 ptr: *mut u8,
133}
134#[cfg(feature = "rmpu")]
135pub const RMPU: self::Rmpu = self::Rmpu {
136 ptr: 0x40000000u32 as _,
137};
138#[cfg(feature = "tzf")]
139#[derive(Copy, Clone, Eq, PartialEq)]
140pub struct Tzf {
141 ptr: *mut u8,
142}
143#[cfg(feature = "tzf")]
144pub const TZF: self::Tzf = self::Tzf {
145 ptr: 0x40000e00u32 as _,
146};
147#[cfg(feature = "sram")]
148#[derive(Copy, Clone, Eq, PartialEq)]
149pub struct Sram {
150 ptr: *mut u8,
151}
152#[cfg(feature = "sram")]
153pub const SRAM: self::Sram = self::Sram {
154 ptr: 0x40002000u32 as _,
155};
156#[cfg(feature = "bus")]
157#[derive(Copy, Clone, Eq, PartialEq)]
158pub struct Bus {
159 ptr: *mut u8,
160}
161#[cfg(feature = "bus")]
162pub const BUS: self::Bus = self::Bus {
163 ptr: 0x40003000u32 as _,
164};
165#[cfg(feature = "dmac0")]
166#[derive(Copy, Clone, Eq, PartialEq)]
167pub struct Dmac0 {
168 ptr: *mut u8,
169}
170#[cfg(feature = "dmac0")]
171pub const DMAC0: self::Dmac0 = self::Dmac0 {
172 ptr: 0x40005000u32 as _,
173};
174#[cfg(feature = "dmac1")]
175pub const DMAC1: self::Dmac0 = self::Dmac0 {
176 ptr: 0x40005040u32 as _,
177};
178#[cfg(feature = "dmac2")]
179pub const DMAC2: self::Dmac0 = self::Dmac0 {
180 ptr: 0x40005080u32 as _,
181};
182#[cfg(feature = "dmac3")]
183pub const DMAC3: self::Dmac0 = self::Dmac0 {
184 ptr: 0x400050c0u32 as _,
185};
186#[cfg(feature = "dmac4")]
187pub const DMAC4: self::Dmac0 = self::Dmac0 {
188 ptr: 0x40005100u32 as _,
189};
190#[cfg(feature = "dmac5")]
191pub const DMAC5: self::Dmac0 = self::Dmac0 {
192 ptr: 0x40005140u32 as _,
193};
194#[cfg(feature = "dmac6")]
195pub const DMAC6: self::Dmac0 = self::Dmac0 {
196 ptr: 0x40005180u32 as _,
197};
198#[cfg(feature = "dmac7")]
199pub const DMAC7: self::Dmac0 = self::Dmac0 {
200 ptr: 0x400051c0u32 as _,
201};
202#[cfg(feature = "dma")]
203#[derive(Copy, Clone, Eq, PartialEq)]
204pub struct Dma {
205 ptr: *mut u8,
206}
207#[cfg(feature = "dma")]
208pub const DMA: self::Dma = self::Dma {
209 ptr: 0x40005200u32 as _,
210};
211#[cfg(feature = "dtc")]
212#[derive(Copy, Clone, Eq, PartialEq)]
213pub struct Dtc {
214 ptr: *mut u8,
215}
216#[cfg(feature = "dtc")]
217pub const DTC: self::Dtc = self::Dtc {
218 ptr: 0x40005400u32 as _,
219};
220#[cfg(feature = "icu")]
221#[derive(Copy, Clone, Eq, PartialEq)]
222pub struct Icu {
223 ptr: *mut u8,
224}
225#[cfg(feature = "icu")]
226pub const ICU: self::Icu = self::Icu {
227 ptr: 0x40006000u32 as _,
228};
229#[cfg(feature = "cache")]
230#[derive(Copy, Clone, Eq, PartialEq)]
231pub struct Cache {
232 ptr: *mut u8,
233}
234#[cfg(feature = "cache")]
235pub const CACHE: self::Cache = self::Cache {
236 ptr: 0x40007000u32 as _,
237};
238#[cfg(feature = "cpscu")]
239#[derive(Copy, Clone, Eq, PartialEq)]
240pub struct Cpscu {
241 ptr: *mut u8,
242}
243#[cfg(feature = "cpscu")]
244pub const CPSCU: self::Cpscu = self::Cpscu {
245 ptr: 0x40008000u32 as _,
246};
247#[cfg(feature = "dbg")]
248#[derive(Copy, Clone, Eq, PartialEq)]
249pub struct Dbg {
250 ptr: *mut u8,
251}
252#[cfg(feature = "dbg")]
253pub const DBG: self::Dbg = self::Dbg {
254 ptr: 0x4001b000u32 as _,
255};
256#[cfg(feature = "fcache")]
257#[derive(Copy, Clone, Eq, PartialEq)]
258pub struct Fcache {
259 ptr: *mut u8,
260}
261#[cfg(feature = "fcache")]
262pub const FCACHE: self::Fcache = self::Fcache {
263 ptr: 0x4001c100u32 as _,
264};
265#[cfg(feature = "sysc")]
266#[derive(Copy, Clone, Eq, PartialEq)]
267pub struct Sysc {
268 ptr: *mut u8,
269}
270#[cfg(feature = "sysc")]
271pub const SYSC: self::Sysc = self::Sysc {
272 ptr: 0x4001e000u32 as _,
273};
274#[cfg(feature = "port0")]
275#[derive(Copy, Clone, Eq, PartialEq)]
276pub struct Port0 {
277 ptr: *mut u8,
278}
279#[cfg(feature = "port0")]
280pub const PORT0: self::Port0 = self::Port0 {
281 ptr: 0x40080000u32 as _,
282};
283#[cfg(feature = "port1")]
284#[derive(Copy, Clone, Eq, PartialEq)]
285pub struct Port1 {
286 ptr: *mut u8,
287}
288#[cfg(feature = "port1")]
289pub const PORT1: self::Port1 = self::Port1 {
290 ptr: 0x40080020u32 as _,
291};
292#[cfg(feature = "port2")]
293pub const PORT2: self::Port1 = self::Port1 {
294 ptr: 0x40080040u32 as _,
295};
296#[cfg(feature = "port3")]
297pub const PORT3: self::Port1 = self::Port1 {
298 ptr: 0x40080060u32 as _,
299};
300#[cfg(feature = "port4")]
301pub const PORT4: self::Port1 = self::Port1 {
302 ptr: 0x40080080u32 as _,
303};
304#[cfg(feature = "port5")]
305pub const PORT5: self::Port0 = self::Port0 {
306 ptr: 0x400800a0u32 as _,
307};
308#[cfg(feature = "port6")]
309pub const PORT6: self::Port0 = self::Port0 {
310 ptr: 0x400800c0u32 as _,
311};
312#[cfg(feature = "port7")]
313pub const PORT7: self::Port0 = self::Port0 {
314 ptr: 0x400800e0u32 as _,
315};
316#[cfg(feature = "port8")]
317pub const PORT8: self::Port0 = self::Port0 {
318 ptr: 0x40080100u32 as _,
319};
320#[cfg(feature = "pfs")]
321#[derive(Copy, Clone, Eq, PartialEq)]
322pub struct Pfs {
323 ptr: *mut u8,
324}
325#[cfg(feature = "pfs")]
326pub const PFS: self::Pfs = self::Pfs {
327 ptr: 0x40080800u32 as _,
328};
329#[cfg(feature = "elc")]
330#[derive(Copy, Clone, Eq, PartialEq)]
331pub struct Elc {
332 ptr: *mut u8,
333}
334#[cfg(feature = "elc")]
335pub const ELC: self::Elc = self::Elc {
336 ptr: 0x40082000u32 as _,
337};
338#[cfg(feature = "rtc")]
339#[derive(Copy, Clone, Eq, PartialEq)]
340pub struct Rtc {
341 ptr: *mut u8,
342}
343#[cfg(feature = "rtc")]
344pub const RTC: self::Rtc = self::Rtc {
345 ptr: 0x40083000u32 as _,
346};
347#[cfg(feature = "iwdt")]
348#[derive(Copy, Clone, Eq, PartialEq)]
349pub struct Iwdt {
350 ptr: *mut u8,
351}
352#[cfg(feature = "iwdt")]
353pub const IWDT: self::Iwdt = self::Iwdt {
354 ptr: 0x40083200u32 as _,
355};
356#[cfg(feature = "wdt")]
357#[derive(Copy, Clone, Eq, PartialEq)]
358pub struct Wdt {
359 ptr: *mut u8,
360}
361#[cfg(feature = "wdt")]
362pub const WDT: self::Wdt = self::Wdt {
363 ptr: 0x40083400u32 as _,
364};
365#[cfg(feature = "cac")]
366#[derive(Copy, Clone, Eq, PartialEq)]
367pub struct Cac {
368 ptr: *mut u8,
369}
370#[cfg(feature = "cac")]
371pub const CAC: self::Cac = self::Cac {
372 ptr: 0x40083600u32 as _,
373};
374#[cfg(feature = "mstp")]
375#[derive(Copy, Clone, Eq, PartialEq)]
376pub struct Mstp {
377 ptr: *mut u8,
378}
379#[cfg(feature = "mstp")]
380pub const MSTP: self::Mstp = self::Mstp {
381 ptr: 0x40084000u32 as _,
382};
383#[cfg(feature = "poeg")]
384#[derive(Copy, Clone, Eq, PartialEq)]
385pub struct Poeg {
386 ptr: *mut u8,
387}
388#[cfg(feature = "poeg")]
389pub const POEG: self::Poeg = self::Poeg {
390 ptr: 0x4008a000u32 as _,
391};
392#[cfg(feature = "usbfs")]
393#[derive(Copy, Clone, Eq, PartialEq)]
394pub struct Usbfs {
395 ptr: *mut u8,
396}
397#[cfg(feature = "usbfs")]
398pub const USBFS: self::Usbfs = self::Usbfs {
399 ptr: 0x40090000u32 as _,
400};
401#[cfg(feature = "sdhi0")]
402#[derive(Copy, Clone, Eq, PartialEq)]
403pub struct Sdhi0 {
404 ptr: *mut u8,
405}
406#[cfg(feature = "sdhi0")]
407pub const SDHI0: self::Sdhi0 = self::Sdhi0 {
408 ptr: 0x40092000u32 as _,
409};
410#[cfg(feature = "ssie0")]
411#[derive(Copy, Clone, Eq, PartialEq)]
412pub struct Ssie0 {
413 ptr: *mut u8,
414}
415#[cfg(feature = "ssie0")]
416pub const SSIE0: self::Ssie0 = self::Ssie0 {
417 ptr: 0x4009d000u32 as _,
418};
419#[cfg(feature = "iic0")]
420#[derive(Copy, Clone, Eq, PartialEq)]
421pub struct Iic0 {
422 ptr: *mut u8,
423}
424#[cfg(feature = "iic0")]
425pub const IIC0: self::Iic0 = self::Iic0 {
426 ptr: 0x4009f000u32 as _,
427};
428#[cfg(feature = "iic0wu")]
429#[derive(Copy, Clone, Eq, PartialEq)]
430pub struct Iic0Wu {
431 ptr: *mut u8,
432}
433#[cfg(feature = "iic0wu")]
434pub const IIC0WU: self::Iic0Wu = self::Iic0Wu {
435 ptr: 0x4009f014u32 as _,
436};
437#[cfg(feature = "iic1")]
438pub const IIC1: self::Iic0 = self::Iic0 {
439 ptr: 0x4009f100u32 as _,
440};
441#[cfg(feature = "can0")]
442#[derive(Copy, Clone, Eq, PartialEq)]
443pub struct Can0 {
444 ptr: *mut u8,
445}
446#[cfg(feature = "can0")]
447pub const CAN0: self::Can0 = self::Can0 {
448 ptr: 0x400a8000u32 as _,
449};
450#[cfg(feature = "can1")]
451pub const CAN1: self::Can0 = self::Can0 {
452 ptr: 0x400a9000u32 as _,
453};
454#[cfg(feature = "ctsu")]
455#[derive(Copy, Clone, Eq, PartialEq)]
456pub struct Ctsu {
457 ptr: *mut u8,
458}
459#[cfg(feature = "ctsu")]
460pub const CTSU: self::Ctsu = self::Ctsu {
461 ptr: 0x400d0000u32 as _,
462};
463#[cfg(feature = "pscu")]
464#[derive(Copy, Clone, Eq, PartialEq)]
465pub struct Pscu {
466 ptr: *mut u8,
467}
468#[cfg(feature = "pscu")]
469pub const PSCU: self::Pscu = self::Pscu {
470 ptr: 0x400e0000u32 as _,
471};
472#[cfg(feature = "agt0")]
473#[derive(Copy, Clone, Eq, PartialEq)]
474pub struct Agt0 {
475 ptr: *mut u8,
476}
477#[cfg(feature = "agt0")]
478pub const AGT0: self::Agt0 = self::Agt0 {
479 ptr: 0x400e8000u32 as _,
480};
481#[cfg(feature = "agt1")]
482pub const AGT1: self::Agt0 = self::Agt0 {
483 ptr: 0x400e8100u32 as _,
484};
485#[cfg(feature = "agt2")]
486pub const AGT2: self::Agt0 = self::Agt0 {
487 ptr: 0x400e8200u32 as _,
488};
489#[cfg(feature = "agt3")]
490pub const AGT3: self::Agt0 = self::Agt0 {
491 ptr: 0x400e8300u32 as _,
492};
493#[cfg(feature = "agt4")]
494pub const AGT4: self::Agt0 = self::Agt0 {
495 ptr: 0x400e8400u32 as _,
496};
497#[cfg(feature = "agt5")]
498pub const AGT5: self::Agt0 = self::Agt0 {
499 ptr: 0x400e8500u32 as _,
500};
501#[cfg(feature = "tsn")]
502#[derive(Copy, Clone, Eq, PartialEq)]
503pub struct Tsn {
504 ptr: *mut u8,
505}
506#[cfg(feature = "tsn")]
507pub const TSN: self::Tsn = self::Tsn {
508 ptr: 0x400f3000u32 as _,
509};
510#[cfg(feature = "crc")]
511#[derive(Copy, Clone, Eq, PartialEq)]
512pub struct Crc {
513 ptr: *mut u8,
514}
515#[cfg(feature = "crc")]
516pub const CRC: self::Crc = self::Crc {
517 ptr: 0x40108000u32 as _,
518};
519#[cfg(feature = "doc")]
520#[derive(Copy, Clone, Eq, PartialEq)]
521pub struct Doc {
522 ptr: *mut u8,
523}
524#[cfg(feature = "doc")]
525pub const DOC: self::Doc = self::Doc {
526 ptr: 0x40109000u32 as _,
527};
528#[cfg(feature = "sci0")]
529#[derive(Copy, Clone, Eq, PartialEq)]
530pub struct Sci0 {
531 ptr: *mut u8,
532}
533#[cfg(feature = "sci0")]
534pub const SCI0: self::Sci0 = self::Sci0 {
535 ptr: 0x40118000u32 as _,
536};
537#[cfg(feature = "sci1")]
538#[derive(Copy, Clone, Eq, PartialEq)]
539pub struct Sci1 {
540 ptr: *mut u8,
541}
542#[cfg(feature = "sci1")]
543pub const SCI1: self::Sci1 = self::Sci1 {
544 ptr: 0x40118100u32 as _,
545};
546#[cfg(feature = "sci2")]
547pub const SCI2: self::Sci1 = self::Sci1 {
548 ptr: 0x40118200u32 as _,
549};
550#[cfg(feature = "sci3")]
551#[derive(Copy, Clone, Eq, PartialEq)]
552pub struct Sci3 {
553 ptr: *mut u8,
554}
555#[cfg(feature = "sci3")]
556pub const SCI3: self::Sci3 = self::Sci3 {
557 ptr: 0x40118300u32 as _,
558};
559#[cfg(feature = "sci4")]
560pub const SCI4: self::Sci3 = self::Sci3 {
561 ptr: 0x40118400u32 as _,
562};
563#[cfg(feature = "sci9")]
564pub const SCI9: self::Sci0 = self::Sci0 {
565 ptr: 0x40118900u32 as _,
566};
567#[cfg(feature = "spi0")]
568#[derive(Copy, Clone, Eq, PartialEq)]
569pub struct Spi0 {
570 ptr: *mut u8,
571}
572#[cfg(feature = "spi0")]
573pub const SPI0: self::Spi0 = self::Spi0 {
574 ptr: 0x4011a000u32 as _,
575};
576#[cfg(feature = "gpt320")]
577#[derive(Copy, Clone, Eq, PartialEq)]
578pub struct Gpt320 {
579 ptr: *mut u8,
580}
581#[cfg(feature = "gpt320")]
582pub const GPT320: self::Gpt320 = self::Gpt320 {
583 ptr: 0x40169000u32 as _,
584};
585#[cfg(feature = "gpt321")]
586pub const GPT321: self::Gpt320 = self::Gpt320 {
587 ptr: 0x40169100u32 as _,
588};
589#[cfg(feature = "gpt322")]
590pub const GPT322: self::Gpt320 = self::Gpt320 {
591 ptr: 0x40169200u32 as _,
592};
593#[cfg(feature = "gpt323")]
594pub const GPT323: self::Gpt320 = self::Gpt320 {
595 ptr: 0x40169300u32 as _,
596};
597#[cfg(feature = "gpt164")]
598#[derive(Copy, Clone, Eq, PartialEq)]
599pub struct Gpt164 {
600 ptr: *mut u8,
601}
602#[cfg(feature = "gpt164")]
603pub const GPT164: self::Gpt164 = self::Gpt164 {
604 ptr: 0x40169400u32 as _,
605};
606#[cfg(feature = "gpt165")]
607pub const GPT165: self::Gpt164 = self::Gpt164 {
608 ptr: 0x40169500u32 as _,
609};
610#[cfg(feature = "gpt166")]
611pub const GPT166: self::Gpt164 = self::Gpt164 {
612 ptr: 0x40169600u32 as _,
613};
614#[cfg(feature = "gpt167")]
615pub const GPT167: self::Gpt164 = self::Gpt164 {
616 ptr: 0x40169700u32 as _,
617};
618#[cfg(feature = "gpt_ops")]
619#[derive(Copy, Clone, Eq, PartialEq)]
620pub struct GptOps {
621 ptr: *mut u8,
622}
623#[cfg(feature = "gpt_ops")]
624pub const GPT_OPS: self::GptOps = self::GptOps {
625 ptr: 0x40169a00u32 as _,
626};
627#[cfg(feature = "adc120")]
628#[derive(Copy, Clone, Eq, PartialEq)]
629pub struct Adc120 {
630 ptr: *mut u8,
631}
632#[cfg(feature = "adc120")]
633pub const ADC120: self::Adc120 = self::Adc120 {
634 ptr: 0x40170000u32 as _,
635};
636#[cfg(feature = "adc121")]
637#[derive(Copy, Clone, Eq, PartialEq)]
638pub struct Adc121 {
639 ptr: *mut u8,
640}
641#[cfg(feature = "adc121")]
642pub const ADC121: self::Adc121 = self::Adc121 {
643 ptr: 0x40170200u32 as _,
644};
645#[cfg(feature = "dac12")]
646#[derive(Copy, Clone, Eq, PartialEq)]
647pub struct Dac12 {
648 ptr: *mut u8,
649}
650#[cfg(feature = "dac12")]
651pub const DAC12: self::Dac12 = self::Dac12 {
652 ptr: 0x40171000u32 as _,
653};
654#[cfg(feature = "tsd")]
655#[derive(Copy, Clone, Eq, PartialEq)]
656pub struct Tsd {
657 ptr: *mut u8,
658}
659#[cfg(feature = "tsd")]
660pub const TSD: self::Tsd = self::Tsd {
661 ptr: 0x407fb000u32 as _,
662};
663#[cfg(feature = "flad")]
664#[derive(Copy, Clone, Eq, PartialEq)]
665pub struct Flad {
666 ptr: *mut u8,
667}
668#[cfg(feature = "flad")]
669pub const FLAD: self::Flad = self::Flad {
670 ptr: 0x407fc000u32 as _,
671};
672#[cfg(feature = "faci")]
673#[derive(Copy, Clone, Eq, PartialEq)]
674pub struct Faci {
675 ptr: *mut u8,
676}
677#[cfg(feature = "faci")]
678pub const FACI: self::Faci = self::Faci {
679 ptr: 0x407fe000u32 as _,
680};
681#[cfg(feature = "qspi")]
682#[derive(Copy, Clone, Eq, PartialEq)]
683pub struct Qspi {
684 ptr: *mut u8,
685}
686#[cfg(feature = "qspi")]
687pub const QSPI: self::Qspi = self::Qspi {
688 ptr: 0x64000000u32 as _,
689};
690
691pub use cortex_m::peripheral::Peripherals as CorePeripherals;
692pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
693#[doc = "Number available in the NVIC for configuring priority"]
694pub const NVIC_PRIO_BITS: u8 = 4;
695#[doc(hidden)]
696pub union Vector {
697 _handler: unsafe extern "C" fn(),
698 _reserved: u32,
699}
700#[cfg(feature = "rt")]
701pub use self::Interrupt as interrupt;
702#[cfg(feature = "rt")]
703pub use cortex_m_rt::interrupt;
704#[cfg(feature = "rt")]
705pub mod interrupt_handlers {
706 unsafe extern "C" {
707 pub fn IEL0();
708 pub fn IEL1();
709 pub fn IEL2();
710 pub fn IEL3();
711 pub fn IEL4();
712 pub fn IEL5();
713 pub fn IEL6();
714 pub fn IEL7();
715 pub fn IEL8();
716 pub fn IEL9();
717 pub fn IEL10();
718 pub fn IEL11();
719 pub fn IEL12();
720 pub fn IEL13();
721 pub fn IEL14();
722 pub fn IEL15();
723 pub fn IEL16();
724 pub fn IEL17();
725 pub fn IEL18();
726 pub fn IEL19();
727 pub fn IEL20();
728 pub fn IEL21();
729 pub fn IEL22();
730 pub fn IEL23();
731 pub fn IEL24();
732 pub fn IEL25();
733 pub fn IEL26();
734 pub fn IEL27();
735 pub fn IEL28();
736 pub fn IEL29();
737 pub fn IEL30();
738 pub fn IEL31();
739 pub fn IEL32();
740 pub fn IEL33();
741 pub fn IEL34();
742 pub fn IEL35();
743 pub fn IEL36();
744 pub fn IEL37();
745 pub fn IEL38();
746 pub fn IEL39();
747 pub fn IEL40();
748 pub fn IEL41();
749 pub fn IEL42();
750 pub fn IEL43();
751 pub fn IEL44();
752 pub fn IEL45();
753 pub fn IEL46();
754 pub fn IEL47();
755 pub fn IEL48();
756 pub fn IEL49();
757 pub fn IEL50();
758 pub fn IEL51();
759 pub fn IEL52();
760 pub fn IEL53();
761 pub fn IEL54();
762 pub fn IEL55();
763 pub fn IEL56();
764 pub fn IEL57();
765 pub fn IEL58();
766 pub fn IEL59();
767 pub fn IEL60();
768 pub fn IEL61();
769 pub fn IEL62();
770 pub fn IEL63();
771 pub fn IEL64();
772 pub fn IEL65();
773 pub fn IEL66();
774 pub fn IEL67();
775 pub fn IEL68();
776 pub fn IEL69();
777 pub fn IEL70();
778 pub fn IEL71();
779 pub fn IEL72();
780 pub fn IEL73();
781 pub fn IEL74();
782 pub fn IEL75();
783 pub fn IEL76();
784 pub fn IEL77();
785 pub fn IEL78();
786 pub fn IEL79();
787 pub fn IEL80();
788 pub fn IEL81();
789 pub fn IEL82();
790 pub fn IEL83();
791 pub fn IEL84();
792 pub fn IEL85();
793 pub fn IEL86();
794 pub fn IEL87();
795 pub fn IEL88();
796 pub fn IEL89();
797 pub fn IEL90();
798 pub fn IEL91();
799 pub fn IEL92();
800 pub fn IEL93();
801 pub fn IEL94();
802 pub fn IEL95();
803 }
804}
805#[cfg(feature = "rt")]
806#[doc(hidden)]
807#[unsafe(link_section = ".vector_table.interrupts")]
808#[unsafe(no_mangle)]
809pub static __INTERRUPTS: [Vector; 96] = [
810 Vector {
811 _handler: interrupt_handlers::IEL0,
812 },
813 Vector {
814 _handler: interrupt_handlers::IEL1,
815 },
816 Vector {
817 _handler: interrupt_handlers::IEL2,
818 },
819 Vector {
820 _handler: interrupt_handlers::IEL3,
821 },
822 Vector {
823 _handler: interrupt_handlers::IEL4,
824 },
825 Vector {
826 _handler: interrupt_handlers::IEL5,
827 },
828 Vector {
829 _handler: interrupt_handlers::IEL6,
830 },
831 Vector {
832 _handler: interrupt_handlers::IEL7,
833 },
834 Vector {
835 _handler: interrupt_handlers::IEL8,
836 },
837 Vector {
838 _handler: interrupt_handlers::IEL9,
839 },
840 Vector {
841 _handler: interrupt_handlers::IEL10,
842 },
843 Vector {
844 _handler: interrupt_handlers::IEL11,
845 },
846 Vector {
847 _handler: interrupt_handlers::IEL12,
848 },
849 Vector {
850 _handler: interrupt_handlers::IEL13,
851 },
852 Vector {
853 _handler: interrupt_handlers::IEL14,
854 },
855 Vector {
856 _handler: interrupt_handlers::IEL15,
857 },
858 Vector {
859 _handler: interrupt_handlers::IEL16,
860 },
861 Vector {
862 _handler: interrupt_handlers::IEL17,
863 },
864 Vector {
865 _handler: interrupt_handlers::IEL18,
866 },
867 Vector {
868 _handler: interrupt_handlers::IEL19,
869 },
870 Vector {
871 _handler: interrupt_handlers::IEL20,
872 },
873 Vector {
874 _handler: interrupt_handlers::IEL21,
875 },
876 Vector {
877 _handler: interrupt_handlers::IEL22,
878 },
879 Vector {
880 _handler: interrupt_handlers::IEL23,
881 },
882 Vector {
883 _handler: interrupt_handlers::IEL24,
884 },
885 Vector {
886 _handler: interrupt_handlers::IEL25,
887 },
888 Vector {
889 _handler: interrupt_handlers::IEL26,
890 },
891 Vector {
892 _handler: interrupt_handlers::IEL27,
893 },
894 Vector {
895 _handler: interrupt_handlers::IEL28,
896 },
897 Vector {
898 _handler: interrupt_handlers::IEL29,
899 },
900 Vector {
901 _handler: interrupt_handlers::IEL30,
902 },
903 Vector {
904 _handler: interrupt_handlers::IEL31,
905 },
906 Vector {
907 _handler: interrupt_handlers::IEL32,
908 },
909 Vector {
910 _handler: interrupt_handlers::IEL33,
911 },
912 Vector {
913 _handler: interrupt_handlers::IEL34,
914 },
915 Vector {
916 _handler: interrupt_handlers::IEL35,
917 },
918 Vector {
919 _handler: interrupt_handlers::IEL36,
920 },
921 Vector {
922 _handler: interrupt_handlers::IEL37,
923 },
924 Vector {
925 _handler: interrupt_handlers::IEL38,
926 },
927 Vector {
928 _handler: interrupt_handlers::IEL39,
929 },
930 Vector {
931 _handler: interrupt_handlers::IEL40,
932 },
933 Vector {
934 _handler: interrupt_handlers::IEL41,
935 },
936 Vector {
937 _handler: interrupt_handlers::IEL42,
938 },
939 Vector {
940 _handler: interrupt_handlers::IEL43,
941 },
942 Vector {
943 _handler: interrupt_handlers::IEL44,
944 },
945 Vector {
946 _handler: interrupt_handlers::IEL45,
947 },
948 Vector {
949 _handler: interrupt_handlers::IEL46,
950 },
951 Vector {
952 _handler: interrupt_handlers::IEL47,
953 },
954 Vector {
955 _handler: interrupt_handlers::IEL48,
956 },
957 Vector {
958 _handler: interrupt_handlers::IEL49,
959 },
960 Vector {
961 _handler: interrupt_handlers::IEL50,
962 },
963 Vector {
964 _handler: interrupt_handlers::IEL51,
965 },
966 Vector {
967 _handler: interrupt_handlers::IEL52,
968 },
969 Vector {
970 _handler: interrupt_handlers::IEL53,
971 },
972 Vector {
973 _handler: interrupt_handlers::IEL54,
974 },
975 Vector {
976 _handler: interrupt_handlers::IEL55,
977 },
978 Vector {
979 _handler: interrupt_handlers::IEL56,
980 },
981 Vector {
982 _handler: interrupt_handlers::IEL57,
983 },
984 Vector {
985 _handler: interrupt_handlers::IEL58,
986 },
987 Vector {
988 _handler: interrupt_handlers::IEL59,
989 },
990 Vector {
991 _handler: interrupt_handlers::IEL60,
992 },
993 Vector {
994 _handler: interrupt_handlers::IEL61,
995 },
996 Vector {
997 _handler: interrupt_handlers::IEL62,
998 },
999 Vector {
1000 _handler: interrupt_handlers::IEL63,
1001 },
1002 Vector {
1003 _handler: interrupt_handlers::IEL64,
1004 },
1005 Vector {
1006 _handler: interrupt_handlers::IEL65,
1007 },
1008 Vector {
1009 _handler: interrupt_handlers::IEL66,
1010 },
1011 Vector {
1012 _handler: interrupt_handlers::IEL67,
1013 },
1014 Vector {
1015 _handler: interrupt_handlers::IEL68,
1016 },
1017 Vector {
1018 _handler: interrupt_handlers::IEL69,
1019 },
1020 Vector {
1021 _handler: interrupt_handlers::IEL70,
1022 },
1023 Vector {
1024 _handler: interrupt_handlers::IEL71,
1025 },
1026 Vector {
1027 _handler: interrupt_handlers::IEL72,
1028 },
1029 Vector {
1030 _handler: interrupt_handlers::IEL73,
1031 },
1032 Vector {
1033 _handler: interrupt_handlers::IEL74,
1034 },
1035 Vector {
1036 _handler: interrupt_handlers::IEL75,
1037 },
1038 Vector {
1039 _handler: interrupt_handlers::IEL76,
1040 },
1041 Vector {
1042 _handler: interrupt_handlers::IEL77,
1043 },
1044 Vector {
1045 _handler: interrupt_handlers::IEL78,
1046 },
1047 Vector {
1048 _handler: interrupt_handlers::IEL79,
1049 },
1050 Vector {
1051 _handler: interrupt_handlers::IEL80,
1052 },
1053 Vector {
1054 _handler: interrupt_handlers::IEL81,
1055 },
1056 Vector {
1057 _handler: interrupt_handlers::IEL82,
1058 },
1059 Vector {
1060 _handler: interrupt_handlers::IEL83,
1061 },
1062 Vector {
1063 _handler: interrupt_handlers::IEL84,
1064 },
1065 Vector {
1066 _handler: interrupt_handlers::IEL85,
1067 },
1068 Vector {
1069 _handler: interrupt_handlers::IEL86,
1070 },
1071 Vector {
1072 _handler: interrupt_handlers::IEL87,
1073 },
1074 Vector {
1075 _handler: interrupt_handlers::IEL88,
1076 },
1077 Vector {
1078 _handler: interrupt_handlers::IEL89,
1079 },
1080 Vector {
1081 _handler: interrupt_handlers::IEL90,
1082 },
1083 Vector {
1084 _handler: interrupt_handlers::IEL91,
1085 },
1086 Vector {
1087 _handler: interrupt_handlers::IEL92,
1088 },
1089 Vector {
1090 _handler: interrupt_handlers::IEL93,
1091 },
1092 Vector {
1093 _handler: interrupt_handlers::IEL94,
1094 },
1095 Vector {
1096 _handler: interrupt_handlers::IEL95,
1097 },
1098];
1099#[doc = "Enumeration of all the interrupts."]
1100#[derive(Copy, Clone, Debug, PartialEq, Eq)]
1101#[repr(u16)]
1102pub enum Interrupt {
1103 #[doc = "ICU Interrupt 0"]
1104 IEL0 = 0,
1105
1106 #[doc = "ICU Interrupt 1"]
1107 IEL1 = 1,
1108
1109 #[doc = "ICU Interrupt 2"]
1110 IEL2 = 2,
1111
1112 #[doc = "ICU Interrupt 3"]
1113 IEL3 = 3,
1114
1115 #[doc = "ICU Interrupt 4"]
1116 IEL4 = 4,
1117
1118 #[doc = "ICU Interrupt 5"]
1119 IEL5 = 5,
1120
1121 #[doc = "ICU Interrupt 6"]
1122 IEL6 = 6,
1123
1124 #[doc = "ICU Interrupt 7"]
1125 IEL7 = 7,
1126
1127 #[doc = "ICU Interrupt 8"]
1128 IEL8 = 8,
1129
1130 #[doc = "ICU Interrupt 9"]
1131 IEL9 = 9,
1132
1133 #[doc = "ICU Interrupt 10"]
1134 IEL10 = 10,
1135
1136 #[doc = "ICU Interrupt 11"]
1137 IEL11 = 11,
1138
1139 #[doc = "ICU Interrupt 12"]
1140 IEL12 = 12,
1141
1142 #[doc = "ICU Interrupt 13"]
1143 IEL13 = 13,
1144
1145 #[doc = "ICU Interrupt 14"]
1146 IEL14 = 14,
1147
1148 #[doc = "ICU Interrupt 15"]
1149 IEL15 = 15,
1150
1151 #[doc = "ICU Interrupt 16"]
1152 IEL16 = 16,
1153
1154 #[doc = "ICU Interrupt 17"]
1155 IEL17 = 17,
1156
1157 #[doc = "ICU Interrupt 18"]
1158 IEL18 = 18,
1159
1160 #[doc = "ICU Interrupt 19"]
1161 IEL19 = 19,
1162
1163 #[doc = "ICU Interrupt 20"]
1164 IEL20 = 20,
1165
1166 #[doc = "ICU Interrupt 21"]
1167 IEL21 = 21,
1168
1169 #[doc = "ICU Interrupt 22"]
1170 IEL22 = 22,
1171
1172 #[doc = "ICU Interrupt 23"]
1173 IEL23 = 23,
1174
1175 #[doc = "ICU Interrupt 24"]
1176 IEL24 = 24,
1177
1178 #[doc = "ICU Interrupt 25"]
1179 IEL25 = 25,
1180
1181 #[doc = "ICU Interrupt 26"]
1182 IEL26 = 26,
1183
1184 #[doc = "ICU Interrupt 27"]
1185 IEL27 = 27,
1186
1187 #[doc = "ICU Interrupt 28"]
1188 IEL28 = 28,
1189
1190 #[doc = "ICU Interrupt 29"]
1191 IEL29 = 29,
1192
1193 #[doc = "ICU Interrupt 30"]
1194 IEL30 = 30,
1195
1196 #[doc = "ICU Interrupt 31"]
1197 IEL31 = 31,
1198
1199 #[doc = "ICU Interrupt 32"]
1200 IEL32 = 32,
1201
1202 #[doc = "ICU Interrupt 33"]
1203 IEL33 = 33,
1204
1205 #[doc = "ICU Interrupt 34"]
1206 IEL34 = 34,
1207
1208 #[doc = "ICU Interrupt 35"]
1209 IEL35 = 35,
1210
1211 #[doc = "ICU Interrupt 36"]
1212 IEL36 = 36,
1213
1214 #[doc = "ICU Interrupt 37"]
1215 IEL37 = 37,
1216
1217 #[doc = "ICU Interrupt 38"]
1218 IEL38 = 38,
1219
1220 #[doc = "ICU Interrupt 39"]
1221 IEL39 = 39,
1222
1223 #[doc = "ICU Interrupt 40"]
1224 IEL40 = 40,
1225
1226 #[doc = "ICU Interrupt 41"]
1227 IEL41 = 41,
1228
1229 #[doc = "ICU Interrupt 42"]
1230 IEL42 = 42,
1231
1232 #[doc = "ICU Interrupt 43"]
1233 IEL43 = 43,
1234
1235 #[doc = "ICU Interrupt 44"]
1236 IEL44 = 44,
1237
1238 #[doc = "ICU Interrupt 45"]
1239 IEL45 = 45,
1240
1241 #[doc = "ICU Interrupt 46"]
1242 IEL46 = 46,
1243
1244 #[doc = "ICU Interrupt 47"]
1245 IEL47 = 47,
1246
1247 #[doc = "ICU Interrupt 48"]
1248 IEL48 = 48,
1249
1250 #[doc = "ICU Interrupt 49"]
1251 IEL49 = 49,
1252
1253 #[doc = "ICU Interrupt 50"]
1254 IEL50 = 50,
1255
1256 #[doc = "ICU Interrupt 51"]
1257 IEL51 = 51,
1258
1259 #[doc = "ICU Interrupt 52"]
1260 IEL52 = 52,
1261
1262 #[doc = "ICU Interrupt 53"]
1263 IEL53 = 53,
1264
1265 #[doc = "ICU Interrupt 54"]
1266 IEL54 = 54,
1267
1268 #[doc = "ICU Interrupt 55"]
1269 IEL55 = 55,
1270
1271 #[doc = "ICU Interrupt 56"]
1272 IEL56 = 56,
1273
1274 #[doc = "ICU Interrupt 57"]
1275 IEL57 = 57,
1276
1277 #[doc = "ICU Interrupt 58"]
1278 IEL58 = 58,
1279
1280 #[doc = "ICU Interrupt 59"]
1281 IEL59 = 59,
1282
1283 #[doc = "ICU Interrupt 60"]
1284 IEL60 = 60,
1285
1286 #[doc = "ICU Interrupt 61"]
1287 IEL61 = 61,
1288
1289 #[doc = "ICU Interrupt 62"]
1290 IEL62 = 62,
1291
1292 #[doc = "ICU Interrupt 63"]
1293 IEL63 = 63,
1294
1295 #[doc = "ICU Interrupt 64"]
1296 IEL64 = 64,
1297
1298 #[doc = "ICU Interrupt 65"]
1299 IEL65 = 65,
1300
1301 #[doc = "ICU Interrupt 66"]
1302 IEL66 = 66,
1303
1304 #[doc = "ICU Interrupt 67"]
1305 IEL67 = 67,
1306
1307 #[doc = "ICU Interrupt 68"]
1308 IEL68 = 68,
1309
1310 #[doc = "ICU Interrupt 69"]
1311 IEL69 = 69,
1312
1313 #[doc = "ICU Interrupt 70"]
1314 IEL70 = 70,
1315
1316 #[doc = "ICU Interrupt 71"]
1317 IEL71 = 71,
1318
1319 #[doc = "ICU Interrupt 72"]
1320 IEL72 = 72,
1321
1322 #[doc = "ICU Interrupt 73"]
1323 IEL73 = 73,
1324
1325 #[doc = "ICU Interrupt 74"]
1326 IEL74 = 74,
1327
1328 #[doc = "ICU Interrupt 75"]
1329 IEL75 = 75,
1330
1331 #[doc = "ICU Interrupt 76"]
1332 IEL76 = 76,
1333
1334 #[doc = "ICU Interrupt 77"]
1335 IEL77 = 77,
1336
1337 #[doc = "ICU Interrupt 78"]
1338 IEL78 = 78,
1339
1340 #[doc = "ICU Interrupt 79"]
1341 IEL79 = 79,
1342
1343 #[doc = "ICU Interrupt 80"]
1344 IEL80 = 80,
1345
1346 #[doc = "ICU Interrupt 81"]
1347 IEL81 = 81,
1348
1349 #[doc = "ICU Interrupt 82"]
1350 IEL82 = 82,
1351
1352 #[doc = "ICU Interrupt 83"]
1353 IEL83 = 83,
1354
1355 #[doc = "ICU Interrupt 84"]
1356 IEL84 = 84,
1357
1358 #[doc = "ICU Interrupt 85"]
1359 IEL85 = 85,
1360
1361 #[doc = "ICU Interrupt 86"]
1362 IEL86 = 86,
1363
1364 #[doc = "ICU Interrupt 87"]
1365 IEL87 = 87,
1366
1367 #[doc = "ICU Interrupt 88"]
1368 IEL88 = 88,
1369
1370 #[doc = "ICU Interrupt 89"]
1371 IEL89 = 89,
1372
1373 #[doc = "ICU Interrupt 90"]
1374 IEL90 = 90,
1375
1376 #[doc = "ICU Interrupt 91"]
1377 IEL91 = 91,
1378
1379 #[doc = "ICU Interrupt 92"]
1380 IEL92 = 92,
1381
1382 #[doc = "ICU Interrupt 93"]
1383 IEL93 = 93,
1384
1385 #[doc = "ICU Interrupt 94"]
1386 IEL94 = 94,
1387
1388 #[doc = "ICU Interrupt 95"]
1389 IEL95 = 95,
1390}
1391unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
1392 #[inline(always)]
1393 fn number(self) -> u16 {
1394 self as u16
1395 }
1396}
1397#[allow(non_snake_case)]
1398pub struct Peripherals {
1400 #[cfg(feature = "rmpu")]
1401 pub RMPU: self::Rmpu,
1402 #[cfg(feature = "tzf")]
1403 pub TZF: self::Tzf,
1404 #[cfg(feature = "sram")]
1405 pub SRAM: self::Sram,
1406 #[cfg(feature = "bus")]
1407 pub BUS: self::Bus,
1408 #[cfg(feature = "dmac0")]
1409 pub DMAC0: self::Dmac0,
1410 #[cfg(feature = "dmac1")]
1411 pub DMAC1: self::Dmac0,
1412 #[cfg(feature = "dmac2")]
1413 pub DMAC2: self::Dmac0,
1414 #[cfg(feature = "dmac3")]
1415 pub DMAC3: self::Dmac0,
1416 #[cfg(feature = "dmac4")]
1417 pub DMAC4: self::Dmac0,
1418 #[cfg(feature = "dmac5")]
1419 pub DMAC5: self::Dmac0,
1420 #[cfg(feature = "dmac6")]
1421 pub DMAC6: self::Dmac0,
1422 #[cfg(feature = "dmac7")]
1423 pub DMAC7: self::Dmac0,
1424 #[cfg(feature = "dma")]
1425 pub DMA: self::Dma,
1426 #[cfg(feature = "dtc")]
1427 pub DTC: self::Dtc,
1428 #[cfg(feature = "icu")]
1429 pub ICU: self::Icu,
1430 #[cfg(feature = "cache")]
1431 pub CACHE: self::Cache,
1432 #[cfg(feature = "cpscu")]
1433 pub CPSCU: self::Cpscu,
1434 #[cfg(feature = "dbg")]
1435 pub DBG: self::Dbg,
1436 #[cfg(feature = "fcache")]
1437 pub FCACHE: self::Fcache,
1438 #[cfg(feature = "sysc")]
1439 pub SYSC: self::Sysc,
1440 #[cfg(feature = "port0")]
1441 pub PORT0: self::Port0,
1442 #[cfg(feature = "port1")]
1443 pub PORT1: self::Port1,
1444 #[cfg(feature = "port2")]
1445 pub PORT2: self::Port1,
1446 #[cfg(feature = "port3")]
1447 pub PORT3: self::Port1,
1448 #[cfg(feature = "port4")]
1449 pub PORT4: self::Port1,
1450 #[cfg(feature = "port5")]
1451 pub PORT5: self::Port0,
1452 #[cfg(feature = "port6")]
1453 pub PORT6: self::Port0,
1454 #[cfg(feature = "port7")]
1455 pub PORT7: self::Port0,
1456 #[cfg(feature = "port8")]
1457 pub PORT8: self::Port0,
1458 #[cfg(feature = "pfs")]
1459 pub PFS: self::Pfs,
1460 #[cfg(feature = "elc")]
1461 pub ELC: self::Elc,
1462 #[cfg(feature = "rtc")]
1463 pub RTC: self::Rtc,
1464 #[cfg(feature = "iwdt")]
1465 pub IWDT: self::Iwdt,
1466 #[cfg(feature = "wdt")]
1467 pub WDT: self::Wdt,
1468 #[cfg(feature = "cac")]
1469 pub CAC: self::Cac,
1470 #[cfg(feature = "mstp")]
1471 pub MSTP: self::Mstp,
1472 #[cfg(feature = "poeg")]
1473 pub POEG: self::Poeg,
1474 #[cfg(feature = "usbfs")]
1475 pub USBFS: self::Usbfs,
1476 #[cfg(feature = "sdhi0")]
1477 pub SDHI0: self::Sdhi0,
1478 #[cfg(feature = "ssie0")]
1479 pub SSIE0: self::Ssie0,
1480 #[cfg(feature = "iic0")]
1481 pub IIC0: self::Iic0,
1482 #[cfg(feature = "iic0wu")]
1483 pub IIC0WU: self::Iic0Wu,
1484 #[cfg(feature = "iic1")]
1485 pub IIC1: self::Iic0,
1486 #[cfg(feature = "can0")]
1487 pub CAN0: self::Can0,
1488 #[cfg(feature = "can1")]
1489 pub CAN1: self::Can0,
1490 #[cfg(feature = "ctsu")]
1491 pub CTSU: self::Ctsu,
1492 #[cfg(feature = "pscu")]
1493 pub PSCU: self::Pscu,
1494 #[cfg(feature = "agt0")]
1495 pub AGT0: self::Agt0,
1496 #[cfg(feature = "agt1")]
1497 pub AGT1: self::Agt0,
1498 #[cfg(feature = "agt2")]
1499 pub AGT2: self::Agt0,
1500 #[cfg(feature = "agt3")]
1501 pub AGT3: self::Agt0,
1502 #[cfg(feature = "agt4")]
1503 pub AGT4: self::Agt0,
1504 #[cfg(feature = "agt5")]
1505 pub AGT5: self::Agt0,
1506 #[cfg(feature = "tsn")]
1507 pub TSN: self::Tsn,
1508 #[cfg(feature = "crc")]
1509 pub CRC: self::Crc,
1510 #[cfg(feature = "doc")]
1511 pub DOC: self::Doc,
1512 #[cfg(feature = "sci0")]
1513 pub SCI0: self::Sci0,
1514 #[cfg(feature = "sci1")]
1515 pub SCI1: self::Sci1,
1516 #[cfg(feature = "sci2")]
1517 pub SCI2: self::Sci1,
1518 #[cfg(feature = "sci3")]
1519 pub SCI3: self::Sci3,
1520 #[cfg(feature = "sci4")]
1521 pub SCI4: self::Sci3,
1522 #[cfg(feature = "sci9")]
1523 pub SCI9: self::Sci0,
1524 #[cfg(feature = "spi0")]
1525 pub SPI0: self::Spi0,
1526 #[cfg(feature = "gpt320")]
1527 pub GPT320: self::Gpt320,
1528 #[cfg(feature = "gpt321")]
1529 pub GPT321: self::Gpt320,
1530 #[cfg(feature = "gpt322")]
1531 pub GPT322: self::Gpt320,
1532 #[cfg(feature = "gpt323")]
1533 pub GPT323: self::Gpt320,
1534 #[cfg(feature = "gpt164")]
1535 pub GPT164: self::Gpt164,
1536 #[cfg(feature = "gpt165")]
1537 pub GPT165: self::Gpt164,
1538 #[cfg(feature = "gpt166")]
1539 pub GPT166: self::Gpt164,
1540 #[cfg(feature = "gpt167")]
1541 pub GPT167: self::Gpt164,
1542 #[cfg(feature = "gpt_ops")]
1543 pub GPT_OPS: self::GptOps,
1544 #[cfg(feature = "adc120")]
1545 pub ADC120: self::Adc120,
1546 #[cfg(feature = "adc121")]
1547 pub ADC121: self::Adc121,
1548 #[cfg(feature = "dac12")]
1549 pub DAC12: self::Dac12,
1550 #[cfg(feature = "tsd")]
1551 pub TSD: self::Tsd,
1552 #[cfg(feature = "flad")]
1553 pub FLAD: self::Flad,
1554 #[cfg(feature = "faci")]
1555 pub FACI: self::Faci,
1556 #[cfg(feature = "qspi")]
1557 pub QSPI: self::Qspi,
1558}
1559
1560impl Peripherals {
1561 #[inline]
1564 pub fn take() -> Option<Self> {
1565 Some(Self::steal())
1566 }
1567
1568 #[inline]
1571 pub fn steal() -> Self {
1572 Peripherals {
1573 #[cfg(feature = "rmpu")]
1574 RMPU: crate::RMPU,
1575 #[cfg(feature = "tzf")]
1576 TZF: crate::TZF,
1577 #[cfg(feature = "sram")]
1578 SRAM: crate::SRAM,
1579 #[cfg(feature = "bus")]
1580 BUS: crate::BUS,
1581 #[cfg(feature = "dmac0")]
1582 DMAC0: crate::DMAC0,
1583 #[cfg(feature = "dmac1")]
1584 DMAC1: crate::DMAC1,
1585 #[cfg(feature = "dmac2")]
1586 DMAC2: crate::DMAC2,
1587 #[cfg(feature = "dmac3")]
1588 DMAC3: crate::DMAC3,
1589 #[cfg(feature = "dmac4")]
1590 DMAC4: crate::DMAC4,
1591 #[cfg(feature = "dmac5")]
1592 DMAC5: crate::DMAC5,
1593 #[cfg(feature = "dmac6")]
1594 DMAC6: crate::DMAC6,
1595 #[cfg(feature = "dmac7")]
1596 DMAC7: crate::DMAC7,
1597 #[cfg(feature = "dma")]
1598 DMA: crate::DMA,
1599 #[cfg(feature = "dtc")]
1600 DTC: crate::DTC,
1601 #[cfg(feature = "icu")]
1602 ICU: crate::ICU,
1603 #[cfg(feature = "cache")]
1604 CACHE: crate::CACHE,
1605 #[cfg(feature = "cpscu")]
1606 CPSCU: crate::CPSCU,
1607 #[cfg(feature = "dbg")]
1608 DBG: crate::DBG,
1609 #[cfg(feature = "fcache")]
1610 FCACHE: crate::FCACHE,
1611 #[cfg(feature = "sysc")]
1612 SYSC: crate::SYSC,
1613 #[cfg(feature = "port0")]
1614 PORT0: crate::PORT0,
1615 #[cfg(feature = "port1")]
1616 PORT1: crate::PORT1,
1617 #[cfg(feature = "port2")]
1618 PORT2: crate::PORT2,
1619 #[cfg(feature = "port3")]
1620 PORT3: crate::PORT3,
1621 #[cfg(feature = "port4")]
1622 PORT4: crate::PORT4,
1623 #[cfg(feature = "port5")]
1624 PORT5: crate::PORT5,
1625 #[cfg(feature = "port6")]
1626 PORT6: crate::PORT6,
1627 #[cfg(feature = "port7")]
1628 PORT7: crate::PORT7,
1629 #[cfg(feature = "port8")]
1630 PORT8: crate::PORT8,
1631 #[cfg(feature = "pfs")]
1632 PFS: crate::PFS,
1633 #[cfg(feature = "elc")]
1634 ELC: crate::ELC,
1635 #[cfg(feature = "rtc")]
1636 RTC: crate::RTC,
1637 #[cfg(feature = "iwdt")]
1638 IWDT: crate::IWDT,
1639 #[cfg(feature = "wdt")]
1640 WDT: crate::WDT,
1641 #[cfg(feature = "cac")]
1642 CAC: crate::CAC,
1643 #[cfg(feature = "mstp")]
1644 MSTP: crate::MSTP,
1645 #[cfg(feature = "poeg")]
1646 POEG: crate::POEG,
1647 #[cfg(feature = "usbfs")]
1648 USBFS: crate::USBFS,
1649 #[cfg(feature = "sdhi0")]
1650 SDHI0: crate::SDHI0,
1651 #[cfg(feature = "ssie0")]
1652 SSIE0: crate::SSIE0,
1653 #[cfg(feature = "iic0")]
1654 IIC0: crate::IIC0,
1655 #[cfg(feature = "iic0wu")]
1656 IIC0WU: crate::IIC0WU,
1657 #[cfg(feature = "iic1")]
1658 IIC1: crate::IIC1,
1659 #[cfg(feature = "can0")]
1660 CAN0: crate::CAN0,
1661 #[cfg(feature = "can1")]
1662 CAN1: crate::CAN1,
1663 #[cfg(feature = "ctsu")]
1664 CTSU: crate::CTSU,
1665 #[cfg(feature = "pscu")]
1666 PSCU: crate::PSCU,
1667 #[cfg(feature = "agt0")]
1668 AGT0: crate::AGT0,
1669 #[cfg(feature = "agt1")]
1670 AGT1: crate::AGT1,
1671 #[cfg(feature = "agt2")]
1672 AGT2: crate::AGT2,
1673 #[cfg(feature = "agt3")]
1674 AGT3: crate::AGT3,
1675 #[cfg(feature = "agt4")]
1676 AGT4: crate::AGT4,
1677 #[cfg(feature = "agt5")]
1678 AGT5: crate::AGT5,
1679 #[cfg(feature = "tsn")]
1680 TSN: crate::TSN,
1681 #[cfg(feature = "crc")]
1682 CRC: crate::CRC,
1683 #[cfg(feature = "doc")]
1684 DOC: crate::DOC,
1685 #[cfg(feature = "sci0")]
1686 SCI0: crate::SCI0,
1687 #[cfg(feature = "sci1")]
1688 SCI1: crate::SCI1,
1689 #[cfg(feature = "sci2")]
1690 SCI2: crate::SCI2,
1691 #[cfg(feature = "sci3")]
1692 SCI3: crate::SCI3,
1693 #[cfg(feature = "sci4")]
1694 SCI4: crate::SCI4,
1695 #[cfg(feature = "sci9")]
1696 SCI9: crate::SCI9,
1697 #[cfg(feature = "spi0")]
1698 SPI0: crate::SPI0,
1699 #[cfg(feature = "gpt320")]
1700 GPT320: crate::GPT320,
1701 #[cfg(feature = "gpt321")]
1702 GPT321: crate::GPT321,
1703 #[cfg(feature = "gpt322")]
1704 GPT322: crate::GPT322,
1705 #[cfg(feature = "gpt323")]
1706 GPT323: crate::GPT323,
1707 #[cfg(feature = "gpt164")]
1708 GPT164: crate::GPT164,
1709 #[cfg(feature = "gpt165")]
1710 GPT165: crate::GPT165,
1711 #[cfg(feature = "gpt166")]
1712 GPT166: crate::GPT166,
1713 #[cfg(feature = "gpt167")]
1714 GPT167: crate::GPT167,
1715 #[cfg(feature = "gpt_ops")]
1716 GPT_OPS: crate::GPT_OPS,
1717 #[cfg(feature = "adc120")]
1718 ADC120: crate::ADC120,
1719 #[cfg(feature = "adc121")]
1720 ADC121: crate::ADC121,
1721 #[cfg(feature = "dac12")]
1722 DAC12: crate::DAC12,
1723 #[cfg(feature = "tsd")]
1724 TSD: crate::TSD,
1725 #[cfg(feature = "flad")]
1726 FLAD: crate::FLAD,
1727 #[cfg(feature = "faci")]
1728 FACI: crate::FACI,
1729 #[cfg(feature = "qspi")]
1730 QSPI: crate::QSPI,
1731 }
1732 }
1733}