1#[doc = "Register `P1%sPFS` reader"]
2pub struct R(crate::R<P1PFS_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<P1PFS_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<P1PFS_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<P1PFS_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `P1%sPFS` writer"]
17pub struct W(crate::W<P1PFS_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<P1PFS_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<P1PFS_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<P1PFS_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `PODR` reader - Port Output Data"]
38pub type PODR_R = crate::BitReader<PODR_A>;
39#[doc = "Port Output Data\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum PODR_A {
42 #[doc = "0: Output low"]
43 _0 = 0,
44 #[doc = "1: Output high"]
45 _1 = 1,
46}
47impl From<PODR_A> for bool {
48 #[inline(always)]
49 fn from(variant: PODR_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl PODR_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> PODR_A {
57 match self.bits {
58 false => PODR_A::_0,
59 true => PODR_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == PODR_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == PODR_A::_1
71 }
72}
73#[doc = "Field `PODR` writer - Port Output Data"]
74pub type PODR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P1PFS_SPEC, PODR_A, O>;
75impl<'a, const O: u8> PODR_W<'a, O> {
76 #[doc = "Output low"]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(PODR_A::_0)
80 }
81 #[doc = "Output high"]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(PODR_A::_1)
85 }
86}
87#[doc = "Field `PIDR` reader - Port State"]
88pub type PIDR_R = crate::BitReader<PIDR_A>;
89#[doc = "Port State\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum PIDR_A {
92 #[doc = "0: Low level"]
93 _0 = 0,
94 #[doc = "1: High level"]
95 _1 = 1,
96}
97impl From<PIDR_A> for bool {
98 #[inline(always)]
99 fn from(variant: PIDR_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl PIDR_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> PIDR_A {
107 match self.bits {
108 false => PIDR_A::_0,
109 true => PIDR_A::_1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `_0`"]
113 #[inline(always)]
114 pub fn is_0(&self) -> bool {
115 *self == PIDR_A::_0
116 }
117 #[doc = "Checks if the value of the field is `_1`"]
118 #[inline(always)]
119 pub fn is_1(&self) -> bool {
120 *self == PIDR_A::_1
121 }
122}
123#[doc = "Field `PDR` reader - Port Direction"]
124pub type PDR_R = crate::BitReader<PDR_A>;
125#[doc = "Port Direction\n\nValue on reset: 0"]
126#[derive(Clone, Copy, Debug, PartialEq, Eq)]
127pub enum PDR_A {
128 #[doc = "0: Input (functions as an input pin)"]
129 _0 = 0,
130 #[doc = "1: Output (functions as an output pin)"]
131 _1 = 1,
132}
133impl From<PDR_A> for bool {
134 #[inline(always)]
135 fn from(variant: PDR_A) -> Self {
136 variant as u8 != 0
137 }
138}
139impl PDR_R {
140 #[doc = "Get enumerated values variant"]
141 #[inline(always)]
142 pub fn variant(&self) -> PDR_A {
143 match self.bits {
144 false => PDR_A::_0,
145 true => PDR_A::_1,
146 }
147 }
148 #[doc = "Checks if the value of the field is `_0`"]
149 #[inline(always)]
150 pub fn is_0(&self) -> bool {
151 *self == PDR_A::_0
152 }
153 #[doc = "Checks if the value of the field is `_1`"]
154 #[inline(always)]
155 pub fn is_1(&self) -> bool {
156 *self == PDR_A::_1
157 }
158}
159#[doc = "Field `PDR` writer - Port Direction"]
160pub type PDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P1PFS_SPEC, PDR_A, O>;
161impl<'a, const O: u8> PDR_W<'a, O> {
162 #[doc = "Input (functions as an input pin)"]
163 #[inline(always)]
164 pub fn _0(self) -> &'a mut W {
165 self.variant(PDR_A::_0)
166 }
167 #[doc = "Output (functions as an output pin)"]
168 #[inline(always)]
169 pub fn _1(self) -> &'a mut W {
170 self.variant(PDR_A::_1)
171 }
172}
173#[doc = "Field `PCR` reader - Pull-up Control"]
174pub type PCR_R = crate::BitReader<PCR_A>;
175#[doc = "Pull-up Control\n\nValue on reset: 0"]
176#[derive(Clone, Copy, Debug, PartialEq, Eq)]
177pub enum PCR_A {
178 #[doc = "0: Disable input pull-up"]
179 _0 = 0,
180 #[doc = "1: Enable input pull-up"]
181 _1 = 1,
182}
183impl From<PCR_A> for bool {
184 #[inline(always)]
185 fn from(variant: PCR_A) -> Self {
186 variant as u8 != 0
187 }
188}
189impl PCR_R {
190 #[doc = "Get enumerated values variant"]
191 #[inline(always)]
192 pub fn variant(&self) -> PCR_A {
193 match self.bits {
194 false => PCR_A::_0,
195 true => PCR_A::_1,
196 }
197 }
198 #[doc = "Checks if the value of the field is `_0`"]
199 #[inline(always)]
200 pub fn is_0(&self) -> bool {
201 *self == PCR_A::_0
202 }
203 #[doc = "Checks if the value of the field is `_1`"]
204 #[inline(always)]
205 pub fn is_1(&self) -> bool {
206 *self == PCR_A::_1
207 }
208}
209#[doc = "Field `PCR` writer - Pull-up Control"]
210pub type PCR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P1PFS_SPEC, PCR_A, O>;
211impl<'a, const O: u8> PCR_W<'a, O> {
212 #[doc = "Disable input pull-up"]
213 #[inline(always)]
214 pub fn _0(self) -> &'a mut W {
215 self.variant(PCR_A::_0)
216 }
217 #[doc = "Enable input pull-up"]
218 #[inline(always)]
219 pub fn _1(self) -> &'a mut W {
220 self.variant(PCR_A::_1)
221 }
222}
223#[doc = "Field `NCODR` reader - N-Channel Open-Drain Control"]
224pub type NCODR_R = crate::BitReader<NCODR_A>;
225#[doc = "N-Channel Open-Drain Control\n\nValue on reset: 0"]
226#[derive(Clone, Copy, Debug, PartialEq, Eq)]
227pub enum NCODR_A {
228 #[doc = "0: Output CMOS"]
229 _0 = 0,
230 #[doc = "1: Output NMOS open-drain"]
231 _1 = 1,
232}
233impl From<NCODR_A> for bool {
234 #[inline(always)]
235 fn from(variant: NCODR_A) -> Self {
236 variant as u8 != 0
237 }
238}
239impl NCODR_R {
240 #[doc = "Get enumerated values variant"]
241 #[inline(always)]
242 pub fn variant(&self) -> NCODR_A {
243 match self.bits {
244 false => NCODR_A::_0,
245 true => NCODR_A::_1,
246 }
247 }
248 #[doc = "Checks if the value of the field is `_0`"]
249 #[inline(always)]
250 pub fn is_0(&self) -> bool {
251 *self == NCODR_A::_0
252 }
253 #[doc = "Checks if the value of the field is `_1`"]
254 #[inline(always)]
255 pub fn is_1(&self) -> bool {
256 *self == NCODR_A::_1
257 }
258}
259#[doc = "Field `NCODR` writer - N-Channel Open-Drain Control"]
260pub type NCODR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P1PFS_SPEC, NCODR_A, O>;
261impl<'a, const O: u8> NCODR_W<'a, O> {
262 #[doc = "Output CMOS"]
263 #[inline(always)]
264 pub fn _0(self) -> &'a mut W {
265 self.variant(NCODR_A::_0)
266 }
267 #[doc = "Output NMOS open-drain"]
268 #[inline(always)]
269 pub fn _1(self) -> &'a mut W {
270 self.variant(NCODR_A::_1)
271 }
272}
273#[doc = "Field `DSCR` reader - Port Drive Capability"]
274pub type DSCR_R = crate::FieldReader<u8, DSCR_A>;
275#[doc = "Port Drive Capability\n\nValue on reset: 0"]
276#[derive(Clone, Copy, Debug, PartialEq, Eq)]
277#[repr(u8)]
278pub enum DSCR_A {
279 #[doc = "0: Low drive"]
280 _00 = 0,
281 #[doc = "1: Middle drive"]
282 _01 = 1,
283 #[doc = "2: Setting prohibited"]
284 _10 = 2,
285 #[doc = "3: High drive"]
286 _11 = 3,
287}
288impl From<DSCR_A> for u8 {
289 #[inline(always)]
290 fn from(variant: DSCR_A) -> Self {
291 variant as _
292 }
293}
294impl DSCR_R {
295 #[doc = "Get enumerated values variant"]
296 #[inline(always)]
297 pub fn variant(&self) -> DSCR_A {
298 match self.bits {
299 0 => DSCR_A::_00,
300 1 => DSCR_A::_01,
301 2 => DSCR_A::_10,
302 3 => DSCR_A::_11,
303 _ => unreachable!(),
304 }
305 }
306 #[doc = "Checks if the value of the field is `_00`"]
307 #[inline(always)]
308 pub fn is_00(&self) -> bool {
309 *self == DSCR_A::_00
310 }
311 #[doc = "Checks if the value of the field is `_01`"]
312 #[inline(always)]
313 pub fn is_01(&self) -> bool {
314 *self == DSCR_A::_01
315 }
316 #[doc = "Checks if the value of the field is `_10`"]
317 #[inline(always)]
318 pub fn is_10(&self) -> bool {
319 *self == DSCR_A::_10
320 }
321 #[doc = "Checks if the value of the field is `_11`"]
322 #[inline(always)]
323 pub fn is_11(&self) -> bool {
324 *self == DSCR_A::_11
325 }
326}
327#[doc = "Field `DSCR` writer - Port Drive Capability"]
328pub type DSCR_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, P1PFS_SPEC, u8, DSCR_A, 2, O>;
329impl<'a, const O: u8> DSCR_W<'a, O> {
330 #[doc = "Low drive"]
331 #[inline(always)]
332 pub fn _00(self) -> &'a mut W {
333 self.variant(DSCR_A::_00)
334 }
335 #[doc = "Middle drive"]
336 #[inline(always)]
337 pub fn _01(self) -> &'a mut W {
338 self.variant(DSCR_A::_01)
339 }
340 #[doc = "Setting prohibited"]
341 #[inline(always)]
342 pub fn _10(self) -> &'a mut W {
343 self.variant(DSCR_A::_10)
344 }
345 #[doc = "High drive"]
346 #[inline(always)]
347 pub fn _11(self) -> &'a mut W {
348 self.variant(DSCR_A::_11)
349 }
350}
351#[doc = "Field `EOFR` reader - Event on Falling/Event on Rising"]
352pub type EOFR_R = crate::FieldReader<u8, EOFR_A>;
353#[doc = "Event on Falling/Event on Rising\n\nValue on reset: 0"]
354#[derive(Clone, Copy, Debug, PartialEq, Eq)]
355#[repr(u8)]
356pub enum EOFR_A {
357 #[doc = "0: Don't care"]
358 _00 = 0,
359 #[doc = "1: Detect rising edge"]
360 _01 = 1,
361 #[doc = "2: Detect falling edge"]
362 _10 = 2,
363 #[doc = "3: Detect both edges"]
364 _11 = 3,
365}
366impl From<EOFR_A> for u8 {
367 #[inline(always)]
368 fn from(variant: EOFR_A) -> Self {
369 variant as _
370 }
371}
372impl EOFR_R {
373 #[doc = "Get enumerated values variant"]
374 #[inline(always)]
375 pub fn variant(&self) -> EOFR_A {
376 match self.bits {
377 0 => EOFR_A::_00,
378 1 => EOFR_A::_01,
379 2 => EOFR_A::_10,
380 3 => EOFR_A::_11,
381 _ => unreachable!(),
382 }
383 }
384 #[doc = "Checks if the value of the field is `_00`"]
385 #[inline(always)]
386 pub fn is_00(&self) -> bool {
387 *self == EOFR_A::_00
388 }
389 #[doc = "Checks if the value of the field is `_01`"]
390 #[inline(always)]
391 pub fn is_01(&self) -> bool {
392 *self == EOFR_A::_01
393 }
394 #[doc = "Checks if the value of the field is `_10`"]
395 #[inline(always)]
396 pub fn is_10(&self) -> bool {
397 *self == EOFR_A::_10
398 }
399 #[doc = "Checks if the value of the field is `_11`"]
400 #[inline(always)]
401 pub fn is_11(&self) -> bool {
402 *self == EOFR_A::_11
403 }
404}
405#[doc = "Field `EOFR` writer - Event on Falling/Event on Rising"]
406pub type EOFR_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, P1PFS_SPEC, u8, EOFR_A, 2, O>;
407impl<'a, const O: u8> EOFR_W<'a, O> {
408 #[doc = "Don't care"]
409 #[inline(always)]
410 pub fn _00(self) -> &'a mut W {
411 self.variant(EOFR_A::_00)
412 }
413 #[doc = "Detect rising edge"]
414 #[inline(always)]
415 pub fn _01(self) -> &'a mut W {
416 self.variant(EOFR_A::_01)
417 }
418 #[doc = "Detect falling edge"]
419 #[inline(always)]
420 pub fn _10(self) -> &'a mut W {
421 self.variant(EOFR_A::_10)
422 }
423 #[doc = "Detect both edges"]
424 #[inline(always)]
425 pub fn _11(self) -> &'a mut W {
426 self.variant(EOFR_A::_11)
427 }
428}
429#[doc = "Field `ISEL` reader - IRQ Input Enable"]
430pub type ISEL_R = crate::BitReader<ISEL_A>;
431#[doc = "IRQ Input Enable\n\nValue on reset: 0"]
432#[derive(Clone, Copy, Debug, PartialEq, Eq)]
433pub enum ISEL_A {
434 #[doc = "0: Do not use as IRQn input pin"]
435 _0 = 0,
436 #[doc = "1: Use as IRQn input pin"]
437 _1 = 1,
438}
439impl From<ISEL_A> for bool {
440 #[inline(always)]
441 fn from(variant: ISEL_A) -> Self {
442 variant as u8 != 0
443 }
444}
445impl ISEL_R {
446 #[doc = "Get enumerated values variant"]
447 #[inline(always)]
448 pub fn variant(&self) -> ISEL_A {
449 match self.bits {
450 false => ISEL_A::_0,
451 true => ISEL_A::_1,
452 }
453 }
454 #[doc = "Checks if the value of the field is `_0`"]
455 #[inline(always)]
456 pub fn is_0(&self) -> bool {
457 *self == ISEL_A::_0
458 }
459 #[doc = "Checks if the value of the field is `_1`"]
460 #[inline(always)]
461 pub fn is_1(&self) -> bool {
462 *self == ISEL_A::_1
463 }
464}
465#[doc = "Field `ISEL` writer - IRQ Input Enable"]
466pub type ISEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, P1PFS_SPEC, ISEL_A, O>;
467impl<'a, const O: u8> ISEL_W<'a, O> {
468 #[doc = "Do not use as IRQn input pin"]
469 #[inline(always)]
470 pub fn _0(self) -> &'a mut W {
471 self.variant(ISEL_A::_0)
472 }
473 #[doc = "Use as IRQn input pin"]
474 #[inline(always)]
475 pub fn _1(self) -> &'a mut W {
476 self.variant(ISEL_A::_1)
477 }
478}
479#[doc = "Field `ASEL` reader - Analog Input Enable"]
480pub type ASEL_R = crate::BitReader<ASEL_A>;
481#[doc = "Analog Input Enable\n\nValue on reset: 0"]
482#[derive(Clone, Copy, Debug, PartialEq, Eq)]
483pub enum ASEL_A {
484 #[doc = "0: Do not use as analog pin"]
485 _0 = 0,
486 #[doc = "1: Use as analog pin"]
487 _1 = 1,
488}
489impl From<ASEL_A> for bool {
490 #[inline(always)]
491 fn from(variant: ASEL_A) -> Self {
492 variant as u8 != 0
493 }
494}
495impl ASEL_R {
496 #[doc = "Get enumerated values variant"]
497 #[inline(always)]
498 pub fn variant(&self) -> ASEL_A {
499 match self.bits {
500 false => ASEL_A::_0,
501 true => ASEL_A::_1,
502 }
503 }
504 #[doc = "Checks if the value of the field is `_0`"]
505 #[inline(always)]
506 pub fn is_0(&self) -> bool {
507 *self == ASEL_A::_0
508 }
509 #[doc = "Checks if the value of the field is `_1`"]
510 #[inline(always)]
511 pub fn is_1(&self) -> bool {
512 *self == ASEL_A::_1
513 }
514}
515#[doc = "Field `ASEL` writer - Analog Input Enable"]
516pub type ASEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, P1PFS_SPEC, ASEL_A, O>;
517impl<'a, const O: u8> ASEL_W<'a, O> {
518 #[doc = "Do not use as analog pin"]
519 #[inline(always)]
520 pub fn _0(self) -> &'a mut W {
521 self.variant(ASEL_A::_0)
522 }
523 #[doc = "Use as analog pin"]
524 #[inline(always)]
525 pub fn _1(self) -> &'a mut W {
526 self.variant(ASEL_A::_1)
527 }
528}
529#[doc = "Field `PMR` reader - Port Mode Control"]
530pub type PMR_R = crate::BitReader<PMR_A>;
531#[doc = "Port Mode Control\n\nValue on reset: 0"]
532#[derive(Clone, Copy, Debug, PartialEq, Eq)]
533pub enum PMR_A {
534 #[doc = "0: Use as general I/O pin"]
535 _0 = 0,
536 #[doc = "1: Use as I/O port for peripheral functions"]
537 _1 = 1,
538}
539impl From<PMR_A> for bool {
540 #[inline(always)]
541 fn from(variant: PMR_A) -> Self {
542 variant as u8 != 0
543 }
544}
545impl PMR_R {
546 #[doc = "Get enumerated values variant"]
547 #[inline(always)]
548 pub fn variant(&self) -> PMR_A {
549 match self.bits {
550 false => PMR_A::_0,
551 true => PMR_A::_1,
552 }
553 }
554 #[doc = "Checks if the value of the field is `_0`"]
555 #[inline(always)]
556 pub fn is_0(&self) -> bool {
557 *self == PMR_A::_0
558 }
559 #[doc = "Checks if the value of the field is `_1`"]
560 #[inline(always)]
561 pub fn is_1(&self) -> bool {
562 *self == PMR_A::_1
563 }
564}
565#[doc = "Field `PMR` writer - Port Mode Control"]
566pub type PMR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P1PFS_SPEC, PMR_A, O>;
567impl<'a, const O: u8> PMR_W<'a, O> {
568 #[doc = "Use as general I/O pin"]
569 #[inline(always)]
570 pub fn _0(self) -> &'a mut W {
571 self.variant(PMR_A::_0)
572 }
573 #[doc = "Use as I/O port for peripheral functions"]
574 #[inline(always)]
575 pub fn _1(self) -> &'a mut W {
576 self.variant(PMR_A::_1)
577 }
578}
579#[doc = "Field `PSEL` reader - Peripheral Select"]
580pub type PSEL_R = crate::FieldReader<u8, u8>;
581#[doc = "Field `PSEL` writer - Peripheral Select"]
582pub type PSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, P1PFS_SPEC, u8, u8, 5, O>;
583impl R {
584 #[doc = "Bit 0 - Port Output Data"]
585 #[inline(always)]
586 pub fn podr(&self) -> PODR_R {
587 PODR_R::new((self.bits & 1) != 0)
588 }
589 #[doc = "Bit 1 - Port State"]
590 #[inline(always)]
591 pub fn pidr(&self) -> PIDR_R {
592 PIDR_R::new(((self.bits >> 1) & 1) != 0)
593 }
594 #[doc = "Bit 2 - Port Direction"]
595 #[inline(always)]
596 pub fn pdr(&self) -> PDR_R {
597 PDR_R::new(((self.bits >> 2) & 1) != 0)
598 }
599 #[doc = "Bit 4 - Pull-up Control"]
600 #[inline(always)]
601 pub fn pcr(&self) -> PCR_R {
602 PCR_R::new(((self.bits >> 4) & 1) != 0)
603 }
604 #[doc = "Bit 6 - N-Channel Open-Drain Control"]
605 #[inline(always)]
606 pub fn ncodr(&self) -> NCODR_R {
607 NCODR_R::new(((self.bits >> 6) & 1) != 0)
608 }
609 #[doc = "Bits 10:11 - Port Drive Capability"]
610 #[inline(always)]
611 pub fn dscr(&self) -> DSCR_R {
612 DSCR_R::new(((self.bits >> 10) & 3) as u8)
613 }
614 #[doc = "Bits 12:13 - Event on Falling/Event on Rising"]
615 #[inline(always)]
616 pub fn eofr(&self) -> EOFR_R {
617 EOFR_R::new(((self.bits >> 12) & 3) as u8)
618 }
619 #[doc = "Bit 14 - IRQ Input Enable"]
620 #[inline(always)]
621 pub fn isel(&self) -> ISEL_R {
622 ISEL_R::new(((self.bits >> 14) & 1) != 0)
623 }
624 #[doc = "Bit 15 - Analog Input Enable"]
625 #[inline(always)]
626 pub fn asel(&self) -> ASEL_R {
627 ASEL_R::new(((self.bits >> 15) & 1) != 0)
628 }
629 #[doc = "Bit 16 - Port Mode Control"]
630 #[inline(always)]
631 pub fn pmr(&self) -> PMR_R {
632 PMR_R::new(((self.bits >> 16) & 1) != 0)
633 }
634 #[doc = "Bits 24:28 - Peripheral Select"]
635 #[inline(always)]
636 pub fn psel(&self) -> PSEL_R {
637 PSEL_R::new(((self.bits >> 24) & 0x1f) as u8)
638 }
639}
640impl W {
641 #[doc = "Bit 0 - Port Output Data"]
642 #[inline(always)]
643 #[must_use]
644 pub fn podr(&mut self) -> PODR_W<0> {
645 PODR_W::new(self)
646 }
647 #[doc = "Bit 2 - Port Direction"]
648 #[inline(always)]
649 #[must_use]
650 pub fn pdr(&mut self) -> PDR_W<2> {
651 PDR_W::new(self)
652 }
653 #[doc = "Bit 4 - Pull-up Control"]
654 #[inline(always)]
655 #[must_use]
656 pub fn pcr(&mut self) -> PCR_W<4> {
657 PCR_W::new(self)
658 }
659 #[doc = "Bit 6 - N-Channel Open-Drain Control"]
660 #[inline(always)]
661 #[must_use]
662 pub fn ncodr(&mut self) -> NCODR_W<6> {
663 NCODR_W::new(self)
664 }
665 #[doc = "Bits 10:11 - Port Drive Capability"]
666 #[inline(always)]
667 #[must_use]
668 pub fn dscr(&mut self) -> DSCR_W<10> {
669 DSCR_W::new(self)
670 }
671 #[doc = "Bits 12:13 - Event on Falling/Event on Rising"]
672 #[inline(always)]
673 #[must_use]
674 pub fn eofr(&mut self) -> EOFR_W<12> {
675 EOFR_W::new(self)
676 }
677 #[doc = "Bit 14 - IRQ Input Enable"]
678 #[inline(always)]
679 #[must_use]
680 pub fn isel(&mut self) -> ISEL_W<14> {
681 ISEL_W::new(self)
682 }
683 #[doc = "Bit 15 - Analog Input Enable"]
684 #[inline(always)]
685 #[must_use]
686 pub fn asel(&mut self) -> ASEL_W<15> {
687 ASEL_W::new(self)
688 }
689 #[doc = "Bit 16 - Port Mode Control"]
690 #[inline(always)]
691 #[must_use]
692 pub fn pmr(&mut self) -> PMR_W<16> {
693 PMR_W::new(self)
694 }
695 #[doc = "Bits 24:28 - Peripheral Select"]
696 #[inline(always)]
697 #[must_use]
698 pub fn psel(&mut self) -> PSEL_W<24> {
699 PSEL_W::new(self)
700 }
701 #[doc = "Writes raw bits to the register."]
702 #[inline(always)]
703 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
704 self.0.bits(bits);
705 self
706 }
707}
708#[doc = "Port 1%s Pin Function Select Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [p1pfs](index.html) module"]
709pub struct P1PFS_SPEC;
710impl crate::RegisterSpec for P1PFS_SPEC {
711 type Ux = u32;
712}
713#[doc = "`read()` method returns [p1pfs::R](R) reader structure"]
714impl crate::Readable for P1PFS_SPEC {
715 type Reader = R;
716}
717#[doc = "`write(|w| ..)` method takes [p1pfs::W](W) writer structure"]
718impl crate::Writable for P1PFS_SPEC {
719 type Writer = W;
720 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
721 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
722}
723#[doc = "`reset()` method sets P1%sPFS to value 0"]
724impl crate::Resettable for P1PFS_SPEC {
725 const RESET_VALUE: Self::Ux = 0;
726}