1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Standby Control Register"]
38 #[inline(always)]
39 pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(12usize),
43 )
44 }
45 }
46
47 #[doc = "System Clock Division Control Register"]
48 #[inline(always)]
49 pub const fn sckdivcr(
50 &self,
51 ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(32usize),
55 )
56 }
57 }
58
59 #[doc = "System Clock Source Control Register"]
60 #[inline(always)]
61 pub const fn sckscr(
62 &self,
63 ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
64 unsafe {
65 crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
66 self._svd2pac_as_ptr().add(38usize),
67 )
68 }
69 }
70
71 #[doc = "PLL Clock Control Register"]
72 #[inline(always)]
73 pub const fn pllccr(
74 &self,
75 ) -> &'static crate::common::Reg<self::Pllccr_SPEC, crate::common::RW> {
76 unsafe {
77 crate::common::Reg::<self::Pllccr_SPEC, crate::common::RW>::from_ptr(
78 self._svd2pac_as_ptr().add(40usize),
79 )
80 }
81 }
82
83 #[doc = "PLL Control Register"]
84 #[inline(always)]
85 pub const fn pllcr(&self) -> &'static crate::common::Reg<self::Pllcr_SPEC, crate::common::RW> {
86 unsafe {
87 crate::common::Reg::<self::Pllcr_SPEC, crate::common::RW>::from_ptr(
88 self._svd2pac_as_ptr().add(42usize),
89 )
90 }
91 }
92
93 #[doc = "Main Clock Oscillator Control Register"]
94 #[inline(always)]
95 pub const fn mosccr(
96 &self,
97 ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
98 unsafe {
99 crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
100 self._svd2pac_as_ptr().add(50usize),
101 )
102 }
103 }
104
105 #[doc = "High-Speed On-Chip Oscillator Control Register"]
106 #[inline(always)]
107 pub const fn hococr(
108 &self,
109 ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
110 unsafe {
111 crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
112 self._svd2pac_as_ptr().add(54usize),
113 )
114 }
115 }
116
117 #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
118 #[inline(always)]
119 pub const fn mococr(
120 &self,
121 ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
122 unsafe {
123 crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
124 self._svd2pac_as_ptr().add(56usize),
125 )
126 }
127 }
128
129 #[doc = "FLL Control Register1"]
130 #[inline(always)]
131 pub const fn fllcr1(
132 &self,
133 ) -> &'static crate::common::Reg<self::Fllcr1_SPEC, crate::common::RW> {
134 unsafe {
135 crate::common::Reg::<self::Fllcr1_SPEC, crate::common::RW>::from_ptr(
136 self._svd2pac_as_ptr().add(57usize),
137 )
138 }
139 }
140
141 #[doc = "FLL Control Register2"]
142 #[inline(always)]
143 pub const fn fllcr2(
144 &self,
145 ) -> &'static crate::common::Reg<self::Fllcr2_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::Fllcr2_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(58usize),
149 )
150 }
151 }
152
153 #[doc = "Oscillation Stabilization Flag Register"]
154 #[inline(always)]
155 pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
156 unsafe {
157 crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
158 self._svd2pac_as_ptr().add(60usize),
159 )
160 }
161 }
162
163 #[doc = "Clock Out Control Register"]
164 #[inline(always)]
165 pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(62usize),
169 )
170 }
171 }
172
173 #[doc = "Trace Clock Control Register"]
174 #[inline(always)]
175 pub const fn trckcr(
176 &self,
177 ) -> &'static crate::common::Reg<self::Trckcr_SPEC, crate::common::RW> {
178 unsafe {
179 crate::common::Reg::<self::Trckcr_SPEC, crate::common::RW>::from_ptr(
180 self._svd2pac_as_ptr().add(63usize),
181 )
182 }
183 }
184
185 #[doc = "Oscillation Stop Detection Control Register"]
186 #[inline(always)]
187 pub const fn ostdcr(
188 &self,
189 ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
190 unsafe {
191 crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
192 self._svd2pac_as_ptr().add(64usize),
193 )
194 }
195 }
196
197 #[doc = "Oscillation Stop Detection Status Register"]
198 #[inline(always)]
199 pub const fn ostdsr(
200 &self,
201 ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
202 unsafe {
203 crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
204 self._svd2pac_as_ptr().add(65usize),
205 )
206 }
207 }
208
209 #[doc = "PLL2 Clock Control Register"]
210 #[inline(always)]
211 pub const fn pll2ccr(
212 &self,
213 ) -> &'static crate::common::Reg<self::Pll2Ccr_SPEC, crate::common::RW> {
214 unsafe {
215 crate::common::Reg::<self::Pll2Ccr_SPEC, crate::common::RW>::from_ptr(
216 self._svd2pac_as_ptr().add(72usize),
217 )
218 }
219 }
220
221 #[doc = "PLL2 Control Register"]
222 #[inline(always)]
223 pub const fn pll2cr(
224 &self,
225 ) -> &'static crate::common::Reg<self::Pll2Cr_SPEC, crate::common::RW> {
226 unsafe {
227 crate::common::Reg::<self::Pll2Cr_SPEC, crate::common::RW>::from_ptr(
228 self._svd2pac_as_ptr().add(74usize),
229 )
230 }
231 }
232
233 #[doc = "MOCO User Trimming Control Register"]
234 #[inline(always)]
235 pub const fn mocoutcr(
236 &self,
237 ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
238 unsafe {
239 crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
240 self._svd2pac_as_ptr().add(97usize),
241 )
242 }
243 }
244
245 #[doc = "HOCO User Trimming Control Register"]
246 #[inline(always)]
247 pub const fn hocoutcr(
248 &self,
249 ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
250 unsafe {
251 crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
252 self._svd2pac_as_ptr().add(98usize),
253 )
254 }
255 }
256
257 #[doc = "USB Clock Division Control Register"]
258 #[inline(always)]
259 pub const fn usbckdivcr(
260 &self,
261 ) -> &'static crate::common::Reg<self::Usbckdivcr_SPEC, crate::common::RW> {
262 unsafe {
263 crate::common::Reg::<self::Usbckdivcr_SPEC, crate::common::RW>::from_ptr(
264 self._svd2pac_as_ptr().add(108usize),
265 )
266 }
267 }
268
269 #[doc = "USB Clock Control Register"]
270 #[inline(always)]
271 pub const fn usbckcr(
272 &self,
273 ) -> &'static crate::common::Reg<self::Usbckcr_SPEC, crate::common::RW> {
274 unsafe {
275 crate::common::Reg::<self::Usbckcr_SPEC, crate::common::RW>::from_ptr(
276 self._svd2pac_as_ptr().add(116usize),
277 )
278 }
279 }
280
281 #[doc = "Snooze Request Control Register 1"]
282 #[inline(always)]
283 pub const fn snzreqcr1(
284 &self,
285 ) -> &'static crate::common::Reg<self::Snzreqcr1_SPEC, crate::common::RW> {
286 unsafe {
287 crate::common::Reg::<self::Snzreqcr1_SPEC, crate::common::RW>::from_ptr(
288 self._svd2pac_as_ptr().add(136usize),
289 )
290 }
291 }
292
293 #[doc = "Snooze Control Register"]
294 #[inline(always)]
295 pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
296 unsafe {
297 crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
298 self._svd2pac_as_ptr().add(146usize),
299 )
300 }
301 }
302
303 #[doc = "Snooze End Control Register 0"]
304 #[inline(always)]
305 pub const fn snzedcr0(
306 &self,
307 ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
308 unsafe {
309 crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
310 self._svd2pac_as_ptr().add(148usize),
311 )
312 }
313 }
314
315 #[doc = "Snooze End Control Register 1"]
316 #[inline(always)]
317 pub const fn snzedcr1(
318 &self,
319 ) -> &'static crate::common::Reg<self::Snzedcr1_SPEC, crate::common::RW> {
320 unsafe {
321 crate::common::Reg::<self::Snzedcr1_SPEC, crate::common::RW>::from_ptr(
322 self._svd2pac_as_ptr().add(149usize),
323 )
324 }
325 }
326
327 #[doc = "Snooze Request Control Register 0"]
328 #[inline(always)]
329 pub const fn snzreqcr0(
330 &self,
331 ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
332 unsafe {
333 crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
334 self._svd2pac_as_ptr().add(152usize),
335 )
336 }
337 }
338
339 #[doc = "Operating Power Control Register"]
340 #[inline(always)]
341 pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
342 unsafe {
343 crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
344 self._svd2pac_as_ptr().add(160usize),
345 )
346 }
347 }
348
349 #[doc = "Main Clock Oscillator Wait Control Register"]
350 #[inline(always)]
351 pub const fn moscwtcr(
352 &self,
353 ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
354 unsafe {
355 crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
356 self._svd2pac_as_ptr().add(162usize),
357 )
358 }
359 }
360
361 #[doc = "Sub Operating Power Control Register"]
362 #[inline(always)]
363 pub const fn sopccr(
364 &self,
365 ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
366 unsafe {
367 crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
368 self._svd2pac_as_ptr().add(170usize),
369 )
370 }
371 }
372
373 #[doc = "Reset Status Register 1"]
374 #[inline(always)]
375 pub const fn rstsr1(
376 &self,
377 ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
378 unsafe {
379 crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
380 self._svd2pac_as_ptr().add(192usize),
381 )
382 }
383 }
384
385 #[doc = "Voltage Monitor 1 Circuit Control Register"]
386 #[inline(always)]
387 pub const fn lvd1cr1(
388 &self,
389 ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
390 unsafe {
391 crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
392 self._svd2pac_as_ptr().add(224usize),
393 )
394 }
395 }
396
397 #[doc = "Voltage Monitor 1 Circuit Status Register"]
398 #[inline(always)]
399 pub const fn lvd1sr(
400 &self,
401 ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
402 unsafe {
403 crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
404 self._svd2pac_as_ptr().add(225usize),
405 )
406 }
407 }
408
409 #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
410 #[inline(always)]
411 pub const fn lvd2cr1(
412 &self,
413 ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
414 unsafe {
415 crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
416 self._svd2pac_as_ptr().add(226usize),
417 )
418 }
419 }
420
421 #[doc = "Voltage Monitor 2 Circuit Status Register"]
422 #[inline(always)]
423 pub const fn lvd2sr(
424 &self,
425 ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
426 unsafe {
427 crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
428 self._svd2pac_as_ptr().add(227usize),
429 )
430 }
431 }
432
433 #[doc = "Clock Generation Function Security Attribute Register"]
434 #[inline(always)]
435 pub const fn cgfsar(
436 &self,
437 ) -> &'static crate::common::Reg<self::Cgfsar_SPEC, crate::common::RW> {
438 unsafe {
439 crate::common::Reg::<self::Cgfsar_SPEC, crate::common::RW>::from_ptr(
440 self._svd2pac_as_ptr().add(960usize),
441 )
442 }
443 }
444
445 #[doc = "Reset Security Attribution Register"]
446 #[inline(always)]
447 pub const fn rstsar(
448 &self,
449 ) -> &'static crate::common::Reg<self::Rstsar_SPEC, crate::common::RW> {
450 unsafe {
451 crate::common::Reg::<self::Rstsar_SPEC, crate::common::RW>::from_ptr(
452 self._svd2pac_as_ptr().add(964usize),
453 )
454 }
455 }
456
457 #[doc = "Low Power Mode Security Attribution Register"]
458 #[inline(always)]
459 pub const fn lpmsar(
460 &self,
461 ) -> &'static crate::common::Reg<self::Lpmsar_SPEC, crate::common::RW> {
462 unsafe {
463 crate::common::Reg::<self::Lpmsar_SPEC, crate::common::RW>::from_ptr(
464 self._svd2pac_as_ptr().add(968usize),
465 )
466 }
467 }
468
469 #[doc = "Low Voltage Detection Security Attribution Register"]
470 #[inline(always)]
471 pub const fn lvdsar(
472 &self,
473 ) -> &'static crate::common::Reg<self::Lvdsar_SPEC, crate::common::RW> {
474 unsafe {
475 crate::common::Reg::<self::Lvdsar_SPEC, crate::common::RW>::from_ptr(
476 self._svd2pac_as_ptr().add(972usize),
477 )
478 }
479 }
480
481 #[doc = "Battery Backup Function Security Attribute Register"]
482 #[inline(always)]
483 pub const fn bbfsar(
484 &self,
485 ) -> &'static crate::common::Reg<self::Bbfsar_SPEC, crate::common::RW> {
486 unsafe {
487 crate::common::Reg::<self::Bbfsar_SPEC, crate::common::RW>::from_ptr(
488 self._svd2pac_as_ptr().add(976usize),
489 )
490 }
491 }
492
493 #[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
494 #[inline(always)]
495 pub const fn dpfsar(
496 &self,
497 ) -> &'static crate::common::Reg<self::Dpfsar_SPEC, crate::common::RW> {
498 unsafe {
499 crate::common::Reg::<self::Dpfsar_SPEC, crate::common::RW>::from_ptr(
500 self._svd2pac_as_ptr().add(992usize),
501 )
502 }
503 }
504
505 #[doc = "Protect Register"]
506 #[inline(always)]
507 pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
508 unsafe {
509 crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
510 self._svd2pac_as_ptr().add(1022usize),
511 )
512 }
513 }
514
515 #[doc = "Deep Software Standby Control Register"]
516 #[inline(always)]
517 pub const fn dpsbycr(
518 &self,
519 ) -> &'static crate::common::Reg<self::Dpsbycr_SPEC, crate::common::RW> {
520 unsafe {
521 crate::common::Reg::<self::Dpsbycr_SPEC, crate::common::RW>::from_ptr(
522 self._svd2pac_as_ptr().add(1024usize),
523 )
524 }
525 }
526
527 #[doc = "Deep Software Standby Wait Control Register"]
528 #[inline(always)]
529 pub const fn dpswcr(
530 &self,
531 ) -> &'static crate::common::Reg<self::Dpswcr_SPEC, crate::common::RW> {
532 unsafe {
533 crate::common::Reg::<self::Dpswcr_SPEC, crate::common::RW>::from_ptr(
534 self._svd2pac_as_ptr().add(1025usize),
535 )
536 }
537 }
538
539 #[doc = "Deep Software Standby Interrupt Enable Register 0"]
540 #[inline(always)]
541 pub const fn dpsier0(
542 &self,
543 ) -> &'static crate::common::Reg<self::Dpsier0_SPEC, crate::common::RW> {
544 unsafe {
545 crate::common::Reg::<self::Dpsier0_SPEC, crate::common::RW>::from_ptr(
546 self._svd2pac_as_ptr().add(1026usize),
547 )
548 }
549 }
550
551 #[doc = "Deep Software Standby Interrupt Enable Register 1"]
552 #[inline(always)]
553 pub const fn dpsier1(
554 &self,
555 ) -> &'static crate::common::Reg<self::Dpsier1_SPEC, crate::common::RW> {
556 unsafe {
557 crate::common::Reg::<self::Dpsier1_SPEC, crate::common::RW>::from_ptr(
558 self._svd2pac_as_ptr().add(1027usize),
559 )
560 }
561 }
562
563 #[doc = "Deep Software Standby Interrupt Enable Register 2"]
564 #[inline(always)]
565 pub const fn dpsier2(
566 &self,
567 ) -> &'static crate::common::Reg<self::Dpsier2_SPEC, crate::common::RW> {
568 unsafe {
569 crate::common::Reg::<self::Dpsier2_SPEC, crate::common::RW>::from_ptr(
570 self._svd2pac_as_ptr().add(1028usize),
571 )
572 }
573 }
574
575 #[doc = "Deep Software Standby Interrupt Enable Register 3"]
576 #[inline(always)]
577 pub const fn dpsier3(
578 &self,
579 ) -> &'static crate::common::Reg<self::Dpsier3_SPEC, crate::common::RW> {
580 unsafe {
581 crate::common::Reg::<self::Dpsier3_SPEC, crate::common::RW>::from_ptr(
582 self._svd2pac_as_ptr().add(1029usize),
583 )
584 }
585 }
586
587 #[doc = "Deep Software Standby Interrupt Flag Register 0"]
588 #[inline(always)]
589 pub const fn dpsifr0(
590 &self,
591 ) -> &'static crate::common::Reg<self::Dpsifr0_SPEC, crate::common::RW> {
592 unsafe {
593 crate::common::Reg::<self::Dpsifr0_SPEC, crate::common::RW>::from_ptr(
594 self._svd2pac_as_ptr().add(1030usize),
595 )
596 }
597 }
598
599 #[doc = "Deep Software Standby Interrupt Flag Register 1"]
600 #[inline(always)]
601 pub const fn dpsifr1(
602 &self,
603 ) -> &'static crate::common::Reg<self::Dpsifr1_SPEC, crate::common::RW> {
604 unsafe {
605 crate::common::Reg::<self::Dpsifr1_SPEC, crate::common::RW>::from_ptr(
606 self._svd2pac_as_ptr().add(1031usize),
607 )
608 }
609 }
610
611 #[doc = "Deep Software Standby Interrupt Flag Register 2"]
612 #[inline(always)]
613 pub const fn dpsifr2(
614 &self,
615 ) -> &'static crate::common::Reg<self::Dpsifr2_SPEC, crate::common::RW> {
616 unsafe {
617 crate::common::Reg::<self::Dpsifr2_SPEC, crate::common::RW>::from_ptr(
618 self._svd2pac_as_ptr().add(1032usize),
619 )
620 }
621 }
622
623 #[doc = "Deep Software Standby Interrupt Flag Register 3"]
624 #[inline(always)]
625 pub const fn dpsifr3(
626 &self,
627 ) -> &'static crate::common::Reg<self::Dpsifr3_SPEC, crate::common::RW> {
628 unsafe {
629 crate::common::Reg::<self::Dpsifr3_SPEC, crate::common::RW>::from_ptr(
630 self._svd2pac_as_ptr().add(1033usize),
631 )
632 }
633 }
634
635 #[doc = "Deep Software Standby Interrupt Edge Register 0"]
636 #[inline(always)]
637 pub const fn dpsiegr0(
638 &self,
639 ) -> &'static crate::common::Reg<self::Dpsiegr0_SPEC, crate::common::RW> {
640 unsafe {
641 crate::common::Reg::<self::Dpsiegr0_SPEC, crate::common::RW>::from_ptr(
642 self._svd2pac_as_ptr().add(1034usize),
643 )
644 }
645 }
646
647 #[doc = "Deep Software Standby Interrupt Edge Register 1"]
648 #[inline(always)]
649 pub const fn dpsiegr1(
650 &self,
651 ) -> &'static crate::common::Reg<self::Dpsiegr1_SPEC, crate::common::RW> {
652 unsafe {
653 crate::common::Reg::<self::Dpsiegr1_SPEC, crate::common::RW>::from_ptr(
654 self._svd2pac_as_ptr().add(1035usize),
655 )
656 }
657 }
658
659 #[doc = "Deep Software Standby Interrupt Edge Register 2"]
660 #[inline(always)]
661 pub const fn dpsiegr2(
662 &self,
663 ) -> &'static crate::common::Reg<self::Dpsiegr2_SPEC, crate::common::RW> {
664 unsafe {
665 crate::common::Reg::<self::Dpsiegr2_SPEC, crate::common::RW>::from_ptr(
666 self._svd2pac_as_ptr().add(1036usize),
667 )
668 }
669 }
670
671 #[doc = "System Control OCD Control Register"]
672 #[inline(always)]
673 pub const fn syocdcr(
674 &self,
675 ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
676 unsafe {
677 crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
678 self._svd2pac_as_ptr().add(1038usize),
679 )
680 }
681 }
682
683 #[doc = "Reset Status Register 0"]
684 #[inline(always)]
685 pub const fn rstsr0(
686 &self,
687 ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
688 unsafe {
689 crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
690 self._svd2pac_as_ptr().add(1040usize),
691 )
692 }
693 }
694
695 #[doc = "Reset Status Register 2"]
696 #[inline(always)]
697 pub const fn rstsr2(
698 &self,
699 ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
700 unsafe {
701 crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
702 self._svd2pac_as_ptr().add(1041usize),
703 )
704 }
705 }
706
707 #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
708 #[inline(always)]
709 pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
710 unsafe {
711 crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
712 self._svd2pac_as_ptr().add(1043usize),
713 )
714 }
715 }
716
717 #[doc = "Flash P/E Protect Register"]
718 #[inline(always)]
719 pub const fn fwepror(
720 &self,
721 ) -> &'static crate::common::Reg<self::Fwepror_SPEC, crate::common::RW> {
722 unsafe {
723 crate::common::Reg::<self::Fwepror_SPEC, crate::common::RW>::from_ptr(
724 self._svd2pac_as_ptr().add(1046usize),
725 )
726 }
727 }
728
729 #[doc = "Voltage Monitoring 1 Comparator Control Register"]
730 #[inline(always)]
731 pub const fn lvd1cmpcr(
732 &self,
733 ) -> &'static crate::common::Reg<self::Lvd1Cmpcr_SPEC, crate::common::RW> {
734 unsafe {
735 crate::common::Reg::<self::Lvd1Cmpcr_SPEC, crate::common::RW>::from_ptr(
736 self._svd2pac_as_ptr().add(1047usize),
737 )
738 }
739 }
740
741 #[doc = "Voltage Monitoring 2 Comparator Control Register"]
742 #[inline(always)]
743 pub const fn lvd2cmpcr(
744 &self,
745 ) -> &'static crate::common::Reg<self::Lvd2Cmpcr_SPEC, crate::common::RW> {
746 unsafe {
747 crate::common::Reg::<self::Lvd2Cmpcr_SPEC, crate::common::RW>::from_ptr(
748 self._svd2pac_as_ptr().add(1048usize),
749 )
750 }
751 }
752
753 #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
754 #[inline(always)]
755 pub const fn lvd1cr0(
756 &self,
757 ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
758 unsafe {
759 crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
760 self._svd2pac_as_ptr().add(1050usize),
761 )
762 }
763 }
764
765 #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
766 #[inline(always)]
767 pub const fn lvd2cr0(
768 &self,
769 ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
770 unsafe {
771 crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
772 self._svd2pac_as_ptr().add(1051usize),
773 )
774 }
775 }
776
777 #[doc = "Battery Backup Voltage Monitor Function Select Register"]
778 #[inline(always)]
779 pub const fn vbattmnselr(
780 &self,
781 ) -> &'static crate::common::Reg<self::Vbattmnselr_SPEC, crate::common::RW> {
782 unsafe {
783 crate::common::Reg::<self::Vbattmnselr_SPEC, crate::common::RW>::from_ptr(
784 self._svd2pac_as_ptr().add(1053usize),
785 )
786 }
787 }
788
789 #[doc = "Battery Backup Voltage Monitor Register"]
790 #[inline(always)]
791 pub const fn vbattmonr(
792 &self,
793 ) -> &'static crate::common::Reg<self::Vbattmonr_SPEC, crate::common::R> {
794 unsafe {
795 crate::common::Reg::<self::Vbattmonr_SPEC, crate::common::R>::from_ptr(
796 self._svd2pac_as_ptr().add(1054usize),
797 )
798 }
799 }
800
801 #[doc = "LDO Stop Control Register"]
802 #[inline(always)]
803 pub const fn ldoscr(
804 &self,
805 ) -> &'static crate::common::Reg<self::Ldoscr_SPEC, crate::common::RW> {
806 unsafe {
807 crate::common::Reg::<self::Ldoscr_SPEC, crate::common::RW>::from_ptr(
808 self._svd2pac_as_ptr().add(1088usize),
809 )
810 }
811 }
812
813 #[doc = "PLL2-LDO Stop Control Register"]
814 #[inline(always)]
815 pub const fn pl2ldoscr(
816 &self,
817 ) -> &'static crate::common::Reg<self::Pl2Ldoscr_SPEC, crate::common::RW> {
818 unsafe {
819 crate::common::Reg::<self::Pl2Ldoscr_SPEC, crate::common::RW>::from_ptr(
820 self._svd2pac_as_ptr().add(1092usize),
821 )
822 }
823 }
824
825 #[doc = "Sub-Clock Oscillator Control Register"]
826 #[inline(always)]
827 pub const fn sosccr(
828 &self,
829 ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
830 unsafe {
831 crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
832 self._svd2pac_as_ptr().add(1152usize),
833 )
834 }
835 }
836
837 #[doc = "Sub-Clock Oscillator Mode Control Register"]
838 #[inline(always)]
839 pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
840 unsafe {
841 crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
842 self._svd2pac_as_ptr().add(1153usize),
843 )
844 }
845 }
846
847 #[doc = "Low-Speed On-Chip Oscillator Control Register"]
848 #[inline(always)]
849 pub const fn lococr(
850 &self,
851 ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
852 unsafe {
853 crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
854 self._svd2pac_as_ptr().add(1168usize),
855 )
856 }
857 }
858
859 #[doc = "LOCO User Trimming Control Register"]
860 #[inline(always)]
861 pub const fn locoutcr(
862 &self,
863 ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
864 unsafe {
865 crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
866 self._svd2pac_as_ptr().add(1170usize),
867 )
868 }
869 }
870
871 #[doc = "VBATT Input Control Register"]
872 #[inline(always)]
873 pub const fn vbtictlr(
874 &self,
875 ) -> &'static crate::common::Reg<self::Vbtictlr_SPEC, crate::common::RW> {
876 unsafe {
877 crate::common::Reg::<self::Vbtictlr_SPEC, crate::common::RW>::from_ptr(
878 self._svd2pac_as_ptr().add(1211usize),
879 )
880 }
881 }
882
883 #[doc = "VBATT Backup Enable Register"]
884 #[inline(always)]
885 pub const fn vbtber(
886 &self,
887 ) -> &'static crate::common::Reg<self::Vbtber_SPEC, crate::common::RW> {
888 unsafe {
889 crate::common::Reg::<self::Vbtber_SPEC, crate::common::RW>::from_ptr(
890 self._svd2pac_as_ptr().add(1216usize),
891 )
892 }
893 }
894
895 #[doc = "VBATT Backup Register"]
896 #[inline(always)]
897 pub const fn vbtbkr(
898 &self,
899 ) -> &'static crate::common::ClusterRegisterArray<
900 crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW>,
901 128,
902 0x1,
903 > {
904 unsafe {
905 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x500usize))
906 }
907 }
908}
909#[doc(hidden)]
910#[derive(Copy, Clone, Eq, PartialEq)]
911pub struct Sbycr_SPEC;
912impl crate::sealed::RegSpec for Sbycr_SPEC {
913 type DataType = u16;
914}
915
916#[doc = "Standby Control Register"]
917pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
918
919impl Sbycr {
920 #[doc = "Software Standby Mode Select"]
921 #[inline(always)]
922 pub fn ssby(
923 self,
924 ) -> crate::common::RegisterField<
925 15,
926 0x1,
927 1,
928 0,
929 sbycr::Ssby,
930 sbycr::Ssby,
931 Sbycr_SPEC,
932 crate::common::RW,
933 > {
934 crate::common::RegisterField::<
935 15,
936 0x1,
937 1,
938 0,
939 sbycr::Ssby,
940 sbycr::Ssby,
941 Sbycr_SPEC,
942 crate::common::RW,
943 >::from_register(self, 0)
944 }
945}
946impl ::core::default::Default for Sbycr {
947 #[inline(always)]
948 fn default() -> Sbycr {
949 <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(16384)
950 }
951}
952pub mod sbycr {
953
954 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
955 pub struct Ssby_SPEC;
956 pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
957 impl Ssby {
958 #[doc = "Sleep mode"]
959 pub const _0: Self = Self::new(0);
960
961 #[doc = "Software Standby mode."]
962 pub const _1: Self = Self::new(1);
963 }
964}
965#[doc(hidden)]
966#[derive(Copy, Clone, Eq, PartialEq)]
967pub struct Sckdivcr_SPEC;
968impl crate::sealed::RegSpec for Sckdivcr_SPEC {
969 type DataType = u32;
970}
971
972#[doc = "System Clock Division Control Register"]
973pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
974
975impl Sckdivcr {
976 #[doc = "Peripheral Module Clock D (PCLKD) Select"]
977 #[inline(always)]
978 pub fn pckd(
979 self,
980 ) -> crate::common::RegisterField<
981 0,
982 0x7,
983 1,
984 0,
985 sckdivcr::Pckd,
986 sckdivcr::Pckd,
987 Sckdivcr_SPEC,
988 crate::common::RW,
989 > {
990 crate::common::RegisterField::<
991 0,
992 0x7,
993 1,
994 0,
995 sckdivcr::Pckd,
996 sckdivcr::Pckd,
997 Sckdivcr_SPEC,
998 crate::common::RW,
999 >::from_register(self, 0)
1000 }
1001
1002 #[doc = "Peripheral Module Clock C (PCLKC) Select"]
1003 #[inline(always)]
1004 pub fn pckc(
1005 self,
1006 ) -> crate::common::RegisterField<
1007 4,
1008 0x7,
1009 1,
1010 0,
1011 sckdivcr::Pckc,
1012 sckdivcr::Pckc,
1013 Sckdivcr_SPEC,
1014 crate::common::RW,
1015 > {
1016 crate::common::RegisterField::<
1017 4,
1018 0x7,
1019 1,
1020 0,
1021 sckdivcr::Pckc,
1022 sckdivcr::Pckc,
1023 Sckdivcr_SPEC,
1024 crate::common::RW,
1025 >::from_register(self, 0)
1026 }
1027
1028 #[doc = "Peripheral Module Clock B (PCLKB) Select"]
1029 #[inline(always)]
1030 pub fn pckb(
1031 self,
1032 ) -> crate::common::RegisterField<
1033 8,
1034 0x7,
1035 1,
1036 0,
1037 sckdivcr::Pckb,
1038 sckdivcr::Pckb,
1039 Sckdivcr_SPEC,
1040 crate::common::RW,
1041 > {
1042 crate::common::RegisterField::<
1043 8,
1044 0x7,
1045 1,
1046 0,
1047 sckdivcr::Pckb,
1048 sckdivcr::Pckb,
1049 Sckdivcr_SPEC,
1050 crate::common::RW,
1051 >::from_register(self, 0)
1052 }
1053
1054 #[doc = "Peripheral Module Clock A (PCLKA) Select"]
1055 #[inline(always)]
1056 pub fn pcka(
1057 self,
1058 ) -> crate::common::RegisterField<
1059 12,
1060 0x7,
1061 1,
1062 0,
1063 sckdivcr::Pcka,
1064 sckdivcr::Pcka,
1065 Sckdivcr_SPEC,
1066 crate::common::RW,
1067 > {
1068 crate::common::RegisterField::<
1069 12,
1070 0x7,
1071 1,
1072 0,
1073 sckdivcr::Pcka,
1074 sckdivcr::Pcka,
1075 Sckdivcr_SPEC,
1076 crate::common::RW,
1077 >::from_register(self, 0)
1078 }
1079
1080 #[doc = "Reserved. Set these bits to the same value as PCKB\\[2:0\\]."]
1081 #[inline(always)]
1082 pub fn rsv(
1083 self,
1084 ) -> crate::common::RegisterField<
1085 16,
1086 0x7,
1087 1,
1088 0,
1089 sckdivcr::Rsv,
1090 sckdivcr::Rsv,
1091 Sckdivcr_SPEC,
1092 crate::common::RW,
1093 > {
1094 crate::common::RegisterField::<
1095 16,
1096 0x7,
1097 1,
1098 0,
1099 sckdivcr::Rsv,
1100 sckdivcr::Rsv,
1101 Sckdivcr_SPEC,
1102 crate::common::RW,
1103 >::from_register(self, 0)
1104 }
1105
1106 #[doc = "System Clock (ICLK) Select"]
1107 #[inline(always)]
1108 pub fn ick(
1109 self,
1110 ) -> crate::common::RegisterField<
1111 24,
1112 0x7,
1113 1,
1114 0,
1115 sckdivcr::Ick,
1116 sckdivcr::Ick,
1117 Sckdivcr_SPEC,
1118 crate::common::RW,
1119 > {
1120 crate::common::RegisterField::<
1121 24,
1122 0x7,
1123 1,
1124 0,
1125 sckdivcr::Ick,
1126 sckdivcr::Ick,
1127 Sckdivcr_SPEC,
1128 crate::common::RW,
1129 >::from_register(self, 0)
1130 }
1131
1132 #[doc = "FlashIF Clock (FCLK) Select"]
1133 #[inline(always)]
1134 pub fn fck(
1135 self,
1136 ) -> crate::common::RegisterField<
1137 28,
1138 0x7,
1139 1,
1140 0,
1141 sckdivcr::Fck,
1142 sckdivcr::Fck,
1143 Sckdivcr_SPEC,
1144 crate::common::RW,
1145 > {
1146 crate::common::RegisterField::<
1147 28,
1148 0x7,
1149 1,
1150 0,
1151 sckdivcr::Fck,
1152 sckdivcr::Fck,
1153 Sckdivcr_SPEC,
1154 crate::common::RW,
1155 >::from_register(self, 0)
1156 }
1157}
1158impl ::core::default::Default for Sckdivcr {
1159 #[inline(always)]
1160 fn default() -> Sckdivcr {
1161 <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(570565154)
1162 }
1163}
1164pub mod sckdivcr {
1165
1166 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1167 pub struct Pckd_SPEC;
1168 pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
1169 impl Pckd {
1170 #[doc = "x 1/1"]
1171 pub const _000: Self = Self::new(0);
1172
1173 #[doc = "x 1/2"]
1174 pub const _001: Self = Self::new(1);
1175
1176 #[doc = "x 1/4"]
1177 pub const _010: Self = Self::new(2);
1178
1179 #[doc = "x 1/8"]
1180 pub const _011: Self = Self::new(3);
1181
1182 #[doc = "x 1/16"]
1183 pub const _100: Self = Self::new(4);
1184
1185 #[doc = "x 1/32"]
1186 pub const _101: Self = Self::new(5);
1187
1188 #[doc = "x 1/64"]
1189 pub const _110: Self = Self::new(6);
1190 }
1191 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1192 pub struct Pckc_SPEC;
1193 pub type Pckc = crate::EnumBitfieldStruct<u8, Pckc_SPEC>;
1194 impl Pckc {
1195 #[doc = "x 1/1"]
1196 pub const _000: Self = Self::new(0);
1197
1198 #[doc = "x 1/2"]
1199 pub const _001: Self = Self::new(1);
1200
1201 #[doc = "x 1/4"]
1202 pub const _010: Self = Self::new(2);
1203
1204 #[doc = "x 1/8"]
1205 pub const _011: Self = Self::new(3);
1206
1207 #[doc = "x 1/16"]
1208 pub const _100: Self = Self::new(4);
1209
1210 #[doc = "x 1/32"]
1211 pub const _101: Self = Self::new(5);
1212
1213 #[doc = "x 1/64"]
1214 pub const _110: Self = Self::new(6);
1215 }
1216 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1217 pub struct Pckb_SPEC;
1218 pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
1219 impl Pckb {
1220 #[doc = "x 1/1"]
1221 pub const _000: Self = Self::new(0);
1222
1223 #[doc = "x 1/2"]
1224 pub const _001: Self = Self::new(1);
1225
1226 #[doc = "x 1/4"]
1227 pub const _010: Self = Self::new(2);
1228
1229 #[doc = "x 1/8"]
1230 pub const _011: Self = Self::new(3);
1231
1232 #[doc = "x 1/16"]
1233 pub const _100: Self = Self::new(4);
1234
1235 #[doc = "x 1/32"]
1236 pub const _101: Self = Self::new(5);
1237
1238 #[doc = "x 1/64"]
1239 pub const _110: Self = Self::new(6);
1240 }
1241 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1242 pub struct Pcka_SPEC;
1243 pub type Pcka = crate::EnumBitfieldStruct<u8, Pcka_SPEC>;
1244 impl Pcka {
1245 #[doc = "x 1/1"]
1246 pub const _000: Self = Self::new(0);
1247
1248 #[doc = "x 1/2"]
1249 pub const _001: Self = Self::new(1);
1250
1251 #[doc = "x 1/4"]
1252 pub const _010: Self = Self::new(2);
1253
1254 #[doc = "x 1/8"]
1255 pub const _011: Self = Self::new(3);
1256
1257 #[doc = "x 1/16"]
1258 pub const _100: Self = Self::new(4);
1259
1260 #[doc = "x 1/32"]
1261 pub const _101: Self = Self::new(5);
1262
1263 #[doc = "x 1/64"]
1264 pub const _110: Self = Self::new(6);
1265 }
1266 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1267 pub struct Rsv_SPEC;
1268 pub type Rsv = crate::EnumBitfieldStruct<u8, Rsv_SPEC>;
1269 impl Rsv {
1270 #[doc = "x 1/1"]
1271 pub const _000: Self = Self::new(0);
1272
1273 #[doc = "x 1/2"]
1274 pub const _001: Self = Self::new(1);
1275
1276 #[doc = "x 1/4"]
1277 pub const _010: Self = Self::new(2);
1278
1279 #[doc = "x 1/8"]
1280 pub const _011: Self = Self::new(3);
1281
1282 #[doc = "x 1/16"]
1283 pub const _100: Self = Self::new(4);
1284
1285 #[doc = "x 1/32"]
1286 pub const _101: Self = Self::new(5);
1287
1288 #[doc = "x 1/64"]
1289 pub const _110: Self = Self::new(6);
1290 }
1291 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1292 pub struct Ick_SPEC;
1293 pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
1294 impl Ick {
1295 #[doc = "x 1/1"]
1296 pub const _000: Self = Self::new(0);
1297
1298 #[doc = "x 1/2"]
1299 pub const _001: Self = Self::new(1);
1300
1301 #[doc = "x 1/4"]
1302 pub const _010: Self = Self::new(2);
1303
1304 #[doc = "x 1/8"]
1305 pub const _011: Self = Self::new(3);
1306
1307 #[doc = "x 1/16"]
1308 pub const _100: Self = Self::new(4);
1309
1310 #[doc = "x 1/32"]
1311 pub const _101: Self = Self::new(5);
1312
1313 #[doc = "x 1/64"]
1314 pub const _110: Self = Self::new(6);
1315 }
1316 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1317 pub struct Fck_SPEC;
1318 pub type Fck = crate::EnumBitfieldStruct<u8, Fck_SPEC>;
1319 impl Fck {
1320 #[doc = "x 1/1"]
1321 pub const _000: Self = Self::new(0);
1322
1323 #[doc = "x 1/2"]
1324 pub const _001: Self = Self::new(1);
1325
1326 #[doc = "x 1/4"]
1327 pub const _010: Self = Self::new(2);
1328
1329 #[doc = "x 1/8"]
1330 pub const _011: Self = Self::new(3);
1331
1332 #[doc = "x 1/16"]
1333 pub const _100: Self = Self::new(4);
1334
1335 #[doc = "x 1/32"]
1336 pub const _101: Self = Self::new(5);
1337
1338 #[doc = "x 1/64"]
1339 pub const _110: Self = Self::new(6);
1340 }
1341}
1342#[doc(hidden)]
1343#[derive(Copy, Clone, Eq, PartialEq)]
1344pub struct Sckscr_SPEC;
1345impl crate::sealed::RegSpec for Sckscr_SPEC {
1346 type DataType = u8;
1347}
1348
1349#[doc = "System Clock Source Control Register"]
1350pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
1351
1352impl Sckscr {
1353 #[doc = "Clock Source Select"]
1354 #[inline(always)]
1355 pub fn cksel(
1356 self,
1357 ) -> crate::common::RegisterField<
1358 0,
1359 0x7,
1360 1,
1361 0,
1362 sckscr::Cksel,
1363 sckscr::Cksel,
1364 Sckscr_SPEC,
1365 crate::common::RW,
1366 > {
1367 crate::common::RegisterField::<
1368 0,
1369 0x7,
1370 1,
1371 0,
1372 sckscr::Cksel,
1373 sckscr::Cksel,
1374 Sckscr_SPEC,
1375 crate::common::RW,
1376 >::from_register(self, 0)
1377 }
1378}
1379impl ::core::default::Default for Sckscr {
1380 #[inline(always)]
1381 fn default() -> Sckscr {
1382 <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
1383 }
1384}
1385pub mod sckscr {
1386
1387 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1388 pub struct Cksel_SPEC;
1389 pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1390 impl Cksel {
1391 #[doc = "HOCO"]
1392 pub const _000: Self = Self::new(0);
1393
1394 #[doc = "MOCO"]
1395 pub const _001: Self = Self::new(1);
1396
1397 #[doc = "LOCO"]
1398 pub const _010: Self = Self::new(2);
1399
1400 #[doc = "Main clock oscillator (MOSC)"]
1401 pub const _011: Self = Self::new(3);
1402
1403 #[doc = "Sub-clock oscillator (SOSC)"]
1404 pub const _100: Self = Self::new(4);
1405
1406 #[doc = "PLL"]
1407 pub const _101: Self = Self::new(5);
1408
1409 #[doc = "Setting prohibited"]
1410 pub const _110: Self = Self::new(6);
1411
1412 #[doc = "Setting prohibited"]
1413 pub const _111: Self = Self::new(7);
1414 }
1415}
1416#[doc(hidden)]
1417#[derive(Copy, Clone, Eq, PartialEq)]
1418pub struct Pllccr_SPEC;
1419impl crate::sealed::RegSpec for Pllccr_SPEC {
1420 type DataType = u16;
1421}
1422
1423#[doc = "PLL Clock Control Register"]
1424pub type Pllccr = crate::RegValueT<Pllccr_SPEC>;
1425
1426impl Pllccr {
1427 #[doc = "PLL Input Frequency Division Ratio Select"]
1428 #[inline(always)]
1429 pub fn plidiv(
1430 self,
1431 ) -> crate::common::RegisterField<
1432 0,
1433 0x3,
1434 1,
1435 0,
1436 pllccr::Plidiv,
1437 pllccr::Plidiv,
1438 Pllccr_SPEC,
1439 crate::common::RW,
1440 > {
1441 crate::common::RegisterField::<
1442 0,
1443 0x3,
1444 1,
1445 0,
1446 pllccr::Plidiv,
1447 pllccr::Plidiv,
1448 Pllccr_SPEC,
1449 crate::common::RW,
1450 >::from_register(self, 0)
1451 }
1452
1453 #[doc = "PLL Clock Source Select"]
1454 #[inline(always)]
1455 pub fn plsrcsel(
1456 self,
1457 ) -> crate::common::RegisterField<
1458 4,
1459 0x1,
1460 1,
1461 0,
1462 pllccr::Plsrcsel,
1463 pllccr::Plsrcsel,
1464 Pllccr_SPEC,
1465 crate::common::RW,
1466 > {
1467 crate::common::RegisterField::<
1468 4,
1469 0x1,
1470 1,
1471 0,
1472 pllccr::Plsrcsel,
1473 pllccr::Plsrcsel,
1474 Pllccr_SPEC,
1475 crate::common::RW,
1476 >::from_register(self, 0)
1477 }
1478
1479 #[doc = "PLL Frequency Multiplication Factor Select"]
1480 #[inline(always)]
1481 pub fn pllmul(
1482 self,
1483 ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Pllccr_SPEC, crate::common::RW> {
1484 crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Pllccr_SPEC,crate::common::RW>::from_register(self,0)
1485 }
1486}
1487impl ::core::default::Default for Pllccr {
1488 #[inline(always)]
1489 fn default() -> Pllccr {
1490 <crate::RegValueT<Pllccr_SPEC> as RegisterValue<_>>::new(4864)
1491 }
1492}
1493pub mod pllccr {
1494
1495 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1496 pub struct Plidiv_SPEC;
1497 pub type Plidiv = crate::EnumBitfieldStruct<u8, Plidiv_SPEC>;
1498 impl Plidiv {
1499 #[doc = "/1"]
1500 pub const _00: Self = Self::new(0);
1501
1502 #[doc = "/2"]
1503 pub const _01: Self = Self::new(1);
1504
1505 #[doc = "/3"]
1506 pub const _10: Self = Self::new(2);
1507 }
1508 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1509 pub struct Plsrcsel_SPEC;
1510 pub type Plsrcsel = crate::EnumBitfieldStruct<u8, Plsrcsel_SPEC>;
1511 impl Plsrcsel {
1512 #[doc = "Main clock oscillator"]
1513 pub const _0: Self = Self::new(0);
1514
1515 #[doc = "HOCO"]
1516 pub const _1: Self = Self::new(1);
1517 }
1518}
1519#[doc(hidden)]
1520#[derive(Copy, Clone, Eq, PartialEq)]
1521pub struct Pllcr_SPEC;
1522impl crate::sealed::RegSpec for Pllcr_SPEC {
1523 type DataType = u8;
1524}
1525
1526#[doc = "PLL Control Register"]
1527pub type Pllcr = crate::RegValueT<Pllcr_SPEC>;
1528
1529impl Pllcr {
1530 #[doc = "PLL Stop Control"]
1531 #[inline(always)]
1532 pub fn pllstp(
1533 self,
1534 ) -> crate::common::RegisterField<
1535 0,
1536 0x1,
1537 1,
1538 0,
1539 pllcr::Pllstp,
1540 pllcr::Pllstp,
1541 Pllcr_SPEC,
1542 crate::common::RW,
1543 > {
1544 crate::common::RegisterField::<
1545 0,
1546 0x1,
1547 1,
1548 0,
1549 pllcr::Pllstp,
1550 pllcr::Pllstp,
1551 Pllcr_SPEC,
1552 crate::common::RW,
1553 >::from_register(self, 0)
1554 }
1555}
1556impl ::core::default::Default for Pllcr {
1557 #[inline(always)]
1558 fn default() -> Pllcr {
1559 <crate::RegValueT<Pllcr_SPEC> as RegisterValue<_>>::new(1)
1560 }
1561}
1562pub mod pllcr {
1563
1564 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1565 pub struct Pllstp_SPEC;
1566 pub type Pllstp = crate::EnumBitfieldStruct<u8, Pllstp_SPEC>;
1567 impl Pllstp {
1568 #[doc = "PLL is operating"]
1569 pub const _0: Self = Self::new(0);
1570
1571 #[doc = "PLL is stopped."]
1572 pub const _1: Self = Self::new(1);
1573 }
1574}
1575#[doc(hidden)]
1576#[derive(Copy, Clone, Eq, PartialEq)]
1577pub struct Mosccr_SPEC;
1578impl crate::sealed::RegSpec for Mosccr_SPEC {
1579 type DataType = u8;
1580}
1581
1582#[doc = "Main Clock Oscillator Control Register"]
1583pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
1584
1585impl Mosccr {
1586 #[doc = "Main Clock Oscillator Stop"]
1587 #[inline(always)]
1588 pub fn mostp(
1589 self,
1590 ) -> crate::common::RegisterField<
1591 0,
1592 0x1,
1593 1,
1594 0,
1595 mosccr::Mostp,
1596 mosccr::Mostp,
1597 Mosccr_SPEC,
1598 crate::common::RW,
1599 > {
1600 crate::common::RegisterField::<
1601 0,
1602 0x1,
1603 1,
1604 0,
1605 mosccr::Mostp,
1606 mosccr::Mostp,
1607 Mosccr_SPEC,
1608 crate::common::RW,
1609 >::from_register(self, 0)
1610 }
1611}
1612impl ::core::default::Default for Mosccr {
1613 #[inline(always)]
1614 fn default() -> Mosccr {
1615 <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
1616 }
1617}
1618pub mod mosccr {
1619
1620 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1621 pub struct Mostp_SPEC;
1622 pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
1623 impl Mostp {
1624 #[doc = "Operate the main clock oscillator"]
1625 pub const _0: Self = Self::new(0);
1626
1627 #[doc = "Stop the main clock oscillator"]
1628 pub const _1: Self = Self::new(1);
1629 }
1630}
1631#[doc(hidden)]
1632#[derive(Copy, Clone, Eq, PartialEq)]
1633pub struct Hococr_SPEC;
1634impl crate::sealed::RegSpec for Hococr_SPEC {
1635 type DataType = u8;
1636}
1637
1638#[doc = "High-Speed On-Chip Oscillator Control Register"]
1639pub type Hococr = crate::RegValueT<Hococr_SPEC>;
1640
1641impl Hococr {
1642 #[doc = "HOCO Stop"]
1643 #[inline(always)]
1644 pub fn hcstp(
1645 self,
1646 ) -> crate::common::RegisterField<
1647 0,
1648 0x1,
1649 1,
1650 0,
1651 hococr::Hcstp,
1652 hococr::Hcstp,
1653 Hococr_SPEC,
1654 crate::common::RW,
1655 > {
1656 crate::common::RegisterField::<
1657 0,
1658 0x1,
1659 1,
1660 0,
1661 hococr::Hcstp,
1662 hococr::Hcstp,
1663 Hococr_SPEC,
1664 crate::common::RW,
1665 >::from_register(self, 0)
1666 }
1667}
1668impl ::core::default::Default for Hococr {
1669 #[inline(always)]
1670 fn default() -> Hococr {
1671 <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
1672 }
1673}
1674pub mod hococr {
1675
1676 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1677 pub struct Hcstp_SPEC;
1678 pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
1679 impl Hcstp {
1680 #[doc = "Operate the HOCO clock"]
1681 pub const _0: Self = Self::new(0);
1682
1683 #[doc = "Stop the HOCO clock"]
1684 pub const _1: Self = Self::new(1);
1685 }
1686}
1687#[doc(hidden)]
1688#[derive(Copy, Clone, Eq, PartialEq)]
1689pub struct Mococr_SPEC;
1690impl crate::sealed::RegSpec for Mococr_SPEC {
1691 type DataType = u8;
1692}
1693
1694#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
1695pub type Mococr = crate::RegValueT<Mococr_SPEC>;
1696
1697impl Mococr {
1698 #[doc = "MOCO Stop"]
1699 #[inline(always)]
1700 pub fn mcstp(
1701 self,
1702 ) -> crate::common::RegisterField<
1703 0,
1704 0x1,
1705 1,
1706 0,
1707 mococr::Mcstp,
1708 mococr::Mcstp,
1709 Mococr_SPEC,
1710 crate::common::RW,
1711 > {
1712 crate::common::RegisterField::<
1713 0,
1714 0x1,
1715 1,
1716 0,
1717 mococr::Mcstp,
1718 mococr::Mcstp,
1719 Mococr_SPEC,
1720 crate::common::RW,
1721 >::from_register(self, 0)
1722 }
1723}
1724impl ::core::default::Default for Mococr {
1725 #[inline(always)]
1726 fn default() -> Mococr {
1727 <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
1728 }
1729}
1730pub mod mococr {
1731
1732 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1733 pub struct Mcstp_SPEC;
1734 pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
1735 impl Mcstp {
1736 #[doc = "MOCO clock is operating"]
1737 pub const _0: Self = Self::new(0);
1738
1739 #[doc = "MOCO clock is stopped"]
1740 pub const _1: Self = Self::new(1);
1741 }
1742}
1743#[doc(hidden)]
1744#[derive(Copy, Clone, Eq, PartialEq)]
1745pub struct Fllcr1_SPEC;
1746impl crate::sealed::RegSpec for Fllcr1_SPEC {
1747 type DataType = u8;
1748}
1749
1750#[doc = "FLL Control Register1"]
1751pub type Fllcr1 = crate::RegValueT<Fllcr1_SPEC>;
1752
1753impl Fllcr1 {
1754 #[doc = "FLL Enable"]
1755 #[inline(always)]
1756 pub fn fllen(
1757 self,
1758 ) -> crate::common::RegisterField<
1759 0,
1760 0x1,
1761 1,
1762 0,
1763 fllcr1::Fllen,
1764 fllcr1::Fllen,
1765 Fllcr1_SPEC,
1766 crate::common::RW,
1767 > {
1768 crate::common::RegisterField::<
1769 0,
1770 0x1,
1771 1,
1772 0,
1773 fllcr1::Fllen,
1774 fllcr1::Fllen,
1775 Fllcr1_SPEC,
1776 crate::common::RW,
1777 >::from_register(self, 0)
1778 }
1779}
1780impl ::core::default::Default for Fllcr1 {
1781 #[inline(always)]
1782 fn default() -> Fllcr1 {
1783 <crate::RegValueT<Fllcr1_SPEC> as RegisterValue<_>>::new(0)
1784 }
1785}
1786pub mod fllcr1 {
1787
1788 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1789 pub struct Fllen_SPEC;
1790 pub type Fllen = crate::EnumBitfieldStruct<u8, Fllen_SPEC>;
1791 impl Fllen {
1792 #[doc = "FLL function is disabled"]
1793 pub const _0: Self = Self::new(0);
1794
1795 #[doc = "FLL function is enabled."]
1796 pub const _1: Self = Self::new(1);
1797 }
1798}
1799#[doc(hidden)]
1800#[derive(Copy, Clone, Eq, PartialEq)]
1801pub struct Fllcr2_SPEC;
1802impl crate::sealed::RegSpec for Fllcr2_SPEC {
1803 type DataType = u16;
1804}
1805
1806#[doc = "FLL Control Register2"]
1807pub type Fllcr2 = crate::RegValueT<Fllcr2_SPEC>;
1808
1809impl Fllcr2 {
1810 #[doc = "FLL Multiplication Control"]
1811 #[inline(always)]
1812 pub fn fllcntl(
1813 self,
1814 ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fllcr2_SPEC, crate::common::RW>
1815 {
1816 crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fllcr2_SPEC,crate::common::RW>::from_register(self,0)
1817 }
1818}
1819impl ::core::default::Default for Fllcr2 {
1820 #[inline(always)]
1821 fn default() -> Fllcr2 {
1822 <crate::RegValueT<Fllcr2_SPEC> as RegisterValue<_>>::new(0)
1823 }
1824}
1825
1826#[doc(hidden)]
1827#[derive(Copy, Clone, Eq, PartialEq)]
1828pub struct Oscsf_SPEC;
1829impl crate::sealed::RegSpec for Oscsf_SPEC {
1830 type DataType = u8;
1831}
1832
1833#[doc = "Oscillation Stabilization Flag Register"]
1834pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
1835
1836impl Oscsf {
1837 #[doc = "HOCO Clock Oscillation Stabilization Flag"]
1838 #[inline(always)]
1839 pub fn hocosf(
1840 self,
1841 ) -> crate::common::RegisterField<
1842 0,
1843 0x1,
1844 1,
1845 0,
1846 oscsf::Hocosf,
1847 oscsf::Hocosf,
1848 Oscsf_SPEC,
1849 crate::common::R,
1850 > {
1851 crate::common::RegisterField::<
1852 0,
1853 0x1,
1854 1,
1855 0,
1856 oscsf::Hocosf,
1857 oscsf::Hocosf,
1858 Oscsf_SPEC,
1859 crate::common::R,
1860 >::from_register(self, 0)
1861 }
1862
1863 #[doc = "Main Clock Oscillation Stabilization Flag"]
1864 #[inline(always)]
1865 pub fn moscsf(
1866 self,
1867 ) -> crate::common::RegisterField<
1868 3,
1869 0x1,
1870 1,
1871 0,
1872 oscsf::Moscsf,
1873 oscsf::Moscsf,
1874 Oscsf_SPEC,
1875 crate::common::R,
1876 > {
1877 crate::common::RegisterField::<
1878 3,
1879 0x1,
1880 1,
1881 0,
1882 oscsf::Moscsf,
1883 oscsf::Moscsf,
1884 Oscsf_SPEC,
1885 crate::common::R,
1886 >::from_register(self, 0)
1887 }
1888
1889 #[doc = "PLL Clock Oscillation Stabilization Flag"]
1890 #[inline(always)]
1891 pub fn pllsf(
1892 self,
1893 ) -> crate::common::RegisterField<
1894 5,
1895 0x1,
1896 1,
1897 0,
1898 oscsf::Pllsf,
1899 oscsf::Pllsf,
1900 Oscsf_SPEC,
1901 crate::common::R,
1902 > {
1903 crate::common::RegisterField::<
1904 5,
1905 0x1,
1906 1,
1907 0,
1908 oscsf::Pllsf,
1909 oscsf::Pllsf,
1910 Oscsf_SPEC,
1911 crate::common::R,
1912 >::from_register(self, 0)
1913 }
1914
1915 #[doc = "PLL2 Clock Oscillation Stabilization Flag"]
1916 #[inline(always)]
1917 pub fn pll2sf(
1918 self,
1919 ) -> crate::common::RegisterField<
1920 6,
1921 0x1,
1922 1,
1923 0,
1924 oscsf::Pll2Sf,
1925 oscsf::Pll2Sf,
1926 Oscsf_SPEC,
1927 crate::common::R,
1928 > {
1929 crate::common::RegisterField::<
1930 6,
1931 0x1,
1932 1,
1933 0,
1934 oscsf::Pll2Sf,
1935 oscsf::Pll2Sf,
1936 Oscsf_SPEC,
1937 crate::common::R,
1938 >::from_register(self, 0)
1939 }
1940}
1941impl ::core::default::Default for Oscsf {
1942 #[inline(always)]
1943 fn default() -> Oscsf {
1944 <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
1945 }
1946}
1947pub mod oscsf {
1948
1949 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1950 pub struct Hocosf_SPEC;
1951 pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
1952 impl Hocosf {
1953 #[doc = "The HOCO clock is stopped or is not yet stable"]
1954 pub const _0: Self = Self::new(0);
1955
1956 #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
1957 pub const _1: Self = Self::new(1);
1958 }
1959 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1960 pub struct Moscsf_SPEC;
1961 pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
1962 impl Moscsf {
1963 #[doc = "The main clock oscillator is stopped (MOSTP = 1) or is not yet stable"]
1964 pub const _0: Self = Self::new(0);
1965
1966 #[doc = "The main clock oscillator is stable, so is available for use as the system clock"]
1967 pub const _1: Self = Self::new(1);
1968 }
1969 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1970 pub struct Pllsf_SPEC;
1971 pub type Pllsf = crate::EnumBitfieldStruct<u8, Pllsf_SPEC>;
1972 impl Pllsf {
1973 #[doc = "The PLL clock is stopped, or oscillation of the PLL clock is not stable yet"]
1974 pub const _0: Self = Self::new(0);
1975
1976 #[doc = "The PLL clock is stable, so is available for use as the system clock"]
1977 pub const _1: Self = Self::new(1);
1978 }
1979 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1980 pub struct Pll2Sf_SPEC;
1981 pub type Pll2Sf = crate::EnumBitfieldStruct<u8, Pll2Sf_SPEC>;
1982 impl Pll2Sf {
1983 #[doc = "The PLL2 clock is stopped, or oscillation of the PLL2 clock is not stable yet"]
1984 pub const _0: Self = Self::new(0);
1985
1986 #[doc = "The PLL2 clock is stable"]
1987 pub const _1: Self = Self::new(1);
1988 }
1989}
1990#[doc(hidden)]
1991#[derive(Copy, Clone, Eq, PartialEq)]
1992pub struct Ckocr_SPEC;
1993impl crate::sealed::RegSpec for Ckocr_SPEC {
1994 type DataType = u8;
1995}
1996
1997#[doc = "Clock Out Control Register"]
1998pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
1999
2000impl Ckocr {
2001 #[doc = "Clock Out Source Select"]
2002 #[inline(always)]
2003 pub fn ckosel(
2004 self,
2005 ) -> crate::common::RegisterField<
2006 0,
2007 0x7,
2008 1,
2009 0,
2010 ckocr::Ckosel,
2011 ckocr::Ckosel,
2012 Ckocr_SPEC,
2013 crate::common::RW,
2014 > {
2015 crate::common::RegisterField::<
2016 0,
2017 0x7,
2018 1,
2019 0,
2020 ckocr::Ckosel,
2021 ckocr::Ckosel,
2022 Ckocr_SPEC,
2023 crate::common::RW,
2024 >::from_register(self, 0)
2025 }
2026
2027 #[doc = "Clock Output Frequency Division Ratio"]
2028 #[inline(always)]
2029 pub fn ckodiv(
2030 self,
2031 ) -> crate::common::RegisterField<
2032 4,
2033 0x7,
2034 1,
2035 0,
2036 ckocr::Ckodiv,
2037 ckocr::Ckodiv,
2038 Ckocr_SPEC,
2039 crate::common::RW,
2040 > {
2041 crate::common::RegisterField::<
2042 4,
2043 0x7,
2044 1,
2045 0,
2046 ckocr::Ckodiv,
2047 ckocr::Ckodiv,
2048 Ckocr_SPEC,
2049 crate::common::RW,
2050 >::from_register(self, 0)
2051 }
2052
2053 #[doc = "Clock Out Enable"]
2054 #[inline(always)]
2055 pub fn ckoen(
2056 self,
2057 ) -> crate::common::RegisterField<
2058 7,
2059 0x1,
2060 1,
2061 0,
2062 ckocr::Ckoen,
2063 ckocr::Ckoen,
2064 Ckocr_SPEC,
2065 crate::common::RW,
2066 > {
2067 crate::common::RegisterField::<
2068 7,
2069 0x1,
2070 1,
2071 0,
2072 ckocr::Ckoen,
2073 ckocr::Ckoen,
2074 Ckocr_SPEC,
2075 crate::common::RW,
2076 >::from_register(self, 0)
2077 }
2078}
2079impl ::core::default::Default for Ckocr {
2080 #[inline(always)]
2081 fn default() -> Ckocr {
2082 <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
2083 }
2084}
2085pub mod ckocr {
2086
2087 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2088 pub struct Ckosel_SPEC;
2089 pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
2090 impl Ckosel {
2091 #[doc = "HOCO (value after reset)"]
2092 pub const _000: Self = Self::new(0);
2093
2094 #[doc = "MOCO"]
2095 pub const _001: Self = Self::new(1);
2096
2097 #[doc = "LOCO"]
2098 pub const _010: Self = Self::new(2);
2099
2100 #[doc = "MOSC"]
2101 pub const _011: Self = Self::new(3);
2102
2103 #[doc = "SOSC"]
2104 pub const _100: Self = Self::new(4);
2105
2106 #[doc = "Setting prohibited"]
2107 pub const _101: Self = Self::new(5);
2108 }
2109 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2110 pub struct Ckodiv_SPEC;
2111 pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
2112 impl Ckodiv {
2113 #[doc = "x 1/1"]
2114 pub const _000: Self = Self::new(0);
2115
2116 #[doc = "x 1/2"]
2117 pub const _001: Self = Self::new(1);
2118
2119 #[doc = "x 1/4"]
2120 pub const _010: Self = Self::new(2);
2121
2122 #[doc = "x 1/8"]
2123 pub const _011: Self = Self::new(3);
2124
2125 #[doc = "x 1/16"]
2126 pub const _100: Self = Self::new(4);
2127
2128 #[doc = "x 1/32"]
2129 pub const _101: Self = Self::new(5);
2130
2131 #[doc = "x 1/64"]
2132 pub const _110: Self = Self::new(6);
2133
2134 #[doc = "x 1/128"]
2135 pub const _111: Self = Self::new(7);
2136 }
2137 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2138 pub struct Ckoen_SPEC;
2139 pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
2140 impl Ckoen {
2141 #[doc = "Disable clock out"]
2142 pub const _0: Self = Self::new(0);
2143
2144 #[doc = "Enable clock out"]
2145 pub const _1: Self = Self::new(1);
2146 }
2147}
2148#[doc(hidden)]
2149#[derive(Copy, Clone, Eq, PartialEq)]
2150pub struct Trckcr_SPEC;
2151impl crate::sealed::RegSpec for Trckcr_SPEC {
2152 type DataType = u8;
2153}
2154
2155#[doc = "Trace Clock Control Register"]
2156pub type Trckcr = crate::RegValueT<Trckcr_SPEC>;
2157
2158impl Trckcr {
2159 #[doc = "Trace Clock operating frequency select"]
2160 #[inline(always)]
2161 pub fn trck(
2162 self,
2163 ) -> crate::common::RegisterField<
2164 0,
2165 0xf,
2166 1,
2167 0,
2168 trckcr::Trck,
2169 trckcr::Trck,
2170 Trckcr_SPEC,
2171 crate::common::RW,
2172 > {
2173 crate::common::RegisterField::<
2174 0,
2175 0xf,
2176 1,
2177 0,
2178 trckcr::Trck,
2179 trckcr::Trck,
2180 Trckcr_SPEC,
2181 crate::common::RW,
2182 >::from_register(self, 0)
2183 }
2184
2185 #[doc = "Trace Clock operating Enable"]
2186 #[inline(always)]
2187 pub fn trcken(
2188 self,
2189 ) -> crate::common::RegisterField<
2190 7,
2191 0x1,
2192 1,
2193 0,
2194 trckcr::Trcken,
2195 trckcr::Trcken,
2196 Trckcr_SPEC,
2197 crate::common::RW,
2198 > {
2199 crate::common::RegisterField::<
2200 7,
2201 0x1,
2202 1,
2203 0,
2204 trckcr::Trcken,
2205 trckcr::Trcken,
2206 Trckcr_SPEC,
2207 crate::common::RW,
2208 >::from_register(self, 0)
2209 }
2210}
2211impl ::core::default::Default for Trckcr {
2212 #[inline(always)]
2213 fn default() -> Trckcr {
2214 <crate::RegValueT<Trckcr_SPEC> as RegisterValue<_>>::new(1)
2215 }
2216}
2217pub mod trckcr {
2218
2219 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2220 pub struct Trck_SPEC;
2221 pub type Trck = crate::EnumBitfieldStruct<u8, Trck_SPEC>;
2222 impl Trck {
2223 #[doc = "/1"]
2224 pub const _0_X_0: Self = Self::new(0);
2225
2226 #[doc = "/2 (value after reset)"]
2227 pub const _0_X_1: Self = Self::new(1);
2228
2229 #[doc = "/4"]
2230 pub const _0_X_2: Self = Self::new(2);
2231 }
2232 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2233 pub struct Trcken_SPEC;
2234 pub type Trcken = crate::EnumBitfieldStruct<u8, Trcken_SPEC>;
2235 impl Trcken {
2236 #[doc = "Stop"]
2237 pub const _0: Self = Self::new(0);
2238
2239 #[doc = "Operation enable"]
2240 pub const _1: Self = Self::new(1);
2241 }
2242}
2243#[doc(hidden)]
2244#[derive(Copy, Clone, Eq, PartialEq)]
2245pub struct Ostdcr_SPEC;
2246impl crate::sealed::RegSpec for Ostdcr_SPEC {
2247 type DataType = u8;
2248}
2249
2250#[doc = "Oscillation Stop Detection Control Register"]
2251pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
2252
2253impl Ostdcr {
2254 #[doc = "Oscillation Stop Detection Interrupt Enable"]
2255 #[inline(always)]
2256 pub fn ostdie(
2257 self,
2258 ) -> crate::common::RegisterField<
2259 0,
2260 0x1,
2261 1,
2262 0,
2263 ostdcr::Ostdie,
2264 ostdcr::Ostdie,
2265 Ostdcr_SPEC,
2266 crate::common::RW,
2267 > {
2268 crate::common::RegisterField::<
2269 0,
2270 0x1,
2271 1,
2272 0,
2273 ostdcr::Ostdie,
2274 ostdcr::Ostdie,
2275 Ostdcr_SPEC,
2276 crate::common::RW,
2277 >::from_register(self, 0)
2278 }
2279
2280 #[doc = "Oscillation Stop Detection Function Enable"]
2281 #[inline(always)]
2282 pub fn ostde(
2283 self,
2284 ) -> crate::common::RegisterField<
2285 7,
2286 0x1,
2287 1,
2288 0,
2289 ostdcr::Ostde,
2290 ostdcr::Ostde,
2291 Ostdcr_SPEC,
2292 crate::common::RW,
2293 > {
2294 crate::common::RegisterField::<
2295 7,
2296 0x1,
2297 1,
2298 0,
2299 ostdcr::Ostde,
2300 ostdcr::Ostde,
2301 Ostdcr_SPEC,
2302 crate::common::RW,
2303 >::from_register(self, 0)
2304 }
2305}
2306impl ::core::default::Default for Ostdcr {
2307 #[inline(always)]
2308 fn default() -> Ostdcr {
2309 <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
2310 }
2311}
2312pub mod ostdcr {
2313
2314 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2315 pub struct Ostdie_SPEC;
2316 pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
2317 impl Ostdie {
2318 #[doc = "Disable oscillation stop detection interrupt (do not notify the POEG)"]
2319 pub const _0: Self = Self::new(0);
2320
2321 #[doc = "Enable oscillation stop detection interrupt (notify the POEG)"]
2322 pub const _1: Self = Self::new(1);
2323 }
2324 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2325 pub struct Ostde_SPEC;
2326 pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
2327 impl Ostde {
2328 #[doc = "Disable oscillation stop detection function"]
2329 pub const _0: Self = Self::new(0);
2330
2331 #[doc = "Enable oscillation stop detection function"]
2332 pub const _1: Self = Self::new(1);
2333 }
2334}
2335#[doc(hidden)]
2336#[derive(Copy, Clone, Eq, PartialEq)]
2337pub struct Ostdsr_SPEC;
2338impl crate::sealed::RegSpec for Ostdsr_SPEC {
2339 type DataType = u8;
2340}
2341
2342#[doc = "Oscillation Stop Detection Status Register"]
2343pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
2344
2345impl Ostdsr {
2346 #[doc = "Oscillation Stop Detection Flag"]
2347 #[inline(always)]
2348 pub fn ostdf(
2349 self,
2350 ) -> crate::common::RegisterField<
2351 0,
2352 0x1,
2353 1,
2354 0,
2355 ostdsr::Ostdf,
2356 ostdsr::Ostdf,
2357 Ostdsr_SPEC,
2358 crate::common::RW,
2359 > {
2360 crate::common::RegisterField::<
2361 0,
2362 0x1,
2363 1,
2364 0,
2365 ostdsr::Ostdf,
2366 ostdsr::Ostdf,
2367 Ostdsr_SPEC,
2368 crate::common::RW,
2369 >::from_register(self, 0)
2370 }
2371}
2372impl ::core::default::Default for Ostdsr {
2373 #[inline(always)]
2374 fn default() -> Ostdsr {
2375 <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
2376 }
2377}
2378pub mod ostdsr {
2379
2380 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2381 pub struct Ostdf_SPEC;
2382 pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
2383 impl Ostdf {
2384 #[doc = "Main clock oscillation stop not detected"]
2385 pub const _0: Self = Self::new(0);
2386
2387 #[doc = "Main clock oscillation stop detected"]
2388 pub const _1: Self = Self::new(1);
2389 }
2390}
2391#[doc(hidden)]
2392#[derive(Copy, Clone, Eq, PartialEq)]
2393pub struct Pll2Ccr_SPEC;
2394impl crate::sealed::RegSpec for Pll2Ccr_SPEC {
2395 type DataType = u16;
2396}
2397
2398#[doc = "PLL2 Clock Control Register"]
2399pub type Pll2Ccr = crate::RegValueT<Pll2Ccr_SPEC>;
2400
2401impl Pll2Ccr {
2402 #[doc = "PLL2 Input Frequency Division Ratio Select"]
2403 #[inline(always)]
2404 pub fn pl2idiv(
2405 self,
2406 ) -> crate::common::RegisterField<
2407 0,
2408 0x3,
2409 1,
2410 0,
2411 pll2ccr::Pl2Idiv,
2412 pll2ccr::Pl2Idiv,
2413 Pll2Ccr_SPEC,
2414 crate::common::RW,
2415 > {
2416 crate::common::RegisterField::<
2417 0,
2418 0x3,
2419 1,
2420 0,
2421 pll2ccr::Pl2Idiv,
2422 pll2ccr::Pl2Idiv,
2423 Pll2Ccr_SPEC,
2424 crate::common::RW,
2425 >::from_register(self, 0)
2426 }
2427
2428 #[doc = "PLL2 Clock Source Select"]
2429 #[inline(always)]
2430 pub fn pl2srcsel(
2431 self,
2432 ) -> crate::common::RegisterField<
2433 4,
2434 0x1,
2435 1,
2436 0,
2437 pll2ccr::Pl2Srcsel,
2438 pll2ccr::Pl2Srcsel,
2439 Pll2Ccr_SPEC,
2440 crate::common::RW,
2441 > {
2442 crate::common::RegisterField::<
2443 4,
2444 0x1,
2445 1,
2446 0,
2447 pll2ccr::Pl2Srcsel,
2448 pll2ccr::Pl2Srcsel,
2449 Pll2Ccr_SPEC,
2450 crate::common::RW,
2451 >::from_register(self, 0)
2452 }
2453
2454 #[doc = "PLL2 Frequency Multiplication Factor Select"]
2455 #[inline(always)]
2456 pub fn pll2mul(
2457 self,
2458 ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Pll2Ccr_SPEC, crate::common::RW> {
2459 crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Pll2Ccr_SPEC,crate::common::RW>::from_register(self,0)
2460 }
2461}
2462impl ::core::default::Default for Pll2Ccr {
2463 #[inline(always)]
2464 fn default() -> Pll2Ccr {
2465 <crate::RegValueT<Pll2Ccr_SPEC> as RegisterValue<_>>::new(4864)
2466 }
2467}
2468pub mod pll2ccr {
2469
2470 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2471 pub struct Pl2Idiv_SPEC;
2472 pub type Pl2Idiv = crate::EnumBitfieldStruct<u8, Pl2Idiv_SPEC>;
2473 impl Pl2Idiv {
2474 #[doc = "∕ 1 (value after reset)"]
2475 pub const _00: Self = Self::new(0);
2476
2477 #[doc = "∕ 2"]
2478 pub const _01: Self = Self::new(1);
2479
2480 #[doc = "∕ 3"]
2481 pub const _10: Self = Self::new(2);
2482 }
2483 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2484 pub struct Pl2Srcsel_SPEC;
2485 pub type Pl2Srcsel = crate::EnumBitfieldStruct<u8, Pl2Srcsel_SPEC>;
2486 impl Pl2Srcsel {
2487 #[doc = "Main clock oscillator"]
2488 pub const _0: Self = Self::new(0);
2489
2490 #[doc = "HOCO"]
2491 pub const _1: Self = Self::new(1);
2492 }
2493}
2494#[doc(hidden)]
2495#[derive(Copy, Clone, Eq, PartialEq)]
2496pub struct Pll2Cr_SPEC;
2497impl crate::sealed::RegSpec for Pll2Cr_SPEC {
2498 type DataType = u8;
2499}
2500
2501#[doc = "PLL2 Control Register"]
2502pub type Pll2Cr = crate::RegValueT<Pll2Cr_SPEC>;
2503
2504impl Pll2Cr {
2505 #[doc = "PLL2 Stop Control"]
2506 #[inline(always)]
2507 pub fn pll2stp(
2508 self,
2509 ) -> crate::common::RegisterField<
2510 0,
2511 0x1,
2512 1,
2513 0,
2514 pll2cr::Pll2Stp,
2515 pll2cr::Pll2Stp,
2516 Pll2Cr_SPEC,
2517 crate::common::RW,
2518 > {
2519 crate::common::RegisterField::<
2520 0,
2521 0x1,
2522 1,
2523 0,
2524 pll2cr::Pll2Stp,
2525 pll2cr::Pll2Stp,
2526 Pll2Cr_SPEC,
2527 crate::common::RW,
2528 >::from_register(self, 0)
2529 }
2530}
2531impl ::core::default::Default for Pll2Cr {
2532 #[inline(always)]
2533 fn default() -> Pll2Cr {
2534 <crate::RegValueT<Pll2Cr_SPEC> as RegisterValue<_>>::new(1)
2535 }
2536}
2537pub mod pll2cr {
2538
2539 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2540 pub struct Pll2Stp_SPEC;
2541 pub type Pll2Stp = crate::EnumBitfieldStruct<u8, Pll2Stp_SPEC>;
2542 impl Pll2Stp {
2543 #[doc = "PLL2 is operating"]
2544 pub const _0: Self = Self::new(0);
2545
2546 #[doc = "PLL2 is stopped."]
2547 pub const _1: Self = Self::new(1);
2548 }
2549}
2550#[doc(hidden)]
2551#[derive(Copy, Clone, Eq, PartialEq)]
2552pub struct Mocoutcr_SPEC;
2553impl crate::sealed::RegSpec for Mocoutcr_SPEC {
2554 type DataType = u8;
2555}
2556
2557#[doc = "MOCO User Trimming Control Register"]
2558pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
2559
2560impl Mocoutcr {
2561 #[doc = "MOCO User Trimming"]
2562 #[inline(always)]
2563 pub fn mocoutrm(
2564 self,
2565 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
2566 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2567 }
2568}
2569impl ::core::default::Default for Mocoutcr {
2570 #[inline(always)]
2571 fn default() -> Mocoutcr {
2572 <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
2573 }
2574}
2575
2576#[doc(hidden)]
2577#[derive(Copy, Clone, Eq, PartialEq)]
2578pub struct Hocoutcr_SPEC;
2579impl crate::sealed::RegSpec for Hocoutcr_SPEC {
2580 type DataType = u8;
2581}
2582
2583#[doc = "HOCO User Trimming Control Register"]
2584pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
2585
2586impl Hocoutcr {
2587 #[doc = "HOCO User Trimming"]
2588 #[inline(always)]
2589 pub fn hocoutrm(
2590 self,
2591 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
2592 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2593 }
2594}
2595impl ::core::default::Default for Hocoutcr {
2596 #[inline(always)]
2597 fn default() -> Hocoutcr {
2598 <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
2599 }
2600}
2601
2602#[doc(hidden)]
2603#[derive(Copy, Clone, Eq, PartialEq)]
2604pub struct Usbckdivcr_SPEC;
2605impl crate::sealed::RegSpec for Usbckdivcr_SPEC {
2606 type DataType = u8;
2607}
2608
2609#[doc = "USB Clock Division Control Register"]
2610pub type Usbckdivcr = crate::RegValueT<Usbckdivcr_SPEC>;
2611
2612impl Usbckdivcr {
2613 #[doc = "USB Clock (USBCLK) Division Select"]
2614 #[inline(always)]
2615 pub fn usbckdiv(
2616 self,
2617 ) -> crate::common::RegisterField<
2618 0,
2619 0x7,
2620 1,
2621 0,
2622 usbckdivcr::Usbckdiv,
2623 usbckdivcr::Usbckdiv,
2624 Usbckdivcr_SPEC,
2625 crate::common::RW,
2626 > {
2627 crate::common::RegisterField::<
2628 0,
2629 0x7,
2630 1,
2631 0,
2632 usbckdivcr::Usbckdiv,
2633 usbckdivcr::Usbckdiv,
2634 Usbckdivcr_SPEC,
2635 crate::common::RW,
2636 >::from_register(self, 0)
2637 }
2638}
2639impl ::core::default::Default for Usbckdivcr {
2640 #[inline(always)]
2641 fn default() -> Usbckdivcr {
2642 <crate::RegValueT<Usbckdivcr_SPEC> as RegisterValue<_>>::new(0)
2643 }
2644}
2645pub mod usbckdivcr {
2646
2647 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2648 pub struct Usbckdiv_SPEC;
2649 pub type Usbckdiv = crate::EnumBitfieldStruct<u8, Usbckdiv_SPEC>;
2650 impl Usbckdiv {
2651 #[doc = "∕ 4"]
2652 pub const _010: Self = Self::new(2);
2653
2654 #[doc = "∕ 3"]
2655 pub const _101: Self = Self::new(5);
2656
2657 #[doc = "∕ 5"]
2658 pub const _110: Self = Self::new(6);
2659 }
2660}
2661#[doc(hidden)]
2662#[derive(Copy, Clone, Eq, PartialEq)]
2663pub struct Usbckcr_SPEC;
2664impl crate::sealed::RegSpec for Usbckcr_SPEC {
2665 type DataType = u8;
2666}
2667
2668#[doc = "USB Clock Control Register"]
2669pub type Usbckcr = crate::RegValueT<Usbckcr_SPEC>;
2670
2671impl Usbckcr {
2672 #[doc = "USB Clock (USBCLK) Source Select"]
2673 #[inline(always)]
2674 pub fn usbcksel(
2675 self,
2676 ) -> crate::common::RegisterField<
2677 0,
2678 0x7,
2679 1,
2680 0,
2681 usbckcr::Usbcksel,
2682 usbckcr::Usbcksel,
2683 Usbckcr_SPEC,
2684 crate::common::RW,
2685 > {
2686 crate::common::RegisterField::<
2687 0,
2688 0x7,
2689 1,
2690 0,
2691 usbckcr::Usbcksel,
2692 usbckcr::Usbcksel,
2693 Usbckcr_SPEC,
2694 crate::common::RW,
2695 >::from_register(self, 0)
2696 }
2697
2698 #[doc = "USB Clock (USBCLK) Switching Request"]
2699 #[inline(always)]
2700 pub fn usbcksreq(
2701 self,
2702 ) -> crate::common::RegisterField<
2703 6,
2704 0x1,
2705 1,
2706 0,
2707 usbckcr::Usbcksreq,
2708 usbckcr::Usbcksreq,
2709 Usbckcr_SPEC,
2710 crate::common::RW,
2711 > {
2712 crate::common::RegisterField::<
2713 6,
2714 0x1,
2715 1,
2716 0,
2717 usbckcr::Usbcksreq,
2718 usbckcr::Usbcksreq,
2719 Usbckcr_SPEC,
2720 crate::common::RW,
2721 >::from_register(self, 0)
2722 }
2723
2724 #[doc = "USB Clock (USBCLK) Switching Ready state flag"]
2725 #[inline(always)]
2726 pub fn usbcksrdy(
2727 self,
2728 ) -> crate::common::RegisterField<
2729 7,
2730 0x1,
2731 1,
2732 0,
2733 usbckcr::Usbcksrdy,
2734 usbckcr::Usbcksrdy,
2735 Usbckcr_SPEC,
2736 crate::common::R,
2737 > {
2738 crate::common::RegisterField::<
2739 7,
2740 0x1,
2741 1,
2742 0,
2743 usbckcr::Usbcksrdy,
2744 usbckcr::Usbcksrdy,
2745 Usbckcr_SPEC,
2746 crate::common::R,
2747 >::from_register(self, 0)
2748 }
2749}
2750impl ::core::default::Default for Usbckcr {
2751 #[inline(always)]
2752 fn default() -> Usbckcr {
2753 <crate::RegValueT<Usbckcr_SPEC> as RegisterValue<_>>::new(1)
2754 }
2755}
2756pub mod usbckcr {
2757
2758 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2759 pub struct Usbcksel_SPEC;
2760 pub type Usbcksel = crate::EnumBitfieldStruct<u8, Usbcksel_SPEC>;
2761 impl Usbcksel {
2762 #[doc = "PLL"]
2763 pub const _101: Self = Self::new(5);
2764
2765 #[doc = "PLL2"]
2766 pub const _110: Self = Self::new(6);
2767 }
2768 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2769 pub struct Usbcksreq_SPEC;
2770 pub type Usbcksreq = crate::EnumBitfieldStruct<u8, Usbcksreq_SPEC>;
2771 impl Usbcksreq {
2772 #[doc = "No request"]
2773 pub const _0: Self = Self::new(0);
2774
2775 #[doc = "Request switching."]
2776 pub const _1: Self = Self::new(1);
2777 }
2778 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2779 pub struct Usbcksrdy_SPEC;
2780 pub type Usbcksrdy = crate::EnumBitfieldStruct<u8, Usbcksrdy_SPEC>;
2781 impl Usbcksrdy {
2782 #[doc = "Impossible to Switch"]
2783 pub const _0: Self = Self::new(0);
2784
2785 #[doc = "Possible to Switch"]
2786 pub const _1: Self = Self::new(1);
2787 }
2788}
2789#[doc(hidden)]
2790#[derive(Copy, Clone, Eq, PartialEq)]
2791pub struct Snzreqcr1_SPEC;
2792impl crate::sealed::RegSpec for Snzreqcr1_SPEC {
2793 type DataType = u32;
2794}
2795
2796#[doc = "Snooze Request Control Register 1"]
2797pub type Snzreqcr1 = crate::RegValueT<Snzreqcr1_SPEC>;
2798
2799impl Snzreqcr1 {
2800 #[doc = "Enable AGT3 underflow snooze request"]
2801 #[inline(always)]
2802 pub fn snzreqen0(
2803 self,
2804 ) -> crate::common::RegisterField<
2805 0,
2806 0x1,
2807 1,
2808 0,
2809 snzreqcr1::Snzreqen0,
2810 snzreqcr1::Snzreqen0,
2811 Snzreqcr1_SPEC,
2812 crate::common::RW,
2813 > {
2814 crate::common::RegisterField::<
2815 0,
2816 0x1,
2817 1,
2818 0,
2819 snzreqcr1::Snzreqen0,
2820 snzreqcr1::Snzreqen0,
2821 Snzreqcr1_SPEC,
2822 crate::common::RW,
2823 >::from_register(self, 0)
2824 }
2825
2826 #[doc = "Enable AGT3 compare match A snooze request"]
2827 #[inline(always)]
2828 pub fn snzreqen1(
2829 self,
2830 ) -> crate::common::RegisterField<
2831 1,
2832 0x1,
2833 1,
2834 0,
2835 snzreqcr1::Snzreqen1,
2836 snzreqcr1::Snzreqen1,
2837 Snzreqcr1_SPEC,
2838 crate::common::RW,
2839 > {
2840 crate::common::RegisterField::<
2841 1,
2842 0x1,
2843 1,
2844 0,
2845 snzreqcr1::Snzreqen1,
2846 snzreqcr1::Snzreqen1,
2847 Snzreqcr1_SPEC,
2848 crate::common::RW,
2849 >::from_register(self, 0)
2850 }
2851
2852 #[doc = "Enable AGT3 compare match B snooze request"]
2853 #[inline(always)]
2854 pub fn snzreqen2(
2855 self,
2856 ) -> crate::common::RegisterField<
2857 2,
2858 0x1,
2859 1,
2860 0,
2861 snzreqcr1::Snzreqen2,
2862 snzreqcr1::Snzreqen2,
2863 Snzreqcr1_SPEC,
2864 crate::common::RW,
2865 > {
2866 crate::common::RegisterField::<
2867 2,
2868 0x1,
2869 1,
2870 0,
2871 snzreqcr1::Snzreqen2,
2872 snzreqcr1::Snzreqen2,
2873 Snzreqcr1_SPEC,
2874 crate::common::RW,
2875 >::from_register(self, 0)
2876 }
2877}
2878impl ::core::default::Default for Snzreqcr1 {
2879 #[inline(always)]
2880 fn default() -> Snzreqcr1 {
2881 <crate::RegValueT<Snzreqcr1_SPEC> as RegisterValue<_>>::new(0)
2882 }
2883}
2884pub mod snzreqcr1 {
2885
2886 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2887 pub struct Snzreqen0_SPEC;
2888 pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
2889 impl Snzreqen0 {
2890 #[doc = "Disable the snooze request"]
2891 pub const _0: Self = Self::new(0);
2892
2893 #[doc = "Enable the snooze request"]
2894 pub const _1: Self = Self::new(1);
2895 }
2896 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2897 pub struct Snzreqen1_SPEC;
2898 pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
2899 impl Snzreqen1 {
2900 #[doc = "Disable the snooze request"]
2901 pub const _0: Self = Self::new(0);
2902
2903 #[doc = "Enable the snooze request"]
2904 pub const _1: Self = Self::new(1);
2905 }
2906 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2907 pub struct Snzreqen2_SPEC;
2908 pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
2909 impl Snzreqen2 {
2910 #[doc = "Disable the snooze request"]
2911 pub const _0: Self = Self::new(0);
2912
2913 #[doc = "Enable the snooze request"]
2914 pub const _1: Self = Self::new(1);
2915 }
2916}
2917#[doc(hidden)]
2918#[derive(Copy, Clone, Eq, PartialEq)]
2919pub struct Snzcr_SPEC;
2920impl crate::sealed::RegSpec for Snzcr_SPEC {
2921 type DataType = u8;
2922}
2923
2924#[doc = "Snooze Control Register"]
2925pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
2926
2927impl Snzcr {
2928 #[doc = "RXD0 Snooze Request Enable"]
2929 #[inline(always)]
2930 pub fn rxdreqen(
2931 self,
2932 ) -> crate::common::RegisterField<
2933 0,
2934 0x1,
2935 1,
2936 0,
2937 snzcr::Rxdreqen,
2938 snzcr::Rxdreqen,
2939 Snzcr_SPEC,
2940 crate::common::RW,
2941 > {
2942 crate::common::RegisterField::<
2943 0,
2944 0x1,
2945 1,
2946 0,
2947 snzcr::Rxdreqen,
2948 snzcr::Rxdreqen,
2949 Snzcr_SPEC,
2950 crate::common::RW,
2951 >::from_register(self, 0)
2952 }
2953
2954 #[doc = "DTC Enable in Snooze mode"]
2955 #[inline(always)]
2956 pub fn snzdtcen(
2957 self,
2958 ) -> crate::common::RegisterField<
2959 1,
2960 0x1,
2961 1,
2962 0,
2963 snzcr::Snzdtcen,
2964 snzcr::Snzdtcen,
2965 Snzcr_SPEC,
2966 crate::common::RW,
2967 > {
2968 crate::common::RegisterField::<
2969 1,
2970 0x1,
2971 1,
2972 0,
2973 snzcr::Snzdtcen,
2974 snzcr::Snzdtcen,
2975 Snzcr_SPEC,
2976 crate::common::RW,
2977 >::from_register(self, 0)
2978 }
2979
2980 #[doc = "Snooze mode Enable"]
2981 #[inline(always)]
2982 pub fn snze(
2983 self,
2984 ) -> crate::common::RegisterField<
2985 7,
2986 0x1,
2987 1,
2988 0,
2989 snzcr::Snze,
2990 snzcr::Snze,
2991 Snzcr_SPEC,
2992 crate::common::RW,
2993 > {
2994 crate::common::RegisterField::<
2995 7,
2996 0x1,
2997 1,
2998 0,
2999 snzcr::Snze,
3000 snzcr::Snze,
3001 Snzcr_SPEC,
3002 crate::common::RW,
3003 >::from_register(self, 0)
3004 }
3005}
3006impl ::core::default::Default for Snzcr {
3007 #[inline(always)]
3008 fn default() -> Snzcr {
3009 <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
3010 }
3011}
3012pub mod snzcr {
3013
3014 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3015 pub struct Rxdreqen_SPEC;
3016 pub type Rxdreqen = crate::EnumBitfieldStruct<u8, Rxdreqen_SPEC>;
3017 impl Rxdreqen {
3018 #[doc = "Ignore RXD0 falling edge in Software Standby mode"]
3019 pub const _0: Self = Self::new(0);
3020
3021 #[doc = "Detect RXD0 falling edge in Software Standby mode"]
3022 pub const _1: Self = Self::new(1);
3023 }
3024 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3025 pub struct Snzdtcen_SPEC;
3026 pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
3027 impl Snzdtcen {
3028 #[doc = "Disable DTC operation"]
3029 pub const _0: Self = Self::new(0);
3030
3031 #[doc = "Enable DTC operation"]
3032 pub const _1: Self = Self::new(1);
3033 }
3034 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3035 pub struct Snze_SPEC;
3036 pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
3037 impl Snze {
3038 #[doc = "Disable Snooze mode"]
3039 pub const _0: Self = Self::new(0);
3040
3041 #[doc = "Enable Snooze mode"]
3042 pub const _1: Self = Self::new(1);
3043 }
3044}
3045#[doc(hidden)]
3046#[derive(Copy, Clone, Eq, PartialEq)]
3047pub struct Snzedcr0_SPEC;
3048impl crate::sealed::RegSpec for Snzedcr0_SPEC {
3049 type DataType = u8;
3050}
3051
3052#[doc = "Snooze End Control Register 0"]
3053pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
3054
3055impl Snzedcr0 {
3056 #[doc = "AGT1 Underflow Snooze End Enable"]
3057 #[inline(always)]
3058 pub fn agtunfed(
3059 self,
3060 ) -> crate::common::RegisterField<
3061 0,
3062 0x1,
3063 1,
3064 0,
3065 snzedcr0::Agtunfed,
3066 snzedcr0::Agtunfed,
3067 Snzedcr0_SPEC,
3068 crate::common::RW,
3069 > {
3070 crate::common::RegisterField::<
3071 0,
3072 0x1,
3073 1,
3074 0,
3075 snzedcr0::Agtunfed,
3076 snzedcr0::Agtunfed,
3077 Snzedcr0_SPEC,
3078 crate::common::RW,
3079 >::from_register(self, 0)
3080 }
3081
3082 #[doc = "Last DTC Transmission Completion Snooze End Enable"]
3083 #[inline(always)]
3084 pub fn dtczred(
3085 self,
3086 ) -> crate::common::RegisterField<
3087 1,
3088 0x1,
3089 1,
3090 0,
3091 snzedcr0::Dtczred,
3092 snzedcr0::Dtczred,
3093 Snzedcr0_SPEC,
3094 crate::common::RW,
3095 > {
3096 crate::common::RegisterField::<
3097 1,
3098 0x1,
3099 1,
3100 0,
3101 snzedcr0::Dtczred,
3102 snzedcr0::Dtczred,
3103 Snzedcr0_SPEC,
3104 crate::common::RW,
3105 >::from_register(self, 0)
3106 }
3107
3108 #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
3109 #[inline(always)]
3110 pub fn dtcnzred(
3111 self,
3112 ) -> crate::common::RegisterField<
3113 2,
3114 0x1,
3115 1,
3116 0,
3117 snzedcr0::Dtcnzred,
3118 snzedcr0::Dtcnzred,
3119 Snzedcr0_SPEC,
3120 crate::common::RW,
3121 > {
3122 crate::common::RegisterField::<
3123 2,
3124 0x1,
3125 1,
3126 0,
3127 snzedcr0::Dtcnzred,
3128 snzedcr0::Dtcnzred,
3129 Snzedcr0_SPEC,
3130 crate::common::RW,
3131 >::from_register(self, 0)
3132 }
3133
3134 #[doc = "ADC12 Compare Match Snooze End Enable"]
3135 #[inline(always)]
3136 pub fn ad0mated(
3137 self,
3138 ) -> crate::common::RegisterField<
3139 3,
3140 0x1,
3141 1,
3142 0,
3143 snzedcr0::Ad0Mated,
3144 snzedcr0::Ad0Mated,
3145 Snzedcr0_SPEC,
3146 crate::common::RW,
3147 > {
3148 crate::common::RegisterField::<
3149 3,
3150 0x1,
3151 1,
3152 0,
3153 snzedcr0::Ad0Mated,
3154 snzedcr0::Ad0Mated,
3155 Snzedcr0_SPEC,
3156 crate::common::RW,
3157 >::from_register(self, 0)
3158 }
3159
3160 #[doc = "ADC12 Compare Mismatch Snooze End Enable"]
3161 #[inline(always)]
3162 pub fn ad0umted(
3163 self,
3164 ) -> crate::common::RegisterField<
3165 4,
3166 0x1,
3167 1,
3168 0,
3169 snzedcr0::Ad0Umted,
3170 snzedcr0::Ad0Umted,
3171 Snzedcr0_SPEC,
3172 crate::common::RW,
3173 > {
3174 crate::common::RegisterField::<
3175 4,
3176 0x1,
3177 1,
3178 0,
3179 snzedcr0::Ad0Umted,
3180 snzedcr0::Ad0Umted,
3181 Snzedcr0_SPEC,
3182 crate::common::RW,
3183 >::from_register(self, 0)
3184 }
3185
3186 #[doc = "SCI0 Address Mismatch Snooze End Enable"]
3187 #[inline(always)]
3188 pub fn sci0umted(
3189 self,
3190 ) -> crate::common::RegisterField<
3191 7,
3192 0x1,
3193 1,
3194 0,
3195 snzedcr0::Sci0Umted,
3196 snzedcr0::Sci0Umted,
3197 Snzedcr0_SPEC,
3198 crate::common::RW,
3199 > {
3200 crate::common::RegisterField::<
3201 7,
3202 0x1,
3203 1,
3204 0,
3205 snzedcr0::Sci0Umted,
3206 snzedcr0::Sci0Umted,
3207 Snzedcr0_SPEC,
3208 crate::common::RW,
3209 >::from_register(self, 0)
3210 }
3211}
3212impl ::core::default::Default for Snzedcr0 {
3213 #[inline(always)]
3214 fn default() -> Snzedcr0 {
3215 <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
3216 }
3217}
3218pub mod snzedcr0 {
3219
3220 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3221 pub struct Agtunfed_SPEC;
3222 pub type Agtunfed = crate::EnumBitfieldStruct<u8, Agtunfed_SPEC>;
3223 impl Agtunfed {
3224 #[doc = "Disable the snooze end request"]
3225 pub const _0: Self = Self::new(0);
3226
3227 #[doc = "Enable the snooze end request"]
3228 pub const _1: Self = Self::new(1);
3229 }
3230 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3231 pub struct Dtczred_SPEC;
3232 pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
3233 impl Dtczred {
3234 #[doc = "Disable the snooze end request"]
3235 pub const _0: Self = Self::new(0);
3236
3237 #[doc = "Enable the snooze end request"]
3238 pub const _1: Self = Self::new(1);
3239 }
3240 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3241 pub struct Dtcnzred_SPEC;
3242 pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
3243 impl Dtcnzred {
3244 #[doc = "Disable the snooze end request"]
3245 pub const _0: Self = Self::new(0);
3246
3247 #[doc = "Enable the snooze end request"]
3248 pub const _1: Self = Self::new(1);
3249 }
3250 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3251 pub struct Ad0Mated_SPEC;
3252 pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
3253 impl Ad0Mated {
3254 #[doc = "Disable the snooze end request"]
3255 pub const _0: Self = Self::new(0);
3256
3257 #[doc = "Enable the snooze end request"]
3258 pub const _1: Self = Self::new(1);
3259 }
3260 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3261 pub struct Ad0Umted_SPEC;
3262 pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
3263 impl Ad0Umted {
3264 #[doc = "Disable the snooze end request"]
3265 pub const _0: Self = Self::new(0);
3266
3267 #[doc = "Enable the snooze end request"]
3268 pub const _1: Self = Self::new(1);
3269 }
3270 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3271 pub struct Sci0Umted_SPEC;
3272 pub type Sci0Umted = crate::EnumBitfieldStruct<u8, Sci0Umted_SPEC>;
3273 impl Sci0Umted {
3274 #[doc = "Disable the snooze end request"]
3275 pub const _0: Self = Self::new(0);
3276
3277 #[doc = "Enable the snooze end request"]
3278 pub const _1: Self = Self::new(1);
3279 }
3280}
3281#[doc(hidden)]
3282#[derive(Copy, Clone, Eq, PartialEq)]
3283pub struct Snzedcr1_SPEC;
3284impl crate::sealed::RegSpec for Snzedcr1_SPEC {
3285 type DataType = u8;
3286}
3287
3288#[doc = "Snooze End Control Register 1"]
3289pub type Snzedcr1 = crate::RegValueT<Snzedcr1_SPEC>;
3290
3291impl Snzedcr1 {
3292 #[doc = "AGT3 underflow Snooze End Enable"]
3293 #[inline(always)]
3294 pub fn agt3unfed(
3295 self,
3296 ) -> crate::common::RegisterField<
3297 0,
3298 0x1,
3299 1,
3300 0,
3301 snzedcr1::Agt3Unfed,
3302 snzedcr1::Agt3Unfed,
3303 Snzedcr1_SPEC,
3304 crate::common::RW,
3305 > {
3306 crate::common::RegisterField::<
3307 0,
3308 0x1,
3309 1,
3310 0,
3311 snzedcr1::Agt3Unfed,
3312 snzedcr1::Agt3Unfed,
3313 Snzedcr1_SPEC,
3314 crate::common::RW,
3315 >::from_register(self, 0)
3316 }
3317}
3318impl ::core::default::Default for Snzedcr1 {
3319 #[inline(always)]
3320 fn default() -> Snzedcr1 {
3321 <crate::RegValueT<Snzedcr1_SPEC> as RegisterValue<_>>::new(0)
3322 }
3323}
3324pub mod snzedcr1 {
3325
3326 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3327 pub struct Agt3Unfed_SPEC;
3328 pub type Agt3Unfed = crate::EnumBitfieldStruct<u8, Agt3Unfed_SPEC>;
3329 impl Agt3Unfed {
3330 #[doc = "Disable the Snooze End request"]
3331 pub const _0: Self = Self::new(0);
3332
3333 #[doc = "Enable the Snooze End request"]
3334 pub const _1: Self = Self::new(1);
3335 }
3336}
3337#[doc(hidden)]
3338#[derive(Copy, Clone, Eq, PartialEq)]
3339pub struct Snzreqcr0_SPEC;
3340impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
3341 type DataType = u32;
3342}
3343
3344#[doc = "Snooze Request Control Register 0"]
3345pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
3346
3347impl Snzreqcr0 {
3348 #[doc = "Enable IRQ0 pin snooze request"]
3349 #[inline(always)]
3350 pub fn snzreqen0(
3351 self,
3352 ) -> crate::common::RegisterField<
3353 0,
3354 0x1,
3355 1,
3356 0,
3357 snzreqcr0::Snzreqen0,
3358 snzreqcr0::Snzreqen0,
3359 Snzreqcr0_SPEC,
3360 crate::common::RW,
3361 > {
3362 crate::common::RegisterField::<
3363 0,
3364 0x1,
3365 1,
3366 0,
3367 snzreqcr0::Snzreqen0,
3368 snzreqcr0::Snzreqen0,
3369 Snzreqcr0_SPEC,
3370 crate::common::RW,
3371 >::from_register(self, 0)
3372 }
3373
3374 #[doc = "Enable IRQ1 pin snooze request"]
3375 #[inline(always)]
3376 pub fn snzreqen1(
3377 self,
3378 ) -> crate::common::RegisterField<
3379 1,
3380 0x1,
3381 1,
3382 0,
3383 snzreqcr0::Snzreqen1,
3384 snzreqcr0::Snzreqen1,
3385 Snzreqcr0_SPEC,
3386 crate::common::RW,
3387 > {
3388 crate::common::RegisterField::<
3389 1,
3390 0x1,
3391 1,
3392 0,
3393 snzreqcr0::Snzreqen1,
3394 snzreqcr0::Snzreqen1,
3395 Snzreqcr0_SPEC,
3396 crate::common::RW,
3397 >::from_register(self, 0)
3398 }
3399
3400 #[doc = "Enable IRQ2 pin snooze request"]
3401 #[inline(always)]
3402 pub fn snzreqen2(
3403 self,
3404 ) -> crate::common::RegisterField<
3405 2,
3406 0x1,
3407 1,
3408 0,
3409 snzreqcr0::Snzreqen2,
3410 snzreqcr0::Snzreqen2,
3411 Snzreqcr0_SPEC,
3412 crate::common::RW,
3413 > {
3414 crate::common::RegisterField::<
3415 2,
3416 0x1,
3417 1,
3418 0,
3419 snzreqcr0::Snzreqen2,
3420 snzreqcr0::Snzreqen2,
3421 Snzreqcr0_SPEC,
3422 crate::common::RW,
3423 >::from_register(self, 0)
3424 }
3425
3426 #[doc = "Enable IRQ3 pin snooze request"]
3427 #[inline(always)]
3428 pub fn snzreqen3(
3429 self,
3430 ) -> crate::common::RegisterField<
3431 3,
3432 0x1,
3433 1,
3434 0,
3435 snzreqcr0::Snzreqen3,
3436 snzreqcr0::Snzreqen3,
3437 Snzreqcr0_SPEC,
3438 crate::common::RW,
3439 > {
3440 crate::common::RegisterField::<
3441 3,
3442 0x1,
3443 1,
3444 0,
3445 snzreqcr0::Snzreqen3,
3446 snzreqcr0::Snzreqen3,
3447 Snzreqcr0_SPEC,
3448 crate::common::RW,
3449 >::from_register(self, 0)
3450 }
3451
3452 #[doc = "Enable IRQ4 pin snooze request"]
3453 #[inline(always)]
3454 pub fn snzreqen4(
3455 self,
3456 ) -> crate::common::RegisterField<
3457 4,
3458 0x1,
3459 1,
3460 0,
3461 snzreqcr0::Snzreqen4,
3462 snzreqcr0::Snzreqen4,
3463 Snzreqcr0_SPEC,
3464 crate::common::RW,
3465 > {
3466 crate::common::RegisterField::<
3467 4,
3468 0x1,
3469 1,
3470 0,
3471 snzreqcr0::Snzreqen4,
3472 snzreqcr0::Snzreqen4,
3473 Snzreqcr0_SPEC,
3474 crate::common::RW,
3475 >::from_register(self, 0)
3476 }
3477
3478 #[doc = "Enable IRQ5 pin snooze request"]
3479 #[inline(always)]
3480 pub fn snzreqen5(
3481 self,
3482 ) -> crate::common::RegisterField<
3483 5,
3484 0x1,
3485 1,
3486 0,
3487 snzreqcr0::Snzreqen5,
3488 snzreqcr0::Snzreqen5,
3489 Snzreqcr0_SPEC,
3490 crate::common::RW,
3491 > {
3492 crate::common::RegisterField::<
3493 5,
3494 0x1,
3495 1,
3496 0,
3497 snzreqcr0::Snzreqen5,
3498 snzreqcr0::Snzreqen5,
3499 Snzreqcr0_SPEC,
3500 crate::common::RW,
3501 >::from_register(self, 0)
3502 }
3503
3504 #[doc = "Enable IRQ6 pin snooze request"]
3505 #[inline(always)]
3506 pub fn snzreqen6(
3507 self,
3508 ) -> crate::common::RegisterField<
3509 6,
3510 0x1,
3511 1,
3512 0,
3513 snzreqcr0::Snzreqen6,
3514 snzreqcr0::Snzreqen6,
3515 Snzreqcr0_SPEC,
3516 crate::common::RW,
3517 > {
3518 crate::common::RegisterField::<
3519 6,
3520 0x1,
3521 1,
3522 0,
3523 snzreqcr0::Snzreqen6,
3524 snzreqcr0::Snzreqen6,
3525 Snzreqcr0_SPEC,
3526 crate::common::RW,
3527 >::from_register(self, 0)
3528 }
3529
3530 #[doc = "Enable IRQ7 pin snooze request"]
3531 #[inline(always)]
3532 pub fn snzreqen7(
3533 self,
3534 ) -> crate::common::RegisterField<
3535 7,
3536 0x1,
3537 1,
3538 0,
3539 snzreqcr0::Snzreqen7,
3540 snzreqcr0::Snzreqen7,
3541 Snzreqcr0_SPEC,
3542 crate::common::RW,
3543 > {
3544 crate::common::RegisterField::<
3545 7,
3546 0x1,
3547 1,
3548 0,
3549 snzreqcr0::Snzreqen7,
3550 snzreqcr0::Snzreqen7,
3551 Snzreqcr0_SPEC,
3552 crate::common::RW,
3553 >::from_register(self, 0)
3554 }
3555
3556 #[doc = "Enable IRQ8 pin snooze request"]
3557 #[inline(always)]
3558 pub fn snzreqen8(
3559 self,
3560 ) -> crate::common::RegisterField<
3561 8,
3562 0x1,
3563 1,
3564 0,
3565 snzreqcr0::Snzreqen8,
3566 snzreqcr0::Snzreqen8,
3567 Snzreqcr0_SPEC,
3568 crate::common::RW,
3569 > {
3570 crate::common::RegisterField::<
3571 8,
3572 0x1,
3573 1,
3574 0,
3575 snzreqcr0::Snzreqen8,
3576 snzreqcr0::Snzreqen8,
3577 Snzreqcr0_SPEC,
3578 crate::common::RW,
3579 >::from_register(self, 0)
3580 }
3581
3582 #[doc = "Enable IRQ9 pin snooze request"]
3583 #[inline(always)]
3584 pub fn snzreqen9(
3585 self,
3586 ) -> crate::common::RegisterField<
3587 9,
3588 0x1,
3589 1,
3590 0,
3591 snzreqcr0::Snzreqen9,
3592 snzreqcr0::Snzreqen9,
3593 Snzreqcr0_SPEC,
3594 crate::common::RW,
3595 > {
3596 crate::common::RegisterField::<
3597 9,
3598 0x1,
3599 1,
3600 0,
3601 snzreqcr0::Snzreqen9,
3602 snzreqcr0::Snzreqen9,
3603 Snzreqcr0_SPEC,
3604 crate::common::RW,
3605 >::from_register(self, 0)
3606 }
3607
3608 #[doc = "Enable IRQ10 pin snooze request"]
3609 #[inline(always)]
3610 pub fn snzreqen10(
3611 self,
3612 ) -> crate::common::RegisterField<
3613 10,
3614 0x1,
3615 1,
3616 0,
3617 snzreqcr0::Snzreqen10,
3618 snzreqcr0::Snzreqen10,
3619 Snzreqcr0_SPEC,
3620 crate::common::RW,
3621 > {
3622 crate::common::RegisterField::<
3623 10,
3624 0x1,
3625 1,
3626 0,
3627 snzreqcr0::Snzreqen10,
3628 snzreqcr0::Snzreqen10,
3629 Snzreqcr0_SPEC,
3630 crate::common::RW,
3631 >::from_register(self, 0)
3632 }
3633
3634 #[doc = "Enable IRQ11 pin snooze request"]
3635 #[inline(always)]
3636 pub fn snzreqen11(
3637 self,
3638 ) -> crate::common::RegisterField<
3639 11,
3640 0x1,
3641 1,
3642 0,
3643 snzreqcr0::Snzreqen11,
3644 snzreqcr0::Snzreqen11,
3645 Snzreqcr0_SPEC,
3646 crate::common::RW,
3647 > {
3648 crate::common::RegisterField::<
3649 11,
3650 0x1,
3651 1,
3652 0,
3653 snzreqcr0::Snzreqen11,
3654 snzreqcr0::Snzreqen11,
3655 Snzreqcr0_SPEC,
3656 crate::common::RW,
3657 >::from_register(self, 0)
3658 }
3659
3660 #[doc = "Enable IRQ12 pin snooze request"]
3661 #[inline(always)]
3662 pub fn snzreqen12(
3663 self,
3664 ) -> crate::common::RegisterField<
3665 12,
3666 0x1,
3667 1,
3668 0,
3669 snzreqcr0::Snzreqen12,
3670 snzreqcr0::Snzreqen12,
3671 Snzreqcr0_SPEC,
3672 crate::common::RW,
3673 > {
3674 crate::common::RegisterField::<
3675 12,
3676 0x1,
3677 1,
3678 0,
3679 snzreqcr0::Snzreqen12,
3680 snzreqcr0::Snzreqen12,
3681 Snzreqcr0_SPEC,
3682 crate::common::RW,
3683 >::from_register(self, 0)
3684 }
3685
3686 #[doc = "Enable IRQ13 pin snooze request"]
3687 #[inline(always)]
3688 pub fn snzreqen13(
3689 self,
3690 ) -> crate::common::RegisterField<
3691 13,
3692 0x1,
3693 1,
3694 0,
3695 snzreqcr0::Snzreqen13,
3696 snzreqcr0::Snzreqen13,
3697 Snzreqcr0_SPEC,
3698 crate::common::RW,
3699 > {
3700 crate::common::RegisterField::<
3701 13,
3702 0x1,
3703 1,
3704 0,
3705 snzreqcr0::Snzreqen13,
3706 snzreqcr0::Snzreqen13,
3707 Snzreqcr0_SPEC,
3708 crate::common::RW,
3709 >::from_register(self, 0)
3710 }
3711
3712 #[doc = "Enable IRQ14 pin snooze request"]
3713 #[inline(always)]
3714 pub fn snzreqen14(
3715 self,
3716 ) -> crate::common::RegisterField<
3717 14,
3718 0x1,
3719 1,
3720 0,
3721 snzreqcr0::Snzreqen14,
3722 snzreqcr0::Snzreqen14,
3723 Snzreqcr0_SPEC,
3724 crate::common::RW,
3725 > {
3726 crate::common::RegisterField::<
3727 14,
3728 0x1,
3729 1,
3730 0,
3731 snzreqcr0::Snzreqen14,
3732 snzreqcr0::Snzreqen14,
3733 Snzreqcr0_SPEC,
3734 crate::common::RW,
3735 >::from_register(self, 0)
3736 }
3737
3738 #[doc = "Enable IRQ15 pin snooze request"]
3739 #[inline(always)]
3740 pub fn snzreqen15(
3741 self,
3742 ) -> crate::common::RegisterField<
3743 15,
3744 0x1,
3745 1,
3746 0,
3747 snzreqcr0::Snzreqen15,
3748 snzreqcr0::Snzreqen15,
3749 Snzreqcr0_SPEC,
3750 crate::common::RW,
3751 > {
3752 crate::common::RegisterField::<
3753 15,
3754 0x1,
3755 1,
3756 0,
3757 snzreqcr0::Snzreqen15,
3758 snzreqcr0::Snzreqen15,
3759 Snzreqcr0_SPEC,
3760 crate::common::RW,
3761 >::from_register(self, 0)
3762 }
3763
3764 #[doc = "Enable RTC alarm snooze request"]
3765 #[inline(always)]
3766 pub fn snzreqen24(
3767 self,
3768 ) -> crate::common::RegisterField<
3769 24,
3770 0x1,
3771 1,
3772 0,
3773 snzreqcr0::Snzreqen24,
3774 snzreqcr0::Snzreqen24,
3775 Snzreqcr0_SPEC,
3776 crate::common::RW,
3777 > {
3778 crate::common::RegisterField::<
3779 24,
3780 0x1,
3781 1,
3782 0,
3783 snzreqcr0::Snzreqen24,
3784 snzreqcr0::Snzreqen24,
3785 Snzreqcr0_SPEC,
3786 crate::common::RW,
3787 >::from_register(self, 0)
3788 }
3789
3790 #[doc = "Enable RTC period snooze request"]
3791 #[inline(always)]
3792 pub fn snzreqen25(
3793 self,
3794 ) -> crate::common::RegisterField<
3795 25,
3796 0x1,
3797 1,
3798 0,
3799 snzreqcr0::Snzreqen25,
3800 snzreqcr0::Snzreqen25,
3801 Snzreqcr0_SPEC,
3802 crate::common::RW,
3803 > {
3804 crate::common::RegisterField::<
3805 25,
3806 0x1,
3807 1,
3808 0,
3809 snzreqcr0::Snzreqen25,
3810 snzreqcr0::Snzreqen25,
3811 Snzreqcr0_SPEC,
3812 crate::common::RW,
3813 >::from_register(self, 0)
3814 }
3815
3816 #[doc = "Enable AGT1 underflow snooze request"]
3817 #[inline(always)]
3818 pub fn snzreqen28(
3819 self,
3820 ) -> crate::common::RegisterField<
3821 28,
3822 0x1,
3823 1,
3824 0,
3825 snzreqcr0::Snzreqen28,
3826 snzreqcr0::Snzreqen28,
3827 Snzreqcr0_SPEC,
3828 crate::common::RW,
3829 > {
3830 crate::common::RegisterField::<
3831 28,
3832 0x1,
3833 1,
3834 0,
3835 snzreqcr0::Snzreqen28,
3836 snzreqcr0::Snzreqen28,
3837 Snzreqcr0_SPEC,
3838 crate::common::RW,
3839 >::from_register(self, 0)
3840 }
3841
3842 #[doc = "Enable AGT1 compare match A snooze request"]
3843 #[inline(always)]
3844 pub fn snzreqen29(
3845 self,
3846 ) -> crate::common::RegisterField<
3847 29,
3848 0x1,
3849 1,
3850 0,
3851 snzreqcr0::Snzreqen29,
3852 snzreqcr0::Snzreqen29,
3853 Snzreqcr0_SPEC,
3854 crate::common::RW,
3855 > {
3856 crate::common::RegisterField::<
3857 29,
3858 0x1,
3859 1,
3860 0,
3861 snzreqcr0::Snzreqen29,
3862 snzreqcr0::Snzreqen29,
3863 Snzreqcr0_SPEC,
3864 crate::common::RW,
3865 >::from_register(self, 0)
3866 }
3867
3868 #[doc = "Enable AGT1 compare match B snooze request"]
3869 #[inline(always)]
3870 pub fn snzreqen30(
3871 self,
3872 ) -> crate::common::RegisterField<
3873 30,
3874 0x1,
3875 1,
3876 0,
3877 snzreqcr0::Snzreqen30,
3878 snzreqcr0::Snzreqen30,
3879 Snzreqcr0_SPEC,
3880 crate::common::RW,
3881 > {
3882 crate::common::RegisterField::<
3883 30,
3884 0x1,
3885 1,
3886 0,
3887 snzreqcr0::Snzreqen30,
3888 snzreqcr0::Snzreqen30,
3889 Snzreqcr0_SPEC,
3890 crate::common::RW,
3891 >::from_register(self, 0)
3892 }
3893}
3894impl ::core::default::Default for Snzreqcr0 {
3895 #[inline(always)]
3896 fn default() -> Snzreqcr0 {
3897 <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
3898 }
3899}
3900pub mod snzreqcr0 {
3901
3902 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3903 pub struct Snzreqen0_SPEC;
3904 pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
3905 impl Snzreqen0 {
3906 #[doc = "Disable the snooze request"]
3907 pub const _0: Self = Self::new(0);
3908
3909 #[doc = "Enable the snooze request"]
3910 pub const _1: Self = Self::new(1);
3911 }
3912 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3913 pub struct Snzreqen1_SPEC;
3914 pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
3915 impl Snzreqen1 {
3916 #[doc = "Disable the snooze request"]
3917 pub const _0: Self = Self::new(0);
3918
3919 #[doc = "Enable the snooze request"]
3920 pub const _1: Self = Self::new(1);
3921 }
3922 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3923 pub struct Snzreqen2_SPEC;
3924 pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
3925 impl Snzreqen2 {
3926 #[doc = "Disable the snooze request"]
3927 pub const _0: Self = Self::new(0);
3928
3929 #[doc = "Enable the snooze request"]
3930 pub const _1: Self = Self::new(1);
3931 }
3932 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3933 pub struct Snzreqen3_SPEC;
3934 pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
3935 impl Snzreqen3 {
3936 #[doc = "Disable the snooze request"]
3937 pub const _0: Self = Self::new(0);
3938
3939 #[doc = "Enable the snooze request"]
3940 pub const _1: Self = Self::new(1);
3941 }
3942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3943 pub struct Snzreqen4_SPEC;
3944 pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
3945 impl Snzreqen4 {
3946 #[doc = "Disable the snooze request"]
3947 pub const _0: Self = Self::new(0);
3948
3949 #[doc = "Enable the snooze request"]
3950 pub const _1: Self = Self::new(1);
3951 }
3952 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3953 pub struct Snzreqen5_SPEC;
3954 pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
3955 impl Snzreqen5 {
3956 #[doc = "Disable the snooze request"]
3957 pub const _0: Self = Self::new(0);
3958
3959 #[doc = "Enable the snooze request"]
3960 pub const _1: Self = Self::new(1);
3961 }
3962 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3963 pub struct Snzreqen6_SPEC;
3964 pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
3965 impl Snzreqen6 {
3966 #[doc = "Disable the snooze request"]
3967 pub const _0: Self = Self::new(0);
3968
3969 #[doc = "Enable the snooze request"]
3970 pub const _1: Self = Self::new(1);
3971 }
3972 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3973 pub struct Snzreqen7_SPEC;
3974 pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
3975 impl Snzreqen7 {
3976 #[doc = "Disable the snooze request"]
3977 pub const _0: Self = Self::new(0);
3978
3979 #[doc = "Enable the snooze request"]
3980 pub const _1: Self = Self::new(1);
3981 }
3982 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3983 pub struct Snzreqen8_SPEC;
3984 pub type Snzreqen8 = crate::EnumBitfieldStruct<u8, Snzreqen8_SPEC>;
3985 impl Snzreqen8 {
3986 #[doc = "Disable the snooze request"]
3987 pub const _0: Self = Self::new(0);
3988
3989 #[doc = "Enable the snooze request"]
3990 pub const _1: Self = Self::new(1);
3991 }
3992 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3993 pub struct Snzreqen9_SPEC;
3994 pub type Snzreqen9 = crate::EnumBitfieldStruct<u8, Snzreqen9_SPEC>;
3995 impl Snzreqen9 {
3996 #[doc = "Disable the snooze request"]
3997 pub const _0: Self = Self::new(0);
3998
3999 #[doc = "Enable the snooze request"]
4000 pub const _1: Self = Self::new(1);
4001 }
4002 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4003 pub struct Snzreqen10_SPEC;
4004 pub type Snzreqen10 = crate::EnumBitfieldStruct<u8, Snzreqen10_SPEC>;
4005 impl Snzreqen10 {
4006 #[doc = "Disable the snooze request"]
4007 pub const _0: Self = Self::new(0);
4008
4009 #[doc = "Enable the snooze request"]
4010 pub const _1: Self = Self::new(1);
4011 }
4012 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4013 pub struct Snzreqen11_SPEC;
4014 pub type Snzreqen11 = crate::EnumBitfieldStruct<u8, Snzreqen11_SPEC>;
4015 impl Snzreqen11 {
4016 #[doc = "Disable the snooze request"]
4017 pub const _0: Self = Self::new(0);
4018
4019 #[doc = "Enable the snooze request"]
4020 pub const _1: Self = Self::new(1);
4021 }
4022 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4023 pub struct Snzreqen12_SPEC;
4024 pub type Snzreqen12 = crate::EnumBitfieldStruct<u8, Snzreqen12_SPEC>;
4025 impl Snzreqen12 {
4026 #[doc = "Disable the snooze request"]
4027 pub const _0: Self = Self::new(0);
4028
4029 #[doc = "Enable the snooze request"]
4030 pub const _1: Self = Self::new(1);
4031 }
4032 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4033 pub struct Snzreqen13_SPEC;
4034 pub type Snzreqen13 = crate::EnumBitfieldStruct<u8, Snzreqen13_SPEC>;
4035 impl Snzreqen13 {
4036 #[doc = "Disable the snooze request"]
4037 pub const _0: Self = Self::new(0);
4038
4039 #[doc = "Enable the snooze request"]
4040 pub const _1: Self = Self::new(1);
4041 }
4042 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4043 pub struct Snzreqen14_SPEC;
4044 pub type Snzreqen14 = crate::EnumBitfieldStruct<u8, Snzreqen14_SPEC>;
4045 impl Snzreqen14 {
4046 #[doc = "Disable the snooze request"]
4047 pub const _0: Self = Self::new(0);
4048
4049 #[doc = "Enable the snooze request"]
4050 pub const _1: Self = Self::new(1);
4051 }
4052 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4053 pub struct Snzreqen15_SPEC;
4054 pub type Snzreqen15 = crate::EnumBitfieldStruct<u8, Snzreqen15_SPEC>;
4055 impl Snzreqen15 {
4056 #[doc = "Disable the snooze request"]
4057 pub const _0: Self = Self::new(0);
4058
4059 #[doc = "Enable the snooze request"]
4060 pub const _1: Self = Self::new(1);
4061 }
4062 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4063 pub struct Snzreqen24_SPEC;
4064 pub type Snzreqen24 = crate::EnumBitfieldStruct<u8, Snzreqen24_SPEC>;
4065 impl Snzreqen24 {
4066 #[doc = "Disable the snooze request"]
4067 pub const _0: Self = Self::new(0);
4068
4069 #[doc = "Enable the snooze request"]
4070 pub const _1: Self = Self::new(1);
4071 }
4072 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4073 pub struct Snzreqen25_SPEC;
4074 pub type Snzreqen25 = crate::EnumBitfieldStruct<u8, Snzreqen25_SPEC>;
4075 impl Snzreqen25 {
4076 #[doc = "Disable the snooze request"]
4077 pub const _0: Self = Self::new(0);
4078
4079 #[doc = "Enable the snooze request"]
4080 pub const _1: Self = Self::new(1);
4081 }
4082 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4083 pub struct Snzreqen28_SPEC;
4084 pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
4085 impl Snzreqen28 {
4086 #[doc = "Disable the snooze request"]
4087 pub const _0: Self = Self::new(0);
4088
4089 #[doc = "Enable the snooze request"]
4090 pub const _1: Self = Self::new(1);
4091 }
4092 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4093 pub struct Snzreqen29_SPEC;
4094 pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
4095 impl Snzreqen29 {
4096 #[doc = "Disable the snooze request"]
4097 pub const _0: Self = Self::new(0);
4098
4099 #[doc = "Enable the snooze request"]
4100 pub const _1: Self = Self::new(1);
4101 }
4102 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4103 pub struct Snzreqen30_SPEC;
4104 pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
4105 impl Snzreqen30 {
4106 #[doc = "Disable the snooze request"]
4107 pub const _0: Self = Self::new(0);
4108
4109 #[doc = "Enable the snooze request"]
4110 pub const _1: Self = Self::new(1);
4111 }
4112}
4113#[doc(hidden)]
4114#[derive(Copy, Clone, Eq, PartialEq)]
4115pub struct Opccr_SPEC;
4116impl crate::sealed::RegSpec for Opccr_SPEC {
4117 type DataType = u8;
4118}
4119
4120#[doc = "Operating Power Control Register"]
4121pub type Opccr = crate::RegValueT<Opccr_SPEC>;
4122
4123impl Opccr {
4124 #[doc = "Operating Power Control Mode Select"]
4125 #[inline(always)]
4126 pub fn opcm(
4127 self,
4128 ) -> crate::common::RegisterField<
4129 0,
4130 0x3,
4131 1,
4132 0,
4133 opccr::Opcm,
4134 opccr::Opcm,
4135 Opccr_SPEC,
4136 crate::common::RW,
4137 > {
4138 crate::common::RegisterField::<
4139 0,
4140 0x3,
4141 1,
4142 0,
4143 opccr::Opcm,
4144 opccr::Opcm,
4145 Opccr_SPEC,
4146 crate::common::RW,
4147 >::from_register(self, 0)
4148 }
4149
4150 #[doc = "Operating Power Control Mode Transition Status Flag"]
4151 #[inline(always)]
4152 pub fn opcmtsf(
4153 self,
4154 ) -> crate::common::RegisterField<
4155 4,
4156 0x1,
4157 1,
4158 0,
4159 opccr::Opcmtsf,
4160 opccr::Opcmtsf,
4161 Opccr_SPEC,
4162 crate::common::R,
4163 > {
4164 crate::common::RegisterField::<
4165 4,
4166 0x1,
4167 1,
4168 0,
4169 opccr::Opcmtsf,
4170 opccr::Opcmtsf,
4171 Opccr_SPEC,
4172 crate::common::R,
4173 >::from_register(self, 0)
4174 }
4175}
4176impl ::core::default::Default for Opccr {
4177 #[inline(always)]
4178 fn default() -> Opccr {
4179 <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(0)
4180 }
4181}
4182pub mod opccr {
4183
4184 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4185 pub struct Opcm_SPEC;
4186 pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
4187 impl Opcm {
4188 #[doc = "High-speed mode"]
4189 pub const _00: Self = Self::new(0);
4190
4191 #[doc = "Setting prohibited"]
4192 pub const _01: Self = Self::new(1);
4193
4194 #[doc = "Setting prohibited"]
4195 pub const _10: Self = Self::new(2);
4196
4197 #[doc = "Low-speed mode"]
4198 pub const _11: Self = Self::new(3);
4199 }
4200 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4201 pub struct Opcmtsf_SPEC;
4202 pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
4203 impl Opcmtsf {
4204 #[doc = "Transition completed"]
4205 pub const _0: Self = Self::new(0);
4206
4207 #[doc = "During transition"]
4208 pub const _1: Self = Self::new(1);
4209 }
4210}
4211#[doc(hidden)]
4212#[derive(Copy, Clone, Eq, PartialEq)]
4213pub struct Moscwtcr_SPEC;
4214impl crate::sealed::RegSpec for Moscwtcr_SPEC {
4215 type DataType = u8;
4216}
4217
4218#[doc = "Main Clock Oscillator Wait Control Register"]
4219pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
4220
4221impl Moscwtcr {
4222 #[doc = "Main Clock Oscillator Wait Time Setting"]
4223 #[inline(always)]
4224 pub fn msts(
4225 self,
4226 ) -> crate::common::RegisterField<
4227 0,
4228 0xf,
4229 1,
4230 0,
4231 moscwtcr::Msts,
4232 moscwtcr::Msts,
4233 Moscwtcr_SPEC,
4234 crate::common::RW,
4235 > {
4236 crate::common::RegisterField::<
4237 0,
4238 0xf,
4239 1,
4240 0,
4241 moscwtcr::Msts,
4242 moscwtcr::Msts,
4243 Moscwtcr_SPEC,
4244 crate::common::RW,
4245 >::from_register(self, 0)
4246 }
4247}
4248impl ::core::default::Default for Moscwtcr {
4249 #[inline(always)]
4250 fn default() -> Moscwtcr {
4251 <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
4252 }
4253}
4254pub mod moscwtcr {
4255
4256 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4257 pub struct Msts_SPEC;
4258 pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
4259 impl Msts {
4260 #[doc = "Wait time = 3 cycles (11.4 us)"]
4261 pub const _0_X_0: Self = Self::new(0);
4262
4263 #[doc = "Wait time = 35 cycles (133.5 us)"]
4264 pub const _0_X_1: Self = Self::new(1);
4265
4266 #[doc = "Wait time = 67 cycles (255.6 us)"]
4267 pub const _0_X_2: Self = Self::new(2);
4268
4269 #[doc = "Wait time = 131 cycles (499.7 us)"]
4270 pub const _0_X_3: Self = Self::new(3);
4271
4272 #[doc = "Wait time = 259 cycles (988.0 us)"]
4273 pub const _0_X_4: Self = Self::new(4);
4274
4275 #[doc = "Wait time = 547 cycles (2086.6 us)"]
4276 pub const _0_X_5: Self = Self::new(5);
4277
4278 #[doc = "Wait time = 1059 cycles (4039.8 us)"]
4279 pub const _0_X_6: Self = Self::new(6);
4280
4281 #[doc = "Wait time = 2147 cycles (8190.2 us)"]
4282 pub const _0_X_7: Self = Self::new(7);
4283
4284 #[doc = "Wait time = 4291 cycles (16368.9 us)"]
4285 pub const _0_X_8: Self = Self::new(8);
4286
4287 #[doc = "Wait time = 8163 cycles (31139.4 us)"]
4288 pub const _0_X_9: Self = Self::new(9);
4289 }
4290}
4291#[doc(hidden)]
4292#[derive(Copy, Clone, Eq, PartialEq)]
4293pub struct Sopccr_SPEC;
4294impl crate::sealed::RegSpec for Sopccr_SPEC {
4295 type DataType = u8;
4296}
4297
4298#[doc = "Sub Operating Power Control Register"]
4299pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
4300
4301impl Sopccr {
4302 #[doc = "Sub Operating Power Control Mode Select"]
4303 #[inline(always)]
4304 pub fn sopcm(
4305 self,
4306 ) -> crate::common::RegisterField<
4307 0,
4308 0x1,
4309 1,
4310 0,
4311 sopccr::Sopcm,
4312 sopccr::Sopcm,
4313 Sopccr_SPEC,
4314 crate::common::RW,
4315 > {
4316 crate::common::RegisterField::<
4317 0,
4318 0x1,
4319 1,
4320 0,
4321 sopccr::Sopcm,
4322 sopccr::Sopcm,
4323 Sopccr_SPEC,
4324 crate::common::RW,
4325 >::from_register(self, 0)
4326 }
4327
4328 #[doc = "Operating Power Control Mode Transition Status Flag"]
4329 #[inline(always)]
4330 pub fn sopcmtsf(
4331 self,
4332 ) -> crate::common::RegisterField<
4333 4,
4334 0x1,
4335 1,
4336 0,
4337 sopccr::Sopcmtsf,
4338 sopccr::Sopcmtsf,
4339 Sopccr_SPEC,
4340 crate::common::R,
4341 > {
4342 crate::common::RegisterField::<
4343 4,
4344 0x1,
4345 1,
4346 0,
4347 sopccr::Sopcmtsf,
4348 sopccr::Sopcmtsf,
4349 Sopccr_SPEC,
4350 crate::common::R,
4351 >::from_register(self, 0)
4352 }
4353}
4354impl ::core::default::Default for Sopccr {
4355 #[inline(always)]
4356 fn default() -> Sopccr {
4357 <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
4358 }
4359}
4360pub mod sopccr {
4361
4362 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4363 pub struct Sopcm_SPEC;
4364 pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
4365 impl Sopcm {
4366 #[doc = "Other than Subosc-speed mode"]
4367 pub const _0: Self = Self::new(0);
4368
4369 #[doc = "Subosc-speed mode"]
4370 pub const _1: Self = Self::new(1);
4371 }
4372 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4373 pub struct Sopcmtsf_SPEC;
4374 pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
4375 impl Sopcmtsf {
4376 #[doc = "Transition completed"]
4377 pub const _0: Self = Self::new(0);
4378
4379 #[doc = "During transition"]
4380 pub const _1: Self = Self::new(1);
4381 }
4382}
4383#[doc(hidden)]
4384#[derive(Copy, Clone, Eq, PartialEq)]
4385pub struct Rstsr1_SPEC;
4386impl crate::sealed::RegSpec for Rstsr1_SPEC {
4387 type DataType = u16;
4388}
4389
4390#[doc = "Reset Status Register 1"]
4391pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
4392
4393impl Rstsr1 {
4394 #[doc = "Independent Watchdog Timer Reset Detect Flag"]
4395 #[inline(always)]
4396 pub fn iwdtrf(
4397 self,
4398 ) -> crate::common::RegisterField<
4399 0,
4400 0x1,
4401 1,
4402 0,
4403 rstsr1::Iwdtrf,
4404 rstsr1::Iwdtrf,
4405 Rstsr1_SPEC,
4406 crate::common::RW,
4407 > {
4408 crate::common::RegisterField::<
4409 0,
4410 0x1,
4411 1,
4412 0,
4413 rstsr1::Iwdtrf,
4414 rstsr1::Iwdtrf,
4415 Rstsr1_SPEC,
4416 crate::common::RW,
4417 >::from_register(self, 0)
4418 }
4419
4420 #[doc = "Watchdog Timer Reset Detect Flag"]
4421 #[inline(always)]
4422 pub fn wdtrf(
4423 self,
4424 ) -> crate::common::RegisterField<
4425 1,
4426 0x1,
4427 1,
4428 0,
4429 rstsr1::Wdtrf,
4430 rstsr1::Wdtrf,
4431 Rstsr1_SPEC,
4432 crate::common::RW,
4433 > {
4434 crate::common::RegisterField::<
4435 1,
4436 0x1,
4437 1,
4438 0,
4439 rstsr1::Wdtrf,
4440 rstsr1::Wdtrf,
4441 Rstsr1_SPEC,
4442 crate::common::RW,
4443 >::from_register(self, 0)
4444 }
4445
4446 #[doc = "Software Reset Detect Flag"]
4447 #[inline(always)]
4448 pub fn swrf(
4449 self,
4450 ) -> crate::common::RegisterField<
4451 2,
4452 0x1,
4453 1,
4454 0,
4455 rstsr1::Swrf,
4456 rstsr1::Swrf,
4457 Rstsr1_SPEC,
4458 crate::common::RW,
4459 > {
4460 crate::common::RegisterField::<
4461 2,
4462 0x1,
4463 1,
4464 0,
4465 rstsr1::Swrf,
4466 rstsr1::Swrf,
4467 Rstsr1_SPEC,
4468 crate::common::RW,
4469 >::from_register(self, 0)
4470 }
4471
4472 #[doc = "SRAM Parity Error Reset Detect Flag"]
4473 #[inline(always)]
4474 pub fn rperf(
4475 self,
4476 ) -> crate::common::RegisterField<
4477 8,
4478 0x1,
4479 1,
4480 0,
4481 rstsr1::Rperf,
4482 rstsr1::Rperf,
4483 Rstsr1_SPEC,
4484 crate::common::RW,
4485 > {
4486 crate::common::RegisterField::<
4487 8,
4488 0x1,
4489 1,
4490 0,
4491 rstsr1::Rperf,
4492 rstsr1::Rperf,
4493 Rstsr1_SPEC,
4494 crate::common::RW,
4495 >::from_register(self, 0)
4496 }
4497
4498 #[doc = "SRAM ECC Error Reset Detect Flag"]
4499 #[inline(always)]
4500 pub fn reerf(
4501 self,
4502 ) -> crate::common::RegisterField<
4503 9,
4504 0x1,
4505 1,
4506 0,
4507 rstsr1::Reerf,
4508 rstsr1::Reerf,
4509 Rstsr1_SPEC,
4510 crate::common::RW,
4511 > {
4512 crate::common::RegisterField::<
4513 9,
4514 0x1,
4515 1,
4516 0,
4517 rstsr1::Reerf,
4518 rstsr1::Reerf,
4519 Rstsr1_SPEC,
4520 crate::common::RW,
4521 >::from_register(self, 0)
4522 }
4523
4524 #[doc = "Bus Master MPU Error Reset Detect Flag"]
4525 #[inline(always)]
4526 pub fn busmrf(
4527 self,
4528 ) -> crate::common::RegisterField<
4529 11,
4530 0x1,
4531 1,
4532 0,
4533 rstsr1::Busmrf,
4534 rstsr1::Busmrf,
4535 Rstsr1_SPEC,
4536 crate::common::RW,
4537 > {
4538 crate::common::RegisterField::<
4539 11,
4540 0x1,
4541 1,
4542 0,
4543 rstsr1::Busmrf,
4544 rstsr1::Busmrf,
4545 Rstsr1_SPEC,
4546 crate::common::RW,
4547 >::from_register(self, 0)
4548 }
4549
4550 #[doc = "TrustZone Error Reset Detect Flag"]
4551 #[inline(always)]
4552 pub fn tzerf(
4553 self,
4554 ) -> crate::common::RegisterField<
4555 13,
4556 0x1,
4557 1,
4558 0,
4559 rstsr1::Tzerf,
4560 rstsr1::Tzerf,
4561 Rstsr1_SPEC,
4562 crate::common::RW,
4563 > {
4564 crate::common::RegisterField::<
4565 13,
4566 0x1,
4567 1,
4568 0,
4569 rstsr1::Tzerf,
4570 rstsr1::Tzerf,
4571 Rstsr1_SPEC,
4572 crate::common::RW,
4573 >::from_register(self, 0)
4574 }
4575}
4576impl ::core::default::Default for Rstsr1 {
4577 #[inline(always)]
4578 fn default() -> Rstsr1 {
4579 <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
4580 }
4581}
4582pub mod rstsr1 {
4583
4584 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4585 pub struct Iwdtrf_SPEC;
4586 pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
4587 impl Iwdtrf {
4588 #[doc = "Independent watchdog timer reset not detected"]
4589 pub const _0: Self = Self::new(0);
4590
4591 #[doc = "Independent watchdog timer reset detected"]
4592 pub const _1: Self = Self::new(1);
4593 }
4594 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4595 pub struct Wdtrf_SPEC;
4596 pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
4597 impl Wdtrf {
4598 #[doc = "Watchdog timer reset not detected"]
4599 pub const _0: Self = Self::new(0);
4600
4601 #[doc = "Watchdog timer reset detected"]
4602 pub const _1: Self = Self::new(1);
4603 }
4604 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4605 pub struct Swrf_SPEC;
4606 pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
4607 impl Swrf {
4608 #[doc = "Software reset not detected"]
4609 pub const _0: Self = Self::new(0);
4610
4611 #[doc = "Software reset detected"]
4612 pub const _1: Self = Self::new(1);
4613 }
4614 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4615 pub struct Rperf_SPEC;
4616 pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
4617 impl Rperf {
4618 #[doc = "SRAM parity error reset not detected"]
4619 pub const _0: Self = Self::new(0);
4620
4621 #[doc = "SRAM parity error reset detected"]
4622 pub const _1: Self = Self::new(1);
4623 }
4624 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4625 pub struct Reerf_SPEC;
4626 pub type Reerf = crate::EnumBitfieldStruct<u8, Reerf_SPEC>;
4627 impl Reerf {
4628 #[doc = "SRAM ECC error reset not detected"]
4629 pub const _0: Self = Self::new(0);
4630
4631 #[doc = "SRAM ECC error reset detected"]
4632 pub const _1: Self = Self::new(1);
4633 }
4634 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4635 pub struct Busmrf_SPEC;
4636 pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
4637 impl Busmrf {
4638 #[doc = "Bus master MPU error reset not detected"]
4639 pub const _0: Self = Self::new(0);
4640
4641 #[doc = "Bus master MPU error reset detected"]
4642 pub const _1: Self = Self::new(1);
4643 }
4644 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4645 pub struct Tzerf_SPEC;
4646 pub type Tzerf = crate::EnumBitfieldStruct<u8, Tzerf_SPEC>;
4647 impl Tzerf {
4648 #[doc = "TrustZone error reset not detected."]
4649 pub const _0: Self = Self::new(0);
4650
4651 #[doc = "TrustZone error reset detected."]
4652 pub const _1: Self = Self::new(1);
4653 }
4654}
4655#[doc(hidden)]
4656#[derive(Copy, Clone, Eq, PartialEq)]
4657pub struct Lvd1Cr1_SPEC;
4658impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
4659 type DataType = u8;
4660}
4661
4662#[doc = "Voltage Monitor 1 Circuit Control Register"]
4663pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
4664
4665impl Lvd1Cr1 {
4666 #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
4667 #[inline(always)]
4668 pub fn idtsel(
4669 self,
4670 ) -> crate::common::RegisterField<
4671 0,
4672 0x3,
4673 1,
4674 0,
4675 lvd1cr1::Idtsel,
4676 lvd1cr1::Idtsel,
4677 Lvd1Cr1_SPEC,
4678 crate::common::RW,
4679 > {
4680 crate::common::RegisterField::<
4681 0,
4682 0x3,
4683 1,
4684 0,
4685 lvd1cr1::Idtsel,
4686 lvd1cr1::Idtsel,
4687 Lvd1Cr1_SPEC,
4688 crate::common::RW,
4689 >::from_register(self, 0)
4690 }
4691
4692 #[doc = "Voltage Monitor 1 Interrupt Type Select"]
4693 #[inline(always)]
4694 pub fn irqsel(
4695 self,
4696 ) -> crate::common::RegisterField<
4697 2,
4698 0x1,
4699 1,
4700 0,
4701 lvd1cr1::Irqsel,
4702 lvd1cr1::Irqsel,
4703 Lvd1Cr1_SPEC,
4704 crate::common::RW,
4705 > {
4706 crate::common::RegisterField::<
4707 2,
4708 0x1,
4709 1,
4710 0,
4711 lvd1cr1::Irqsel,
4712 lvd1cr1::Irqsel,
4713 Lvd1Cr1_SPEC,
4714 crate::common::RW,
4715 >::from_register(self, 0)
4716 }
4717}
4718impl ::core::default::Default for Lvd1Cr1 {
4719 #[inline(always)]
4720 fn default() -> Lvd1Cr1 {
4721 <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
4722 }
4723}
4724pub mod lvd1cr1 {
4725
4726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4727 pub struct Idtsel_SPEC;
4728 pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4729 impl Idtsel {
4730 #[doc = "When VCC >= Vdet1 (rise) is detected"]
4731 pub const _00: Self = Self::new(0);
4732
4733 #[doc = "When VCC < Vdet1 (fall) is detected"]
4734 pub const _01: Self = Self::new(1);
4735
4736 #[doc = "When fall and rise are detected"]
4737 pub const _10: Self = Self::new(2);
4738
4739 #[doc = "Settings prohibited"]
4740 pub const _11: Self = Self::new(3);
4741 }
4742 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4743 pub struct Irqsel_SPEC;
4744 pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
4745 impl Irqsel {
4746 #[doc = "Non-maskable interrupt"]
4747 pub const _0: Self = Self::new(0);
4748
4749 #[doc = "Maskable interrupt"]
4750 pub const _1: Self = Self::new(1);
4751 }
4752}
4753#[doc(hidden)]
4754#[derive(Copy, Clone, Eq, PartialEq)]
4755pub struct Lvd1Sr_SPEC;
4756impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
4757 type DataType = u8;
4758}
4759
4760#[doc = "Voltage Monitor 1 Circuit Status Register"]
4761pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
4762
4763impl Lvd1Sr {
4764 #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
4765 #[inline(always)]
4766 pub fn det(
4767 self,
4768 ) -> crate::common::RegisterField<
4769 0,
4770 0x1,
4771 1,
4772 0,
4773 lvd1sr::Det,
4774 lvd1sr::Det,
4775 Lvd1Sr_SPEC,
4776 crate::common::RW,
4777 > {
4778 crate::common::RegisterField::<
4779 0,
4780 0x1,
4781 1,
4782 0,
4783 lvd1sr::Det,
4784 lvd1sr::Det,
4785 Lvd1Sr_SPEC,
4786 crate::common::RW,
4787 >::from_register(self, 0)
4788 }
4789
4790 #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
4791 #[inline(always)]
4792 pub fn mon(
4793 self,
4794 ) -> crate::common::RegisterField<
4795 1,
4796 0x1,
4797 1,
4798 0,
4799 lvd1sr::Mon,
4800 lvd1sr::Mon,
4801 Lvd1Sr_SPEC,
4802 crate::common::R,
4803 > {
4804 crate::common::RegisterField::<
4805 1,
4806 0x1,
4807 1,
4808 0,
4809 lvd1sr::Mon,
4810 lvd1sr::Mon,
4811 Lvd1Sr_SPEC,
4812 crate::common::R,
4813 >::from_register(self, 0)
4814 }
4815}
4816impl ::core::default::Default for Lvd1Sr {
4817 #[inline(always)]
4818 fn default() -> Lvd1Sr {
4819 <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
4820 }
4821}
4822pub mod lvd1sr {
4823
4824 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4825 pub struct Det_SPEC;
4826 pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
4827 impl Det {
4828 #[doc = "Not detected"]
4829 pub const _0: Self = Self::new(0);
4830
4831 #[doc = "Vdet1 crossing is detected"]
4832 pub const _1: Self = Self::new(1);
4833 }
4834 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4835 pub struct Mon_SPEC;
4836 pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
4837 impl Mon {
4838 #[doc = "VCC < Vdet1"]
4839 pub const _0: Self = Self::new(0);
4840
4841 #[doc = "VCC >= Vdet1 or MON is disabled"]
4842 pub const _1: Self = Self::new(1);
4843 }
4844}
4845#[doc(hidden)]
4846#[derive(Copy, Clone, Eq, PartialEq)]
4847pub struct Lvd2Cr1_SPEC;
4848impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
4849 type DataType = u8;
4850}
4851
4852#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
4853pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
4854
4855impl Lvd2Cr1 {
4856 #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
4857 #[inline(always)]
4858 pub fn idtsel(
4859 self,
4860 ) -> crate::common::RegisterField<
4861 0,
4862 0x3,
4863 1,
4864 0,
4865 lvd2cr1::Idtsel,
4866 lvd2cr1::Idtsel,
4867 Lvd2Cr1_SPEC,
4868 crate::common::RW,
4869 > {
4870 crate::common::RegisterField::<
4871 0,
4872 0x3,
4873 1,
4874 0,
4875 lvd2cr1::Idtsel,
4876 lvd2cr1::Idtsel,
4877 Lvd2Cr1_SPEC,
4878 crate::common::RW,
4879 >::from_register(self, 0)
4880 }
4881
4882 #[doc = "Voltage Monitor 2 Interrupt Type Select"]
4883 #[inline(always)]
4884 pub fn irqsel(
4885 self,
4886 ) -> crate::common::RegisterField<
4887 2,
4888 0x1,
4889 1,
4890 0,
4891 lvd2cr1::Irqsel,
4892 lvd2cr1::Irqsel,
4893 Lvd2Cr1_SPEC,
4894 crate::common::RW,
4895 > {
4896 crate::common::RegisterField::<
4897 2,
4898 0x1,
4899 1,
4900 0,
4901 lvd2cr1::Irqsel,
4902 lvd2cr1::Irqsel,
4903 Lvd2Cr1_SPEC,
4904 crate::common::RW,
4905 >::from_register(self, 0)
4906 }
4907}
4908impl ::core::default::Default for Lvd2Cr1 {
4909 #[inline(always)]
4910 fn default() -> Lvd2Cr1 {
4911 <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
4912 }
4913}
4914pub mod lvd2cr1 {
4915
4916 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4917 pub struct Idtsel_SPEC;
4918 pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4919 impl Idtsel {
4920 #[doc = "When VCC>= Vdet2 (rise) is detected"]
4921 pub const _00: Self = Self::new(0);
4922
4923 #[doc = "When VCC < Vdet2 (fall) is detected"]
4924 pub const _01: Self = Self::new(1);
4925
4926 #[doc = "When fall and rise are detected"]
4927 pub const _10: Self = Self::new(2);
4928
4929 #[doc = "Settings prohibited"]
4930 pub const _11: Self = Self::new(3);
4931 }
4932 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4933 pub struct Irqsel_SPEC;
4934 pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
4935 impl Irqsel {
4936 #[doc = "Non-maskable interrupt"]
4937 pub const _0: Self = Self::new(0);
4938
4939 #[doc = "Maskable interrupt"]
4940 pub const _1: Self = Self::new(1);
4941 }
4942}
4943#[doc(hidden)]
4944#[derive(Copy, Clone, Eq, PartialEq)]
4945pub struct Lvd2Sr_SPEC;
4946impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
4947 type DataType = u8;
4948}
4949
4950#[doc = "Voltage Monitor 2 Circuit Status Register"]
4951pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
4952
4953impl Lvd2Sr {
4954 #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
4955 #[inline(always)]
4956 pub fn det(
4957 self,
4958 ) -> crate::common::RegisterField<
4959 0,
4960 0x1,
4961 1,
4962 0,
4963 lvd2sr::Det,
4964 lvd2sr::Det,
4965 Lvd2Sr_SPEC,
4966 crate::common::RW,
4967 > {
4968 crate::common::RegisterField::<
4969 0,
4970 0x1,
4971 1,
4972 0,
4973 lvd2sr::Det,
4974 lvd2sr::Det,
4975 Lvd2Sr_SPEC,
4976 crate::common::RW,
4977 >::from_register(self, 0)
4978 }
4979
4980 #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
4981 #[inline(always)]
4982 pub fn mon(
4983 self,
4984 ) -> crate::common::RegisterField<
4985 1,
4986 0x1,
4987 1,
4988 0,
4989 lvd2sr::Mon,
4990 lvd2sr::Mon,
4991 Lvd2Sr_SPEC,
4992 crate::common::R,
4993 > {
4994 crate::common::RegisterField::<
4995 1,
4996 0x1,
4997 1,
4998 0,
4999 lvd2sr::Mon,
5000 lvd2sr::Mon,
5001 Lvd2Sr_SPEC,
5002 crate::common::R,
5003 >::from_register(self, 0)
5004 }
5005}
5006impl ::core::default::Default for Lvd2Sr {
5007 #[inline(always)]
5008 fn default() -> Lvd2Sr {
5009 <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
5010 }
5011}
5012pub mod lvd2sr {
5013
5014 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5015 pub struct Det_SPEC;
5016 pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
5017 impl Det {
5018 #[doc = "Not detected"]
5019 pub const _0: Self = Self::new(0);
5020
5021 #[doc = "Vdet2 crossing is detected"]
5022 pub const _1: Self = Self::new(1);
5023 }
5024 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5025 pub struct Mon_SPEC;
5026 pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
5027 impl Mon {
5028 #[doc = "VCC < Vdet2"]
5029 pub const _0: Self = Self::new(0);
5030
5031 #[doc = "VCC>= Vdet2 or MON is disabled"]
5032 pub const _1: Self = Self::new(1);
5033 }
5034}
5035#[doc(hidden)]
5036#[derive(Copy, Clone, Eq, PartialEq)]
5037pub struct Cgfsar_SPEC;
5038impl crate::sealed::RegSpec for Cgfsar_SPEC {
5039 type DataType = u32;
5040}
5041
5042#[doc = "Clock Generation Function Security Attribute Register"]
5043pub type Cgfsar = crate::RegValueT<Cgfsar_SPEC>;
5044
5045impl Cgfsar {
5046 #[doc = "Non Secure Attribute bit 00"]
5047 #[inline(always)]
5048 pub fn nonsec00(
5049 self,
5050 ) -> crate::common::RegisterField<
5051 0,
5052 0x1,
5053 1,
5054 0,
5055 cgfsar::Nonsec00,
5056 cgfsar::Nonsec00,
5057 Cgfsar_SPEC,
5058 crate::common::RW,
5059 > {
5060 crate::common::RegisterField::<
5061 0,
5062 0x1,
5063 1,
5064 0,
5065 cgfsar::Nonsec00,
5066 cgfsar::Nonsec00,
5067 Cgfsar_SPEC,
5068 crate::common::RW,
5069 >::from_register(self, 0)
5070 }
5071
5072 #[doc = "Non Secure Attribute bit 02"]
5073 #[inline(always)]
5074 pub fn nonsec02(
5075 self,
5076 ) -> crate::common::RegisterField<
5077 2,
5078 0x1,
5079 1,
5080 0,
5081 cgfsar::Nonsec02,
5082 cgfsar::Nonsec02,
5083 Cgfsar_SPEC,
5084 crate::common::RW,
5085 > {
5086 crate::common::RegisterField::<
5087 2,
5088 0x1,
5089 1,
5090 0,
5091 cgfsar::Nonsec02,
5092 cgfsar::Nonsec02,
5093 Cgfsar_SPEC,
5094 crate::common::RW,
5095 >::from_register(self, 0)
5096 }
5097
5098 #[doc = "Non Secure Attribute bit 03"]
5099 #[inline(always)]
5100 pub fn nonsec03(
5101 self,
5102 ) -> crate::common::RegisterField<
5103 3,
5104 0x1,
5105 1,
5106 0,
5107 cgfsar::Nonsec03,
5108 cgfsar::Nonsec03,
5109 Cgfsar_SPEC,
5110 crate::common::RW,
5111 > {
5112 crate::common::RegisterField::<
5113 3,
5114 0x1,
5115 1,
5116 0,
5117 cgfsar::Nonsec03,
5118 cgfsar::Nonsec03,
5119 Cgfsar_SPEC,
5120 crate::common::RW,
5121 >::from_register(self, 0)
5122 }
5123
5124 #[doc = "Non Secure Attribute bit 04"]
5125 #[inline(always)]
5126 pub fn nonsec04(
5127 self,
5128 ) -> crate::common::RegisterField<
5129 4,
5130 0x1,
5131 1,
5132 0,
5133 cgfsar::Nonsec04,
5134 cgfsar::Nonsec04,
5135 Cgfsar_SPEC,
5136 crate::common::RW,
5137 > {
5138 crate::common::RegisterField::<
5139 4,
5140 0x1,
5141 1,
5142 0,
5143 cgfsar::Nonsec04,
5144 cgfsar::Nonsec04,
5145 Cgfsar_SPEC,
5146 crate::common::RW,
5147 >::from_register(self, 0)
5148 }
5149
5150 #[doc = "Non Secure Attribute bit 05"]
5151 #[inline(always)]
5152 pub fn nonsec05(
5153 self,
5154 ) -> crate::common::RegisterField<
5155 5,
5156 0x1,
5157 1,
5158 0,
5159 cgfsar::Nonsec05,
5160 cgfsar::Nonsec05,
5161 Cgfsar_SPEC,
5162 crate::common::RW,
5163 > {
5164 crate::common::RegisterField::<
5165 5,
5166 0x1,
5167 1,
5168 0,
5169 cgfsar::Nonsec05,
5170 cgfsar::Nonsec05,
5171 Cgfsar_SPEC,
5172 crate::common::RW,
5173 >::from_register(self, 0)
5174 }
5175
5176 #[doc = "Non Secure Attribute bit 06"]
5177 #[inline(always)]
5178 pub fn nonsec06(
5179 self,
5180 ) -> crate::common::RegisterField<
5181 6,
5182 0x1,
5183 1,
5184 0,
5185 cgfsar::Nonsec06,
5186 cgfsar::Nonsec06,
5187 Cgfsar_SPEC,
5188 crate::common::RW,
5189 > {
5190 crate::common::RegisterField::<
5191 6,
5192 0x1,
5193 1,
5194 0,
5195 cgfsar::Nonsec06,
5196 cgfsar::Nonsec06,
5197 Cgfsar_SPEC,
5198 crate::common::RW,
5199 >::from_register(self, 0)
5200 }
5201
5202 #[doc = "Non Secure Attribute bit 07"]
5203 #[inline(always)]
5204 pub fn nonsec07(
5205 self,
5206 ) -> crate::common::RegisterField<
5207 7,
5208 0x1,
5209 1,
5210 0,
5211 cgfsar::Nonsec07,
5212 cgfsar::Nonsec07,
5213 Cgfsar_SPEC,
5214 crate::common::RW,
5215 > {
5216 crate::common::RegisterField::<
5217 7,
5218 0x1,
5219 1,
5220 0,
5221 cgfsar::Nonsec07,
5222 cgfsar::Nonsec07,
5223 Cgfsar_SPEC,
5224 crate::common::RW,
5225 >::from_register(self, 0)
5226 }
5227
5228 #[doc = "Non Secure Attribute bit 08"]
5229 #[inline(always)]
5230 pub fn nonsec08(
5231 self,
5232 ) -> crate::common::RegisterField<
5233 8,
5234 0x1,
5235 1,
5236 0,
5237 cgfsar::Nonsec08,
5238 cgfsar::Nonsec08,
5239 Cgfsar_SPEC,
5240 crate::common::RW,
5241 > {
5242 crate::common::RegisterField::<
5243 8,
5244 0x1,
5245 1,
5246 0,
5247 cgfsar::Nonsec08,
5248 cgfsar::Nonsec08,
5249 Cgfsar_SPEC,
5250 crate::common::RW,
5251 >::from_register(self, 0)
5252 }
5253
5254 #[doc = "Non Secure Attribute bit 09"]
5255 #[inline(always)]
5256 pub fn nonsec09(
5257 self,
5258 ) -> crate::common::RegisterField<
5259 9,
5260 0x1,
5261 1,
5262 0,
5263 cgfsar::Nonsec09,
5264 cgfsar::Nonsec09,
5265 Cgfsar_SPEC,
5266 crate::common::RW,
5267 > {
5268 crate::common::RegisterField::<
5269 9,
5270 0x1,
5271 1,
5272 0,
5273 cgfsar::Nonsec09,
5274 cgfsar::Nonsec09,
5275 Cgfsar_SPEC,
5276 crate::common::RW,
5277 >::from_register(self, 0)
5278 }
5279
5280 #[doc = "Non Secure Attribute bit 11"]
5281 #[inline(always)]
5282 pub fn nonsec11(
5283 self,
5284 ) -> crate::common::RegisterField<
5285 11,
5286 0x1,
5287 1,
5288 0,
5289 cgfsar::Nonsec11,
5290 cgfsar::Nonsec11,
5291 Cgfsar_SPEC,
5292 crate::common::RW,
5293 > {
5294 crate::common::RegisterField::<
5295 11,
5296 0x1,
5297 1,
5298 0,
5299 cgfsar::Nonsec11,
5300 cgfsar::Nonsec11,
5301 Cgfsar_SPEC,
5302 crate::common::RW,
5303 >::from_register(self, 0)
5304 }
5305
5306 #[doc = "Non Secure Attribute bit 16"]
5307 #[inline(always)]
5308 pub fn nonsec16(
5309 self,
5310 ) -> crate::common::RegisterField<
5311 16,
5312 0x1,
5313 1,
5314 0,
5315 cgfsar::Nonsec16,
5316 cgfsar::Nonsec16,
5317 Cgfsar_SPEC,
5318 crate::common::RW,
5319 > {
5320 crate::common::RegisterField::<
5321 16,
5322 0x1,
5323 1,
5324 0,
5325 cgfsar::Nonsec16,
5326 cgfsar::Nonsec16,
5327 Cgfsar_SPEC,
5328 crate::common::RW,
5329 >::from_register(self, 0)
5330 }
5331}
5332impl ::core::default::Default for Cgfsar {
5333 #[inline(always)]
5334 fn default() -> Cgfsar {
5335 <crate::RegValueT<Cgfsar_SPEC> as RegisterValue<_>>::new(4294967295)
5336 }
5337}
5338pub mod cgfsar {
5339
5340 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5341 pub struct Nonsec00_SPEC;
5342 pub type Nonsec00 = crate::EnumBitfieldStruct<u8, Nonsec00_SPEC>;
5343 impl Nonsec00 {
5344 #[doc = "Secure"]
5345 pub const _0: Self = Self::new(0);
5346
5347 #[doc = "Non Secure"]
5348 pub const _1: Self = Self::new(1);
5349 }
5350 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5351 pub struct Nonsec02_SPEC;
5352 pub type Nonsec02 = crate::EnumBitfieldStruct<u8, Nonsec02_SPEC>;
5353 impl Nonsec02 {
5354 #[doc = "Secure"]
5355 pub const _0: Self = Self::new(0);
5356
5357 #[doc = "Non Secure"]
5358 pub const _1: Self = Self::new(1);
5359 }
5360 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5361 pub struct Nonsec03_SPEC;
5362 pub type Nonsec03 = crate::EnumBitfieldStruct<u8, Nonsec03_SPEC>;
5363 impl Nonsec03 {
5364 #[doc = "Secure"]
5365 pub const _0: Self = Self::new(0);
5366
5367 #[doc = "Non Secure"]
5368 pub const _1: Self = Self::new(1);
5369 }
5370 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5371 pub struct Nonsec04_SPEC;
5372 pub type Nonsec04 = crate::EnumBitfieldStruct<u8, Nonsec04_SPEC>;
5373 impl Nonsec04 {
5374 #[doc = "Secure"]
5375 pub const _0: Self = Self::new(0);
5376
5377 #[doc = "Non Secure"]
5378 pub const _1: Self = Self::new(1);
5379 }
5380 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5381 pub struct Nonsec05_SPEC;
5382 pub type Nonsec05 = crate::EnumBitfieldStruct<u8, Nonsec05_SPEC>;
5383 impl Nonsec05 {
5384 #[doc = "Secure"]
5385 pub const _0: Self = Self::new(0);
5386
5387 #[doc = "Non Secure"]
5388 pub const _1: Self = Self::new(1);
5389 }
5390 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5391 pub struct Nonsec06_SPEC;
5392 pub type Nonsec06 = crate::EnumBitfieldStruct<u8, Nonsec06_SPEC>;
5393 impl Nonsec06 {
5394 #[doc = "Secure"]
5395 pub const _0: Self = Self::new(0);
5396
5397 #[doc = "Non Secure"]
5398 pub const _1: Self = Self::new(1);
5399 }
5400 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5401 pub struct Nonsec07_SPEC;
5402 pub type Nonsec07 = crate::EnumBitfieldStruct<u8, Nonsec07_SPEC>;
5403 impl Nonsec07 {
5404 #[doc = "Secure"]
5405 pub const _0: Self = Self::new(0);
5406
5407 #[doc = "Non Secure"]
5408 pub const _1: Self = Self::new(1);
5409 }
5410 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5411 pub struct Nonsec08_SPEC;
5412 pub type Nonsec08 = crate::EnumBitfieldStruct<u8, Nonsec08_SPEC>;
5413 impl Nonsec08 {
5414 #[doc = "Secure"]
5415 pub const _0: Self = Self::new(0);
5416
5417 #[doc = "Non Secure"]
5418 pub const _1: Self = Self::new(1);
5419 }
5420 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5421 pub struct Nonsec09_SPEC;
5422 pub type Nonsec09 = crate::EnumBitfieldStruct<u8, Nonsec09_SPEC>;
5423 impl Nonsec09 {
5424 #[doc = "Secure"]
5425 pub const _0: Self = Self::new(0);
5426
5427 #[doc = "Non Secure"]
5428 pub const _1: Self = Self::new(1);
5429 }
5430 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5431 pub struct Nonsec11_SPEC;
5432 pub type Nonsec11 = crate::EnumBitfieldStruct<u8, Nonsec11_SPEC>;
5433 impl Nonsec11 {
5434 #[doc = "Secure"]
5435 pub const _0: Self = Self::new(0);
5436
5437 #[doc = "Non Secure"]
5438 pub const _1: Self = Self::new(1);
5439 }
5440 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5441 pub struct Nonsec16_SPEC;
5442 pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
5443 impl Nonsec16 {
5444 #[doc = "Secure"]
5445 pub const _0: Self = Self::new(0);
5446
5447 #[doc = "Non Secure"]
5448 pub const _1: Self = Self::new(1);
5449 }
5450}
5451#[doc(hidden)]
5452#[derive(Copy, Clone, Eq, PartialEq)]
5453pub struct Rstsar_SPEC;
5454impl crate::sealed::RegSpec for Rstsar_SPEC {
5455 type DataType = u32;
5456}
5457
5458#[doc = "Reset Security Attribution Register"]
5459pub type Rstsar = crate::RegValueT<Rstsar_SPEC>;
5460
5461impl Rstsar {
5462 #[doc = "Non Secure Attribute bit 0"]
5463 #[inline(always)]
5464 pub fn nonsec0(
5465 self,
5466 ) -> crate::common::RegisterField<
5467 0,
5468 0x1,
5469 1,
5470 0,
5471 rstsar::Nonsec0,
5472 rstsar::Nonsec0,
5473 Rstsar_SPEC,
5474 crate::common::RW,
5475 > {
5476 crate::common::RegisterField::<
5477 0,
5478 0x1,
5479 1,
5480 0,
5481 rstsar::Nonsec0,
5482 rstsar::Nonsec0,
5483 Rstsar_SPEC,
5484 crate::common::RW,
5485 >::from_register(self, 0)
5486 }
5487
5488 #[doc = "Non Secure Attribute bit 1"]
5489 #[inline(always)]
5490 pub fn nonsec1(
5491 self,
5492 ) -> crate::common::RegisterField<
5493 1,
5494 0x1,
5495 1,
5496 0,
5497 rstsar::Nonsec1,
5498 rstsar::Nonsec1,
5499 Rstsar_SPEC,
5500 crate::common::RW,
5501 > {
5502 crate::common::RegisterField::<
5503 1,
5504 0x1,
5505 1,
5506 0,
5507 rstsar::Nonsec1,
5508 rstsar::Nonsec1,
5509 Rstsar_SPEC,
5510 crate::common::RW,
5511 >::from_register(self, 0)
5512 }
5513
5514 #[doc = "Non Secure Attribute bit 2"]
5515 #[inline(always)]
5516 pub fn nonsec2(
5517 self,
5518 ) -> crate::common::RegisterField<
5519 2,
5520 0x1,
5521 1,
5522 0,
5523 rstsar::Nonsec2,
5524 rstsar::Nonsec2,
5525 Rstsar_SPEC,
5526 crate::common::RW,
5527 > {
5528 crate::common::RegisterField::<
5529 2,
5530 0x1,
5531 1,
5532 0,
5533 rstsar::Nonsec2,
5534 rstsar::Nonsec2,
5535 Rstsar_SPEC,
5536 crate::common::RW,
5537 >::from_register(self, 0)
5538 }
5539}
5540impl ::core::default::Default for Rstsar {
5541 #[inline(always)]
5542 fn default() -> Rstsar {
5543 <crate::RegValueT<Rstsar_SPEC> as RegisterValue<_>>::new(4294967295)
5544 }
5545}
5546pub mod rstsar {
5547
5548 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5549 pub struct Nonsec0_SPEC;
5550 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5551 impl Nonsec0 {
5552 #[doc = "Secure"]
5553 pub const _0: Self = Self::new(0);
5554
5555 #[doc = "Non Secure"]
5556 pub const _1: Self = Self::new(1);
5557 }
5558 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5559 pub struct Nonsec1_SPEC;
5560 pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5561 impl Nonsec1 {
5562 #[doc = "Secure"]
5563 pub const _0: Self = Self::new(0);
5564
5565 #[doc = "Non Secure"]
5566 pub const _1: Self = Self::new(1);
5567 }
5568 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5569 pub struct Nonsec2_SPEC;
5570 pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5571 impl Nonsec2 {
5572 #[doc = "Secure"]
5573 pub const _0: Self = Self::new(0);
5574
5575 #[doc = "Non Secure"]
5576 pub const _1: Self = Self::new(1);
5577 }
5578}
5579#[doc(hidden)]
5580#[derive(Copy, Clone, Eq, PartialEq)]
5581pub struct Lpmsar_SPEC;
5582impl crate::sealed::RegSpec for Lpmsar_SPEC {
5583 type DataType = u32;
5584}
5585
5586#[doc = "Low Power Mode Security Attribution Register"]
5587pub type Lpmsar = crate::RegValueT<Lpmsar_SPEC>;
5588
5589impl Lpmsar {
5590 #[doc = "Non Secure Attribute bit 0"]
5591 #[inline(always)]
5592 pub fn nonsec0(
5593 self,
5594 ) -> crate::common::RegisterField<
5595 0,
5596 0x1,
5597 1,
5598 0,
5599 lpmsar::Nonsec0,
5600 lpmsar::Nonsec0,
5601 Lpmsar_SPEC,
5602 crate::common::RW,
5603 > {
5604 crate::common::RegisterField::<
5605 0,
5606 0x1,
5607 1,
5608 0,
5609 lpmsar::Nonsec0,
5610 lpmsar::Nonsec0,
5611 Lpmsar_SPEC,
5612 crate::common::RW,
5613 >::from_register(self, 0)
5614 }
5615
5616 #[doc = "Non Secure Attribute bit 2"]
5617 #[inline(always)]
5618 pub fn nonsec2(
5619 self,
5620 ) -> crate::common::RegisterField<
5621 2,
5622 0x1,
5623 1,
5624 0,
5625 lpmsar::Nonsec2,
5626 lpmsar::Nonsec2,
5627 Lpmsar_SPEC,
5628 crate::common::RW,
5629 > {
5630 crate::common::RegisterField::<
5631 2,
5632 0x1,
5633 1,
5634 0,
5635 lpmsar::Nonsec2,
5636 lpmsar::Nonsec2,
5637 Lpmsar_SPEC,
5638 crate::common::RW,
5639 >::from_register(self, 0)
5640 }
5641
5642 #[doc = "Non Secure Attribute bit 4"]
5643 #[inline(always)]
5644 pub fn nonsec4(
5645 self,
5646 ) -> crate::common::RegisterField<
5647 4,
5648 0x1,
5649 1,
5650 0,
5651 lpmsar::Nonsec4,
5652 lpmsar::Nonsec4,
5653 Lpmsar_SPEC,
5654 crate::common::RW,
5655 > {
5656 crate::common::RegisterField::<
5657 4,
5658 0x1,
5659 1,
5660 0,
5661 lpmsar::Nonsec4,
5662 lpmsar::Nonsec4,
5663 Lpmsar_SPEC,
5664 crate::common::RW,
5665 >::from_register(self, 0)
5666 }
5667
5668 #[doc = "Non Secure Attribute bit 8"]
5669 #[inline(always)]
5670 pub fn nonsec8(
5671 self,
5672 ) -> crate::common::RegisterField<
5673 8,
5674 0x1,
5675 1,
5676 0,
5677 lpmsar::Nonsec8,
5678 lpmsar::Nonsec8,
5679 Lpmsar_SPEC,
5680 crate::common::RW,
5681 > {
5682 crate::common::RegisterField::<
5683 8,
5684 0x1,
5685 1,
5686 0,
5687 lpmsar::Nonsec8,
5688 lpmsar::Nonsec8,
5689 Lpmsar_SPEC,
5690 crate::common::RW,
5691 >::from_register(self, 0)
5692 }
5693
5694 #[doc = "Non Secure Attribute bit 9"]
5695 #[inline(always)]
5696 pub fn nonsec9(
5697 self,
5698 ) -> crate::common::RegisterField<
5699 9,
5700 0x1,
5701 1,
5702 0,
5703 lpmsar::Nonsec9,
5704 lpmsar::Nonsec9,
5705 Lpmsar_SPEC,
5706 crate::common::RW,
5707 > {
5708 crate::common::RegisterField::<
5709 9,
5710 0x1,
5711 1,
5712 0,
5713 lpmsar::Nonsec9,
5714 lpmsar::Nonsec9,
5715 Lpmsar_SPEC,
5716 crate::common::RW,
5717 >::from_register(self, 0)
5718 }
5719
5720 #[doc = "Non Secure Attribute bit 13"]
5721 #[inline(always)]
5722 pub fn nonsec13(
5723 self,
5724 ) -> crate::common::RegisterField<
5725 13,
5726 0x1,
5727 1,
5728 0,
5729 lpmsar::Nonsec13,
5730 lpmsar::Nonsec13,
5731 Lpmsar_SPEC,
5732 crate::common::RW,
5733 > {
5734 crate::common::RegisterField::<
5735 13,
5736 0x1,
5737 1,
5738 0,
5739 lpmsar::Nonsec13,
5740 lpmsar::Nonsec13,
5741 Lpmsar_SPEC,
5742 crate::common::RW,
5743 >::from_register(self, 0)
5744 }
5745}
5746impl ::core::default::Default for Lpmsar {
5747 #[inline(always)]
5748 fn default() -> Lpmsar {
5749 <crate::RegValueT<Lpmsar_SPEC> as RegisterValue<_>>::new(4294967295)
5750 }
5751}
5752pub mod lpmsar {
5753
5754 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5755 pub struct Nonsec0_SPEC;
5756 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5757 impl Nonsec0 {
5758 #[doc = "Secure"]
5759 pub const _0: Self = Self::new(0);
5760
5761 #[doc = "Non Secure"]
5762 pub const _1: Self = Self::new(1);
5763 }
5764 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5765 pub struct Nonsec2_SPEC;
5766 pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5767 impl Nonsec2 {
5768 #[doc = "Secure"]
5769 pub const _0: Self = Self::new(0);
5770
5771 #[doc = "Non Secure"]
5772 pub const _1: Self = Self::new(1);
5773 }
5774 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5775 pub struct Nonsec4_SPEC;
5776 pub type Nonsec4 = crate::EnumBitfieldStruct<u8, Nonsec4_SPEC>;
5777 impl Nonsec4 {
5778 #[doc = "Secure"]
5779 pub const _0: Self = Self::new(0);
5780
5781 #[doc = "Non Secure"]
5782 pub const _1: Self = Self::new(1);
5783 }
5784 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5785 pub struct Nonsec8_SPEC;
5786 pub type Nonsec8 = crate::EnumBitfieldStruct<u8, Nonsec8_SPEC>;
5787 impl Nonsec8 {
5788 #[doc = "Secure"]
5789 pub const _0: Self = Self::new(0);
5790
5791 #[doc = "Non Secure"]
5792 pub const _1: Self = Self::new(1);
5793 }
5794 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5795 pub struct Nonsec9_SPEC;
5796 pub type Nonsec9 = crate::EnumBitfieldStruct<u8, Nonsec9_SPEC>;
5797 impl Nonsec9 {
5798 #[doc = "Secure"]
5799 pub const _0: Self = Self::new(0);
5800
5801 #[doc = "Non Secure"]
5802 pub const _1: Self = Self::new(1);
5803 }
5804 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5805 pub struct Nonsec13_SPEC;
5806 pub type Nonsec13 = crate::EnumBitfieldStruct<u8, Nonsec13_SPEC>;
5807 impl Nonsec13 {
5808 #[doc = "Secure"]
5809 pub const _0: Self = Self::new(0);
5810
5811 #[doc = "Non Secure"]
5812 pub const _1: Self = Self::new(1);
5813 }
5814}
5815#[doc(hidden)]
5816#[derive(Copy, Clone, Eq, PartialEq)]
5817pub struct Lvdsar_SPEC;
5818impl crate::sealed::RegSpec for Lvdsar_SPEC {
5819 type DataType = u32;
5820}
5821
5822#[doc = "Low Voltage Detection Security Attribution Register"]
5823pub type Lvdsar = crate::RegValueT<Lvdsar_SPEC>;
5824
5825impl Lvdsar {
5826 #[doc = "Non Secure Attribute bit 0"]
5827 #[inline(always)]
5828 pub fn nonsec0(
5829 self,
5830 ) -> crate::common::RegisterField<
5831 0,
5832 0x1,
5833 1,
5834 0,
5835 lvdsar::Nonsec0,
5836 lvdsar::Nonsec0,
5837 Lvdsar_SPEC,
5838 crate::common::RW,
5839 > {
5840 crate::common::RegisterField::<
5841 0,
5842 0x1,
5843 1,
5844 0,
5845 lvdsar::Nonsec0,
5846 lvdsar::Nonsec0,
5847 Lvdsar_SPEC,
5848 crate::common::RW,
5849 >::from_register(self, 0)
5850 }
5851
5852 #[doc = "Non Secure Attribute bit 1"]
5853 #[inline(always)]
5854 pub fn nonsec1(
5855 self,
5856 ) -> crate::common::RegisterField<
5857 1,
5858 0x1,
5859 1,
5860 0,
5861 lvdsar::Nonsec1,
5862 lvdsar::Nonsec1,
5863 Lvdsar_SPEC,
5864 crate::common::RW,
5865 > {
5866 crate::common::RegisterField::<
5867 1,
5868 0x1,
5869 1,
5870 0,
5871 lvdsar::Nonsec1,
5872 lvdsar::Nonsec1,
5873 Lvdsar_SPEC,
5874 crate::common::RW,
5875 >::from_register(self, 0)
5876 }
5877}
5878impl ::core::default::Default for Lvdsar {
5879 #[inline(always)]
5880 fn default() -> Lvdsar {
5881 <crate::RegValueT<Lvdsar_SPEC> as RegisterValue<_>>::new(4294967295)
5882 }
5883}
5884pub mod lvdsar {
5885
5886 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5887 pub struct Nonsec0_SPEC;
5888 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5889 impl Nonsec0 {
5890 #[doc = "Secure"]
5891 pub const _0: Self = Self::new(0);
5892
5893 #[doc = "Non Secure"]
5894 pub const _1: Self = Self::new(1);
5895 }
5896 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5897 pub struct Nonsec1_SPEC;
5898 pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5899 impl Nonsec1 {
5900 #[doc = "Secure"]
5901 pub const _0: Self = Self::new(0);
5902
5903 #[doc = "Non Secure"]
5904 pub const _1: Self = Self::new(1);
5905 }
5906}
5907#[doc(hidden)]
5908#[derive(Copy, Clone, Eq, PartialEq)]
5909pub struct Bbfsar_SPEC;
5910impl crate::sealed::RegSpec for Bbfsar_SPEC {
5911 type DataType = u32;
5912}
5913
5914#[doc = "Battery Backup Function Security Attribute Register"]
5915pub type Bbfsar = crate::RegValueT<Bbfsar_SPEC>;
5916
5917impl Bbfsar {
5918 #[doc = "Non Secure Attribute bit 0"]
5919 #[inline(always)]
5920 pub fn nonsec0(
5921 self,
5922 ) -> crate::common::RegisterField<
5923 0,
5924 0x1,
5925 1,
5926 0,
5927 bbfsar::Nonsec0,
5928 bbfsar::Nonsec0,
5929 Bbfsar_SPEC,
5930 crate::common::RW,
5931 > {
5932 crate::common::RegisterField::<
5933 0,
5934 0x1,
5935 1,
5936 0,
5937 bbfsar::Nonsec0,
5938 bbfsar::Nonsec0,
5939 Bbfsar_SPEC,
5940 crate::common::RW,
5941 >::from_register(self, 0)
5942 }
5943
5944 #[doc = "Non Secure Attribute bit 1"]
5945 #[inline(always)]
5946 pub fn nonsec1(
5947 self,
5948 ) -> crate::common::RegisterField<
5949 1,
5950 0x1,
5951 1,
5952 0,
5953 bbfsar::Nonsec1,
5954 bbfsar::Nonsec1,
5955 Bbfsar_SPEC,
5956 crate::common::RW,
5957 > {
5958 crate::common::RegisterField::<
5959 1,
5960 0x1,
5961 1,
5962 0,
5963 bbfsar::Nonsec1,
5964 bbfsar::Nonsec1,
5965 Bbfsar_SPEC,
5966 crate::common::RW,
5967 >::from_register(self, 0)
5968 }
5969
5970 #[doc = "Non Secure Attribute bit 2"]
5971 #[inline(always)]
5972 pub fn nonsec2(
5973 self,
5974 ) -> crate::common::RegisterField<
5975 2,
5976 0x1,
5977 1,
5978 0,
5979 bbfsar::Nonsec2,
5980 bbfsar::Nonsec2,
5981 Bbfsar_SPEC,
5982 crate::common::RW,
5983 > {
5984 crate::common::RegisterField::<
5985 2,
5986 0x1,
5987 1,
5988 0,
5989 bbfsar::Nonsec2,
5990 bbfsar::Nonsec2,
5991 Bbfsar_SPEC,
5992 crate::common::RW,
5993 >::from_register(self, 0)
5994 }
5995
5996 #[doc = "Non Secure Attribute bit 16"]
5997 #[inline(always)]
5998 pub fn nonsec16(
5999 self,
6000 ) -> crate::common::RegisterField<
6001 16,
6002 0x1,
6003 1,
6004 0,
6005 bbfsar::Nonsec16,
6006 bbfsar::Nonsec16,
6007 Bbfsar_SPEC,
6008 crate::common::RW,
6009 > {
6010 crate::common::RegisterField::<
6011 16,
6012 0x1,
6013 1,
6014 0,
6015 bbfsar::Nonsec16,
6016 bbfsar::Nonsec16,
6017 Bbfsar_SPEC,
6018 crate::common::RW,
6019 >::from_register(self, 0)
6020 }
6021
6022 #[doc = "Non Secure Attribute bit 17"]
6023 #[inline(always)]
6024 pub fn nonsec17(
6025 self,
6026 ) -> crate::common::RegisterField<
6027 17,
6028 0x1,
6029 1,
6030 0,
6031 bbfsar::Nonsec17,
6032 bbfsar::Nonsec17,
6033 Bbfsar_SPEC,
6034 crate::common::RW,
6035 > {
6036 crate::common::RegisterField::<
6037 17,
6038 0x1,
6039 1,
6040 0,
6041 bbfsar::Nonsec17,
6042 bbfsar::Nonsec17,
6043 Bbfsar_SPEC,
6044 crate::common::RW,
6045 >::from_register(self, 0)
6046 }
6047
6048 #[doc = "Non Secure Attribute bit 18"]
6049 #[inline(always)]
6050 pub fn nonsec18(
6051 self,
6052 ) -> crate::common::RegisterField<
6053 18,
6054 0x1,
6055 1,
6056 0,
6057 bbfsar::Nonsec18,
6058 bbfsar::Nonsec18,
6059 Bbfsar_SPEC,
6060 crate::common::RW,
6061 > {
6062 crate::common::RegisterField::<
6063 18,
6064 0x1,
6065 1,
6066 0,
6067 bbfsar::Nonsec18,
6068 bbfsar::Nonsec18,
6069 Bbfsar_SPEC,
6070 crate::common::RW,
6071 >::from_register(self, 0)
6072 }
6073
6074 #[doc = "Non Secure Attribute bit 19"]
6075 #[inline(always)]
6076 pub fn nonsec19(
6077 self,
6078 ) -> crate::common::RegisterField<
6079 19,
6080 0x1,
6081 1,
6082 0,
6083 bbfsar::Nonsec19,
6084 bbfsar::Nonsec19,
6085 Bbfsar_SPEC,
6086 crate::common::RW,
6087 > {
6088 crate::common::RegisterField::<
6089 19,
6090 0x1,
6091 1,
6092 0,
6093 bbfsar::Nonsec19,
6094 bbfsar::Nonsec19,
6095 Bbfsar_SPEC,
6096 crate::common::RW,
6097 >::from_register(self, 0)
6098 }
6099
6100 #[doc = "Non Secure Attribute bit 20"]
6101 #[inline(always)]
6102 pub fn nonsec20(
6103 self,
6104 ) -> crate::common::RegisterField<
6105 20,
6106 0x1,
6107 1,
6108 0,
6109 bbfsar::Nonsec20,
6110 bbfsar::Nonsec20,
6111 Bbfsar_SPEC,
6112 crate::common::RW,
6113 > {
6114 crate::common::RegisterField::<
6115 20,
6116 0x1,
6117 1,
6118 0,
6119 bbfsar::Nonsec20,
6120 bbfsar::Nonsec20,
6121 Bbfsar_SPEC,
6122 crate::common::RW,
6123 >::from_register(self, 0)
6124 }
6125
6126 #[doc = "Non Secure Attribute bit 21"]
6127 #[inline(always)]
6128 pub fn nonsec21(
6129 self,
6130 ) -> crate::common::RegisterField<
6131 21,
6132 0x1,
6133 1,
6134 0,
6135 bbfsar::Nonsec21,
6136 bbfsar::Nonsec21,
6137 Bbfsar_SPEC,
6138 crate::common::RW,
6139 > {
6140 crate::common::RegisterField::<
6141 21,
6142 0x1,
6143 1,
6144 0,
6145 bbfsar::Nonsec21,
6146 bbfsar::Nonsec21,
6147 Bbfsar_SPEC,
6148 crate::common::RW,
6149 >::from_register(self, 0)
6150 }
6151
6152 #[doc = "Non Secure Attribute bit 22"]
6153 #[inline(always)]
6154 pub fn nonsec22(
6155 self,
6156 ) -> crate::common::RegisterField<
6157 22,
6158 0x1,
6159 1,
6160 0,
6161 bbfsar::Nonsec22,
6162 bbfsar::Nonsec22,
6163 Bbfsar_SPEC,
6164 crate::common::RW,
6165 > {
6166 crate::common::RegisterField::<
6167 22,
6168 0x1,
6169 1,
6170 0,
6171 bbfsar::Nonsec22,
6172 bbfsar::Nonsec22,
6173 Bbfsar_SPEC,
6174 crate::common::RW,
6175 >::from_register(self, 0)
6176 }
6177
6178 #[doc = "Non Secure Attribute bit 23"]
6179 #[inline(always)]
6180 pub fn nonsec23(
6181 self,
6182 ) -> crate::common::RegisterField<
6183 23,
6184 0x1,
6185 1,
6186 0,
6187 bbfsar::Nonsec23,
6188 bbfsar::Nonsec23,
6189 Bbfsar_SPEC,
6190 crate::common::RW,
6191 > {
6192 crate::common::RegisterField::<
6193 23,
6194 0x1,
6195 1,
6196 0,
6197 bbfsar::Nonsec23,
6198 bbfsar::Nonsec23,
6199 Bbfsar_SPEC,
6200 crate::common::RW,
6201 >::from_register(self, 0)
6202 }
6203}
6204impl ::core::default::Default for Bbfsar {
6205 #[inline(always)]
6206 fn default() -> Bbfsar {
6207 <crate::RegValueT<Bbfsar_SPEC> as RegisterValue<_>>::new(65535)
6208 }
6209}
6210pub mod bbfsar {
6211
6212 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6213 pub struct Nonsec0_SPEC;
6214 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
6215 impl Nonsec0 {
6216 #[doc = "Secure"]
6217 pub const _0: Self = Self::new(0);
6218
6219 #[doc = "Non Secure"]
6220 pub const _1: Self = Self::new(1);
6221 }
6222 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6223 pub struct Nonsec1_SPEC;
6224 pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
6225 impl Nonsec1 {
6226 #[doc = "Secure"]
6227 pub const _0: Self = Self::new(0);
6228
6229 #[doc = "Non Secure"]
6230 pub const _1: Self = Self::new(1);
6231 }
6232 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6233 pub struct Nonsec2_SPEC;
6234 pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
6235 impl Nonsec2 {
6236 #[doc = "Secure"]
6237 pub const _0: Self = Self::new(0);
6238
6239 #[doc = "Non Secure"]
6240 pub const _1: Self = Self::new(1);
6241 }
6242 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6243 pub struct Nonsec16_SPEC;
6244 pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
6245 impl Nonsec16 {
6246 #[doc = "Secure"]
6247 pub const _0: Self = Self::new(0);
6248
6249 #[doc = "Non Secure"]
6250 pub const _1: Self = Self::new(1);
6251 }
6252 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6253 pub struct Nonsec17_SPEC;
6254 pub type Nonsec17 = crate::EnumBitfieldStruct<u8, Nonsec17_SPEC>;
6255 impl Nonsec17 {
6256 #[doc = "Secure"]
6257 pub const _0: Self = Self::new(0);
6258
6259 #[doc = "Non Secure"]
6260 pub const _1: Self = Self::new(1);
6261 }
6262 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6263 pub struct Nonsec18_SPEC;
6264 pub type Nonsec18 = crate::EnumBitfieldStruct<u8, Nonsec18_SPEC>;
6265 impl Nonsec18 {
6266 #[doc = "Secure"]
6267 pub const _0: Self = Self::new(0);
6268
6269 #[doc = "Non Secure"]
6270 pub const _1: Self = Self::new(1);
6271 }
6272 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6273 pub struct Nonsec19_SPEC;
6274 pub type Nonsec19 = crate::EnumBitfieldStruct<u8, Nonsec19_SPEC>;
6275 impl Nonsec19 {
6276 #[doc = "Secure"]
6277 pub const _0: Self = Self::new(0);
6278
6279 #[doc = "Non Secure"]
6280 pub const _1: Self = Self::new(1);
6281 }
6282 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6283 pub struct Nonsec20_SPEC;
6284 pub type Nonsec20 = crate::EnumBitfieldStruct<u8, Nonsec20_SPEC>;
6285 impl Nonsec20 {
6286 #[doc = "Secure"]
6287 pub const _0: Self = Self::new(0);
6288
6289 #[doc = "Non Secure"]
6290 pub const _1: Self = Self::new(1);
6291 }
6292 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6293 pub struct Nonsec21_SPEC;
6294 pub type Nonsec21 = crate::EnumBitfieldStruct<u8, Nonsec21_SPEC>;
6295 impl Nonsec21 {
6296 #[doc = "Secure"]
6297 pub const _0: Self = Self::new(0);
6298
6299 #[doc = "Non Secure"]
6300 pub const _1: Self = Self::new(1);
6301 }
6302 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6303 pub struct Nonsec22_SPEC;
6304 pub type Nonsec22 = crate::EnumBitfieldStruct<u8, Nonsec22_SPEC>;
6305 impl Nonsec22 {
6306 #[doc = "Secure"]
6307 pub const _0: Self = Self::new(0);
6308
6309 #[doc = "Non Secure"]
6310 pub const _1: Self = Self::new(1);
6311 }
6312 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6313 pub struct Nonsec23_SPEC;
6314 pub type Nonsec23 = crate::EnumBitfieldStruct<u8, Nonsec23_SPEC>;
6315 impl Nonsec23 {
6316 #[doc = "Secure"]
6317 pub const _0: Self = Self::new(0);
6318
6319 #[doc = "Non Secure"]
6320 pub const _1: Self = Self::new(1);
6321 }
6322}
6323#[doc(hidden)]
6324#[derive(Copy, Clone, Eq, PartialEq)]
6325pub struct Dpfsar_SPEC;
6326impl crate::sealed::RegSpec for Dpfsar_SPEC {
6327 type DataType = u32;
6328}
6329
6330#[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
6331pub type Dpfsar = crate::RegValueT<Dpfsar_SPEC>;
6332
6333impl Dpfsar {
6334 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 0"]
6335 #[inline(always)]
6336 pub fn dpfsa00(
6337 self,
6338 ) -> crate::common::RegisterField<
6339 0,
6340 0x1,
6341 1,
6342 0,
6343 dpfsar::Dpfsa00,
6344 dpfsar::Dpfsa00,
6345 Dpfsar_SPEC,
6346 crate::common::RW,
6347 > {
6348 crate::common::RegisterField::<
6349 0,
6350 0x1,
6351 1,
6352 0,
6353 dpfsar::Dpfsa00,
6354 dpfsar::Dpfsa00,
6355 Dpfsar_SPEC,
6356 crate::common::RW,
6357 >::from_register(self, 0)
6358 }
6359
6360 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 1"]
6361 #[inline(always)]
6362 pub fn dpfsa01(
6363 self,
6364 ) -> crate::common::RegisterField<
6365 1,
6366 0x1,
6367 1,
6368 0,
6369 dpfsar::Dpfsa01,
6370 dpfsar::Dpfsa01,
6371 Dpfsar_SPEC,
6372 crate::common::RW,
6373 > {
6374 crate::common::RegisterField::<
6375 1,
6376 0x1,
6377 1,
6378 0,
6379 dpfsar::Dpfsa01,
6380 dpfsar::Dpfsa01,
6381 Dpfsar_SPEC,
6382 crate::common::RW,
6383 >::from_register(self, 0)
6384 }
6385
6386 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6387 #[inline(always)]
6388 pub fn dpfsa04(
6389 self,
6390 ) -> crate::common::RegisterField<
6391 4,
6392 0x1,
6393 1,
6394 0,
6395 dpfsar::Dpfsa04,
6396 dpfsar::Dpfsa04,
6397 Dpfsar_SPEC,
6398 crate::common::RW,
6399 > {
6400 crate::common::RegisterField::<
6401 4,
6402 0x1,
6403 1,
6404 0,
6405 dpfsar::Dpfsa04,
6406 dpfsar::Dpfsa04,
6407 Dpfsar_SPEC,
6408 crate::common::RW,
6409 >::from_register(self, 0)
6410 }
6411
6412 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6413 #[inline(always)]
6414 pub fn dpfsa05(
6415 self,
6416 ) -> crate::common::RegisterField<
6417 5,
6418 0x1,
6419 1,
6420 0,
6421 dpfsar::Dpfsa05,
6422 dpfsar::Dpfsa05,
6423 Dpfsar_SPEC,
6424 crate::common::RW,
6425 > {
6426 crate::common::RegisterField::<
6427 5,
6428 0x1,
6429 1,
6430 0,
6431 dpfsar::Dpfsa05,
6432 dpfsar::Dpfsa05,
6433 Dpfsar_SPEC,
6434 crate::common::RW,
6435 >::from_register(self, 0)
6436 }
6437
6438 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6439 #[inline(always)]
6440 pub fn dpfsa06(
6441 self,
6442 ) -> crate::common::RegisterField<
6443 6,
6444 0x1,
6445 1,
6446 0,
6447 dpfsar::Dpfsa06,
6448 dpfsar::Dpfsa06,
6449 Dpfsar_SPEC,
6450 crate::common::RW,
6451 > {
6452 crate::common::RegisterField::<
6453 6,
6454 0x1,
6455 1,
6456 0,
6457 dpfsar::Dpfsa06,
6458 dpfsar::Dpfsa06,
6459 Dpfsar_SPEC,
6460 crate::common::RW,
6461 >::from_register(self, 0)
6462 }
6463
6464 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6465 #[inline(always)]
6466 pub fn dpfsa07(
6467 self,
6468 ) -> crate::common::RegisterField<
6469 7,
6470 0x1,
6471 1,
6472 0,
6473 dpfsar::Dpfsa07,
6474 dpfsar::Dpfsa07,
6475 Dpfsar_SPEC,
6476 crate::common::RW,
6477 > {
6478 crate::common::RegisterField::<
6479 7,
6480 0x1,
6481 1,
6482 0,
6483 dpfsar::Dpfsa07,
6484 dpfsar::Dpfsa07,
6485 Dpfsar_SPEC,
6486 crate::common::RW,
6487 >::from_register(self, 0)
6488 }
6489
6490 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6491 #[inline(always)]
6492 pub fn dpfsa08(
6493 self,
6494 ) -> crate::common::RegisterField<
6495 8,
6496 0x1,
6497 1,
6498 0,
6499 dpfsar::Dpfsa08,
6500 dpfsar::Dpfsa08,
6501 Dpfsar_SPEC,
6502 crate::common::RW,
6503 > {
6504 crate::common::RegisterField::<
6505 8,
6506 0x1,
6507 1,
6508 0,
6509 dpfsar::Dpfsa08,
6510 dpfsar::Dpfsa08,
6511 Dpfsar_SPEC,
6512 crate::common::RW,
6513 >::from_register(self, 0)
6514 }
6515
6516 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6517 #[inline(always)]
6518 pub fn dpfsa09(
6519 self,
6520 ) -> crate::common::RegisterField<
6521 9,
6522 0x1,
6523 1,
6524 0,
6525 dpfsar::Dpfsa09,
6526 dpfsar::Dpfsa09,
6527 Dpfsar_SPEC,
6528 crate::common::RW,
6529 > {
6530 crate::common::RegisterField::<
6531 9,
6532 0x1,
6533 1,
6534 0,
6535 dpfsar::Dpfsa09,
6536 dpfsar::Dpfsa09,
6537 Dpfsar_SPEC,
6538 crate::common::RW,
6539 >::from_register(self, 0)
6540 }
6541
6542 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6543 #[inline(always)]
6544 pub fn dpfsa10(
6545 self,
6546 ) -> crate::common::RegisterField<
6547 10,
6548 0x1,
6549 1,
6550 0,
6551 dpfsar::Dpfsa10,
6552 dpfsar::Dpfsa10,
6553 Dpfsar_SPEC,
6554 crate::common::RW,
6555 > {
6556 crate::common::RegisterField::<
6557 10,
6558 0x1,
6559 1,
6560 0,
6561 dpfsar::Dpfsa10,
6562 dpfsar::Dpfsa10,
6563 Dpfsar_SPEC,
6564 crate::common::RW,
6565 >::from_register(self, 0)
6566 }
6567
6568 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6569 #[inline(always)]
6570 pub fn dpfsa11(
6571 self,
6572 ) -> crate::common::RegisterField<
6573 11,
6574 0x1,
6575 1,
6576 0,
6577 dpfsar::Dpfsa11,
6578 dpfsar::Dpfsa11,
6579 Dpfsar_SPEC,
6580 crate::common::RW,
6581 > {
6582 crate::common::RegisterField::<
6583 11,
6584 0x1,
6585 1,
6586 0,
6587 dpfsar::Dpfsa11,
6588 dpfsar::Dpfsa11,
6589 Dpfsar_SPEC,
6590 crate::common::RW,
6591 >::from_register(self, 0)
6592 }
6593
6594 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6595 #[inline(always)]
6596 pub fn dpfsa12(
6597 self,
6598 ) -> crate::common::RegisterField<
6599 12,
6600 0x1,
6601 1,
6602 0,
6603 dpfsar::Dpfsa12,
6604 dpfsar::Dpfsa12,
6605 Dpfsar_SPEC,
6606 crate::common::RW,
6607 > {
6608 crate::common::RegisterField::<
6609 12,
6610 0x1,
6611 1,
6612 0,
6613 dpfsar::Dpfsa12,
6614 dpfsar::Dpfsa12,
6615 Dpfsar_SPEC,
6616 crate::common::RW,
6617 >::from_register(self, 0)
6618 }
6619
6620 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 14"]
6621 #[inline(always)]
6622 pub fn dpfsa14(
6623 self,
6624 ) -> crate::common::RegisterField<
6625 14,
6626 0x1,
6627 1,
6628 0,
6629 dpfsar::Dpfsa14,
6630 dpfsar::Dpfsa14,
6631 Dpfsar_SPEC,
6632 crate::common::RW,
6633 > {
6634 crate::common::RegisterField::<
6635 14,
6636 0x1,
6637 1,
6638 0,
6639 dpfsar::Dpfsa14,
6640 dpfsar::Dpfsa14,
6641 Dpfsar_SPEC,
6642 crate::common::RW,
6643 >::from_register(self, 0)
6644 }
6645
6646 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 15"]
6647 #[inline(always)]
6648 pub fn dpfsa15(
6649 self,
6650 ) -> crate::common::RegisterField<
6651 15,
6652 0x1,
6653 1,
6654 0,
6655 dpfsar::Dpfsa15,
6656 dpfsar::Dpfsa15,
6657 Dpfsar_SPEC,
6658 crate::common::RW,
6659 > {
6660 crate::common::RegisterField::<
6661 15,
6662 0x1,
6663 1,
6664 0,
6665 dpfsar::Dpfsa15,
6666 dpfsar::Dpfsa15,
6667 Dpfsar_SPEC,
6668 crate::common::RW,
6669 >::from_register(self, 0)
6670 }
6671
6672 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 16"]
6673 #[inline(always)]
6674 pub fn dpfsa16(
6675 self,
6676 ) -> crate::common::RegisterField<
6677 16,
6678 0x1,
6679 1,
6680 0,
6681 dpfsar::Dpfsa16,
6682 dpfsar::Dpfsa16,
6683 Dpfsar_SPEC,
6684 crate::common::RW,
6685 > {
6686 crate::common::RegisterField::<
6687 16,
6688 0x1,
6689 1,
6690 0,
6691 dpfsar::Dpfsa16,
6692 dpfsar::Dpfsa16,
6693 Dpfsar_SPEC,
6694 crate::common::RW,
6695 >::from_register(self, 0)
6696 }
6697
6698 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 17"]
6699 #[inline(always)]
6700 pub fn dpfsa17(
6701 self,
6702 ) -> crate::common::RegisterField<
6703 17,
6704 0x1,
6705 1,
6706 0,
6707 dpfsar::Dpfsa17,
6708 dpfsar::Dpfsa17,
6709 Dpfsar_SPEC,
6710 crate::common::RW,
6711 > {
6712 crate::common::RegisterField::<
6713 17,
6714 0x1,
6715 1,
6716 0,
6717 dpfsar::Dpfsa17,
6718 dpfsar::Dpfsa17,
6719 Dpfsar_SPEC,
6720 crate::common::RW,
6721 >::from_register(self, 0)
6722 }
6723
6724 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 18"]
6725 #[inline(always)]
6726 pub fn dpfsa18(
6727 self,
6728 ) -> crate::common::RegisterField<
6729 18,
6730 0x1,
6731 1,
6732 0,
6733 dpfsar::Dpfsa18,
6734 dpfsar::Dpfsa18,
6735 Dpfsar_SPEC,
6736 crate::common::RW,
6737 > {
6738 crate::common::RegisterField::<
6739 18,
6740 0x1,
6741 1,
6742 0,
6743 dpfsar::Dpfsa18,
6744 dpfsar::Dpfsa18,
6745 Dpfsar_SPEC,
6746 crate::common::RW,
6747 >::from_register(self, 0)
6748 }
6749
6750 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 19"]
6751 #[inline(always)]
6752 pub fn dpfsa19(
6753 self,
6754 ) -> crate::common::RegisterField<
6755 19,
6756 0x1,
6757 1,
6758 0,
6759 dpfsar::Dpfsa19,
6760 dpfsar::Dpfsa19,
6761 Dpfsar_SPEC,
6762 crate::common::RW,
6763 > {
6764 crate::common::RegisterField::<
6765 19,
6766 0x1,
6767 1,
6768 0,
6769 dpfsar::Dpfsa19,
6770 dpfsar::Dpfsa19,
6771 Dpfsar_SPEC,
6772 crate::common::RW,
6773 >::from_register(self, 0)
6774 }
6775
6776 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 20"]
6777 #[inline(always)]
6778 pub fn dpfsa20(
6779 self,
6780 ) -> crate::common::RegisterField<
6781 20,
6782 0x1,
6783 1,
6784 0,
6785 dpfsar::Dpfsa20,
6786 dpfsar::Dpfsa20,
6787 Dpfsar_SPEC,
6788 crate::common::RW,
6789 > {
6790 crate::common::RegisterField::<
6791 20,
6792 0x1,
6793 1,
6794 0,
6795 dpfsar::Dpfsa20,
6796 dpfsar::Dpfsa20,
6797 Dpfsar_SPEC,
6798 crate::common::RW,
6799 >::from_register(self, 0)
6800 }
6801
6802 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 24"]
6803 #[inline(always)]
6804 pub fn dpfsa24(
6805 self,
6806 ) -> crate::common::RegisterField<
6807 24,
6808 0x1,
6809 1,
6810 0,
6811 dpfsar::Dpfsa24,
6812 dpfsar::Dpfsa24,
6813 Dpfsar_SPEC,
6814 crate::common::RW,
6815 > {
6816 crate::common::RegisterField::<
6817 24,
6818 0x1,
6819 1,
6820 0,
6821 dpfsar::Dpfsa24,
6822 dpfsar::Dpfsa24,
6823 Dpfsar_SPEC,
6824 crate::common::RW,
6825 >::from_register(self, 0)
6826 }
6827
6828 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 26"]
6829 #[inline(always)]
6830 pub fn dpfsa26(
6831 self,
6832 ) -> crate::common::RegisterField<
6833 26,
6834 0x1,
6835 1,
6836 0,
6837 dpfsar::Dpfsa26,
6838 dpfsar::Dpfsa26,
6839 Dpfsar_SPEC,
6840 crate::common::RW,
6841 > {
6842 crate::common::RegisterField::<
6843 26,
6844 0x1,
6845 1,
6846 0,
6847 dpfsar::Dpfsa26,
6848 dpfsar::Dpfsa26,
6849 Dpfsar_SPEC,
6850 crate::common::RW,
6851 >::from_register(self, 0)
6852 }
6853
6854 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 27"]
6855 #[inline(always)]
6856 pub fn dpfsa27(
6857 self,
6858 ) -> crate::common::RegisterField<
6859 27,
6860 0x1,
6861 1,
6862 0,
6863 dpfsar::Dpfsa27,
6864 dpfsar::Dpfsa27,
6865 Dpfsar_SPEC,
6866 crate::common::RW,
6867 > {
6868 crate::common::RegisterField::<
6869 27,
6870 0x1,
6871 1,
6872 0,
6873 dpfsar::Dpfsa27,
6874 dpfsar::Dpfsa27,
6875 Dpfsar_SPEC,
6876 crate::common::RW,
6877 >::from_register(self, 0)
6878 }
6879}
6880impl ::core::default::Default for Dpfsar {
6881 #[inline(always)]
6882 fn default() -> Dpfsar {
6883 <crate::RegValueT<Dpfsar_SPEC> as RegisterValue<_>>::new(4294967295)
6884 }
6885}
6886pub mod dpfsar {
6887
6888 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6889 pub struct Dpfsa00_SPEC;
6890 pub type Dpfsa00 = crate::EnumBitfieldStruct<u8, Dpfsa00_SPEC>;
6891 impl Dpfsa00 {
6892 #[doc = "Secure"]
6893 pub const _0: Self = Self::new(0);
6894
6895 #[doc = "Non Secure"]
6896 pub const _1: Self = Self::new(1);
6897 }
6898 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6899 pub struct Dpfsa01_SPEC;
6900 pub type Dpfsa01 = crate::EnumBitfieldStruct<u8, Dpfsa01_SPEC>;
6901 impl Dpfsa01 {
6902 #[doc = "Secure"]
6903 pub const _0: Self = Self::new(0);
6904
6905 #[doc = "Non Secure"]
6906 pub const _1: Self = Self::new(1);
6907 }
6908 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6909 pub struct Dpfsa04_SPEC;
6910 pub type Dpfsa04 = crate::EnumBitfieldStruct<u8, Dpfsa04_SPEC>;
6911 impl Dpfsa04 {
6912 #[doc = "Secure"]
6913 pub const _0: Self = Self::new(0);
6914
6915 #[doc = "Non Secure"]
6916 pub const _1: Self = Self::new(1);
6917 }
6918 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6919 pub struct Dpfsa05_SPEC;
6920 pub type Dpfsa05 = crate::EnumBitfieldStruct<u8, Dpfsa05_SPEC>;
6921 impl Dpfsa05 {
6922 #[doc = "Secure"]
6923 pub const _0: Self = Self::new(0);
6924
6925 #[doc = "Non Secure"]
6926 pub const _1: Self = Self::new(1);
6927 }
6928 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6929 pub struct Dpfsa06_SPEC;
6930 pub type Dpfsa06 = crate::EnumBitfieldStruct<u8, Dpfsa06_SPEC>;
6931 impl Dpfsa06 {
6932 #[doc = "Secure"]
6933 pub const _0: Self = Self::new(0);
6934
6935 #[doc = "Non Secure"]
6936 pub const _1: Self = Self::new(1);
6937 }
6938 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6939 pub struct Dpfsa07_SPEC;
6940 pub type Dpfsa07 = crate::EnumBitfieldStruct<u8, Dpfsa07_SPEC>;
6941 impl Dpfsa07 {
6942 #[doc = "Secure"]
6943 pub const _0: Self = Self::new(0);
6944
6945 #[doc = "Non Secure"]
6946 pub const _1: Self = Self::new(1);
6947 }
6948 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6949 pub struct Dpfsa08_SPEC;
6950 pub type Dpfsa08 = crate::EnumBitfieldStruct<u8, Dpfsa08_SPEC>;
6951 impl Dpfsa08 {
6952 #[doc = "Secure"]
6953 pub const _0: Self = Self::new(0);
6954
6955 #[doc = "Non Secure"]
6956 pub const _1: Self = Self::new(1);
6957 }
6958 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6959 pub struct Dpfsa09_SPEC;
6960 pub type Dpfsa09 = crate::EnumBitfieldStruct<u8, Dpfsa09_SPEC>;
6961 impl Dpfsa09 {
6962 #[doc = "Secure"]
6963 pub const _0: Self = Self::new(0);
6964
6965 #[doc = "Non Secure"]
6966 pub const _1: Self = Self::new(1);
6967 }
6968 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6969 pub struct Dpfsa10_SPEC;
6970 pub type Dpfsa10 = crate::EnumBitfieldStruct<u8, Dpfsa10_SPEC>;
6971 impl Dpfsa10 {
6972 #[doc = "Secure"]
6973 pub const _0: Self = Self::new(0);
6974
6975 #[doc = "Non Secure"]
6976 pub const _1: Self = Self::new(1);
6977 }
6978 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6979 pub struct Dpfsa11_SPEC;
6980 pub type Dpfsa11 = crate::EnumBitfieldStruct<u8, Dpfsa11_SPEC>;
6981 impl Dpfsa11 {
6982 #[doc = "Secure"]
6983 pub const _0: Self = Self::new(0);
6984
6985 #[doc = "Non Secure"]
6986 pub const _1: Self = Self::new(1);
6987 }
6988 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6989 pub struct Dpfsa12_SPEC;
6990 pub type Dpfsa12 = crate::EnumBitfieldStruct<u8, Dpfsa12_SPEC>;
6991 impl Dpfsa12 {
6992 #[doc = "Secure"]
6993 pub const _0: Self = Self::new(0);
6994
6995 #[doc = "Non Secure"]
6996 pub const _1: Self = Self::new(1);
6997 }
6998 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6999 pub struct Dpfsa14_SPEC;
7000 pub type Dpfsa14 = crate::EnumBitfieldStruct<u8, Dpfsa14_SPEC>;
7001 impl Dpfsa14 {
7002 #[doc = "Secure"]
7003 pub const _0: Self = Self::new(0);
7004
7005 #[doc = "Non Secure"]
7006 pub const _1: Self = Self::new(1);
7007 }
7008 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7009 pub struct Dpfsa15_SPEC;
7010 pub type Dpfsa15 = crate::EnumBitfieldStruct<u8, Dpfsa15_SPEC>;
7011 impl Dpfsa15 {
7012 #[doc = "Secure"]
7013 pub const _0: Self = Self::new(0);
7014
7015 #[doc = "Non Secure"]
7016 pub const _1: Self = Self::new(1);
7017 }
7018 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7019 pub struct Dpfsa16_SPEC;
7020 pub type Dpfsa16 = crate::EnumBitfieldStruct<u8, Dpfsa16_SPEC>;
7021 impl Dpfsa16 {
7022 #[doc = "Secure"]
7023 pub const _0: Self = Self::new(0);
7024
7025 #[doc = "Non Secure"]
7026 pub const _1: Self = Self::new(1);
7027 }
7028 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7029 pub struct Dpfsa17_SPEC;
7030 pub type Dpfsa17 = crate::EnumBitfieldStruct<u8, Dpfsa17_SPEC>;
7031 impl Dpfsa17 {
7032 #[doc = "Secure"]
7033 pub const _0: Self = Self::new(0);
7034
7035 #[doc = "Non Secure"]
7036 pub const _1: Self = Self::new(1);
7037 }
7038 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7039 pub struct Dpfsa18_SPEC;
7040 pub type Dpfsa18 = crate::EnumBitfieldStruct<u8, Dpfsa18_SPEC>;
7041 impl Dpfsa18 {
7042 #[doc = "Secure"]
7043 pub const _0: Self = Self::new(0);
7044
7045 #[doc = "Non Secure"]
7046 pub const _1: Self = Self::new(1);
7047 }
7048 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7049 pub struct Dpfsa19_SPEC;
7050 pub type Dpfsa19 = crate::EnumBitfieldStruct<u8, Dpfsa19_SPEC>;
7051 impl Dpfsa19 {
7052 #[doc = "Secure"]
7053 pub const _0: Self = Self::new(0);
7054
7055 #[doc = "Non Secure"]
7056 pub const _1: Self = Self::new(1);
7057 }
7058 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7059 pub struct Dpfsa20_SPEC;
7060 pub type Dpfsa20 = crate::EnumBitfieldStruct<u8, Dpfsa20_SPEC>;
7061 impl Dpfsa20 {
7062 #[doc = "Secure"]
7063 pub const _0: Self = Self::new(0);
7064
7065 #[doc = "Non Secure"]
7066 pub const _1: Self = Self::new(1);
7067 }
7068 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7069 pub struct Dpfsa24_SPEC;
7070 pub type Dpfsa24 = crate::EnumBitfieldStruct<u8, Dpfsa24_SPEC>;
7071 impl Dpfsa24 {
7072 #[doc = "Secure"]
7073 pub const _0: Self = Self::new(0);
7074
7075 #[doc = "Non Secure"]
7076 pub const _1: Self = Self::new(1);
7077 }
7078 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7079 pub struct Dpfsa26_SPEC;
7080 pub type Dpfsa26 = crate::EnumBitfieldStruct<u8, Dpfsa26_SPEC>;
7081 impl Dpfsa26 {
7082 #[doc = "Secure"]
7083 pub const _0: Self = Self::new(0);
7084
7085 #[doc = "Non Secure"]
7086 pub const _1: Self = Self::new(1);
7087 }
7088 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7089 pub struct Dpfsa27_SPEC;
7090 pub type Dpfsa27 = crate::EnumBitfieldStruct<u8, Dpfsa27_SPEC>;
7091 impl Dpfsa27 {
7092 #[doc = "Secure"]
7093 pub const _0: Self = Self::new(0);
7094
7095 #[doc = "Non Secure"]
7096 pub const _1: Self = Self::new(1);
7097 }
7098}
7099#[doc(hidden)]
7100#[derive(Copy, Clone, Eq, PartialEq)]
7101pub struct Prcr_SPEC;
7102impl crate::sealed::RegSpec for Prcr_SPEC {
7103 type DataType = u16;
7104}
7105
7106#[doc = "Protect Register"]
7107pub type Prcr = crate::RegValueT<Prcr_SPEC>;
7108
7109impl Prcr {
7110 #[doc = "Enable writing to the registers related to the clock generation circuit"]
7111 #[inline(always)]
7112 pub fn prc0(
7113 self,
7114 ) -> crate::common::RegisterField<
7115 0,
7116 0x1,
7117 1,
7118 0,
7119 prcr::Prc0,
7120 prcr::Prc0,
7121 Prcr_SPEC,
7122 crate::common::RW,
7123 > {
7124 crate::common::RegisterField::<
7125 0,
7126 0x1,
7127 1,
7128 0,
7129 prcr::Prc0,
7130 prcr::Prc0,
7131 Prcr_SPEC,
7132 crate::common::RW,
7133 >::from_register(self, 0)
7134 }
7135
7136 #[doc = "Enable writing to the registers related to the low power modes, and the battery backup function"]
7137 #[inline(always)]
7138 pub fn prc1(
7139 self,
7140 ) -> crate::common::RegisterField<
7141 1,
7142 0x1,
7143 1,
7144 0,
7145 prcr::Prc1,
7146 prcr::Prc1,
7147 Prcr_SPEC,
7148 crate::common::RW,
7149 > {
7150 crate::common::RegisterField::<
7151 1,
7152 0x1,
7153 1,
7154 0,
7155 prcr::Prc1,
7156 prcr::Prc1,
7157 Prcr_SPEC,
7158 crate::common::RW,
7159 >::from_register(self, 0)
7160 }
7161
7162 #[doc = "Enable writing to the registers related to the LVD"]
7163 #[inline(always)]
7164 pub fn prc3(
7165 self,
7166 ) -> crate::common::RegisterField<
7167 3,
7168 0x1,
7169 1,
7170 0,
7171 prcr::Prc3,
7172 prcr::Prc3,
7173 Prcr_SPEC,
7174 crate::common::RW,
7175 > {
7176 crate::common::RegisterField::<
7177 3,
7178 0x1,
7179 1,
7180 0,
7181 prcr::Prc3,
7182 prcr::Prc3,
7183 Prcr_SPEC,
7184 crate::common::RW,
7185 >::from_register(self, 0)
7186 }
7187
7188 #[inline(always)]
7189 pub fn prc4(
7190 self,
7191 ) -> crate::common::RegisterField<
7192 4,
7193 0x1,
7194 1,
7195 0,
7196 prcr::Prc4,
7197 prcr::Prc4,
7198 Prcr_SPEC,
7199 crate::common::RW,
7200 > {
7201 crate::common::RegisterField::<
7202 4,
7203 0x1,
7204 1,
7205 0,
7206 prcr::Prc4,
7207 prcr::Prc4,
7208 Prcr_SPEC,
7209 crate::common::RW,
7210 >::from_register(self, 0)
7211 }
7212
7213 #[doc = "PRC Key Code"]
7214 #[inline(always)]
7215 pub fn prkey(
7216 self,
7217 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
7218 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
7219 }
7220}
7221impl ::core::default::Default for Prcr {
7222 #[inline(always)]
7223 fn default() -> Prcr {
7224 <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
7225 }
7226}
7227pub mod prcr {
7228
7229 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7230 pub struct Prc0_SPEC;
7231 pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
7232 impl Prc0 {
7233 #[doc = "Disable writes"]
7234 pub const _0: Self = Self::new(0);
7235
7236 #[doc = "Enable writes"]
7237 pub const _1: Self = Self::new(1);
7238 }
7239 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7240 pub struct Prc1_SPEC;
7241 pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
7242 impl Prc1 {
7243 #[doc = "Disable writes"]
7244 pub const _0: Self = Self::new(0);
7245
7246 #[doc = "Enable writes"]
7247 pub const _1: Self = Self::new(1);
7248 }
7249 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7250 pub struct Prc3_SPEC;
7251 pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
7252 impl Prc3 {
7253 #[doc = "Disable writes"]
7254 pub const _0: Self = Self::new(0);
7255
7256 #[doc = "Enable writes"]
7257 pub const _1: Self = Self::new(1);
7258 }
7259 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7260 pub struct Prc4_SPEC;
7261 pub type Prc4 = crate::EnumBitfieldStruct<u8, Prc4_SPEC>;
7262 impl Prc4 {
7263 #[doc = "Disable writes"]
7264 pub const _0: Self = Self::new(0);
7265
7266 #[doc = "Enable writes"]
7267 pub const _1: Self = Self::new(1);
7268 }
7269}
7270#[doc(hidden)]
7271#[derive(Copy, Clone, Eq, PartialEq)]
7272pub struct Dpsbycr_SPEC;
7273impl crate::sealed::RegSpec for Dpsbycr_SPEC {
7274 type DataType = u8;
7275}
7276
7277#[doc = "Deep Software Standby Control Register"]
7278pub type Dpsbycr = crate::RegValueT<Dpsbycr_SPEC>;
7279
7280impl Dpsbycr {
7281 #[doc = "Power-Supply Control"]
7282 #[inline(always)]
7283 pub fn deepcut(
7284 self,
7285 ) -> crate::common::RegisterField<
7286 0,
7287 0x3,
7288 1,
7289 0,
7290 dpsbycr::Deepcut,
7291 dpsbycr::Deepcut,
7292 Dpsbycr_SPEC,
7293 crate::common::RW,
7294 > {
7295 crate::common::RegisterField::<
7296 0,
7297 0x3,
7298 1,
7299 0,
7300 dpsbycr::Deepcut,
7301 dpsbycr::Deepcut,
7302 Dpsbycr_SPEC,
7303 crate::common::RW,
7304 >::from_register(self, 0)
7305 }
7306
7307 #[doc = "I/O Port Retention"]
7308 #[inline(always)]
7309 pub fn iokeep(
7310 self,
7311 ) -> crate::common::RegisterField<
7312 6,
7313 0x1,
7314 1,
7315 0,
7316 dpsbycr::Iokeep,
7317 dpsbycr::Iokeep,
7318 Dpsbycr_SPEC,
7319 crate::common::RW,
7320 > {
7321 crate::common::RegisterField::<
7322 6,
7323 0x1,
7324 1,
7325 0,
7326 dpsbycr::Iokeep,
7327 dpsbycr::Iokeep,
7328 Dpsbycr_SPEC,
7329 crate::common::RW,
7330 >::from_register(self, 0)
7331 }
7332
7333 #[doc = "Deep Software Standby"]
7334 #[inline(always)]
7335 pub fn dpsby(
7336 self,
7337 ) -> crate::common::RegisterField<
7338 7,
7339 0x1,
7340 1,
7341 0,
7342 dpsbycr::Dpsby,
7343 dpsbycr::Dpsby,
7344 Dpsbycr_SPEC,
7345 crate::common::RW,
7346 > {
7347 crate::common::RegisterField::<
7348 7,
7349 0x1,
7350 1,
7351 0,
7352 dpsbycr::Dpsby,
7353 dpsbycr::Dpsby,
7354 Dpsbycr_SPEC,
7355 crate::common::RW,
7356 >::from_register(self, 0)
7357 }
7358}
7359impl ::core::default::Default for Dpsbycr {
7360 #[inline(always)]
7361 fn default() -> Dpsbycr {
7362 <crate::RegValueT<Dpsbycr_SPEC> as RegisterValue<_>>::new(1)
7363 }
7364}
7365pub mod dpsbycr {
7366
7367 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7368 pub struct Deepcut_SPEC;
7369 pub type Deepcut = crate::EnumBitfieldStruct<u8, Deepcut_SPEC>;
7370 impl Deepcut {
7371 #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGTn (n = 0 to 3), and USBFS resume detecting unit is supplied in Deep Software Standby mode."]
7372 pub const _00: Self = Self::new(0);
7373
7374 #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode."]
7375 pub const _01: Self = Self::new(1);
7376
7377 #[doc = "Setting prohibited"]
7378 pub const _10: Self = Self::new(2);
7379
7380 #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode. In addition, LVD is disabled and the low power function in a power-on reset circuit is enabled."]
7381 pub const _11: Self = Self::new(3);
7382 }
7383 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7384 pub struct Iokeep_SPEC;
7385 pub type Iokeep = crate::EnumBitfieldStruct<u8, Iokeep_SPEC>;
7386 impl Iokeep {
7387 #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the reset state."]
7388 pub const _0: Self = Self::new(0);
7389
7390 #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the same state as in the Deep Software Standby mode."]
7391 pub const _1: Self = Self::new(1);
7392 }
7393 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7394 pub struct Dpsby_SPEC;
7395 pub type Dpsby = crate::EnumBitfieldStruct<u8, Dpsby_SPEC>;
7396 impl Dpsby {
7397 #[doc = "Sleep mode (SBYCR.SSBY=0) / Software Standby mode (SBYCR.SSBY=1)"]
7398 pub const _0: Self = Self::new(0);
7399
7400 #[doc = "Sleep mode (SBYCR.SSBY=0) / Deep Software Standby mode (SBYCR.SSBY=1)"]
7401 pub const _1: Self = Self::new(1);
7402 }
7403}
7404#[doc(hidden)]
7405#[derive(Copy, Clone, Eq, PartialEq)]
7406pub struct Dpswcr_SPEC;
7407impl crate::sealed::RegSpec for Dpswcr_SPEC {
7408 type DataType = u8;
7409}
7410
7411#[doc = "Deep Software Standby Wait Control Register"]
7412pub type Dpswcr = crate::RegValueT<Dpswcr_SPEC>;
7413
7414impl Dpswcr {
7415 #[doc = "Deep Software Wait Standby Time Setting Bit"]
7416 #[inline(always)]
7417 pub fn wtsts(
7418 self,
7419 ) -> crate::common::RegisterField<
7420 0,
7421 0x3f,
7422 1,
7423 0,
7424 dpswcr::Wtsts,
7425 dpswcr::Wtsts,
7426 Dpswcr_SPEC,
7427 crate::common::RW,
7428 > {
7429 crate::common::RegisterField::<
7430 0,
7431 0x3f,
7432 1,
7433 0,
7434 dpswcr::Wtsts,
7435 dpswcr::Wtsts,
7436 Dpswcr_SPEC,
7437 crate::common::RW,
7438 >::from_register(self, 0)
7439 }
7440}
7441impl ::core::default::Default for Dpswcr {
7442 #[inline(always)]
7443 fn default() -> Dpswcr {
7444 <crate::RegValueT<Dpswcr_SPEC> as RegisterValue<_>>::new(25)
7445 }
7446}
7447pub mod dpswcr {
7448
7449 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7450 pub struct Wtsts_SPEC;
7451 pub type Wtsts = crate::EnumBitfieldStruct<u8, Wtsts_SPEC>;
7452 impl Wtsts {
7453 #[doc = "Wait cycle for fast recovery"]
7454 pub const _0_X_0_E: Self = Self::new(14);
7455
7456 #[doc = "Wait cycle for slow recovery"]
7457 pub const _0_X_19: Self = Self::new(25);
7458 }
7459}
7460#[doc(hidden)]
7461#[derive(Copy, Clone, Eq, PartialEq)]
7462pub struct Dpsier0_SPEC;
7463impl crate::sealed::RegSpec for Dpsier0_SPEC {
7464 type DataType = u8;
7465}
7466
7467#[doc = "Deep Software Standby Interrupt Enable Register 0"]
7468pub type Dpsier0 = crate::RegValueT<Dpsier0_SPEC>;
7469
7470impl Dpsier0 {
7471 #[doc = "IRQ0-DS Pin Enable"]
7472 #[inline(always)]
7473 pub fn dirq0e(
7474 self,
7475 ) -> crate::common::RegisterField<
7476 0,
7477 0x1,
7478 1,
7479 0,
7480 dpsier0::Dirq0E,
7481 dpsier0::Dirq0E,
7482 Dpsier0_SPEC,
7483 crate::common::RW,
7484 > {
7485 crate::common::RegisterField::<
7486 0,
7487 0x1,
7488 1,
7489 0,
7490 dpsier0::Dirq0E,
7491 dpsier0::Dirq0E,
7492 Dpsier0_SPEC,
7493 crate::common::RW,
7494 >::from_register(self, 0)
7495 }
7496
7497 #[doc = "IRQ1-DS Pin Enable"]
7498 #[inline(always)]
7499 pub fn dirq1e(
7500 self,
7501 ) -> crate::common::RegisterField<
7502 1,
7503 0x1,
7504 1,
7505 0,
7506 dpsier0::Dirq1E,
7507 dpsier0::Dirq1E,
7508 Dpsier0_SPEC,
7509 crate::common::RW,
7510 > {
7511 crate::common::RegisterField::<
7512 1,
7513 0x1,
7514 1,
7515 0,
7516 dpsier0::Dirq1E,
7517 dpsier0::Dirq1E,
7518 Dpsier0_SPEC,
7519 crate::common::RW,
7520 >::from_register(self, 0)
7521 }
7522
7523 #[doc = "IRQ4-DS Pin Enable"]
7524 #[inline(always)]
7525 pub fn dirq4e(
7526 self,
7527 ) -> crate::common::RegisterField<
7528 4,
7529 0x1,
7530 1,
7531 0,
7532 dpsier0::Dirq4E,
7533 dpsier0::Dirq4E,
7534 Dpsier0_SPEC,
7535 crate::common::RW,
7536 > {
7537 crate::common::RegisterField::<
7538 4,
7539 0x1,
7540 1,
7541 0,
7542 dpsier0::Dirq4E,
7543 dpsier0::Dirq4E,
7544 Dpsier0_SPEC,
7545 crate::common::RW,
7546 >::from_register(self, 0)
7547 }
7548
7549 #[doc = "IRQ5-DS Pin Enable"]
7550 #[inline(always)]
7551 pub fn dirq5e(
7552 self,
7553 ) -> crate::common::RegisterField<
7554 5,
7555 0x1,
7556 1,
7557 0,
7558 dpsier0::Dirq5E,
7559 dpsier0::Dirq5E,
7560 Dpsier0_SPEC,
7561 crate::common::RW,
7562 > {
7563 crate::common::RegisterField::<
7564 5,
7565 0x1,
7566 1,
7567 0,
7568 dpsier0::Dirq5E,
7569 dpsier0::Dirq5E,
7570 Dpsier0_SPEC,
7571 crate::common::RW,
7572 >::from_register(self, 0)
7573 }
7574
7575 #[doc = "IRQ6-DS Pin Enable"]
7576 #[inline(always)]
7577 pub fn dirq6e(
7578 self,
7579 ) -> crate::common::RegisterField<
7580 6,
7581 0x1,
7582 1,
7583 0,
7584 dpsier0::Dirq6E,
7585 dpsier0::Dirq6E,
7586 Dpsier0_SPEC,
7587 crate::common::RW,
7588 > {
7589 crate::common::RegisterField::<
7590 6,
7591 0x1,
7592 1,
7593 0,
7594 dpsier0::Dirq6E,
7595 dpsier0::Dirq6E,
7596 Dpsier0_SPEC,
7597 crate::common::RW,
7598 >::from_register(self, 0)
7599 }
7600
7601 #[doc = "IRQ7-DS Pin Enable"]
7602 #[inline(always)]
7603 pub fn dirq7e(
7604 self,
7605 ) -> crate::common::RegisterField<
7606 7,
7607 0x1,
7608 1,
7609 0,
7610 dpsier0::Dirq7E,
7611 dpsier0::Dirq7E,
7612 Dpsier0_SPEC,
7613 crate::common::RW,
7614 > {
7615 crate::common::RegisterField::<
7616 7,
7617 0x1,
7618 1,
7619 0,
7620 dpsier0::Dirq7E,
7621 dpsier0::Dirq7E,
7622 Dpsier0_SPEC,
7623 crate::common::RW,
7624 >::from_register(self, 0)
7625 }
7626}
7627impl ::core::default::Default for Dpsier0 {
7628 #[inline(always)]
7629 fn default() -> Dpsier0 {
7630 <crate::RegValueT<Dpsier0_SPEC> as RegisterValue<_>>::new(0)
7631 }
7632}
7633pub mod dpsier0 {
7634
7635 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7636 pub struct Dirq0E_SPEC;
7637 pub type Dirq0E = crate::EnumBitfieldStruct<u8, Dirq0E_SPEC>;
7638 impl Dirq0E {
7639 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7640 pub const _0: Self = Self::new(0);
7641
7642 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7643 pub const _1: Self = Self::new(1);
7644 }
7645 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7646 pub struct Dirq1E_SPEC;
7647 pub type Dirq1E = crate::EnumBitfieldStruct<u8, Dirq1E_SPEC>;
7648 impl Dirq1E {
7649 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7650 pub const _0: Self = Self::new(0);
7651
7652 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7653 pub const _1: Self = Self::new(1);
7654 }
7655 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7656 pub struct Dirq4E_SPEC;
7657 pub type Dirq4E = crate::EnumBitfieldStruct<u8, Dirq4E_SPEC>;
7658 impl Dirq4E {
7659 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7660 pub const _0: Self = Self::new(0);
7661
7662 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7663 pub const _1: Self = Self::new(1);
7664 }
7665 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7666 pub struct Dirq5E_SPEC;
7667 pub type Dirq5E = crate::EnumBitfieldStruct<u8, Dirq5E_SPEC>;
7668 impl Dirq5E {
7669 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7670 pub const _0: Self = Self::new(0);
7671
7672 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7673 pub const _1: Self = Self::new(1);
7674 }
7675 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7676 pub struct Dirq6E_SPEC;
7677 pub type Dirq6E = crate::EnumBitfieldStruct<u8, Dirq6E_SPEC>;
7678 impl Dirq6E {
7679 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7680 pub const _0: Self = Self::new(0);
7681
7682 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7683 pub const _1: Self = Self::new(1);
7684 }
7685 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7686 pub struct Dirq7E_SPEC;
7687 pub type Dirq7E = crate::EnumBitfieldStruct<u8, Dirq7E_SPEC>;
7688 impl Dirq7E {
7689 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7690 pub const _0: Self = Self::new(0);
7691
7692 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7693 pub const _1: Self = Self::new(1);
7694 }
7695}
7696#[doc(hidden)]
7697#[derive(Copy, Clone, Eq, PartialEq)]
7698pub struct Dpsier1_SPEC;
7699impl crate::sealed::RegSpec for Dpsier1_SPEC {
7700 type DataType = u8;
7701}
7702
7703#[doc = "Deep Software Standby Interrupt Enable Register 1"]
7704pub type Dpsier1 = crate::RegValueT<Dpsier1_SPEC>;
7705
7706impl Dpsier1 {
7707 #[doc = "IRQ8-DS Pin Enable"]
7708 #[inline(always)]
7709 pub fn dirq8e(
7710 self,
7711 ) -> crate::common::RegisterField<
7712 0,
7713 0x1,
7714 1,
7715 0,
7716 dpsier1::Dirq8E,
7717 dpsier1::Dirq8E,
7718 Dpsier1_SPEC,
7719 crate::common::RW,
7720 > {
7721 crate::common::RegisterField::<
7722 0,
7723 0x1,
7724 1,
7725 0,
7726 dpsier1::Dirq8E,
7727 dpsier1::Dirq8E,
7728 Dpsier1_SPEC,
7729 crate::common::RW,
7730 >::from_register(self, 0)
7731 }
7732
7733 #[doc = "IRQ9-DS Pin Enable"]
7734 #[inline(always)]
7735 pub fn dirq9e(
7736 self,
7737 ) -> crate::common::RegisterField<
7738 1,
7739 0x1,
7740 1,
7741 0,
7742 dpsier1::Dirq9E,
7743 dpsier1::Dirq9E,
7744 Dpsier1_SPEC,
7745 crate::common::RW,
7746 > {
7747 crate::common::RegisterField::<
7748 1,
7749 0x1,
7750 1,
7751 0,
7752 dpsier1::Dirq9E,
7753 dpsier1::Dirq9E,
7754 Dpsier1_SPEC,
7755 crate::common::RW,
7756 >::from_register(self, 0)
7757 }
7758
7759 #[doc = "IRQ10-DS Pin Enable"]
7760 #[inline(always)]
7761 pub fn dirq10e(
7762 self,
7763 ) -> crate::common::RegisterField<
7764 2,
7765 0x1,
7766 1,
7767 0,
7768 dpsier1::Dirq10E,
7769 dpsier1::Dirq10E,
7770 Dpsier1_SPEC,
7771 crate::common::RW,
7772 > {
7773 crate::common::RegisterField::<
7774 2,
7775 0x1,
7776 1,
7777 0,
7778 dpsier1::Dirq10E,
7779 dpsier1::Dirq10E,
7780 Dpsier1_SPEC,
7781 crate::common::RW,
7782 >::from_register(self, 0)
7783 }
7784
7785 #[doc = "IRQ11-DS Pin Enable"]
7786 #[inline(always)]
7787 pub fn dirq11e(
7788 self,
7789 ) -> crate::common::RegisterField<
7790 3,
7791 0x1,
7792 1,
7793 0,
7794 dpsier1::Dirq11E,
7795 dpsier1::Dirq11E,
7796 Dpsier1_SPEC,
7797 crate::common::RW,
7798 > {
7799 crate::common::RegisterField::<
7800 3,
7801 0x1,
7802 1,
7803 0,
7804 dpsier1::Dirq11E,
7805 dpsier1::Dirq11E,
7806 Dpsier1_SPEC,
7807 crate::common::RW,
7808 >::from_register(self, 0)
7809 }
7810
7811 #[doc = "IRQ12-DS Pin Enable"]
7812 #[inline(always)]
7813 pub fn dirq12e(
7814 self,
7815 ) -> crate::common::RegisterField<
7816 4,
7817 0x1,
7818 1,
7819 0,
7820 dpsier1::Dirq12E,
7821 dpsier1::Dirq12E,
7822 Dpsier1_SPEC,
7823 crate::common::RW,
7824 > {
7825 crate::common::RegisterField::<
7826 4,
7827 0x1,
7828 1,
7829 0,
7830 dpsier1::Dirq12E,
7831 dpsier1::Dirq12E,
7832 Dpsier1_SPEC,
7833 crate::common::RW,
7834 >::from_register(self, 0)
7835 }
7836
7837 #[doc = "IRQ14-DS Pin Enable"]
7838 #[inline(always)]
7839 pub fn dirq14e(
7840 self,
7841 ) -> crate::common::RegisterField<
7842 6,
7843 0x1,
7844 1,
7845 0,
7846 dpsier1::Dirq14E,
7847 dpsier1::Dirq14E,
7848 Dpsier1_SPEC,
7849 crate::common::RW,
7850 > {
7851 crate::common::RegisterField::<
7852 6,
7853 0x1,
7854 1,
7855 0,
7856 dpsier1::Dirq14E,
7857 dpsier1::Dirq14E,
7858 Dpsier1_SPEC,
7859 crate::common::RW,
7860 >::from_register(self, 0)
7861 }
7862
7863 #[doc = "IRQ15-DS Pin Enable"]
7864 #[inline(always)]
7865 pub fn dirq15e(
7866 self,
7867 ) -> crate::common::RegisterField<
7868 7,
7869 0x1,
7870 1,
7871 0,
7872 dpsier1::Dirq15E,
7873 dpsier1::Dirq15E,
7874 Dpsier1_SPEC,
7875 crate::common::RW,
7876 > {
7877 crate::common::RegisterField::<
7878 7,
7879 0x1,
7880 1,
7881 0,
7882 dpsier1::Dirq15E,
7883 dpsier1::Dirq15E,
7884 Dpsier1_SPEC,
7885 crate::common::RW,
7886 >::from_register(self, 0)
7887 }
7888}
7889impl ::core::default::Default for Dpsier1 {
7890 #[inline(always)]
7891 fn default() -> Dpsier1 {
7892 <crate::RegValueT<Dpsier1_SPEC> as RegisterValue<_>>::new(0)
7893 }
7894}
7895pub mod dpsier1 {
7896
7897 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7898 pub struct Dirq8E_SPEC;
7899 pub type Dirq8E = crate::EnumBitfieldStruct<u8, Dirq8E_SPEC>;
7900 impl Dirq8E {
7901 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7902 pub const _0: Self = Self::new(0);
7903
7904 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7905 pub const _1: Self = Self::new(1);
7906 }
7907 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7908 pub struct Dirq9E_SPEC;
7909 pub type Dirq9E = crate::EnumBitfieldStruct<u8, Dirq9E_SPEC>;
7910 impl Dirq9E {
7911 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7912 pub const _0: Self = Self::new(0);
7913
7914 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7915 pub const _1: Self = Self::new(1);
7916 }
7917 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7918 pub struct Dirq10E_SPEC;
7919 pub type Dirq10E = crate::EnumBitfieldStruct<u8, Dirq10E_SPEC>;
7920 impl Dirq10E {
7921 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7922 pub const _0: Self = Self::new(0);
7923
7924 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7925 pub const _1: Self = Self::new(1);
7926 }
7927 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7928 pub struct Dirq11E_SPEC;
7929 pub type Dirq11E = crate::EnumBitfieldStruct<u8, Dirq11E_SPEC>;
7930 impl Dirq11E {
7931 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7932 pub const _0: Self = Self::new(0);
7933
7934 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7935 pub const _1: Self = Self::new(1);
7936 }
7937 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7938 pub struct Dirq12E_SPEC;
7939 pub type Dirq12E = crate::EnumBitfieldStruct<u8, Dirq12E_SPEC>;
7940 impl Dirq12E {
7941 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7942 pub const _0: Self = Self::new(0);
7943
7944 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7945 pub const _1: Self = Self::new(1);
7946 }
7947 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7948 pub struct Dirq14E_SPEC;
7949 pub type Dirq14E = crate::EnumBitfieldStruct<u8, Dirq14E_SPEC>;
7950 impl Dirq14E {
7951 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7952 pub const _0: Self = Self::new(0);
7953
7954 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7955 pub const _1: Self = Self::new(1);
7956 }
7957 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7958 pub struct Dirq15E_SPEC;
7959 pub type Dirq15E = crate::EnumBitfieldStruct<u8, Dirq15E_SPEC>;
7960 impl Dirq15E {
7961 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7962 pub const _0: Self = Self::new(0);
7963
7964 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7965 pub const _1: Self = Self::new(1);
7966 }
7967}
7968#[doc(hidden)]
7969#[derive(Copy, Clone, Eq, PartialEq)]
7970pub struct Dpsier2_SPEC;
7971impl crate::sealed::RegSpec for Dpsier2_SPEC {
7972 type DataType = u8;
7973}
7974
7975#[doc = "Deep Software Standby Interrupt Enable Register 2"]
7976pub type Dpsier2 = crate::RegValueT<Dpsier2_SPEC>;
7977
7978impl Dpsier2 {
7979 #[doc = "LVD1 Deep Software Standby Cancel Signal Enable"]
7980 #[inline(always)]
7981 pub fn dlvd1ie(
7982 self,
7983 ) -> crate::common::RegisterField<
7984 0,
7985 0x1,
7986 1,
7987 0,
7988 dpsier2::Dlvd1Ie,
7989 dpsier2::Dlvd1Ie,
7990 Dpsier2_SPEC,
7991 crate::common::RW,
7992 > {
7993 crate::common::RegisterField::<
7994 0,
7995 0x1,
7996 1,
7997 0,
7998 dpsier2::Dlvd1Ie,
7999 dpsier2::Dlvd1Ie,
8000 Dpsier2_SPEC,
8001 crate::common::RW,
8002 >::from_register(self, 0)
8003 }
8004
8005 #[doc = "LVD2 Deep Software Standby Cancel Signal Enable"]
8006 #[inline(always)]
8007 pub fn dlvd2ie(
8008 self,
8009 ) -> crate::common::RegisterField<
8010 1,
8011 0x1,
8012 1,
8013 0,
8014 dpsier2::Dlvd2Ie,
8015 dpsier2::Dlvd2Ie,
8016 Dpsier2_SPEC,
8017 crate::common::RW,
8018 > {
8019 crate::common::RegisterField::<
8020 1,
8021 0x1,
8022 1,
8023 0,
8024 dpsier2::Dlvd2Ie,
8025 dpsier2::Dlvd2Ie,
8026 Dpsier2_SPEC,
8027 crate::common::RW,
8028 >::from_register(self, 0)
8029 }
8030
8031 #[doc = "RTC Interval interrupt Deep Software Standby Cancel Signal Enable"]
8032 #[inline(always)]
8033 pub fn drtciie(
8034 self,
8035 ) -> crate::common::RegisterField<
8036 2,
8037 0x1,
8038 1,
8039 0,
8040 dpsier2::Drtciie,
8041 dpsier2::Drtciie,
8042 Dpsier2_SPEC,
8043 crate::common::RW,
8044 > {
8045 crate::common::RegisterField::<
8046 2,
8047 0x1,
8048 1,
8049 0,
8050 dpsier2::Drtciie,
8051 dpsier2::Drtciie,
8052 Dpsier2_SPEC,
8053 crate::common::RW,
8054 >::from_register(self, 0)
8055 }
8056
8057 #[doc = "RTC Alarm interrupt Deep Software Standby Cancel Signal Enable"]
8058 #[inline(always)]
8059 pub fn drtcaie(
8060 self,
8061 ) -> crate::common::RegisterField<
8062 3,
8063 0x1,
8064 1,
8065 0,
8066 dpsier2::Drtcaie,
8067 dpsier2::Drtcaie,
8068 Dpsier2_SPEC,
8069 crate::common::RW,
8070 > {
8071 crate::common::RegisterField::<
8072 3,
8073 0x1,
8074 1,
8075 0,
8076 dpsier2::Drtcaie,
8077 dpsier2::Drtcaie,
8078 Dpsier2_SPEC,
8079 crate::common::RW,
8080 >::from_register(self, 0)
8081 }
8082
8083 #[doc = "NMI Pin Enable"]
8084 #[inline(always)]
8085 pub fn dnmie(
8086 self,
8087 ) -> crate::common::RegisterField<
8088 4,
8089 0x1,
8090 1,
8091 0,
8092 dpsier2::Dnmie,
8093 dpsier2::Dnmie,
8094 Dpsier2_SPEC,
8095 crate::common::RW,
8096 > {
8097 crate::common::RegisterField::<
8098 4,
8099 0x1,
8100 1,
8101 0,
8102 dpsier2::Dnmie,
8103 dpsier2::Dnmie,
8104 Dpsier2_SPEC,
8105 crate::common::RW,
8106 >::from_register(self, 0)
8107 }
8108}
8109impl ::core::default::Default for Dpsier2 {
8110 #[inline(always)]
8111 fn default() -> Dpsier2 {
8112 <crate::RegValueT<Dpsier2_SPEC> as RegisterValue<_>>::new(0)
8113 }
8114}
8115pub mod dpsier2 {
8116
8117 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8118 pub struct Dlvd1Ie_SPEC;
8119 pub type Dlvd1Ie = crate::EnumBitfieldStruct<u8, Dlvd1Ie_SPEC>;
8120 impl Dlvd1Ie {
8121 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8122 pub const _0: Self = Self::new(0);
8123
8124 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8125 pub const _1: Self = Self::new(1);
8126 }
8127 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8128 pub struct Dlvd2Ie_SPEC;
8129 pub type Dlvd2Ie = crate::EnumBitfieldStruct<u8, Dlvd2Ie_SPEC>;
8130 impl Dlvd2Ie {
8131 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8132 pub const _0: Self = Self::new(0);
8133
8134 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8135 pub const _1: Self = Self::new(1);
8136 }
8137 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8138 pub struct Drtciie_SPEC;
8139 pub type Drtciie = crate::EnumBitfieldStruct<u8, Drtciie_SPEC>;
8140 impl Drtciie {
8141 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8142 pub const _0: Self = Self::new(0);
8143
8144 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8145 pub const _1: Self = Self::new(1);
8146 }
8147 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8148 pub struct Drtcaie_SPEC;
8149 pub type Drtcaie = crate::EnumBitfieldStruct<u8, Drtcaie_SPEC>;
8150 impl Drtcaie {
8151 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8152 pub const _0: Self = Self::new(0);
8153
8154 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8155 pub const _1: Self = Self::new(1);
8156 }
8157 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8158 pub struct Dnmie_SPEC;
8159 pub type Dnmie = crate::EnumBitfieldStruct<u8, Dnmie_SPEC>;
8160 impl Dnmie {
8161 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8162 pub const _0: Self = Self::new(0);
8163
8164 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8165 pub const _1: Self = Self::new(1);
8166 }
8167}
8168#[doc(hidden)]
8169#[derive(Copy, Clone, Eq, PartialEq)]
8170pub struct Dpsier3_SPEC;
8171impl crate::sealed::RegSpec for Dpsier3_SPEC {
8172 type DataType = u8;
8173}
8174
8175#[doc = "Deep Software Standby Interrupt Enable Register 3"]
8176pub type Dpsier3 = crate::RegValueT<Dpsier3_SPEC>;
8177
8178impl Dpsier3 {
8179 #[doc = "USBFS0 Suspend/Resume Deep Software Standby Cancel Signal Enable"]
8180 #[inline(always)]
8181 pub fn dusbfs0ie(
8182 self,
8183 ) -> crate::common::RegisterField<
8184 0,
8185 0x1,
8186 1,
8187 0,
8188 dpsier3::Dusbfs0Ie,
8189 dpsier3::Dusbfs0Ie,
8190 Dpsier3_SPEC,
8191 crate::common::RW,
8192 > {
8193 crate::common::RegisterField::<
8194 0,
8195 0x1,
8196 1,
8197 0,
8198 dpsier3::Dusbfs0Ie,
8199 dpsier3::Dusbfs0Ie,
8200 Dpsier3_SPEC,
8201 crate::common::RW,
8202 >::from_register(self, 0)
8203 }
8204
8205 #[doc = "AGT1 Underflow Deep Software Standby Cancel Signal Enable"]
8206 #[inline(always)]
8207 pub fn dagt1ie(
8208 self,
8209 ) -> crate::common::RegisterField<
8210 2,
8211 0x1,
8212 1,
8213 0,
8214 dpsier3::Dagt1Ie,
8215 dpsier3::Dagt1Ie,
8216 Dpsier3_SPEC,
8217 crate::common::RW,
8218 > {
8219 crate::common::RegisterField::<
8220 2,
8221 0x1,
8222 1,
8223 0,
8224 dpsier3::Dagt1Ie,
8225 dpsier3::Dagt1Ie,
8226 Dpsier3_SPEC,
8227 crate::common::RW,
8228 >::from_register(self, 0)
8229 }
8230
8231 #[doc = "AGT3 Underflow Deep Software Standby Cancel Signal Enable"]
8232 #[inline(always)]
8233 pub fn dagt3ie(
8234 self,
8235 ) -> crate::common::RegisterField<
8236 3,
8237 0x1,
8238 1,
8239 0,
8240 dpsier3::Dagt3Ie,
8241 dpsier3::Dagt3Ie,
8242 Dpsier3_SPEC,
8243 crate::common::RW,
8244 > {
8245 crate::common::RegisterField::<
8246 3,
8247 0x1,
8248 1,
8249 0,
8250 dpsier3::Dagt3Ie,
8251 dpsier3::Dagt3Ie,
8252 Dpsier3_SPEC,
8253 crate::common::RW,
8254 >::from_register(self, 0)
8255 }
8256}
8257impl ::core::default::Default for Dpsier3 {
8258 #[inline(always)]
8259 fn default() -> Dpsier3 {
8260 <crate::RegValueT<Dpsier3_SPEC> as RegisterValue<_>>::new(0)
8261 }
8262}
8263pub mod dpsier3 {
8264
8265 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8266 pub struct Dusbfs0Ie_SPEC;
8267 pub type Dusbfs0Ie = crate::EnumBitfieldStruct<u8, Dusbfs0Ie_SPEC>;
8268 impl Dusbfs0Ie {
8269 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8270 pub const _0: Self = Self::new(0);
8271
8272 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8273 pub const _1: Self = Self::new(1);
8274 }
8275 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8276 pub struct Dagt1Ie_SPEC;
8277 pub type Dagt1Ie = crate::EnumBitfieldStruct<u8, Dagt1Ie_SPEC>;
8278 impl Dagt1Ie {
8279 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8280 pub const _0: Self = Self::new(0);
8281
8282 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8283 pub const _1: Self = Self::new(1);
8284 }
8285 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8286 pub struct Dagt3Ie_SPEC;
8287 pub type Dagt3Ie = crate::EnumBitfieldStruct<u8, Dagt3Ie_SPEC>;
8288 impl Dagt3Ie {
8289 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8290 pub const _0: Self = Self::new(0);
8291
8292 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8293 pub const _1: Self = Self::new(1);
8294 }
8295}
8296#[doc(hidden)]
8297#[derive(Copy, Clone, Eq, PartialEq)]
8298pub struct Dpsifr0_SPEC;
8299impl crate::sealed::RegSpec for Dpsifr0_SPEC {
8300 type DataType = u8;
8301}
8302
8303#[doc = "Deep Software Standby Interrupt Flag Register 0"]
8304pub type Dpsifr0 = crate::RegValueT<Dpsifr0_SPEC>;
8305
8306impl Dpsifr0 {
8307 #[doc = "IRQ0-DS Pin Deep Software Standby Cancel Flag"]
8308 #[inline(always)]
8309 pub fn dirq0f(
8310 self,
8311 ) -> crate::common::RegisterField<
8312 0,
8313 0x1,
8314 1,
8315 0,
8316 dpsifr0::Dirq0F,
8317 dpsifr0::Dirq0F,
8318 Dpsifr0_SPEC,
8319 crate::common::RW,
8320 > {
8321 crate::common::RegisterField::<
8322 0,
8323 0x1,
8324 1,
8325 0,
8326 dpsifr0::Dirq0F,
8327 dpsifr0::Dirq0F,
8328 Dpsifr0_SPEC,
8329 crate::common::RW,
8330 >::from_register(self, 0)
8331 }
8332
8333 #[doc = "IRQ1-DS Pin Deep Software Standby Cancel Flag"]
8334 #[inline(always)]
8335 pub fn dirq1f(
8336 self,
8337 ) -> crate::common::RegisterField<
8338 1,
8339 0x1,
8340 1,
8341 0,
8342 dpsifr0::Dirq1F,
8343 dpsifr0::Dirq1F,
8344 Dpsifr0_SPEC,
8345 crate::common::RW,
8346 > {
8347 crate::common::RegisterField::<
8348 1,
8349 0x1,
8350 1,
8351 0,
8352 dpsifr0::Dirq1F,
8353 dpsifr0::Dirq1F,
8354 Dpsifr0_SPEC,
8355 crate::common::RW,
8356 >::from_register(self, 0)
8357 }
8358
8359 #[doc = "IRQ4-DS Pin Deep Software Standby Cancel Flag"]
8360 #[inline(always)]
8361 pub fn dirq4f(
8362 self,
8363 ) -> crate::common::RegisterField<
8364 4,
8365 0x1,
8366 1,
8367 0,
8368 dpsifr0::Dirq4F,
8369 dpsifr0::Dirq4F,
8370 Dpsifr0_SPEC,
8371 crate::common::RW,
8372 > {
8373 crate::common::RegisterField::<
8374 4,
8375 0x1,
8376 1,
8377 0,
8378 dpsifr0::Dirq4F,
8379 dpsifr0::Dirq4F,
8380 Dpsifr0_SPEC,
8381 crate::common::RW,
8382 >::from_register(self, 0)
8383 }
8384
8385 #[doc = "IRQ5-DS Pin Deep Software Standby Cancel Flag"]
8386 #[inline(always)]
8387 pub fn dirq5f(
8388 self,
8389 ) -> crate::common::RegisterField<
8390 5,
8391 0x1,
8392 1,
8393 0,
8394 dpsifr0::Dirq5F,
8395 dpsifr0::Dirq5F,
8396 Dpsifr0_SPEC,
8397 crate::common::RW,
8398 > {
8399 crate::common::RegisterField::<
8400 5,
8401 0x1,
8402 1,
8403 0,
8404 dpsifr0::Dirq5F,
8405 dpsifr0::Dirq5F,
8406 Dpsifr0_SPEC,
8407 crate::common::RW,
8408 >::from_register(self, 0)
8409 }
8410
8411 #[doc = "IRQ6-DS Pin Deep Software Standby Cancel Flag"]
8412 #[inline(always)]
8413 pub fn dirq6f(
8414 self,
8415 ) -> crate::common::RegisterField<
8416 6,
8417 0x1,
8418 1,
8419 0,
8420 dpsifr0::Dirq6F,
8421 dpsifr0::Dirq6F,
8422 Dpsifr0_SPEC,
8423 crate::common::RW,
8424 > {
8425 crate::common::RegisterField::<
8426 6,
8427 0x1,
8428 1,
8429 0,
8430 dpsifr0::Dirq6F,
8431 dpsifr0::Dirq6F,
8432 Dpsifr0_SPEC,
8433 crate::common::RW,
8434 >::from_register(self, 0)
8435 }
8436
8437 #[doc = "IRQ7-DS Pin Deep Software Standby Cancel Flag"]
8438 #[inline(always)]
8439 pub fn dirq7f(
8440 self,
8441 ) -> crate::common::RegisterField<
8442 7,
8443 0x1,
8444 1,
8445 0,
8446 dpsifr0::Dirq7F,
8447 dpsifr0::Dirq7F,
8448 Dpsifr0_SPEC,
8449 crate::common::RW,
8450 > {
8451 crate::common::RegisterField::<
8452 7,
8453 0x1,
8454 1,
8455 0,
8456 dpsifr0::Dirq7F,
8457 dpsifr0::Dirq7F,
8458 Dpsifr0_SPEC,
8459 crate::common::RW,
8460 >::from_register(self, 0)
8461 }
8462}
8463impl ::core::default::Default for Dpsifr0 {
8464 #[inline(always)]
8465 fn default() -> Dpsifr0 {
8466 <crate::RegValueT<Dpsifr0_SPEC> as RegisterValue<_>>::new(0)
8467 }
8468}
8469pub mod dpsifr0 {
8470
8471 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8472 pub struct Dirq0F_SPEC;
8473 pub type Dirq0F = crate::EnumBitfieldStruct<u8, Dirq0F_SPEC>;
8474 impl Dirq0F {
8475 #[doc = "The cancel request is not generated"]
8476 pub const _0: Self = Self::new(0);
8477
8478 #[doc = "The cancel request is generated"]
8479 pub const _1: Self = Self::new(1);
8480 }
8481 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8482 pub struct Dirq1F_SPEC;
8483 pub type Dirq1F = crate::EnumBitfieldStruct<u8, Dirq1F_SPEC>;
8484 impl Dirq1F {
8485 #[doc = "The cancel request is not generated"]
8486 pub const _0: Self = Self::new(0);
8487
8488 #[doc = "The cancel request is generated"]
8489 pub const _1: Self = Self::new(1);
8490 }
8491 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8492 pub struct Dirq4F_SPEC;
8493 pub type Dirq4F = crate::EnumBitfieldStruct<u8, Dirq4F_SPEC>;
8494 impl Dirq4F {
8495 #[doc = "The cancel request is not generated"]
8496 pub const _0: Self = Self::new(0);
8497
8498 #[doc = "The cancel request is generated"]
8499 pub const _1: Self = Self::new(1);
8500 }
8501 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8502 pub struct Dirq5F_SPEC;
8503 pub type Dirq5F = crate::EnumBitfieldStruct<u8, Dirq5F_SPEC>;
8504 impl Dirq5F {
8505 #[doc = "The cancel request is not generated"]
8506 pub const _0: Self = Self::new(0);
8507
8508 #[doc = "The cancel request is generated"]
8509 pub const _1: Self = Self::new(1);
8510 }
8511 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8512 pub struct Dirq6F_SPEC;
8513 pub type Dirq6F = crate::EnumBitfieldStruct<u8, Dirq6F_SPEC>;
8514 impl Dirq6F {
8515 #[doc = "The cancel request is not generated"]
8516 pub const _0: Self = Self::new(0);
8517
8518 #[doc = "The cancel request is generated"]
8519 pub const _1: Self = Self::new(1);
8520 }
8521 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8522 pub struct Dirq7F_SPEC;
8523 pub type Dirq7F = crate::EnumBitfieldStruct<u8, Dirq7F_SPEC>;
8524 impl Dirq7F {
8525 #[doc = "The cancel request is not generated"]
8526 pub const _0: Self = Self::new(0);
8527
8528 #[doc = "The cancel request is generated"]
8529 pub const _1: Self = Self::new(1);
8530 }
8531}
8532#[doc(hidden)]
8533#[derive(Copy, Clone, Eq, PartialEq)]
8534pub struct Dpsifr1_SPEC;
8535impl crate::sealed::RegSpec for Dpsifr1_SPEC {
8536 type DataType = u8;
8537}
8538
8539#[doc = "Deep Software Standby Interrupt Flag Register 1"]
8540pub type Dpsifr1 = crate::RegValueT<Dpsifr1_SPEC>;
8541
8542impl Dpsifr1 {
8543 #[doc = "IRQ8-DS Pin Deep Software Standby Cancel Flag"]
8544 #[inline(always)]
8545 pub fn dirq8f(
8546 self,
8547 ) -> crate::common::RegisterField<
8548 0,
8549 0x1,
8550 1,
8551 0,
8552 dpsifr1::Dirq8F,
8553 dpsifr1::Dirq8F,
8554 Dpsifr1_SPEC,
8555 crate::common::RW,
8556 > {
8557 crate::common::RegisterField::<
8558 0,
8559 0x1,
8560 1,
8561 0,
8562 dpsifr1::Dirq8F,
8563 dpsifr1::Dirq8F,
8564 Dpsifr1_SPEC,
8565 crate::common::RW,
8566 >::from_register(self, 0)
8567 }
8568
8569 #[doc = "IRQ9-DS Pin Deep Software Standby Cancel Flag"]
8570 #[inline(always)]
8571 pub fn dirq9f(
8572 self,
8573 ) -> crate::common::RegisterField<
8574 1,
8575 0x1,
8576 1,
8577 0,
8578 dpsifr1::Dirq9F,
8579 dpsifr1::Dirq9F,
8580 Dpsifr1_SPEC,
8581 crate::common::RW,
8582 > {
8583 crate::common::RegisterField::<
8584 1,
8585 0x1,
8586 1,
8587 0,
8588 dpsifr1::Dirq9F,
8589 dpsifr1::Dirq9F,
8590 Dpsifr1_SPEC,
8591 crate::common::RW,
8592 >::from_register(self, 0)
8593 }
8594
8595 #[doc = "IRQ10-DS Pin Deep Software Standby Cancel Flag"]
8596 #[inline(always)]
8597 pub fn dirq10f(
8598 self,
8599 ) -> crate::common::RegisterField<
8600 2,
8601 0x1,
8602 1,
8603 0,
8604 dpsifr1::Dirq10F,
8605 dpsifr1::Dirq10F,
8606 Dpsifr1_SPEC,
8607 crate::common::RW,
8608 > {
8609 crate::common::RegisterField::<
8610 2,
8611 0x1,
8612 1,
8613 0,
8614 dpsifr1::Dirq10F,
8615 dpsifr1::Dirq10F,
8616 Dpsifr1_SPEC,
8617 crate::common::RW,
8618 >::from_register(self, 0)
8619 }
8620
8621 #[doc = "IRQ11-DS Pin Deep Software Standby Cancel Flag"]
8622 #[inline(always)]
8623 pub fn dirq11f(
8624 self,
8625 ) -> crate::common::RegisterField<
8626 3,
8627 0x1,
8628 1,
8629 0,
8630 dpsifr1::Dirq11F,
8631 dpsifr1::Dirq11F,
8632 Dpsifr1_SPEC,
8633 crate::common::RW,
8634 > {
8635 crate::common::RegisterField::<
8636 3,
8637 0x1,
8638 1,
8639 0,
8640 dpsifr1::Dirq11F,
8641 dpsifr1::Dirq11F,
8642 Dpsifr1_SPEC,
8643 crate::common::RW,
8644 >::from_register(self, 0)
8645 }
8646
8647 #[doc = "IRQ12-DS Pin Deep Software Standby Cancel Flag"]
8648 #[inline(always)]
8649 pub fn dirq12f(
8650 self,
8651 ) -> crate::common::RegisterField<
8652 4,
8653 0x1,
8654 1,
8655 0,
8656 dpsifr1::Dirq12F,
8657 dpsifr1::Dirq12F,
8658 Dpsifr1_SPEC,
8659 crate::common::RW,
8660 > {
8661 crate::common::RegisterField::<
8662 4,
8663 0x1,
8664 1,
8665 0,
8666 dpsifr1::Dirq12F,
8667 dpsifr1::Dirq12F,
8668 Dpsifr1_SPEC,
8669 crate::common::RW,
8670 >::from_register(self, 0)
8671 }
8672
8673 #[doc = "IRQ14-DS Pin Deep Software Standby Cancel Flag"]
8674 #[inline(always)]
8675 pub fn dirq14f(
8676 self,
8677 ) -> crate::common::RegisterField<
8678 6,
8679 0x1,
8680 1,
8681 0,
8682 dpsifr1::Dirq14F,
8683 dpsifr1::Dirq14F,
8684 Dpsifr1_SPEC,
8685 crate::common::RW,
8686 > {
8687 crate::common::RegisterField::<
8688 6,
8689 0x1,
8690 1,
8691 0,
8692 dpsifr1::Dirq14F,
8693 dpsifr1::Dirq14F,
8694 Dpsifr1_SPEC,
8695 crate::common::RW,
8696 >::from_register(self, 0)
8697 }
8698
8699 #[doc = "IRQ15-DS Pin Deep Software Standby Cancel Flag"]
8700 #[inline(always)]
8701 pub fn dirq15f(
8702 self,
8703 ) -> crate::common::RegisterField<
8704 7,
8705 0x1,
8706 1,
8707 0,
8708 dpsifr1::Dirq15F,
8709 dpsifr1::Dirq15F,
8710 Dpsifr1_SPEC,
8711 crate::common::RW,
8712 > {
8713 crate::common::RegisterField::<
8714 7,
8715 0x1,
8716 1,
8717 0,
8718 dpsifr1::Dirq15F,
8719 dpsifr1::Dirq15F,
8720 Dpsifr1_SPEC,
8721 crate::common::RW,
8722 >::from_register(self, 0)
8723 }
8724}
8725impl ::core::default::Default for Dpsifr1 {
8726 #[inline(always)]
8727 fn default() -> Dpsifr1 {
8728 <crate::RegValueT<Dpsifr1_SPEC> as RegisterValue<_>>::new(0)
8729 }
8730}
8731pub mod dpsifr1 {
8732
8733 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8734 pub struct Dirq8F_SPEC;
8735 pub type Dirq8F = crate::EnumBitfieldStruct<u8, Dirq8F_SPEC>;
8736 impl Dirq8F {
8737 #[doc = "The cancel request is not generated"]
8738 pub const _0: Self = Self::new(0);
8739
8740 #[doc = "The cancel request is generated"]
8741 pub const _1: Self = Self::new(1);
8742 }
8743 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8744 pub struct Dirq9F_SPEC;
8745 pub type Dirq9F = crate::EnumBitfieldStruct<u8, Dirq9F_SPEC>;
8746 impl Dirq9F {
8747 #[doc = "The cancel request is not generated"]
8748 pub const _0: Self = Self::new(0);
8749
8750 #[doc = "The cancel request is generated"]
8751 pub const _1: Self = Self::new(1);
8752 }
8753 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8754 pub struct Dirq10F_SPEC;
8755 pub type Dirq10F = crate::EnumBitfieldStruct<u8, Dirq10F_SPEC>;
8756 impl Dirq10F {
8757 #[doc = "The cancel request is not generated"]
8758 pub const _0: Self = Self::new(0);
8759
8760 #[doc = "The cancel request is generated"]
8761 pub const _1: Self = Self::new(1);
8762 }
8763 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8764 pub struct Dirq11F_SPEC;
8765 pub type Dirq11F = crate::EnumBitfieldStruct<u8, Dirq11F_SPEC>;
8766 impl Dirq11F {
8767 #[doc = "The cancel request is not generated"]
8768 pub const _0: Self = Self::new(0);
8769
8770 #[doc = "The cancel request is generated"]
8771 pub const _1: Self = Self::new(1);
8772 }
8773 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8774 pub struct Dirq12F_SPEC;
8775 pub type Dirq12F = crate::EnumBitfieldStruct<u8, Dirq12F_SPEC>;
8776 impl Dirq12F {
8777 #[doc = "The cancel request is not generated"]
8778 pub const _0: Self = Self::new(0);
8779
8780 #[doc = "The cancel request is generated"]
8781 pub const _1: Self = Self::new(1);
8782 }
8783 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8784 pub struct Dirq14F_SPEC;
8785 pub type Dirq14F = crate::EnumBitfieldStruct<u8, Dirq14F_SPEC>;
8786 impl Dirq14F {
8787 #[doc = "The cancel request is not generated"]
8788 pub const _0: Self = Self::new(0);
8789
8790 #[doc = "The cancel request is generated"]
8791 pub const _1: Self = Self::new(1);
8792 }
8793 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8794 pub struct Dirq15F_SPEC;
8795 pub type Dirq15F = crate::EnumBitfieldStruct<u8, Dirq15F_SPEC>;
8796 impl Dirq15F {
8797 #[doc = "The cancel request is not generated"]
8798 pub const _0: Self = Self::new(0);
8799
8800 #[doc = "The cancel request is generated"]
8801 pub const _1: Self = Self::new(1);
8802 }
8803}
8804#[doc(hidden)]
8805#[derive(Copy, Clone, Eq, PartialEq)]
8806pub struct Dpsifr2_SPEC;
8807impl crate::sealed::RegSpec for Dpsifr2_SPEC {
8808 type DataType = u8;
8809}
8810
8811#[doc = "Deep Software Standby Interrupt Flag Register 2"]
8812pub type Dpsifr2 = crate::RegValueT<Dpsifr2_SPEC>;
8813
8814impl Dpsifr2 {
8815 #[doc = "LVD1 Deep Software Standby Cancel Flag"]
8816 #[inline(always)]
8817 pub fn dlvd1if(
8818 self,
8819 ) -> crate::common::RegisterField<
8820 0,
8821 0x1,
8822 1,
8823 0,
8824 dpsifr2::Dlvd1If,
8825 dpsifr2::Dlvd1If,
8826 Dpsifr2_SPEC,
8827 crate::common::RW,
8828 > {
8829 crate::common::RegisterField::<
8830 0,
8831 0x1,
8832 1,
8833 0,
8834 dpsifr2::Dlvd1If,
8835 dpsifr2::Dlvd1If,
8836 Dpsifr2_SPEC,
8837 crate::common::RW,
8838 >::from_register(self, 0)
8839 }
8840
8841 #[doc = "LVD2 Deep Software Standby Cancel Flag"]
8842 #[inline(always)]
8843 pub fn dlvd2if(
8844 self,
8845 ) -> crate::common::RegisterField<
8846 1,
8847 0x1,
8848 1,
8849 0,
8850 dpsifr2::Dlvd2If,
8851 dpsifr2::Dlvd2If,
8852 Dpsifr2_SPEC,
8853 crate::common::RW,
8854 > {
8855 crate::common::RegisterField::<
8856 1,
8857 0x1,
8858 1,
8859 0,
8860 dpsifr2::Dlvd2If,
8861 dpsifr2::Dlvd2If,
8862 Dpsifr2_SPEC,
8863 crate::common::RW,
8864 >::from_register(self, 0)
8865 }
8866
8867 #[doc = "RTC Interval Interrupt Deep Software Standby Cancel Flag"]
8868 #[inline(always)]
8869 pub fn drtciif(
8870 self,
8871 ) -> crate::common::RegisterField<
8872 2,
8873 0x1,
8874 1,
8875 0,
8876 dpsifr2::Drtciif,
8877 dpsifr2::Drtciif,
8878 Dpsifr2_SPEC,
8879 crate::common::RW,
8880 > {
8881 crate::common::RegisterField::<
8882 2,
8883 0x1,
8884 1,
8885 0,
8886 dpsifr2::Drtciif,
8887 dpsifr2::Drtciif,
8888 Dpsifr2_SPEC,
8889 crate::common::RW,
8890 >::from_register(self, 0)
8891 }
8892
8893 #[doc = "RTC Alarm Interrupt Deep Software Standby Cancel Flag"]
8894 #[inline(always)]
8895 pub fn drtcaif(
8896 self,
8897 ) -> crate::common::RegisterField<
8898 3,
8899 0x1,
8900 1,
8901 0,
8902 dpsifr2::Drtcaif,
8903 dpsifr2::Drtcaif,
8904 Dpsifr2_SPEC,
8905 crate::common::RW,
8906 > {
8907 crate::common::RegisterField::<
8908 3,
8909 0x1,
8910 1,
8911 0,
8912 dpsifr2::Drtcaif,
8913 dpsifr2::Drtcaif,
8914 Dpsifr2_SPEC,
8915 crate::common::RW,
8916 >::from_register(self, 0)
8917 }
8918
8919 #[doc = "NMI Pin Deep Software Standby Cancel Flag"]
8920 #[inline(always)]
8921 pub fn dnmif(
8922 self,
8923 ) -> crate::common::RegisterField<
8924 4,
8925 0x1,
8926 1,
8927 0,
8928 dpsifr2::Dnmif,
8929 dpsifr2::Dnmif,
8930 Dpsifr2_SPEC,
8931 crate::common::RW,
8932 > {
8933 crate::common::RegisterField::<
8934 4,
8935 0x1,
8936 1,
8937 0,
8938 dpsifr2::Dnmif,
8939 dpsifr2::Dnmif,
8940 Dpsifr2_SPEC,
8941 crate::common::RW,
8942 >::from_register(self, 0)
8943 }
8944}
8945impl ::core::default::Default for Dpsifr2 {
8946 #[inline(always)]
8947 fn default() -> Dpsifr2 {
8948 <crate::RegValueT<Dpsifr2_SPEC> as RegisterValue<_>>::new(0)
8949 }
8950}
8951pub mod dpsifr2 {
8952
8953 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8954 pub struct Dlvd1If_SPEC;
8955 pub type Dlvd1If = crate::EnumBitfieldStruct<u8, Dlvd1If_SPEC>;
8956 impl Dlvd1If {
8957 #[doc = "The cancel request is not generated"]
8958 pub const _0: Self = Self::new(0);
8959
8960 #[doc = "The cancel request is generated"]
8961 pub const _1: Self = Self::new(1);
8962 }
8963 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8964 pub struct Dlvd2If_SPEC;
8965 pub type Dlvd2If = crate::EnumBitfieldStruct<u8, Dlvd2If_SPEC>;
8966 impl Dlvd2If {
8967 #[doc = "The cancel request is not generated"]
8968 pub const _0: Self = Self::new(0);
8969
8970 #[doc = "The cancel request is generated"]
8971 pub const _1: Self = Self::new(1);
8972 }
8973 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8974 pub struct Drtciif_SPEC;
8975 pub type Drtciif = crate::EnumBitfieldStruct<u8, Drtciif_SPEC>;
8976 impl Drtciif {
8977 #[doc = "The cancel request is not generated"]
8978 pub const _0: Self = Self::new(0);
8979
8980 #[doc = "The cancel request is generated"]
8981 pub const _1: Self = Self::new(1);
8982 }
8983 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8984 pub struct Drtcaif_SPEC;
8985 pub type Drtcaif = crate::EnumBitfieldStruct<u8, Drtcaif_SPEC>;
8986 impl Drtcaif {
8987 #[doc = "The cancel request is not generated"]
8988 pub const _0: Self = Self::new(0);
8989
8990 #[doc = "The cancel request is generated"]
8991 pub const _1: Self = Self::new(1);
8992 }
8993 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8994 pub struct Dnmif_SPEC;
8995 pub type Dnmif = crate::EnumBitfieldStruct<u8, Dnmif_SPEC>;
8996 impl Dnmif {
8997 #[doc = "The cancel request is not generated"]
8998 pub const _0: Self = Self::new(0);
8999
9000 #[doc = "The cancel request is generated"]
9001 pub const _1: Self = Self::new(1);
9002 }
9003}
9004#[doc(hidden)]
9005#[derive(Copy, Clone, Eq, PartialEq)]
9006pub struct Dpsifr3_SPEC;
9007impl crate::sealed::RegSpec for Dpsifr3_SPEC {
9008 type DataType = u8;
9009}
9010
9011#[doc = "Deep Software Standby Interrupt Flag Register 3"]
9012pub type Dpsifr3 = crate::RegValueT<Dpsifr3_SPEC>;
9013
9014impl Dpsifr3 {
9015 #[doc = "USBFS0 Suspend/Resume Deep Software Standby Cancel Flag"]
9016 #[inline(always)]
9017 pub fn dusbfs0if(
9018 self,
9019 ) -> crate::common::RegisterField<
9020 0,
9021 0x1,
9022 1,
9023 0,
9024 dpsifr3::Dusbfs0If,
9025 dpsifr3::Dusbfs0If,
9026 Dpsifr3_SPEC,
9027 crate::common::RW,
9028 > {
9029 crate::common::RegisterField::<
9030 0,
9031 0x1,
9032 1,
9033 0,
9034 dpsifr3::Dusbfs0If,
9035 dpsifr3::Dusbfs0If,
9036 Dpsifr3_SPEC,
9037 crate::common::RW,
9038 >::from_register(self, 0)
9039 }
9040
9041 #[doc = "AGT1 Underflow Deep Software Standby Cancel Flag"]
9042 #[inline(always)]
9043 pub fn dagt1if(
9044 self,
9045 ) -> crate::common::RegisterField<
9046 2,
9047 0x1,
9048 1,
9049 0,
9050 dpsifr3::Dagt1If,
9051 dpsifr3::Dagt1If,
9052 Dpsifr3_SPEC,
9053 crate::common::RW,
9054 > {
9055 crate::common::RegisterField::<
9056 2,
9057 0x1,
9058 1,
9059 0,
9060 dpsifr3::Dagt1If,
9061 dpsifr3::Dagt1If,
9062 Dpsifr3_SPEC,
9063 crate::common::RW,
9064 >::from_register(self, 0)
9065 }
9066
9067 #[doc = "AGT3 Underflow Deep Software Standby Cancel Flag"]
9068 #[inline(always)]
9069 pub fn dagt3if(
9070 self,
9071 ) -> crate::common::RegisterField<
9072 3,
9073 0x1,
9074 1,
9075 0,
9076 dpsifr3::Dagt3If,
9077 dpsifr3::Dagt3If,
9078 Dpsifr3_SPEC,
9079 crate::common::RW,
9080 > {
9081 crate::common::RegisterField::<
9082 3,
9083 0x1,
9084 1,
9085 0,
9086 dpsifr3::Dagt3If,
9087 dpsifr3::Dagt3If,
9088 Dpsifr3_SPEC,
9089 crate::common::RW,
9090 >::from_register(self, 0)
9091 }
9092}
9093impl ::core::default::Default for Dpsifr3 {
9094 #[inline(always)]
9095 fn default() -> Dpsifr3 {
9096 <crate::RegValueT<Dpsifr3_SPEC> as RegisterValue<_>>::new(0)
9097 }
9098}
9099pub mod dpsifr3 {
9100
9101 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9102 pub struct Dusbfs0If_SPEC;
9103 pub type Dusbfs0If = crate::EnumBitfieldStruct<u8, Dusbfs0If_SPEC>;
9104 impl Dusbfs0If {
9105 #[doc = "The cancel request is not generated."]
9106 pub const _0: Self = Self::new(0);
9107
9108 #[doc = "The cancel request is generated."]
9109 pub const _1: Self = Self::new(1);
9110 }
9111 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9112 pub struct Dagt1If_SPEC;
9113 pub type Dagt1If = crate::EnumBitfieldStruct<u8, Dagt1If_SPEC>;
9114 impl Dagt1If {
9115 #[doc = "The cancel request is not generated."]
9116 pub const _0: Self = Self::new(0);
9117
9118 #[doc = "The cancel request is generated."]
9119 pub const _1: Self = Self::new(1);
9120 }
9121 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9122 pub struct Dagt3If_SPEC;
9123 pub type Dagt3If = crate::EnumBitfieldStruct<u8, Dagt3If_SPEC>;
9124 impl Dagt3If {
9125 #[doc = "The cancel request is not generated."]
9126 pub const _0: Self = Self::new(0);
9127
9128 #[doc = "The cancel request is generated."]
9129 pub const _1: Self = Self::new(1);
9130 }
9131}
9132#[doc(hidden)]
9133#[derive(Copy, Clone, Eq, PartialEq)]
9134pub struct Dpsiegr0_SPEC;
9135impl crate::sealed::RegSpec for Dpsiegr0_SPEC {
9136 type DataType = u8;
9137}
9138
9139#[doc = "Deep Software Standby Interrupt Edge Register 0"]
9140pub type Dpsiegr0 = crate::RegValueT<Dpsiegr0_SPEC>;
9141
9142impl Dpsiegr0 {
9143 #[doc = "IRQ0-DS Pin Edge Select"]
9144 #[inline(always)]
9145 pub fn dirq0eg(
9146 self,
9147 ) -> crate::common::RegisterField<
9148 0,
9149 0x1,
9150 1,
9151 0,
9152 dpsiegr0::Dirq0Eg,
9153 dpsiegr0::Dirq0Eg,
9154 Dpsiegr0_SPEC,
9155 crate::common::RW,
9156 > {
9157 crate::common::RegisterField::<
9158 0,
9159 0x1,
9160 1,
9161 0,
9162 dpsiegr0::Dirq0Eg,
9163 dpsiegr0::Dirq0Eg,
9164 Dpsiegr0_SPEC,
9165 crate::common::RW,
9166 >::from_register(self, 0)
9167 }
9168
9169 #[doc = "IRQ1-DS Pin Edge Select"]
9170 #[inline(always)]
9171 pub fn dirq1eg(
9172 self,
9173 ) -> crate::common::RegisterField<
9174 1,
9175 0x1,
9176 1,
9177 0,
9178 dpsiegr0::Dirq1Eg,
9179 dpsiegr0::Dirq1Eg,
9180 Dpsiegr0_SPEC,
9181 crate::common::RW,
9182 > {
9183 crate::common::RegisterField::<
9184 1,
9185 0x1,
9186 1,
9187 0,
9188 dpsiegr0::Dirq1Eg,
9189 dpsiegr0::Dirq1Eg,
9190 Dpsiegr0_SPEC,
9191 crate::common::RW,
9192 >::from_register(self, 0)
9193 }
9194
9195 #[doc = "IRQ4-DS Pin Edge Select"]
9196 #[inline(always)]
9197 pub fn dirq4eg(
9198 self,
9199 ) -> crate::common::RegisterField<
9200 4,
9201 0x1,
9202 1,
9203 0,
9204 dpsiegr0::Dirq4Eg,
9205 dpsiegr0::Dirq4Eg,
9206 Dpsiegr0_SPEC,
9207 crate::common::RW,
9208 > {
9209 crate::common::RegisterField::<
9210 4,
9211 0x1,
9212 1,
9213 0,
9214 dpsiegr0::Dirq4Eg,
9215 dpsiegr0::Dirq4Eg,
9216 Dpsiegr0_SPEC,
9217 crate::common::RW,
9218 >::from_register(self, 0)
9219 }
9220
9221 #[doc = "IRQ5-DS Pin Edge Select"]
9222 #[inline(always)]
9223 pub fn dirq5eg(
9224 self,
9225 ) -> crate::common::RegisterField<
9226 5,
9227 0x1,
9228 1,
9229 0,
9230 dpsiegr0::Dirq5Eg,
9231 dpsiegr0::Dirq5Eg,
9232 Dpsiegr0_SPEC,
9233 crate::common::RW,
9234 > {
9235 crate::common::RegisterField::<
9236 5,
9237 0x1,
9238 1,
9239 0,
9240 dpsiegr0::Dirq5Eg,
9241 dpsiegr0::Dirq5Eg,
9242 Dpsiegr0_SPEC,
9243 crate::common::RW,
9244 >::from_register(self, 0)
9245 }
9246
9247 #[doc = "IRQ6-DS Pin Edge Select"]
9248 #[inline(always)]
9249 pub fn dirq6eg(
9250 self,
9251 ) -> crate::common::RegisterField<
9252 6,
9253 0x1,
9254 1,
9255 0,
9256 dpsiegr0::Dirq6Eg,
9257 dpsiegr0::Dirq6Eg,
9258 Dpsiegr0_SPEC,
9259 crate::common::RW,
9260 > {
9261 crate::common::RegisterField::<
9262 6,
9263 0x1,
9264 1,
9265 0,
9266 dpsiegr0::Dirq6Eg,
9267 dpsiegr0::Dirq6Eg,
9268 Dpsiegr0_SPEC,
9269 crate::common::RW,
9270 >::from_register(self, 0)
9271 }
9272
9273 #[doc = "IRQ7-DS Pin Edge Select"]
9274 #[inline(always)]
9275 pub fn dirq7eg(
9276 self,
9277 ) -> crate::common::RegisterField<
9278 7,
9279 0x1,
9280 1,
9281 0,
9282 dpsiegr0::Dirq7Eg,
9283 dpsiegr0::Dirq7Eg,
9284 Dpsiegr0_SPEC,
9285 crate::common::RW,
9286 > {
9287 crate::common::RegisterField::<
9288 7,
9289 0x1,
9290 1,
9291 0,
9292 dpsiegr0::Dirq7Eg,
9293 dpsiegr0::Dirq7Eg,
9294 Dpsiegr0_SPEC,
9295 crate::common::RW,
9296 >::from_register(self, 0)
9297 }
9298}
9299impl ::core::default::Default for Dpsiegr0 {
9300 #[inline(always)]
9301 fn default() -> Dpsiegr0 {
9302 <crate::RegValueT<Dpsiegr0_SPEC> as RegisterValue<_>>::new(0)
9303 }
9304}
9305pub mod dpsiegr0 {
9306
9307 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9308 pub struct Dirq0Eg_SPEC;
9309 pub type Dirq0Eg = crate::EnumBitfieldStruct<u8, Dirq0Eg_SPEC>;
9310 impl Dirq0Eg {
9311 #[doc = "A cancel request is generated at a falling edge"]
9312 pub const _0: Self = Self::new(0);
9313
9314 #[doc = "A cancel request is generated at a rising edge"]
9315 pub const _1: Self = Self::new(1);
9316 }
9317 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9318 pub struct Dirq1Eg_SPEC;
9319 pub type Dirq1Eg = crate::EnumBitfieldStruct<u8, Dirq1Eg_SPEC>;
9320 impl Dirq1Eg {
9321 #[doc = "A cancel request is generated at a falling edge"]
9322 pub const _0: Self = Self::new(0);
9323
9324 #[doc = "A cancel request is generated at a rising edge"]
9325 pub const _1: Self = Self::new(1);
9326 }
9327 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9328 pub struct Dirq4Eg_SPEC;
9329 pub type Dirq4Eg = crate::EnumBitfieldStruct<u8, Dirq4Eg_SPEC>;
9330 impl Dirq4Eg {
9331 #[doc = "A cancel request is generated at a falling edge"]
9332 pub const _0: Self = Self::new(0);
9333
9334 #[doc = "A cancel request is generated at a rising edge"]
9335 pub const _1: Self = Self::new(1);
9336 }
9337 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9338 pub struct Dirq5Eg_SPEC;
9339 pub type Dirq5Eg = crate::EnumBitfieldStruct<u8, Dirq5Eg_SPEC>;
9340 impl Dirq5Eg {
9341 #[doc = "A cancel request is generated at a falling edge"]
9342 pub const _0: Self = Self::new(0);
9343
9344 #[doc = "A cancel request is generated at a rising edge"]
9345 pub const _1: Self = Self::new(1);
9346 }
9347 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9348 pub struct Dirq6Eg_SPEC;
9349 pub type Dirq6Eg = crate::EnumBitfieldStruct<u8, Dirq6Eg_SPEC>;
9350 impl Dirq6Eg {
9351 #[doc = "A cancel request is generated at a falling edge"]
9352 pub const _0: Self = Self::new(0);
9353
9354 #[doc = "A cancel request is generated at a rising edge"]
9355 pub const _1: Self = Self::new(1);
9356 }
9357 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9358 pub struct Dirq7Eg_SPEC;
9359 pub type Dirq7Eg = crate::EnumBitfieldStruct<u8, Dirq7Eg_SPEC>;
9360 impl Dirq7Eg {
9361 #[doc = "A cancel request is generated at a falling edge"]
9362 pub const _0: Self = Self::new(0);
9363
9364 #[doc = "A cancel request is generated at a rising edge"]
9365 pub const _1: Self = Self::new(1);
9366 }
9367}
9368#[doc(hidden)]
9369#[derive(Copy, Clone, Eq, PartialEq)]
9370pub struct Dpsiegr1_SPEC;
9371impl crate::sealed::RegSpec for Dpsiegr1_SPEC {
9372 type DataType = u8;
9373}
9374
9375#[doc = "Deep Software Standby Interrupt Edge Register 1"]
9376pub type Dpsiegr1 = crate::RegValueT<Dpsiegr1_SPEC>;
9377
9378impl Dpsiegr1 {
9379 #[doc = "IRQ8-DS Pin Edge Select"]
9380 #[inline(always)]
9381 pub fn dirq8eg(
9382 self,
9383 ) -> crate::common::RegisterField<
9384 0,
9385 0x1,
9386 1,
9387 0,
9388 dpsiegr1::Dirq8Eg,
9389 dpsiegr1::Dirq8Eg,
9390 Dpsiegr1_SPEC,
9391 crate::common::RW,
9392 > {
9393 crate::common::RegisterField::<
9394 0,
9395 0x1,
9396 1,
9397 0,
9398 dpsiegr1::Dirq8Eg,
9399 dpsiegr1::Dirq8Eg,
9400 Dpsiegr1_SPEC,
9401 crate::common::RW,
9402 >::from_register(self, 0)
9403 }
9404
9405 #[doc = "IRQ9-DS Pin Edge Select"]
9406 #[inline(always)]
9407 pub fn dirq9eg(
9408 self,
9409 ) -> crate::common::RegisterField<
9410 1,
9411 0x1,
9412 1,
9413 0,
9414 dpsiegr1::Dirq9Eg,
9415 dpsiegr1::Dirq9Eg,
9416 Dpsiegr1_SPEC,
9417 crate::common::RW,
9418 > {
9419 crate::common::RegisterField::<
9420 1,
9421 0x1,
9422 1,
9423 0,
9424 dpsiegr1::Dirq9Eg,
9425 dpsiegr1::Dirq9Eg,
9426 Dpsiegr1_SPEC,
9427 crate::common::RW,
9428 >::from_register(self, 0)
9429 }
9430
9431 #[doc = "IRQ10-DS Pin Edge Select"]
9432 #[inline(always)]
9433 pub fn dirq10eg(
9434 self,
9435 ) -> crate::common::RegisterField<
9436 2,
9437 0x1,
9438 1,
9439 0,
9440 dpsiegr1::Dirq10Eg,
9441 dpsiegr1::Dirq10Eg,
9442 Dpsiegr1_SPEC,
9443 crate::common::RW,
9444 > {
9445 crate::common::RegisterField::<
9446 2,
9447 0x1,
9448 1,
9449 0,
9450 dpsiegr1::Dirq10Eg,
9451 dpsiegr1::Dirq10Eg,
9452 Dpsiegr1_SPEC,
9453 crate::common::RW,
9454 >::from_register(self, 0)
9455 }
9456
9457 #[doc = "IRQ11-DS Pin Edge Select"]
9458 #[inline(always)]
9459 pub fn dirq11eg(
9460 self,
9461 ) -> crate::common::RegisterField<
9462 3,
9463 0x1,
9464 1,
9465 0,
9466 dpsiegr1::Dirq11Eg,
9467 dpsiegr1::Dirq11Eg,
9468 Dpsiegr1_SPEC,
9469 crate::common::RW,
9470 > {
9471 crate::common::RegisterField::<
9472 3,
9473 0x1,
9474 1,
9475 0,
9476 dpsiegr1::Dirq11Eg,
9477 dpsiegr1::Dirq11Eg,
9478 Dpsiegr1_SPEC,
9479 crate::common::RW,
9480 >::from_register(self, 0)
9481 }
9482
9483 #[doc = "IRQ12-DS Pin Edge Select"]
9484 #[inline(always)]
9485 pub fn dirq12eg(
9486 self,
9487 ) -> crate::common::RegisterField<
9488 4,
9489 0x1,
9490 1,
9491 0,
9492 dpsiegr1::Dirq12Eg,
9493 dpsiegr1::Dirq12Eg,
9494 Dpsiegr1_SPEC,
9495 crate::common::RW,
9496 > {
9497 crate::common::RegisterField::<
9498 4,
9499 0x1,
9500 1,
9501 0,
9502 dpsiegr1::Dirq12Eg,
9503 dpsiegr1::Dirq12Eg,
9504 Dpsiegr1_SPEC,
9505 crate::common::RW,
9506 >::from_register(self, 0)
9507 }
9508
9509 #[doc = "IRQ14-DS Pin Edge Select"]
9510 #[inline(always)]
9511 pub fn dirq14eg(
9512 self,
9513 ) -> crate::common::RegisterField<
9514 6,
9515 0x1,
9516 1,
9517 0,
9518 dpsiegr1::Dirq14Eg,
9519 dpsiegr1::Dirq14Eg,
9520 Dpsiegr1_SPEC,
9521 crate::common::RW,
9522 > {
9523 crate::common::RegisterField::<
9524 6,
9525 0x1,
9526 1,
9527 0,
9528 dpsiegr1::Dirq14Eg,
9529 dpsiegr1::Dirq14Eg,
9530 Dpsiegr1_SPEC,
9531 crate::common::RW,
9532 >::from_register(self, 0)
9533 }
9534
9535 #[doc = "IRQ15-DS Pin Edge Select"]
9536 #[inline(always)]
9537 pub fn dirq15eg(
9538 self,
9539 ) -> crate::common::RegisterField<
9540 7,
9541 0x1,
9542 1,
9543 0,
9544 dpsiegr1::Dirq15Eg,
9545 dpsiegr1::Dirq15Eg,
9546 Dpsiegr1_SPEC,
9547 crate::common::RW,
9548 > {
9549 crate::common::RegisterField::<
9550 7,
9551 0x1,
9552 1,
9553 0,
9554 dpsiegr1::Dirq15Eg,
9555 dpsiegr1::Dirq15Eg,
9556 Dpsiegr1_SPEC,
9557 crate::common::RW,
9558 >::from_register(self, 0)
9559 }
9560}
9561impl ::core::default::Default for Dpsiegr1 {
9562 #[inline(always)]
9563 fn default() -> Dpsiegr1 {
9564 <crate::RegValueT<Dpsiegr1_SPEC> as RegisterValue<_>>::new(0)
9565 }
9566}
9567pub mod dpsiegr1 {
9568
9569 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9570 pub struct Dirq8Eg_SPEC;
9571 pub type Dirq8Eg = crate::EnumBitfieldStruct<u8, Dirq8Eg_SPEC>;
9572 impl Dirq8Eg {
9573 #[doc = "A cancel request is generated at a falling edge."]
9574 pub const _0: Self = Self::new(0);
9575
9576 #[doc = "A cancel request is generated at a rising edge."]
9577 pub const _1: Self = Self::new(1);
9578 }
9579 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9580 pub struct Dirq9Eg_SPEC;
9581 pub type Dirq9Eg = crate::EnumBitfieldStruct<u8, Dirq9Eg_SPEC>;
9582 impl Dirq9Eg {
9583 #[doc = "A cancel request is generated at a falling edge."]
9584 pub const _0: Self = Self::new(0);
9585
9586 #[doc = "A cancel request is generated at a rising edge."]
9587 pub const _1: Self = Self::new(1);
9588 }
9589 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9590 pub struct Dirq10Eg_SPEC;
9591 pub type Dirq10Eg = crate::EnumBitfieldStruct<u8, Dirq10Eg_SPEC>;
9592 impl Dirq10Eg {
9593 #[doc = "A cancel request is generated at a falling edge."]
9594 pub const _0: Self = Self::new(0);
9595
9596 #[doc = "A cancel request is generated at a rising edge"]
9597 pub const _1: Self = Self::new(1);
9598 }
9599 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9600 pub struct Dirq11Eg_SPEC;
9601 pub type Dirq11Eg = crate::EnumBitfieldStruct<u8, Dirq11Eg_SPEC>;
9602 impl Dirq11Eg {
9603 #[doc = "A cancel request is generated at a falling edge."]
9604 pub const _0: Self = Self::new(0);
9605
9606 #[doc = "A cancel request is generated at a rising edge."]
9607 pub const _1: Self = Self::new(1);
9608 }
9609 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9610 pub struct Dirq12Eg_SPEC;
9611 pub type Dirq12Eg = crate::EnumBitfieldStruct<u8, Dirq12Eg_SPEC>;
9612 impl Dirq12Eg {
9613 #[doc = "A cancel request is generated at a falling edge."]
9614 pub const _0: Self = Self::new(0);
9615
9616 #[doc = "A cancel request is generated at a rising edge."]
9617 pub const _1: Self = Self::new(1);
9618 }
9619 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9620 pub struct Dirq14Eg_SPEC;
9621 pub type Dirq14Eg = crate::EnumBitfieldStruct<u8, Dirq14Eg_SPEC>;
9622 impl Dirq14Eg {
9623 #[doc = "A cancel request is generated at a falling edge."]
9624 pub const _0: Self = Self::new(0);
9625
9626 #[doc = "A cancel request is generated at a rising edge."]
9627 pub const _1: Self = Self::new(1);
9628 }
9629 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9630 pub struct Dirq15Eg_SPEC;
9631 pub type Dirq15Eg = crate::EnumBitfieldStruct<u8, Dirq15Eg_SPEC>;
9632 impl Dirq15Eg {
9633 #[doc = "A cancel request is generated at a falling edge."]
9634 pub const _0: Self = Self::new(0);
9635
9636 #[doc = "A cancel request is generated at a rising edge."]
9637 pub const _1: Self = Self::new(1);
9638 }
9639}
9640#[doc(hidden)]
9641#[derive(Copy, Clone, Eq, PartialEq)]
9642pub struct Dpsiegr2_SPEC;
9643impl crate::sealed::RegSpec for Dpsiegr2_SPEC {
9644 type DataType = u8;
9645}
9646
9647#[doc = "Deep Software Standby Interrupt Edge Register 2"]
9648pub type Dpsiegr2 = crate::RegValueT<Dpsiegr2_SPEC>;
9649
9650impl Dpsiegr2 {
9651 #[doc = "LVD1 Edge Select"]
9652 #[inline(always)]
9653 pub fn dlvd1eg(
9654 self,
9655 ) -> crate::common::RegisterField<
9656 0,
9657 0x1,
9658 1,
9659 0,
9660 dpsiegr2::Dlvd1Eg,
9661 dpsiegr2::Dlvd1Eg,
9662 Dpsiegr2_SPEC,
9663 crate::common::RW,
9664 > {
9665 crate::common::RegisterField::<
9666 0,
9667 0x1,
9668 1,
9669 0,
9670 dpsiegr2::Dlvd1Eg,
9671 dpsiegr2::Dlvd1Eg,
9672 Dpsiegr2_SPEC,
9673 crate::common::RW,
9674 >::from_register(self, 0)
9675 }
9676
9677 #[doc = "LVD2 Edge Select"]
9678 #[inline(always)]
9679 pub fn dlvd2eg(
9680 self,
9681 ) -> crate::common::RegisterField<
9682 1,
9683 0x1,
9684 1,
9685 0,
9686 dpsiegr2::Dlvd2Eg,
9687 dpsiegr2::Dlvd2Eg,
9688 Dpsiegr2_SPEC,
9689 crate::common::RW,
9690 > {
9691 crate::common::RegisterField::<
9692 1,
9693 0x1,
9694 1,
9695 0,
9696 dpsiegr2::Dlvd2Eg,
9697 dpsiegr2::Dlvd2Eg,
9698 Dpsiegr2_SPEC,
9699 crate::common::RW,
9700 >::from_register(self, 0)
9701 }
9702
9703 #[doc = "NMI Pin Edge Select"]
9704 #[inline(always)]
9705 pub fn dnmieg(
9706 self,
9707 ) -> crate::common::RegisterField<
9708 4,
9709 0x1,
9710 1,
9711 0,
9712 dpsiegr2::Dnmieg,
9713 dpsiegr2::Dnmieg,
9714 Dpsiegr2_SPEC,
9715 crate::common::RW,
9716 > {
9717 crate::common::RegisterField::<
9718 4,
9719 0x1,
9720 1,
9721 0,
9722 dpsiegr2::Dnmieg,
9723 dpsiegr2::Dnmieg,
9724 Dpsiegr2_SPEC,
9725 crate::common::RW,
9726 >::from_register(self, 0)
9727 }
9728}
9729impl ::core::default::Default for Dpsiegr2 {
9730 #[inline(always)]
9731 fn default() -> Dpsiegr2 {
9732 <crate::RegValueT<Dpsiegr2_SPEC> as RegisterValue<_>>::new(0)
9733 }
9734}
9735pub mod dpsiegr2 {
9736
9737 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9738 pub struct Dlvd1Eg_SPEC;
9739 pub type Dlvd1Eg = crate::EnumBitfieldStruct<u8, Dlvd1Eg_SPEC>;
9740 impl Dlvd1Eg {
9741 #[doc = "A cancel request is generated when VCC < Vdet1 (fall) is detected"]
9742 pub const _0: Self = Self::new(0);
9743
9744 #[doc = "A cancel request is generated when VCC ≥ Vdet1 (rise) is detected"]
9745 pub const _1: Self = Self::new(1);
9746 }
9747 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9748 pub struct Dlvd2Eg_SPEC;
9749 pub type Dlvd2Eg = crate::EnumBitfieldStruct<u8, Dlvd2Eg_SPEC>;
9750 impl Dlvd2Eg {
9751 #[doc = "A cancel request is generated when VCC < Vdet2 (fall) is detected"]
9752 pub const _0: Self = Self::new(0);
9753
9754 #[doc = "A cancel request is generated when VCC ≥ Vdet2 (rise) is detected"]
9755 pub const _1: Self = Self::new(1);
9756 }
9757 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9758 pub struct Dnmieg_SPEC;
9759 pub type Dnmieg = crate::EnumBitfieldStruct<u8, Dnmieg_SPEC>;
9760 impl Dnmieg {
9761 #[doc = "A cancel request is generated at a falling edge"]
9762 pub const _0: Self = Self::new(0);
9763
9764 #[doc = "A cancel request is generated at a rising edge"]
9765 pub const _1: Self = Self::new(1);
9766 }
9767}
9768#[doc(hidden)]
9769#[derive(Copy, Clone, Eq, PartialEq)]
9770pub struct Syocdcr_SPEC;
9771impl crate::sealed::RegSpec for Syocdcr_SPEC {
9772 type DataType = u8;
9773}
9774
9775#[doc = "System Control OCD Control Register"]
9776pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
9777
9778impl Syocdcr {
9779 #[doc = "Deep Software Standby OCD flag"]
9780 #[inline(always)]
9781 pub fn docdf(
9782 self,
9783 ) -> crate::common::RegisterField<
9784 0,
9785 0x1,
9786 1,
9787 0,
9788 syocdcr::Docdf,
9789 syocdcr::Docdf,
9790 Syocdcr_SPEC,
9791 crate::common::RW,
9792 > {
9793 crate::common::RegisterField::<
9794 0,
9795 0x1,
9796 1,
9797 0,
9798 syocdcr::Docdf,
9799 syocdcr::Docdf,
9800 Syocdcr_SPEC,
9801 crate::common::RW,
9802 >::from_register(self, 0)
9803 }
9804
9805 #[doc = "Debugger Enable bit"]
9806 #[inline(always)]
9807 pub fn dbgen(
9808 self,
9809 ) -> crate::common::RegisterField<
9810 7,
9811 0x1,
9812 1,
9813 0,
9814 syocdcr::Dbgen,
9815 syocdcr::Dbgen,
9816 Syocdcr_SPEC,
9817 crate::common::RW,
9818 > {
9819 crate::common::RegisterField::<
9820 7,
9821 0x1,
9822 1,
9823 0,
9824 syocdcr::Dbgen,
9825 syocdcr::Dbgen,
9826 Syocdcr_SPEC,
9827 crate::common::RW,
9828 >::from_register(self, 0)
9829 }
9830}
9831impl ::core::default::Default for Syocdcr {
9832 #[inline(always)]
9833 fn default() -> Syocdcr {
9834 <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
9835 }
9836}
9837pub mod syocdcr {
9838
9839 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9840 pub struct Docdf_SPEC;
9841 pub type Docdf = crate::EnumBitfieldStruct<u8, Docdf_SPEC>;
9842 impl Docdf {
9843 #[doc = "DBIRQ is not generated"]
9844 pub const _0: Self = Self::new(0);
9845
9846 #[doc = "DBIRQ is generated"]
9847 pub const _1: Self = Self::new(1);
9848 }
9849 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9850 pub struct Dbgen_SPEC;
9851 pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
9852 impl Dbgen {
9853 #[doc = "On-chip debugger is disabled"]
9854 pub const _0: Self = Self::new(0);
9855
9856 #[doc = "On-chip debugger is enabled"]
9857 pub const _1: Self = Self::new(1);
9858 }
9859}
9860#[doc(hidden)]
9861#[derive(Copy, Clone, Eq, PartialEq)]
9862pub struct Rstsr0_SPEC;
9863impl crate::sealed::RegSpec for Rstsr0_SPEC {
9864 type DataType = u8;
9865}
9866
9867#[doc = "Reset Status Register 0"]
9868pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
9869
9870impl Rstsr0 {
9871 #[doc = "Power-On Reset Detect Flag"]
9872 #[inline(always)]
9873 pub fn porf(
9874 self,
9875 ) -> crate::common::RegisterField<
9876 0,
9877 0x1,
9878 1,
9879 0,
9880 rstsr0::Porf,
9881 rstsr0::Porf,
9882 Rstsr0_SPEC,
9883 crate::common::RW,
9884 > {
9885 crate::common::RegisterField::<
9886 0,
9887 0x1,
9888 1,
9889 0,
9890 rstsr0::Porf,
9891 rstsr0::Porf,
9892 Rstsr0_SPEC,
9893 crate::common::RW,
9894 >::from_register(self, 0)
9895 }
9896
9897 #[doc = "Voltage Monitor 0 Reset Detect Flag"]
9898 #[inline(always)]
9899 pub fn lvd0rf(
9900 self,
9901 ) -> crate::common::RegisterField<
9902 1,
9903 0x1,
9904 1,
9905 0,
9906 rstsr0::Lvd0Rf,
9907 rstsr0::Lvd0Rf,
9908 Rstsr0_SPEC,
9909 crate::common::RW,
9910 > {
9911 crate::common::RegisterField::<
9912 1,
9913 0x1,
9914 1,
9915 0,
9916 rstsr0::Lvd0Rf,
9917 rstsr0::Lvd0Rf,
9918 Rstsr0_SPEC,
9919 crate::common::RW,
9920 >::from_register(self, 0)
9921 }
9922
9923 #[doc = "Voltage Monitor 1 Reset Detect Flag"]
9924 #[inline(always)]
9925 pub fn lvd1rf(
9926 self,
9927 ) -> crate::common::RegisterField<
9928 2,
9929 0x1,
9930 1,
9931 0,
9932 rstsr0::Lvd1Rf,
9933 rstsr0::Lvd1Rf,
9934 Rstsr0_SPEC,
9935 crate::common::RW,
9936 > {
9937 crate::common::RegisterField::<
9938 2,
9939 0x1,
9940 1,
9941 0,
9942 rstsr0::Lvd1Rf,
9943 rstsr0::Lvd1Rf,
9944 Rstsr0_SPEC,
9945 crate::common::RW,
9946 >::from_register(self, 0)
9947 }
9948
9949 #[doc = "Voltage Monitor 2 Reset Detect Flag"]
9950 #[inline(always)]
9951 pub fn lvd2rf(
9952 self,
9953 ) -> crate::common::RegisterField<
9954 3,
9955 0x1,
9956 1,
9957 0,
9958 rstsr0::Lvd2Rf,
9959 rstsr0::Lvd2Rf,
9960 Rstsr0_SPEC,
9961 crate::common::RW,
9962 > {
9963 crate::common::RegisterField::<
9964 3,
9965 0x1,
9966 1,
9967 0,
9968 rstsr0::Lvd2Rf,
9969 rstsr0::Lvd2Rf,
9970 Rstsr0_SPEC,
9971 crate::common::RW,
9972 >::from_register(self, 0)
9973 }
9974
9975 #[doc = "Deep Software Standby Reset Detect Flag"]
9976 #[inline(always)]
9977 pub fn dpsrstf(
9978 self,
9979 ) -> crate::common::RegisterField<
9980 7,
9981 0x1,
9982 1,
9983 0,
9984 rstsr0::Dpsrstf,
9985 rstsr0::Dpsrstf,
9986 Rstsr0_SPEC,
9987 crate::common::RW,
9988 > {
9989 crate::common::RegisterField::<
9990 7,
9991 0x1,
9992 1,
9993 0,
9994 rstsr0::Dpsrstf,
9995 rstsr0::Dpsrstf,
9996 Rstsr0_SPEC,
9997 crate::common::RW,
9998 >::from_register(self, 0)
9999 }
10000}
10001impl ::core::default::Default for Rstsr0 {
10002 #[inline(always)]
10003 fn default() -> Rstsr0 {
10004 <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
10005 }
10006}
10007pub mod rstsr0 {
10008
10009 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10010 pub struct Porf_SPEC;
10011 pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
10012 impl Porf {
10013 #[doc = "Power-on reset not detected"]
10014 pub const _0: Self = Self::new(0);
10015
10016 #[doc = "Power-on reset detected"]
10017 pub const _1: Self = Self::new(1);
10018 }
10019 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10020 pub struct Lvd0Rf_SPEC;
10021 pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
10022 impl Lvd0Rf {
10023 #[doc = "Voltage monitor 0 reset not detected"]
10024 pub const _0: Self = Self::new(0);
10025
10026 #[doc = "Voltage monitor 0 reset detected"]
10027 pub const _1: Self = Self::new(1);
10028 }
10029 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10030 pub struct Lvd1Rf_SPEC;
10031 pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
10032 impl Lvd1Rf {
10033 #[doc = "Voltage monitor 1 reset not detected"]
10034 pub const _0: Self = Self::new(0);
10035
10036 #[doc = "Voltage monitor 1 reset detected"]
10037 pub const _1: Self = Self::new(1);
10038 }
10039 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10040 pub struct Lvd2Rf_SPEC;
10041 pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
10042 impl Lvd2Rf {
10043 #[doc = "Voltage monitor 2 reset not detected"]
10044 pub const _0: Self = Self::new(0);
10045
10046 #[doc = "Voltage monitor 2 reset detected"]
10047 pub const _1: Self = Self::new(1);
10048 }
10049 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10050 pub struct Dpsrstf_SPEC;
10051 pub type Dpsrstf = crate::EnumBitfieldStruct<u8, Dpsrstf_SPEC>;
10052 impl Dpsrstf {
10053 #[doc = "Deep software standby mode cancellation not requested by an interrupt."]
10054 pub const _0: Self = Self::new(0);
10055
10056 #[doc = "Deep software standby mode cancellation requested by an interrupt."]
10057 pub const _1: Self = Self::new(1);
10058 }
10059}
10060#[doc(hidden)]
10061#[derive(Copy, Clone, Eq, PartialEq)]
10062pub struct Rstsr2_SPEC;
10063impl crate::sealed::RegSpec for Rstsr2_SPEC {
10064 type DataType = u8;
10065}
10066
10067#[doc = "Reset Status Register 2"]
10068pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
10069
10070impl Rstsr2 {
10071 #[doc = "Cold/Warm Start Determination Flag"]
10072 #[inline(always)]
10073 pub fn cwsf(
10074 self,
10075 ) -> crate::common::RegisterField<
10076 0,
10077 0x1,
10078 1,
10079 0,
10080 rstsr2::Cwsf,
10081 rstsr2::Cwsf,
10082 Rstsr2_SPEC,
10083 crate::common::RW,
10084 > {
10085 crate::common::RegisterField::<
10086 0,
10087 0x1,
10088 1,
10089 0,
10090 rstsr2::Cwsf,
10091 rstsr2::Cwsf,
10092 Rstsr2_SPEC,
10093 crate::common::RW,
10094 >::from_register(self, 0)
10095 }
10096}
10097impl ::core::default::Default for Rstsr2 {
10098 #[inline(always)]
10099 fn default() -> Rstsr2 {
10100 <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
10101 }
10102}
10103pub mod rstsr2 {
10104
10105 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10106 pub struct Cwsf_SPEC;
10107 pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
10108 impl Cwsf {
10109 #[doc = "Cold start"]
10110 pub const _0: Self = Self::new(0);
10111
10112 #[doc = "Warm start"]
10113 pub const _1: Self = Self::new(1);
10114 }
10115}
10116#[doc(hidden)]
10117#[derive(Copy, Clone, Eq, PartialEq)]
10118pub struct Momcr_SPEC;
10119impl crate::sealed::RegSpec for Momcr_SPEC {
10120 type DataType = u8;
10121}
10122
10123#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
10124pub type Momcr = crate::RegValueT<Momcr_SPEC>;
10125
10126impl Momcr {
10127 #[doc = "Main Clock Oscillator Drive Capability 0 Switching"]
10128 #[inline(always)]
10129 pub fn modrv(
10130 self,
10131 ) -> crate::common::RegisterField<
10132 4,
10133 0x3,
10134 1,
10135 0,
10136 momcr::Modrv,
10137 momcr::Modrv,
10138 Momcr_SPEC,
10139 crate::common::RW,
10140 > {
10141 crate::common::RegisterField::<
10142 4,
10143 0x3,
10144 1,
10145 0,
10146 momcr::Modrv,
10147 momcr::Modrv,
10148 Momcr_SPEC,
10149 crate::common::RW,
10150 >::from_register(self, 0)
10151 }
10152
10153 #[doc = "Main Clock Oscillator Switching"]
10154 #[inline(always)]
10155 pub fn mosel(
10156 self,
10157 ) -> crate::common::RegisterField<
10158 6,
10159 0x1,
10160 1,
10161 0,
10162 momcr::Mosel,
10163 momcr::Mosel,
10164 Momcr_SPEC,
10165 crate::common::RW,
10166 > {
10167 crate::common::RegisterField::<
10168 6,
10169 0x1,
10170 1,
10171 0,
10172 momcr::Mosel,
10173 momcr::Mosel,
10174 Momcr_SPEC,
10175 crate::common::RW,
10176 >::from_register(self, 0)
10177 }
10178}
10179impl ::core::default::Default for Momcr {
10180 #[inline(always)]
10181 fn default() -> Momcr {
10182 <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(0)
10183 }
10184}
10185pub mod momcr {
10186
10187 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10188 pub struct Modrv_SPEC;
10189 pub type Modrv = crate::EnumBitfieldStruct<u8, Modrv_SPEC>;
10190 impl Modrv {
10191 #[doc = "20 MHz to 24 MHz"]
10192 pub const _00: Self = Self::new(0);
10193
10194 #[doc = "16 MHz to 20 MHz"]
10195 pub const _01: Self = Self::new(1);
10196
10197 #[doc = "8 MHz to 16 MHz"]
10198 pub const _10: Self = Self::new(2);
10199
10200 #[doc = "8 MHz"]
10201 pub const _11: Self = Self::new(3);
10202 }
10203 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10204 pub struct Mosel_SPEC;
10205 pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
10206 impl Mosel {
10207 #[doc = "Resonator"]
10208 pub const _0: Self = Self::new(0);
10209
10210 #[doc = "External clock input"]
10211 pub const _1: Self = Self::new(1);
10212 }
10213}
10214#[doc(hidden)]
10215#[derive(Copy, Clone, Eq, PartialEq)]
10216pub struct Fwepror_SPEC;
10217impl crate::sealed::RegSpec for Fwepror_SPEC {
10218 type DataType = u8;
10219}
10220
10221#[doc = "Flash P/E Protect Register"]
10222pub type Fwepror = crate::RegValueT<Fwepror_SPEC>;
10223
10224impl Fwepror {
10225 #[doc = "Flash Programming and Erasure"]
10226 #[inline(always)]
10227 pub fn flwe(
10228 self,
10229 ) -> crate::common::RegisterField<
10230 0,
10231 0x3,
10232 1,
10233 0,
10234 fwepror::Flwe,
10235 fwepror::Flwe,
10236 Fwepror_SPEC,
10237 crate::common::RW,
10238 > {
10239 crate::common::RegisterField::<
10240 0,
10241 0x3,
10242 1,
10243 0,
10244 fwepror::Flwe,
10245 fwepror::Flwe,
10246 Fwepror_SPEC,
10247 crate::common::RW,
10248 >::from_register(self, 0)
10249 }
10250}
10251impl ::core::default::Default for Fwepror {
10252 #[inline(always)]
10253 fn default() -> Fwepror {
10254 <crate::RegValueT<Fwepror_SPEC> as RegisterValue<_>>::new(2)
10255 }
10256}
10257pub mod fwepror {
10258
10259 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10260 pub struct Flwe_SPEC;
10261 pub type Flwe = crate::EnumBitfieldStruct<u8, Flwe_SPEC>;
10262 impl Flwe {
10263 #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10264 pub const _00: Self = Self::new(0);
10265
10266 #[doc = "Permits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10267 pub const _01: Self = Self::new(1);
10268
10269 #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10270 pub const _10: Self = Self::new(2);
10271
10272 #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10273 pub const _11: Self = Self::new(3);
10274 }
10275}
10276#[doc(hidden)]
10277#[derive(Copy, Clone, Eq, PartialEq)]
10278pub struct Lvd1Cmpcr_SPEC;
10279impl crate::sealed::RegSpec for Lvd1Cmpcr_SPEC {
10280 type DataType = u8;
10281}
10282
10283#[doc = "Voltage Monitoring 1 Comparator Control Register"]
10284pub type Lvd1Cmpcr = crate::RegValueT<Lvd1Cmpcr_SPEC>;
10285
10286impl Lvd1Cmpcr {
10287 #[doc = "Voltage Detection 1 Level Select (Standard voltage during drop in voltage)"]
10288 #[inline(always)]
10289 pub fn lvd1lvl(
10290 self,
10291 ) -> crate::common::RegisterField<
10292 0,
10293 0x1f,
10294 1,
10295 0,
10296 lvd1cmpcr::Lvd1Lvl,
10297 lvd1cmpcr::Lvd1Lvl,
10298 Lvd1Cmpcr_SPEC,
10299 crate::common::RW,
10300 > {
10301 crate::common::RegisterField::<
10302 0,
10303 0x1f,
10304 1,
10305 0,
10306 lvd1cmpcr::Lvd1Lvl,
10307 lvd1cmpcr::Lvd1Lvl,
10308 Lvd1Cmpcr_SPEC,
10309 crate::common::RW,
10310 >::from_register(self, 0)
10311 }
10312
10313 #[doc = "Voltage Detection 1 Enable"]
10314 #[inline(always)]
10315 pub fn lvd1e(
10316 self,
10317 ) -> crate::common::RegisterField<
10318 7,
10319 0x1,
10320 1,
10321 0,
10322 lvd1cmpcr::Lvd1E,
10323 lvd1cmpcr::Lvd1E,
10324 Lvd1Cmpcr_SPEC,
10325 crate::common::RW,
10326 > {
10327 crate::common::RegisterField::<
10328 7,
10329 0x1,
10330 1,
10331 0,
10332 lvd1cmpcr::Lvd1E,
10333 lvd1cmpcr::Lvd1E,
10334 Lvd1Cmpcr_SPEC,
10335 crate::common::RW,
10336 >::from_register(self, 0)
10337 }
10338}
10339impl ::core::default::Default for Lvd1Cmpcr {
10340 #[inline(always)]
10341 fn default() -> Lvd1Cmpcr {
10342 <crate::RegValueT<Lvd1Cmpcr_SPEC> as RegisterValue<_>>::new(19)
10343 }
10344}
10345pub mod lvd1cmpcr {
10346
10347 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10348 pub struct Lvd1Lvl_SPEC;
10349 pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
10350 impl Lvd1Lvl {
10351 #[doc = "2.99 V (Vdet1_1)"]
10352 pub const _0_X_11: Self = Self::new(17);
10353
10354 #[doc = "2.92 V (Vdet1_2)"]
10355 pub const _0_X_12: Self = Self::new(18);
10356
10357 #[doc = "2.85 V (Vdet1_3)"]
10358 pub const _0_X_13: Self = Self::new(19);
10359 }
10360 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10361 pub struct Lvd1E_SPEC;
10362 pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
10363 impl Lvd1E {
10364 #[doc = "Voltage detection 1 circuit disabled"]
10365 pub const _0: Self = Self::new(0);
10366
10367 #[doc = "Voltage detection 1 circuit enabled"]
10368 pub const _1: Self = Self::new(1);
10369 }
10370}
10371#[doc(hidden)]
10372#[derive(Copy, Clone, Eq, PartialEq)]
10373pub struct Lvd2Cmpcr_SPEC;
10374impl crate::sealed::RegSpec for Lvd2Cmpcr_SPEC {
10375 type DataType = u8;
10376}
10377
10378#[doc = "Voltage Monitoring 2 Comparator Control Register"]
10379pub type Lvd2Cmpcr = crate::RegValueT<Lvd2Cmpcr_SPEC>;
10380
10381impl Lvd2Cmpcr {
10382 #[doc = "Voltage Detection 2 Level Select (Standard voltage during drop in voltage)"]
10383 #[inline(always)]
10384 pub fn lvd2lvl(
10385 self,
10386 ) -> crate::common::RegisterField<
10387 0,
10388 0x7,
10389 1,
10390 0,
10391 lvd2cmpcr::Lvd2Lvl,
10392 lvd2cmpcr::Lvd2Lvl,
10393 Lvd2Cmpcr_SPEC,
10394 crate::common::RW,
10395 > {
10396 crate::common::RegisterField::<
10397 0,
10398 0x7,
10399 1,
10400 0,
10401 lvd2cmpcr::Lvd2Lvl,
10402 lvd2cmpcr::Lvd2Lvl,
10403 Lvd2Cmpcr_SPEC,
10404 crate::common::RW,
10405 >::from_register(self, 0)
10406 }
10407
10408 #[doc = "Voltage Detection 2 Enable"]
10409 #[inline(always)]
10410 pub fn lvd2e(
10411 self,
10412 ) -> crate::common::RegisterField<
10413 7,
10414 0x1,
10415 1,
10416 0,
10417 lvd2cmpcr::Lvd2E,
10418 lvd2cmpcr::Lvd2E,
10419 Lvd2Cmpcr_SPEC,
10420 crate::common::RW,
10421 > {
10422 crate::common::RegisterField::<
10423 7,
10424 0x1,
10425 1,
10426 0,
10427 lvd2cmpcr::Lvd2E,
10428 lvd2cmpcr::Lvd2E,
10429 Lvd2Cmpcr_SPEC,
10430 crate::common::RW,
10431 >::from_register(self, 0)
10432 }
10433}
10434impl ::core::default::Default for Lvd2Cmpcr {
10435 #[inline(always)]
10436 fn default() -> Lvd2Cmpcr {
10437 <crate::RegValueT<Lvd2Cmpcr_SPEC> as RegisterValue<_>>::new(7)
10438 }
10439}
10440pub mod lvd2cmpcr {
10441
10442 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10443 pub struct Lvd2Lvl_SPEC;
10444 pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
10445 impl Lvd2Lvl {
10446 #[doc = "2.99 V (Vdet2_1)"]
10447 pub const _101: Self = Self::new(5);
10448
10449 #[doc = "2.92 V (Vdet2_2)"]
10450 pub const _110: Self = Self::new(6);
10451
10452 #[doc = "2.85 V (Vdet2_3)"]
10453 pub const _111: Self = Self::new(7);
10454 }
10455 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10456 pub struct Lvd2E_SPEC;
10457 pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
10458 impl Lvd2E {
10459 #[doc = "Voltage detection 2 circuit disabled"]
10460 pub const _0: Self = Self::new(0);
10461
10462 #[doc = "Voltage detection 2 circuit enabled"]
10463 pub const _1: Self = Self::new(1);
10464 }
10465}
10466#[doc(hidden)]
10467#[derive(Copy, Clone, Eq, PartialEq)]
10468pub struct Lvd1Cr0_SPEC;
10469impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
10470 type DataType = u8;
10471}
10472
10473#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
10474pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
10475
10476impl Lvd1Cr0 {
10477 #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
10478 #[inline(always)]
10479 pub fn rie(
10480 self,
10481 ) -> crate::common::RegisterField<
10482 0,
10483 0x1,
10484 1,
10485 0,
10486 lvd1cr0::Rie,
10487 lvd1cr0::Rie,
10488 Lvd1Cr0_SPEC,
10489 crate::common::RW,
10490 > {
10491 crate::common::RegisterField::<
10492 0,
10493 0x1,
10494 1,
10495 0,
10496 lvd1cr0::Rie,
10497 lvd1cr0::Rie,
10498 Lvd1Cr0_SPEC,
10499 crate::common::RW,
10500 >::from_register(self, 0)
10501 }
10502
10503 #[doc = "Voltage monitor 1 Digital Filter Disabled Mode Select"]
10504 #[inline(always)]
10505 pub fn dfdis(
10506 self,
10507 ) -> crate::common::RegisterField<
10508 1,
10509 0x1,
10510 1,
10511 0,
10512 lvd1cr0::Dfdis,
10513 lvd1cr0::Dfdis,
10514 Lvd1Cr0_SPEC,
10515 crate::common::RW,
10516 > {
10517 crate::common::RegisterField::<
10518 1,
10519 0x1,
10520 1,
10521 0,
10522 lvd1cr0::Dfdis,
10523 lvd1cr0::Dfdis,
10524 Lvd1Cr0_SPEC,
10525 crate::common::RW,
10526 >::from_register(self, 0)
10527 }
10528
10529 #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
10530 #[inline(always)]
10531 pub fn cmpe(
10532 self,
10533 ) -> crate::common::RegisterField<
10534 2,
10535 0x1,
10536 1,
10537 0,
10538 lvd1cr0::Cmpe,
10539 lvd1cr0::Cmpe,
10540 Lvd1Cr0_SPEC,
10541 crate::common::RW,
10542 > {
10543 crate::common::RegisterField::<
10544 2,
10545 0x1,
10546 1,
10547 0,
10548 lvd1cr0::Cmpe,
10549 lvd1cr0::Cmpe,
10550 Lvd1Cr0_SPEC,
10551 crate::common::RW,
10552 >::from_register(self, 0)
10553 }
10554
10555 #[doc = "Sampling Clock Select"]
10556 #[inline(always)]
10557 pub fn fsamp(
10558 self,
10559 ) -> crate::common::RegisterField<
10560 4,
10561 0x3,
10562 1,
10563 0,
10564 lvd1cr0::Fsamp,
10565 lvd1cr0::Fsamp,
10566 Lvd1Cr0_SPEC,
10567 crate::common::RW,
10568 > {
10569 crate::common::RegisterField::<
10570 4,
10571 0x3,
10572 1,
10573 0,
10574 lvd1cr0::Fsamp,
10575 lvd1cr0::Fsamp,
10576 Lvd1Cr0_SPEC,
10577 crate::common::RW,
10578 >::from_register(self, 0)
10579 }
10580
10581 #[doc = "Voltage Monitor 1 Circuit Mode Select"]
10582 #[inline(always)]
10583 pub fn ri(
10584 self,
10585 ) -> crate::common::RegisterField<
10586 6,
10587 0x1,
10588 1,
10589 0,
10590 lvd1cr0::Ri,
10591 lvd1cr0::Ri,
10592 Lvd1Cr0_SPEC,
10593 crate::common::RW,
10594 > {
10595 crate::common::RegisterField::<
10596 6,
10597 0x1,
10598 1,
10599 0,
10600 lvd1cr0::Ri,
10601 lvd1cr0::Ri,
10602 Lvd1Cr0_SPEC,
10603 crate::common::RW,
10604 >::from_register(self, 0)
10605 }
10606
10607 #[doc = "Voltage Monitor 1 Reset Negate Select"]
10608 #[inline(always)]
10609 pub fn rn(
10610 self,
10611 ) -> crate::common::RegisterField<
10612 7,
10613 0x1,
10614 1,
10615 0,
10616 lvd1cr0::Rn,
10617 lvd1cr0::Rn,
10618 Lvd1Cr0_SPEC,
10619 crate::common::RW,
10620 > {
10621 crate::common::RegisterField::<
10622 7,
10623 0x1,
10624 1,
10625 0,
10626 lvd1cr0::Rn,
10627 lvd1cr0::Rn,
10628 Lvd1Cr0_SPEC,
10629 crate::common::RW,
10630 >::from_register(self, 0)
10631 }
10632}
10633impl ::core::default::Default for Lvd1Cr0 {
10634 #[inline(always)]
10635 fn default() -> Lvd1Cr0 {
10636 <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(130)
10637 }
10638}
10639pub mod lvd1cr0 {
10640
10641 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10642 pub struct Rie_SPEC;
10643 pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
10644 impl Rie {
10645 #[doc = "Disable"]
10646 pub const _0: Self = Self::new(0);
10647
10648 #[doc = "Enable"]
10649 pub const _1: Self = Self::new(1);
10650 }
10651 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10652 pub struct Dfdis_SPEC;
10653 pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
10654 impl Dfdis {
10655 #[doc = "Enable the digital filter"]
10656 pub const _0: Self = Self::new(0);
10657
10658 #[doc = "Disable the digital filter"]
10659 pub const _1: Self = Self::new(1);
10660 }
10661 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10662 pub struct Cmpe_SPEC;
10663 pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
10664 impl Cmpe {
10665 #[doc = "Disable voltage monitor 1 circuit comparison result output"]
10666 pub const _0: Self = Self::new(0);
10667
10668 #[doc = "Enable voltage monitor 1 circuit comparison result output"]
10669 pub const _1: Self = Self::new(1);
10670 }
10671 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10672 pub struct Fsamp_SPEC;
10673 pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
10674 impl Fsamp {
10675 #[doc = "1/2 LOCO frequency"]
10676 pub const _00: Self = Self::new(0);
10677
10678 #[doc = "1/4 LOCO frequency"]
10679 pub const _01: Self = Self::new(1);
10680
10681 #[doc = "1/8 LOCO frequency"]
10682 pub const _10: Self = Self::new(2);
10683
10684 #[doc = "1/16 LOCO frequency"]
10685 pub const _11: Self = Self::new(3);
10686 }
10687 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10688 pub struct Ri_SPEC;
10689 pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
10690 impl Ri {
10691 #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
10692 pub const _0: Self = Self::new(0);
10693
10694 #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
10695 pub const _1: Self = Self::new(1);
10696 }
10697 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10698 pub struct Rn_SPEC;
10699 pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
10700 impl Rn {
10701 #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
10702 pub const _0: Self = Self::new(0);
10703
10704 #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
10705 pub const _1: Self = Self::new(1);
10706 }
10707}
10708#[doc(hidden)]
10709#[derive(Copy, Clone, Eq, PartialEq)]
10710pub struct Lvd2Cr0_SPEC;
10711impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
10712 type DataType = u8;
10713}
10714
10715#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
10716pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
10717
10718impl Lvd2Cr0 {
10719 #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
10720 #[inline(always)]
10721 pub fn rie(
10722 self,
10723 ) -> crate::common::RegisterField<
10724 0,
10725 0x1,
10726 1,
10727 0,
10728 lvd2cr0::Rie,
10729 lvd2cr0::Rie,
10730 Lvd2Cr0_SPEC,
10731 crate::common::RW,
10732 > {
10733 crate::common::RegisterField::<
10734 0,
10735 0x1,
10736 1,
10737 0,
10738 lvd2cr0::Rie,
10739 lvd2cr0::Rie,
10740 Lvd2Cr0_SPEC,
10741 crate::common::RW,
10742 >::from_register(self, 0)
10743 }
10744
10745 #[doc = "Voltage monitor 2 Digital Filter Disabled Mode Select"]
10746 #[inline(always)]
10747 pub fn dfdis(
10748 self,
10749 ) -> crate::common::RegisterField<
10750 1,
10751 0x1,
10752 1,
10753 0,
10754 lvd2cr0::Dfdis,
10755 lvd2cr0::Dfdis,
10756 Lvd2Cr0_SPEC,
10757 crate::common::RW,
10758 > {
10759 crate::common::RegisterField::<
10760 1,
10761 0x1,
10762 1,
10763 0,
10764 lvd2cr0::Dfdis,
10765 lvd2cr0::Dfdis,
10766 Lvd2Cr0_SPEC,
10767 crate::common::RW,
10768 >::from_register(self, 0)
10769 }
10770
10771 #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
10772 #[inline(always)]
10773 pub fn cmpe(
10774 self,
10775 ) -> crate::common::RegisterField<
10776 2,
10777 0x1,
10778 1,
10779 0,
10780 lvd2cr0::Cmpe,
10781 lvd2cr0::Cmpe,
10782 Lvd2Cr0_SPEC,
10783 crate::common::RW,
10784 > {
10785 crate::common::RegisterField::<
10786 2,
10787 0x1,
10788 1,
10789 0,
10790 lvd2cr0::Cmpe,
10791 lvd2cr0::Cmpe,
10792 Lvd2Cr0_SPEC,
10793 crate::common::RW,
10794 >::from_register(self, 0)
10795 }
10796
10797 #[doc = "Sampling Clock Select"]
10798 #[inline(always)]
10799 pub fn fsamp(
10800 self,
10801 ) -> crate::common::RegisterField<
10802 4,
10803 0x3,
10804 1,
10805 0,
10806 lvd2cr0::Fsamp,
10807 lvd2cr0::Fsamp,
10808 Lvd2Cr0_SPEC,
10809 crate::common::RW,
10810 > {
10811 crate::common::RegisterField::<
10812 4,
10813 0x3,
10814 1,
10815 0,
10816 lvd2cr0::Fsamp,
10817 lvd2cr0::Fsamp,
10818 Lvd2Cr0_SPEC,
10819 crate::common::RW,
10820 >::from_register(self, 0)
10821 }
10822
10823 #[doc = "Voltage Monitor 2 Circuit Mode Select"]
10824 #[inline(always)]
10825 pub fn ri(
10826 self,
10827 ) -> crate::common::RegisterField<
10828 6,
10829 0x1,
10830 1,
10831 0,
10832 lvd2cr0::Ri,
10833 lvd2cr0::Ri,
10834 Lvd2Cr0_SPEC,
10835 crate::common::RW,
10836 > {
10837 crate::common::RegisterField::<
10838 6,
10839 0x1,
10840 1,
10841 0,
10842 lvd2cr0::Ri,
10843 lvd2cr0::Ri,
10844 Lvd2Cr0_SPEC,
10845 crate::common::RW,
10846 >::from_register(self, 0)
10847 }
10848
10849 #[doc = "Voltage Monitor 2 Reset Negate Select"]
10850 #[inline(always)]
10851 pub fn rn(
10852 self,
10853 ) -> crate::common::RegisterField<
10854 7,
10855 0x1,
10856 1,
10857 0,
10858 lvd2cr0::Rn,
10859 lvd2cr0::Rn,
10860 Lvd2Cr0_SPEC,
10861 crate::common::RW,
10862 > {
10863 crate::common::RegisterField::<
10864 7,
10865 0x1,
10866 1,
10867 0,
10868 lvd2cr0::Rn,
10869 lvd2cr0::Rn,
10870 Lvd2Cr0_SPEC,
10871 crate::common::RW,
10872 >::from_register(self, 0)
10873 }
10874}
10875impl ::core::default::Default for Lvd2Cr0 {
10876 #[inline(always)]
10877 fn default() -> Lvd2Cr0 {
10878 <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(130)
10879 }
10880}
10881pub mod lvd2cr0 {
10882
10883 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10884 pub struct Rie_SPEC;
10885 pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
10886 impl Rie {
10887 #[doc = "Disable"]
10888 pub const _0: Self = Self::new(0);
10889
10890 #[doc = "Enable"]
10891 pub const _1: Self = Self::new(1);
10892 }
10893 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10894 pub struct Dfdis_SPEC;
10895 pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
10896 impl Dfdis {
10897 #[doc = "Enable the digital filter"]
10898 pub const _0: Self = Self::new(0);
10899
10900 #[doc = "Disable the digital filter"]
10901 pub const _1: Self = Self::new(1);
10902 }
10903 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10904 pub struct Cmpe_SPEC;
10905 pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
10906 impl Cmpe {
10907 #[doc = "Disable voltage monitor 2 circuit comparison result output"]
10908 pub const _0: Self = Self::new(0);
10909
10910 #[doc = "Enable voltage monitor 2 circuit comparison result output"]
10911 pub const _1: Self = Self::new(1);
10912 }
10913 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10914 pub struct Fsamp_SPEC;
10915 pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
10916 impl Fsamp {
10917 #[doc = "1/2 LOCO frequency"]
10918 pub const _00: Self = Self::new(0);
10919
10920 #[doc = "1/4 LOCO frequency"]
10921 pub const _01: Self = Self::new(1);
10922
10923 #[doc = "1/8 LOCO frequency"]
10924 pub const _10: Self = Self::new(2);
10925
10926 #[doc = "1/16 LOCO frequency"]
10927 pub const _11: Self = Self::new(3);
10928 }
10929 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10930 pub struct Ri_SPEC;
10931 pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
10932 impl Ri {
10933 #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
10934 pub const _0: Self = Self::new(0);
10935
10936 #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
10937 pub const _1: Self = Self::new(1);
10938 }
10939 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10940 pub struct Rn_SPEC;
10941 pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
10942 impl Rn {
10943 #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
10944 pub const _0: Self = Self::new(0);
10945
10946 #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
10947 pub const _1: Self = Self::new(1);
10948 }
10949}
10950#[doc(hidden)]
10951#[derive(Copy, Clone, Eq, PartialEq)]
10952pub struct Vbattmnselr_SPEC;
10953impl crate::sealed::RegSpec for Vbattmnselr_SPEC {
10954 type DataType = u8;
10955}
10956
10957#[doc = "Battery Backup Voltage Monitor Function Select Register"]
10958pub type Vbattmnselr = crate::RegValueT<Vbattmnselr_SPEC>;
10959
10960impl Vbattmnselr {
10961 #[doc = "VBATT Low Voltage Detect Function Select Bit"]
10962 #[inline(always)]
10963 pub fn vbattmnsel(
10964 self,
10965 ) -> crate::common::RegisterField<
10966 0,
10967 0x1,
10968 1,
10969 0,
10970 vbattmnselr::Vbattmnsel,
10971 vbattmnselr::Vbattmnsel,
10972 Vbattmnselr_SPEC,
10973 crate::common::RW,
10974 > {
10975 crate::common::RegisterField::<
10976 0,
10977 0x1,
10978 1,
10979 0,
10980 vbattmnselr::Vbattmnsel,
10981 vbattmnselr::Vbattmnsel,
10982 Vbattmnselr_SPEC,
10983 crate::common::RW,
10984 >::from_register(self, 0)
10985 }
10986}
10987impl ::core::default::Default for Vbattmnselr {
10988 #[inline(always)]
10989 fn default() -> Vbattmnselr {
10990 <crate::RegValueT<Vbattmnselr_SPEC> as RegisterValue<_>>::new(0)
10991 }
10992}
10993pub mod vbattmnselr {
10994
10995 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10996 pub struct Vbattmnsel_SPEC;
10997 pub type Vbattmnsel = crate::EnumBitfieldStruct<u8, Vbattmnsel_SPEC>;
10998 impl Vbattmnsel {
10999 #[doc = "Disables VBATT low voltage detect function"]
11000 pub const _0: Self = Self::new(0);
11001
11002 #[doc = "Enables VBATT low voltage detect function"]
11003 pub const _1: Self = Self::new(1);
11004 }
11005}
11006#[doc(hidden)]
11007#[derive(Copy, Clone, Eq, PartialEq)]
11008pub struct Vbattmonr_SPEC;
11009impl crate::sealed::RegSpec for Vbattmonr_SPEC {
11010 type DataType = u8;
11011}
11012
11013#[doc = "Battery Backup Voltage Monitor Register"]
11014pub type Vbattmonr = crate::RegValueT<Vbattmonr_SPEC>;
11015
11016impl Vbattmonr {
11017 #[doc = "VBATT Voltage Monitor Bit"]
11018 #[inline(always)]
11019 pub fn vbattmon(
11020 self,
11021 ) -> crate::common::RegisterField<
11022 0,
11023 0x1,
11024 1,
11025 0,
11026 vbattmonr::Vbattmon,
11027 vbattmonr::Vbattmon,
11028 Vbattmonr_SPEC,
11029 crate::common::R,
11030 > {
11031 crate::common::RegisterField::<
11032 0,
11033 0x1,
11034 1,
11035 0,
11036 vbattmonr::Vbattmon,
11037 vbattmonr::Vbattmon,
11038 Vbattmonr_SPEC,
11039 crate::common::R,
11040 >::from_register(self, 0)
11041 }
11042}
11043impl ::core::default::Default for Vbattmonr {
11044 #[inline(always)]
11045 fn default() -> Vbattmonr {
11046 <crate::RegValueT<Vbattmonr_SPEC> as RegisterValue<_>>::new(0)
11047 }
11048}
11049pub mod vbattmonr {
11050
11051 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11052 pub struct Vbattmon_SPEC;
11053 pub type Vbattmon = crate::EnumBitfieldStruct<u8, Vbattmon_SPEC>;
11054 impl Vbattmon {
11055 #[doc = "VBATT ≥ Vbattldet"]
11056 pub const _0: Self = Self::new(0);
11057
11058 #[doc = "VBATT < Vbattldet"]
11059 pub const _1: Self = Self::new(1);
11060 }
11061}
11062#[doc(hidden)]
11063#[derive(Copy, Clone, Eq, PartialEq)]
11064pub struct Ldoscr_SPEC;
11065impl crate::sealed::RegSpec for Ldoscr_SPEC {
11066 type DataType = u8;
11067}
11068
11069#[doc = "LDO Stop Control Register"]
11070pub type Ldoscr = crate::RegValueT<Ldoscr_SPEC>;
11071
11072impl Ldoscr {
11073 #[doc = "LDO0 Stop"]
11074 #[inline(always)]
11075 pub fn ldostp0(
11076 self,
11077 ) -> crate::common::RegisterField<
11078 0,
11079 0x1,
11080 1,
11081 0,
11082 ldoscr::Ldostp0,
11083 ldoscr::Ldostp0,
11084 Ldoscr_SPEC,
11085 crate::common::RW,
11086 > {
11087 crate::common::RegisterField::<
11088 0,
11089 0x1,
11090 1,
11091 0,
11092 ldoscr::Ldostp0,
11093 ldoscr::Ldostp0,
11094 Ldoscr_SPEC,
11095 crate::common::RW,
11096 >::from_register(self, 0)
11097 }
11098
11099 #[doc = "LDO1 Stop"]
11100 #[inline(always)]
11101 pub fn ldostp1(
11102 self,
11103 ) -> crate::common::RegisterField<
11104 1,
11105 0x1,
11106 1,
11107 0,
11108 ldoscr::Ldostp1,
11109 ldoscr::Ldostp1,
11110 Ldoscr_SPEC,
11111 crate::common::RW,
11112 > {
11113 crate::common::RegisterField::<
11114 1,
11115 0x1,
11116 1,
11117 0,
11118 ldoscr::Ldostp1,
11119 ldoscr::Ldostp1,
11120 Ldoscr_SPEC,
11121 crate::common::RW,
11122 >::from_register(self, 0)
11123 }
11124}
11125impl ::core::default::Default for Ldoscr {
11126 #[inline(always)]
11127 fn default() -> Ldoscr {
11128 <crate::RegValueT<Ldoscr_SPEC> as RegisterValue<_>>::new(0)
11129 }
11130}
11131pub mod ldoscr {
11132
11133 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11134 pub struct Ldostp0_SPEC;
11135 pub type Ldostp0 = crate::EnumBitfieldStruct<u8, Ldostp0_SPEC>;
11136 impl Ldostp0 {
11137 #[doc = "LDO0 is enabled"]
11138 pub const _0: Self = Self::new(0);
11139
11140 #[doc = "LDO0 is stopped"]
11141 pub const _1: Self = Self::new(1);
11142 }
11143 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11144 pub struct Ldostp1_SPEC;
11145 pub type Ldostp1 = crate::EnumBitfieldStruct<u8, Ldostp1_SPEC>;
11146 impl Ldostp1 {
11147 #[doc = "LDO1 is enabled"]
11148 pub const _0: Self = Self::new(0);
11149
11150 #[doc = "LDO1 is stopped"]
11151 pub const _1: Self = Self::new(1);
11152 }
11153}
11154#[doc(hidden)]
11155#[derive(Copy, Clone, Eq, PartialEq)]
11156pub struct Pl2Ldoscr_SPEC;
11157impl crate::sealed::RegSpec for Pl2Ldoscr_SPEC {
11158 type DataType = u8;
11159}
11160
11161#[doc = "PLL2-LDO Stop Control Register"]
11162pub type Pl2Ldoscr = crate::RegValueT<Pl2Ldoscr_SPEC>;
11163
11164impl Pl2Ldoscr {
11165 #[doc = "PLL2-LDO Stop"]
11166 #[inline(always)]
11167 pub fn pl2ldostp(
11168 self,
11169 ) -> crate::common::RegisterField<
11170 0,
11171 0x1,
11172 1,
11173 0,
11174 pl2ldoscr::Pl2Ldostp,
11175 pl2ldoscr::Pl2Ldostp,
11176 Pl2Ldoscr_SPEC,
11177 crate::common::RW,
11178 > {
11179 crate::common::RegisterField::<
11180 0,
11181 0x1,
11182 1,
11183 0,
11184 pl2ldoscr::Pl2Ldostp,
11185 pl2ldoscr::Pl2Ldostp,
11186 Pl2Ldoscr_SPEC,
11187 crate::common::RW,
11188 >::from_register(self, 0)
11189 }
11190}
11191impl ::core::default::Default for Pl2Ldoscr {
11192 #[inline(always)]
11193 fn default() -> Pl2Ldoscr {
11194 <crate::RegValueT<Pl2Ldoscr_SPEC> as RegisterValue<_>>::new(0)
11195 }
11196}
11197pub mod pl2ldoscr {
11198
11199 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11200 pub struct Pl2Ldostp_SPEC;
11201 pub type Pl2Ldostp = crate::EnumBitfieldStruct<u8, Pl2Ldostp_SPEC>;
11202 impl Pl2Ldostp {
11203 #[doc = "PLL2-LDO is enabled"]
11204 pub const _0: Self = Self::new(0);
11205
11206 #[doc = "PLL2-LDO is stopped"]
11207 pub const _1: Self = Self::new(1);
11208 }
11209}
11210#[doc(hidden)]
11211#[derive(Copy, Clone, Eq, PartialEq)]
11212pub struct Sosccr_SPEC;
11213impl crate::sealed::RegSpec for Sosccr_SPEC {
11214 type DataType = u8;
11215}
11216
11217#[doc = "Sub-Clock Oscillator Control Register"]
11218pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
11219
11220impl Sosccr {
11221 #[doc = "Sub Clock Oscillator Stop"]
11222 #[inline(always)]
11223 pub fn sostp(
11224 self,
11225 ) -> crate::common::RegisterField<
11226 0,
11227 0x1,
11228 1,
11229 0,
11230 sosccr::Sostp,
11231 sosccr::Sostp,
11232 Sosccr_SPEC,
11233 crate::common::RW,
11234 > {
11235 crate::common::RegisterField::<
11236 0,
11237 0x1,
11238 1,
11239 0,
11240 sosccr::Sostp,
11241 sosccr::Sostp,
11242 Sosccr_SPEC,
11243 crate::common::RW,
11244 >::from_register(self, 0)
11245 }
11246}
11247impl ::core::default::Default for Sosccr {
11248 #[inline(always)]
11249 fn default() -> Sosccr {
11250 <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(0)
11251 }
11252}
11253pub mod sosccr {
11254
11255 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11256 pub struct Sostp_SPEC;
11257 pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
11258 impl Sostp {
11259 #[doc = "Operate the sub-clock oscillator"]
11260 pub const _0: Self = Self::new(0);
11261
11262 #[doc = "Stop the sub-clock oscillator"]
11263 pub const _1: Self = Self::new(1);
11264 }
11265}
11266#[doc(hidden)]
11267#[derive(Copy, Clone, Eq, PartialEq)]
11268pub struct Somcr_SPEC;
11269impl crate::sealed::RegSpec for Somcr_SPEC {
11270 type DataType = u8;
11271}
11272
11273#[doc = "Sub-Clock Oscillator Mode Control Register"]
11274pub type Somcr = crate::RegValueT<Somcr_SPEC>;
11275
11276impl Somcr {
11277 #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
11278 #[inline(always)]
11279 pub fn sodrv(
11280 self,
11281 ) -> crate::common::RegisterField<
11282 1,
11283 0x1,
11284 1,
11285 0,
11286 somcr::Sodrv,
11287 somcr::Sodrv,
11288 Somcr_SPEC,
11289 crate::common::RW,
11290 > {
11291 crate::common::RegisterField::<
11292 1,
11293 0x1,
11294 1,
11295 0,
11296 somcr::Sodrv,
11297 somcr::Sodrv,
11298 Somcr_SPEC,
11299 crate::common::RW,
11300 >::from_register(self, 0)
11301 }
11302}
11303impl ::core::default::Default for Somcr {
11304 #[inline(always)]
11305 fn default() -> Somcr {
11306 <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
11307 }
11308}
11309pub mod somcr {
11310
11311 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11312 pub struct Sodrv_SPEC;
11313 pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
11314 impl Sodrv {
11315 #[doc = "Standard"]
11316 pub const _0: Self = Self::new(0);
11317
11318 #[doc = "Low"]
11319 pub const _1: Self = Self::new(1);
11320 }
11321}
11322#[doc(hidden)]
11323#[derive(Copy, Clone, Eq, PartialEq)]
11324pub struct Lococr_SPEC;
11325impl crate::sealed::RegSpec for Lococr_SPEC {
11326 type DataType = u8;
11327}
11328
11329#[doc = "Low-Speed On-Chip Oscillator Control Register"]
11330pub type Lococr = crate::RegValueT<Lococr_SPEC>;
11331
11332impl Lococr {
11333 #[doc = "LOCO Stop"]
11334 #[inline(always)]
11335 pub fn lcstp(
11336 self,
11337 ) -> crate::common::RegisterField<
11338 0,
11339 0x1,
11340 1,
11341 0,
11342 lococr::Lcstp,
11343 lococr::Lcstp,
11344 Lococr_SPEC,
11345 crate::common::RW,
11346 > {
11347 crate::common::RegisterField::<
11348 0,
11349 0x1,
11350 1,
11351 0,
11352 lococr::Lcstp,
11353 lococr::Lcstp,
11354 Lococr_SPEC,
11355 crate::common::RW,
11356 >::from_register(self, 0)
11357 }
11358}
11359impl ::core::default::Default for Lococr {
11360 #[inline(always)]
11361 fn default() -> Lococr {
11362 <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
11363 }
11364}
11365pub mod lococr {
11366
11367 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11368 pub struct Lcstp_SPEC;
11369 pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
11370 impl Lcstp {
11371 #[doc = "Operate the LOCO clock"]
11372 pub const _0: Self = Self::new(0);
11373
11374 #[doc = "Stop the LOCO clock"]
11375 pub const _1: Self = Self::new(1);
11376 }
11377}
11378#[doc(hidden)]
11379#[derive(Copy, Clone, Eq, PartialEq)]
11380pub struct Locoutcr_SPEC;
11381impl crate::sealed::RegSpec for Locoutcr_SPEC {
11382 type DataType = u8;
11383}
11384
11385#[doc = "LOCO User Trimming Control Register"]
11386pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
11387
11388impl Locoutcr {
11389 #[doc = "LOCO User Trimming"]
11390 #[inline(always)]
11391 pub fn locoutrm(
11392 self,
11393 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
11394 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
11395 }
11396}
11397impl ::core::default::Default for Locoutcr {
11398 #[inline(always)]
11399 fn default() -> Locoutcr {
11400 <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
11401 }
11402}
11403
11404#[doc(hidden)]
11405#[derive(Copy, Clone, Eq, PartialEq)]
11406pub struct Vbtictlr_SPEC;
11407impl crate::sealed::RegSpec for Vbtictlr_SPEC {
11408 type DataType = u8;
11409}
11410
11411#[doc = "VBATT Input Control Register"]
11412pub type Vbtictlr = crate::RegValueT<Vbtictlr_SPEC>;
11413
11414impl Vbtictlr {
11415 #[doc = "VBATT CH0 Input Enable"]
11416 #[inline(always)]
11417 pub fn vch0inen(
11418 self,
11419 ) -> crate::common::RegisterField<
11420 0,
11421 0x1,
11422 1,
11423 0,
11424 vbtictlr::Vch0Inen,
11425 vbtictlr::Vch0Inen,
11426 Vbtictlr_SPEC,
11427 crate::common::RW,
11428 > {
11429 crate::common::RegisterField::<
11430 0,
11431 0x1,
11432 1,
11433 0,
11434 vbtictlr::Vch0Inen,
11435 vbtictlr::Vch0Inen,
11436 Vbtictlr_SPEC,
11437 crate::common::RW,
11438 >::from_register(self, 0)
11439 }
11440
11441 #[doc = "VBATT CH1 Input Enable"]
11442 #[inline(always)]
11443 pub fn vch1inen(
11444 self,
11445 ) -> crate::common::RegisterField<
11446 1,
11447 0x1,
11448 1,
11449 0,
11450 vbtictlr::Vch1Inen,
11451 vbtictlr::Vch1Inen,
11452 Vbtictlr_SPEC,
11453 crate::common::RW,
11454 > {
11455 crate::common::RegisterField::<
11456 1,
11457 0x1,
11458 1,
11459 0,
11460 vbtictlr::Vch1Inen,
11461 vbtictlr::Vch1Inen,
11462 Vbtictlr_SPEC,
11463 crate::common::RW,
11464 >::from_register(self, 0)
11465 }
11466
11467 #[doc = "VBATT CH2 Input Enable"]
11468 #[inline(always)]
11469 pub fn vch2inen(
11470 self,
11471 ) -> crate::common::RegisterField<
11472 2,
11473 0x1,
11474 1,
11475 0,
11476 vbtictlr::Vch2Inen,
11477 vbtictlr::Vch2Inen,
11478 Vbtictlr_SPEC,
11479 crate::common::RW,
11480 > {
11481 crate::common::RegisterField::<
11482 2,
11483 0x1,
11484 1,
11485 0,
11486 vbtictlr::Vch2Inen,
11487 vbtictlr::Vch2Inen,
11488 Vbtictlr_SPEC,
11489 crate::common::RW,
11490 >::from_register(self, 0)
11491 }
11492}
11493impl ::core::default::Default for Vbtictlr {
11494 #[inline(always)]
11495 fn default() -> Vbtictlr {
11496 <crate::RegValueT<Vbtictlr_SPEC> as RegisterValue<_>>::new(0)
11497 }
11498}
11499pub mod vbtictlr {
11500
11501 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11502 pub struct Vch0Inen_SPEC;
11503 pub type Vch0Inen = crate::EnumBitfieldStruct<u8, Vch0Inen_SPEC>;
11504 impl Vch0Inen {
11505 #[doc = "RTCIC0 input disable"]
11506 pub const _0: Self = Self::new(0);
11507
11508 #[doc = "RTCIC0 input enable"]
11509 pub const _1: Self = Self::new(1);
11510 }
11511 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11512 pub struct Vch1Inen_SPEC;
11513 pub type Vch1Inen = crate::EnumBitfieldStruct<u8, Vch1Inen_SPEC>;
11514 impl Vch1Inen {
11515 #[doc = "RTCIC1 input disable"]
11516 pub const _0: Self = Self::new(0);
11517
11518 #[doc = "RTCIC1 input enable"]
11519 pub const _1: Self = Self::new(1);
11520 }
11521 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11522 pub struct Vch2Inen_SPEC;
11523 pub type Vch2Inen = crate::EnumBitfieldStruct<u8, Vch2Inen_SPEC>;
11524 impl Vch2Inen {
11525 #[doc = "RTCIC2 input disable"]
11526 pub const _0: Self = Self::new(0);
11527
11528 #[doc = "RTCIC2 input enable"]
11529 pub const _1: Self = Self::new(1);
11530 }
11531}
11532#[doc(hidden)]
11533#[derive(Copy, Clone, Eq, PartialEq)]
11534pub struct Vbtber_SPEC;
11535impl crate::sealed::RegSpec for Vbtber_SPEC {
11536 type DataType = u8;
11537}
11538
11539#[doc = "VBATT Backup Enable Register"]
11540pub type Vbtber = crate::RegValueT<Vbtber_SPEC>;
11541
11542impl Vbtber {
11543 #[doc = "VBATT backup register access enable bit"]
11544 #[inline(always)]
11545 pub fn vbae(
11546 self,
11547 ) -> crate::common::RegisterField<
11548 3,
11549 0x1,
11550 1,
11551 0,
11552 vbtber::Vbae,
11553 vbtber::Vbae,
11554 Vbtber_SPEC,
11555 crate::common::RW,
11556 > {
11557 crate::common::RegisterField::<
11558 3,
11559 0x1,
11560 1,
11561 0,
11562 vbtber::Vbae,
11563 vbtber::Vbae,
11564 Vbtber_SPEC,
11565 crate::common::RW,
11566 >::from_register(self, 0)
11567 }
11568}
11569impl ::core::default::Default for Vbtber {
11570 #[inline(always)]
11571 fn default() -> Vbtber {
11572 <crate::RegValueT<Vbtber_SPEC> as RegisterValue<_>>::new(8)
11573 }
11574}
11575pub mod vbtber {
11576
11577 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11578 pub struct Vbae_SPEC;
11579 pub type Vbae = crate::EnumBitfieldStruct<u8, Vbae_SPEC>;
11580 impl Vbae {
11581 #[doc = "Disable to access VBTBKR"]
11582 pub const _0: Self = Self::new(0);
11583
11584 #[doc = "Enable to access VBTBKR"]
11585 pub const _1: Self = Self::new(1);
11586 }
11587}
11588#[doc(hidden)]
11589#[derive(Copy, Clone, Eq, PartialEq)]
11590pub struct Vbtbkr_SPEC;
11591impl crate::sealed::RegSpec for Vbtbkr_SPEC {
11592 type DataType = u8;
11593}
11594
11595#[doc = "VBATT Backup Register"]
11596pub type Vbtbkr = crate::RegValueT<Vbtbkr_SPEC>;
11597
11598impl Vbtbkr {
11599 #[doc = "VBATT Backup Register"]
11600 #[inline(always)]
11601 pub fn vbtbkr(
11602 self,
11603 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Vbtbkr_SPEC, crate::common::RW> {
11604 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Vbtbkr_SPEC,crate::common::RW>::from_register(self,0)
11605 }
11606}
11607impl ::core::default::Default for Vbtbkr {
11608 #[inline(always)]
11609 fn default() -> Vbtbkr {
11610 <crate::RegValueT<Vbtbkr_SPEC> as RegisterValue<_>>::new(0)
11611 }
11612}