1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SD Host Interface 0"]
28unsafe impl ::core::marker::Send for super::Sdhi0 {}
29unsafe impl ::core::marker::Sync for super::Sdhi0 {}
30impl super::Sdhi0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Command Type Register"]
38 #[inline(always)]
39 pub const fn sd_cmd(&self) -> &'static crate::common::Reg<self::SdCmd_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::SdCmd_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "SD Command Argument Register"]
48 #[inline(always)]
49 pub const fn sd_arg(&self) -> &'static crate::common::Reg<self::SdArg_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::SdArg_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(8usize),
53 )
54 }
55 }
56
57 #[doc = "SD Command Argument Register 1"]
58 #[inline(always)]
59 pub const fn sd_arg1(
60 &self,
61 ) -> &'static crate::common::Reg<self::SdArg1_SPEC, crate::common::RW> {
62 unsafe {
63 crate::common::Reg::<self::SdArg1_SPEC, crate::common::RW>::from_ptr(
64 self._svd2pac_as_ptr().add(12usize),
65 )
66 }
67 }
68
69 #[doc = "Data Stop Register"]
70 #[inline(always)]
71 pub const fn sd_stop(
72 &self,
73 ) -> &'static crate::common::Reg<self::SdStop_SPEC, crate::common::RW> {
74 unsafe {
75 crate::common::Reg::<self::SdStop_SPEC, crate::common::RW>::from_ptr(
76 self._svd2pac_as_ptr().add(16usize),
77 )
78 }
79 }
80
81 #[doc = "Block Count Register"]
82 #[inline(always)]
83 pub const fn sd_seccnt(
84 &self,
85 ) -> &'static crate::common::Reg<self::SdSeccnt_SPEC, crate::common::RW> {
86 unsafe {
87 crate::common::Reg::<self::SdSeccnt_SPEC, crate::common::RW>::from_ptr(
88 self._svd2pac_as_ptr().add(20usize),
89 )
90 }
91 }
92
93 #[doc = "SD Card Response Register 10"]
94 #[inline(always)]
95 pub const fn sd_rsp10(
96 &self,
97 ) -> &'static crate::common::Reg<self::SdRsp10_SPEC, crate::common::RW> {
98 unsafe {
99 crate::common::Reg::<self::SdRsp10_SPEC, crate::common::RW>::from_ptr(
100 self._svd2pac_as_ptr().add(24usize),
101 )
102 }
103 }
104
105 #[doc = "SD Card Response Register 1"]
106 #[inline(always)]
107 pub const fn sd_rsp1(
108 &self,
109 ) -> &'static crate::common::Reg<self::SdRsp1_SPEC, crate::common::R> {
110 unsafe {
111 crate::common::Reg::<self::SdRsp1_SPEC, crate::common::R>::from_ptr(
112 self._svd2pac_as_ptr().add(28usize),
113 )
114 }
115 }
116
117 #[doc = "SD Card Response Register 32"]
118 #[inline(always)]
119 pub const fn sd_rsp32(
120 &self,
121 ) -> &'static crate::common::Reg<self::SdRsp32_SPEC, crate::common::RW> {
122 unsafe {
123 crate::common::Reg::<self::SdRsp32_SPEC, crate::common::RW>::from_ptr(
124 self._svd2pac_as_ptr().add(32usize),
125 )
126 }
127 }
128
129 #[doc = "SD Card Response Register 3"]
130 #[inline(always)]
131 pub const fn sd_rsp3(
132 &self,
133 ) -> &'static crate::common::Reg<self::SdRsp3_SPEC, crate::common::R> {
134 unsafe {
135 crate::common::Reg::<self::SdRsp3_SPEC, crate::common::R>::from_ptr(
136 self._svd2pac_as_ptr().add(36usize),
137 )
138 }
139 }
140
141 #[doc = "SD Card Response Register 54"]
142 #[inline(always)]
143 pub const fn sd_rsp54(
144 &self,
145 ) -> &'static crate::common::Reg<self::SdRsp54_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::SdRsp54_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(40usize),
149 )
150 }
151 }
152
153 #[doc = "SD Card Response Register 5"]
154 #[inline(always)]
155 pub const fn sd_rsp5(
156 &self,
157 ) -> &'static crate::common::Reg<self::SdRsp5_SPEC, crate::common::R> {
158 unsafe {
159 crate::common::Reg::<self::SdRsp5_SPEC, crate::common::R>::from_ptr(
160 self._svd2pac_as_ptr().add(44usize),
161 )
162 }
163 }
164
165 #[doc = "SD Card Response Register 76"]
166 #[inline(always)]
167 pub const fn sd_rsp76(
168 &self,
169 ) -> &'static crate::common::Reg<self::SdRsp76_SPEC, crate::common::R> {
170 unsafe {
171 crate::common::Reg::<self::SdRsp76_SPEC, crate::common::R>::from_ptr(
172 self._svd2pac_as_ptr().add(48usize),
173 )
174 }
175 }
176
177 #[doc = "SD Card Response Register 7"]
178 #[inline(always)]
179 pub const fn sd_rsp7(
180 &self,
181 ) -> &'static crate::common::Reg<self::SdRsp7_SPEC, crate::common::R> {
182 unsafe {
183 crate::common::Reg::<self::SdRsp7_SPEC, crate::common::R>::from_ptr(
184 self._svd2pac_as_ptr().add(52usize),
185 )
186 }
187 }
188
189 #[doc = "SD Card Interrupt Flag Register 1"]
190 #[inline(always)]
191 pub const fn sd_info1(
192 &self,
193 ) -> &'static crate::common::Reg<self::SdInfo1_SPEC, crate::common::RW> {
194 unsafe {
195 crate::common::Reg::<self::SdInfo1_SPEC, crate::common::RW>::from_ptr(
196 self._svd2pac_as_ptr().add(56usize),
197 )
198 }
199 }
200
201 #[doc = "SD Card Interrupt Flag Register 2"]
202 #[inline(always)]
203 pub const fn sd_info2(
204 &self,
205 ) -> &'static crate::common::Reg<self::SdInfo2_SPEC, crate::common::RW> {
206 unsafe {
207 crate::common::Reg::<self::SdInfo2_SPEC, crate::common::RW>::from_ptr(
208 self._svd2pac_as_ptr().add(60usize),
209 )
210 }
211 }
212
213 #[doc = "SD INFO1 Interrupt Mask Register"]
214 #[inline(always)]
215 pub const fn sd_info1_mask(
216 &self,
217 ) -> &'static crate::common::Reg<self::SdInfo1Mask_SPEC, crate::common::RW> {
218 unsafe {
219 crate::common::Reg::<self::SdInfo1Mask_SPEC, crate::common::RW>::from_ptr(
220 self._svd2pac_as_ptr().add(64usize),
221 )
222 }
223 }
224
225 #[doc = "SD INFO2 Interrupt Mask Register"]
226 #[inline(always)]
227 pub const fn sd_info2_mask(
228 &self,
229 ) -> &'static crate::common::Reg<self::SdInfo2Mask_SPEC, crate::common::RW> {
230 unsafe {
231 crate::common::Reg::<self::SdInfo2Mask_SPEC, crate::common::RW>::from_ptr(
232 self._svd2pac_as_ptr().add(68usize),
233 )
234 }
235 }
236
237 #[doc = "SD Clock Control Register"]
238 #[inline(always)]
239 pub const fn sd_clk_ctrl(
240 &self,
241 ) -> &'static crate::common::Reg<self::SdClkCtrl_SPEC, crate::common::RW> {
242 unsafe {
243 crate::common::Reg::<self::SdClkCtrl_SPEC, crate::common::RW>::from_ptr(
244 self._svd2pac_as_ptr().add(72usize),
245 )
246 }
247 }
248
249 #[doc = "Transfer Data Length Register"]
250 #[inline(always)]
251 pub const fn sd_size(
252 &self,
253 ) -> &'static crate::common::Reg<self::SdSize_SPEC, crate::common::RW> {
254 unsafe {
255 crate::common::Reg::<self::SdSize_SPEC, crate::common::RW>::from_ptr(
256 self._svd2pac_as_ptr().add(76usize),
257 )
258 }
259 }
260
261 #[doc = "SD Card Access Control Option Register"]
262 #[inline(always)]
263 pub const fn sd_option(
264 &self,
265 ) -> &'static crate::common::Reg<self::SdOption_SPEC, crate::common::RW> {
266 unsafe {
267 crate::common::Reg::<self::SdOption_SPEC, crate::common::RW>::from_ptr(
268 self._svd2pac_as_ptr().add(80usize),
269 )
270 }
271 }
272
273 #[doc = "SD Error Status Register 1"]
274 #[inline(always)]
275 pub const fn sd_err_sts1(
276 &self,
277 ) -> &'static crate::common::Reg<self::SdErrSts1_SPEC, crate::common::R> {
278 unsafe {
279 crate::common::Reg::<self::SdErrSts1_SPEC, crate::common::R>::from_ptr(
280 self._svd2pac_as_ptr().add(88usize),
281 )
282 }
283 }
284
285 #[doc = "SD Error Status Register 2"]
286 #[inline(always)]
287 pub const fn sd_err_sts2(
288 &self,
289 ) -> &'static crate::common::Reg<self::SdErrSts2_SPEC, crate::common::R> {
290 unsafe {
291 crate::common::Reg::<self::SdErrSts2_SPEC, crate::common::R>::from_ptr(
292 self._svd2pac_as_ptr().add(92usize),
293 )
294 }
295 }
296
297 #[doc = "SD Buffer Register"]
298 #[inline(always)]
299 pub const fn sd_buf0(
300 &self,
301 ) -> &'static crate::common::Reg<self::SdBuf0_SPEC, crate::common::RW> {
302 unsafe {
303 crate::common::Reg::<self::SdBuf0_SPEC, crate::common::RW>::from_ptr(
304 self._svd2pac_as_ptr().add(96usize),
305 )
306 }
307 }
308
309 #[doc = "SDIO Mode Control Register"]
310 #[inline(always)]
311 pub const fn sdio_mode(
312 &self,
313 ) -> &'static crate::common::Reg<self::SdioMode_SPEC, crate::common::RW> {
314 unsafe {
315 crate::common::Reg::<self::SdioMode_SPEC, crate::common::RW>::from_ptr(
316 self._svd2pac_as_ptr().add(104usize),
317 )
318 }
319 }
320
321 #[doc = "SDIO Interrupt Flag Register"]
322 #[inline(always)]
323 pub const fn sdio_info1(
324 &self,
325 ) -> &'static crate::common::Reg<self::SdioInfo1_SPEC, crate::common::RW> {
326 unsafe {
327 crate::common::Reg::<self::SdioInfo1_SPEC, crate::common::RW>::from_ptr(
328 self._svd2pac_as_ptr().add(108usize),
329 )
330 }
331 }
332
333 #[doc = "SDIO INFO1 Interrupt Mask Register"]
334 #[inline(always)]
335 pub const fn sdio_info1_mask(
336 &self,
337 ) -> &'static crate::common::Reg<self::SdioInfo1Mask_SPEC, crate::common::RW> {
338 unsafe {
339 crate::common::Reg::<self::SdioInfo1Mask_SPEC, crate::common::RW>::from_ptr(
340 self._svd2pac_as_ptr().add(112usize),
341 )
342 }
343 }
344
345 #[doc = "DMA Mode Enable Register"]
346 #[inline(always)]
347 pub const fn sd_dmaen(
348 &self,
349 ) -> &'static crate::common::Reg<self::SdDmaen_SPEC, crate::common::RW> {
350 unsafe {
351 crate::common::Reg::<self::SdDmaen_SPEC, crate::common::RW>::from_ptr(
352 self._svd2pac_as_ptr().add(432usize),
353 )
354 }
355 }
356
357 #[doc = "Software Reset Register"]
358 #[inline(always)]
359 pub const fn soft_rst(
360 &self,
361 ) -> &'static crate::common::Reg<self::SoftRst_SPEC, crate::common::RW> {
362 unsafe {
363 crate::common::Reg::<self::SoftRst_SPEC, crate::common::RW>::from_ptr(
364 self._svd2pac_as_ptr().add(448usize),
365 )
366 }
367 }
368
369 #[doc = "SD Interface Mode Setting Register"]
370 #[inline(always)]
371 pub const fn sdif_mode(
372 &self,
373 ) -> &'static crate::common::Reg<self::SdifMode_SPEC, crate::common::RW> {
374 unsafe {
375 crate::common::Reg::<self::SdifMode_SPEC, crate::common::RW>::from_ptr(
376 self._svd2pac_as_ptr().add(460usize),
377 )
378 }
379 }
380
381 #[doc = "Swap Control Register"]
382 #[inline(always)]
383 pub const fn ext_swap(
384 &self,
385 ) -> &'static crate::common::Reg<self::ExtSwap_SPEC, crate::common::RW> {
386 unsafe {
387 crate::common::Reg::<self::ExtSwap_SPEC, crate::common::RW>::from_ptr(
388 self._svd2pac_as_ptr().add(480usize),
389 )
390 }
391 }
392}
393#[doc(hidden)]
394#[derive(Copy, Clone, Eq, PartialEq)]
395pub struct SdCmd_SPEC;
396impl crate::sealed::RegSpec for SdCmd_SPEC {
397 type DataType = u32;
398}
399
400#[doc = "Command Type Register"]
401pub type SdCmd = crate::RegValueT<SdCmd_SPEC>;
402
403impl SdCmd {
404 #[doc = "Command Index Field Value Select"]
405 #[inline(always)]
406 pub fn cmdidx(
407 self,
408 ) -> crate::common::RegisterField<
409 0,
410 0x3f,
411 1,
412 0,
413 sd_cmd::Cmdidx,
414 sd_cmd::Cmdidx,
415 SdCmd_SPEC,
416 crate::common::RW,
417 > {
418 crate::common::RegisterField::<
419 0,
420 0x3f,
421 1,
422 0,
423 sd_cmd::Cmdidx,
424 sd_cmd::Cmdidx,
425 SdCmd_SPEC,
426 crate::common::RW,
427 >::from_register(self, 0)
428 }
429
430 #[doc = "Command Type Select"]
431 #[inline(always)]
432 pub fn acmd(
433 self,
434 ) -> crate::common::RegisterField<
435 6,
436 0x3,
437 1,
438 0,
439 sd_cmd::Acmd,
440 sd_cmd::Acmd,
441 SdCmd_SPEC,
442 crate::common::RW,
443 > {
444 crate::common::RegisterField::<
445 6,
446 0x3,
447 1,
448 0,
449 sd_cmd::Acmd,
450 sd_cmd::Acmd,
451 SdCmd_SPEC,
452 crate::common::RW,
453 >::from_register(self, 0)
454 }
455
456 #[doc = "Response Type Select"]
457 #[inline(always)]
458 pub fn rsptp(
459 self,
460 ) -> crate::common::RegisterField<
461 8,
462 0x7,
463 1,
464 0,
465 sd_cmd::Rsptp,
466 sd_cmd::Rsptp,
467 SdCmd_SPEC,
468 crate::common::RW,
469 > {
470 crate::common::RegisterField::<
471 8,
472 0x7,
473 1,
474 0,
475 sd_cmd::Rsptp,
476 sd_cmd::Rsptp,
477 SdCmd_SPEC,
478 crate::common::RW,
479 >::from_register(self, 0)
480 }
481
482 #[doc = "Data Transfer Select"]
483 #[inline(always)]
484 pub fn cmdtp(
485 self,
486 ) -> crate::common::RegisterField<
487 11,
488 0x1,
489 1,
490 0,
491 sd_cmd::Cmdtp,
492 sd_cmd::Cmdtp,
493 SdCmd_SPEC,
494 crate::common::RW,
495 > {
496 crate::common::RegisterField::<
497 11,
498 0x1,
499 1,
500 0,
501 sd_cmd::Cmdtp,
502 sd_cmd::Cmdtp,
503 SdCmd_SPEC,
504 crate::common::RW,
505 >::from_register(self, 0)
506 }
507
508 #[doc = "Data Transfer Direction Select"]
509 #[inline(always)]
510 pub fn cmdrw(
511 self,
512 ) -> crate::common::RegisterField<
513 12,
514 0x1,
515 1,
516 0,
517 sd_cmd::Cmdrw,
518 sd_cmd::Cmdrw,
519 SdCmd_SPEC,
520 crate::common::RW,
521 > {
522 crate::common::RegisterField::<
523 12,
524 0x1,
525 1,
526 0,
527 sd_cmd::Cmdrw,
528 sd_cmd::Cmdrw,
529 SdCmd_SPEC,
530 crate::common::RW,
531 >::from_register(self, 0)
532 }
533
534 #[doc = "Block Transfer Select"]
535 #[inline(always)]
536 pub fn trstp(
537 self,
538 ) -> crate::common::RegisterField<
539 13,
540 0x1,
541 1,
542 0,
543 sd_cmd::Trstp,
544 sd_cmd::Trstp,
545 SdCmd_SPEC,
546 crate::common::RW,
547 > {
548 crate::common::RegisterField::<
549 13,
550 0x1,
551 1,
552 0,
553 sd_cmd::Trstp,
554 sd_cmd::Trstp,
555 SdCmd_SPEC,
556 crate::common::RW,
557 >::from_register(self, 0)
558 }
559
560 #[doc = "CMD12 Automatic Issue Select"]
561 #[inline(always)]
562 pub fn cmd12at(
563 self,
564 ) -> crate::common::RegisterField<
565 14,
566 0x3,
567 1,
568 0,
569 sd_cmd::Cmd12At,
570 sd_cmd::Cmd12At,
571 SdCmd_SPEC,
572 crate::common::RW,
573 > {
574 crate::common::RegisterField::<
575 14,
576 0x3,
577 1,
578 0,
579 sd_cmd::Cmd12At,
580 sd_cmd::Cmd12At,
581 SdCmd_SPEC,
582 crate::common::RW,
583 >::from_register(self, 0)
584 }
585}
586impl ::core::default::Default for SdCmd {
587 #[inline(always)]
588 fn default() -> SdCmd {
589 <crate::RegValueT<SdCmd_SPEC> as RegisterValue<_>>::new(0)
590 }
591}
592pub mod sd_cmd {
593
594 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
595 pub struct Cmdidx_SPEC;
596 pub type Cmdidx = crate::EnumBitfieldStruct<u8, Cmdidx_SPEC>;
597 impl Cmdidx {
598 #[doc = "CMD6"]
599 pub const _0_X_06: Self = Self::new(6);
600
601 #[doc = "CMD18"]
602 pub const _0_X_12: Self = Self::new(18);
603
604 #[doc = "ACMD13"]
605 pub const _0_X_4_D: Self = Self::new(13);
606 }
607 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
608 pub struct Acmd_SPEC;
609 pub type Acmd = crate::EnumBitfieldStruct<u8, Acmd_SPEC>;
610 impl Acmd {
611 #[doc = "CMD"]
612 pub const _00: Self = Self::new(0);
613
614 #[doc = "ACMD"]
615 pub const _01: Self = Self::new(1);
616 }
617 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
618 pub struct Rsptp_SPEC;
619 pub type Rsptp = crate::EnumBitfieldStruct<u8, Rsptp_SPEC>;
620 impl Rsptp {
621 #[doc = "Normal mode Depending on the command, the response type and transfer method are selected in the ACMD\\[1:0\\] and CMDIDX\\[5:0\\] bits. At this time, the values for bits 15 to 11 in this register are invalid."]
622 pub const _000: Self = Self::new(0);
623
624 #[doc = "Extended mode and no response"]
625 pub const _011: Self = Self::new(3);
626
627 #[doc = "Extended mode and R1, R5, R6, or R7 response"]
628 pub const _100: Self = Self::new(4);
629
630 #[doc = "Extended mode and R1b response"]
631 pub const _101: Self = Self::new(5);
632
633 #[doc = "Extended mode and R2 response"]
634 pub const _110: Self = Self::new(6);
635
636 #[doc = "Extended mode and R3 or R4 response"]
637 pub const _111: Self = Self::new(7);
638 }
639 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
640 pub struct Cmdtp_SPEC;
641 pub type Cmdtp = crate::EnumBitfieldStruct<u8, Cmdtp_SPEC>;
642 impl Cmdtp {
643 #[doc = "Do not include data transfer (bc, bcr, or ac) in command"]
644 pub const _0: Self = Self::new(0);
645
646 #[doc = "Include data transfer (adtc) in command"]
647 pub const _1: Self = Self::new(1);
648 }
649 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
650 pub struct Cmdrw_SPEC;
651 pub type Cmdrw = crate::EnumBitfieldStruct<u8, Cmdrw_SPEC>;
652 impl Cmdrw {
653 #[doc = "Write (SD/MMC Host Interface → SD card/MMC)"]
654 pub const _0: Self = Self::new(0);
655
656 #[doc = "Read (SD/MMC Host Interface ← SD card/MMC)"]
657 pub const _1: Self = Self::new(1);
658 }
659 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
660 pub struct Trstp_SPEC;
661 pub type Trstp = crate::EnumBitfieldStruct<u8, Trstp_SPEC>;
662 impl Trstp {
663 #[doc = "Single block transfer"]
664 pub const _0: Self = Self::new(0);
665
666 #[doc = "Multiple blocks transfer"]
667 pub const _1: Self = Self::new(1);
668 }
669 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
670 pub struct Cmd12At_SPEC;
671 pub type Cmd12At = crate::EnumBitfieldStruct<u8, Cmd12At_SPEC>;
672 impl Cmd12At {
673 #[doc = "Automatically issue CMD12 during multiblock transfer"]
674 pub const _00: Self = Self::new(0);
675
676 #[doc = "Do not automatically issue CMD12 during multiblock transfer"]
677 pub const _01: Self = Self::new(1);
678 }
679}
680#[doc(hidden)]
681#[derive(Copy, Clone, Eq, PartialEq)]
682pub struct SdArg_SPEC;
683impl crate::sealed::RegSpec for SdArg_SPEC {
684 type DataType = u32;
685}
686
687#[doc = "SD Command Argument Register"]
688pub type SdArg = crate::RegValueT<SdArg_SPEC>;
689
690impl NoBitfieldReg<SdArg_SPEC> for SdArg {}
691impl ::core::default::Default for SdArg {
692 #[inline(always)]
693 fn default() -> SdArg {
694 <crate::RegValueT<SdArg_SPEC> as RegisterValue<_>>::new(0)
695 }
696}
697
698#[doc(hidden)]
699#[derive(Copy, Clone, Eq, PartialEq)]
700pub struct SdArg1_SPEC;
701impl crate::sealed::RegSpec for SdArg1_SPEC {
702 type DataType = u32;
703}
704
705#[doc = "SD Command Argument Register 1"]
706pub type SdArg1 = crate::RegValueT<SdArg1_SPEC>;
707
708impl NoBitfieldReg<SdArg1_SPEC> for SdArg1 {}
709impl ::core::default::Default for SdArg1 {
710 #[inline(always)]
711 fn default() -> SdArg1 {
712 <crate::RegValueT<SdArg1_SPEC> as RegisterValue<_>>::new(0)
713 }
714}
715
716#[doc(hidden)]
717#[derive(Copy, Clone, Eq, PartialEq)]
718pub struct SdStop_SPEC;
719impl crate::sealed::RegSpec for SdStop_SPEC {
720 type DataType = u32;
721}
722
723#[doc = "Data Stop Register"]
724pub type SdStop = crate::RegValueT<SdStop_SPEC>;
725
726impl SdStop {
727 #[doc = "Transfer Stop"]
728 #[inline(always)]
729 pub fn stp(self) -> crate::common::RegisterFieldBool<0, 1, 0, SdStop_SPEC, crate::common::RW> {
730 crate::common::RegisterFieldBool::<0, 1, 0, SdStop_SPEC, crate::common::RW>::from_register(
731 self, 0,
732 )
733 }
734
735 #[doc = "Block Count Register Value Select"]
736 #[inline(always)]
737 pub fn sec(
738 self,
739 ) -> crate::common::RegisterField<
740 8,
741 0x1,
742 1,
743 0,
744 sd_stop::Sec,
745 sd_stop::Sec,
746 SdStop_SPEC,
747 crate::common::RW,
748 > {
749 crate::common::RegisterField::<
750 8,
751 0x1,
752 1,
753 0,
754 sd_stop::Sec,
755 sd_stop::Sec,
756 SdStop_SPEC,
757 crate::common::RW,
758 >::from_register(self, 0)
759 }
760}
761impl ::core::default::Default for SdStop {
762 #[inline(always)]
763 fn default() -> SdStop {
764 <crate::RegValueT<SdStop_SPEC> as RegisterValue<_>>::new(0)
765 }
766}
767pub mod sd_stop {
768
769 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
770 pub struct Sec_SPEC;
771 pub type Sec = crate::EnumBitfieldStruct<u8, Sec_SPEC>;
772 impl Sec {
773 #[doc = "Disable SD_SECCNT register value"]
774 pub const _0: Self = Self::new(0);
775
776 #[doc = "Enable SD_SECCNT register value"]
777 pub const _1: Self = Self::new(1);
778 }
779}
780#[doc(hidden)]
781#[derive(Copy, Clone, Eq, PartialEq)]
782pub struct SdSeccnt_SPEC;
783impl crate::sealed::RegSpec for SdSeccnt_SPEC {
784 type DataType = u32;
785}
786
787#[doc = "Block Count Register"]
788pub type SdSeccnt = crate::RegValueT<SdSeccnt_SPEC>;
789
790impl NoBitfieldReg<SdSeccnt_SPEC> for SdSeccnt {}
791impl ::core::default::Default for SdSeccnt {
792 #[inline(always)]
793 fn default() -> SdSeccnt {
794 <crate::RegValueT<SdSeccnt_SPEC> as RegisterValue<_>>::new(0)
795 }
796}
797
798#[doc(hidden)]
799#[derive(Copy, Clone, Eq, PartialEq)]
800pub struct SdRsp10_SPEC;
801impl crate::sealed::RegSpec for SdRsp10_SPEC {
802 type DataType = u32;
803}
804
805#[doc = "SD Card Response Register 10"]
806pub type SdRsp10 = crate::RegValueT<SdRsp10_SPEC>;
807
808impl NoBitfieldReg<SdRsp10_SPEC> for SdRsp10 {}
809impl ::core::default::Default for SdRsp10 {
810 #[inline(always)]
811 fn default() -> SdRsp10 {
812 <crate::RegValueT<SdRsp10_SPEC> as RegisterValue<_>>::new(0)
813 }
814}
815
816#[doc(hidden)]
817#[derive(Copy, Clone, Eq, PartialEq)]
818pub struct SdRsp1_SPEC;
819impl crate::sealed::RegSpec for SdRsp1_SPEC {
820 type DataType = u32;
821}
822
823#[doc = "SD Card Response Register 1"]
824pub type SdRsp1 = crate::RegValueT<SdRsp1_SPEC>;
825
826impl NoBitfieldReg<SdRsp1_SPEC> for SdRsp1 {}
827impl ::core::default::Default for SdRsp1 {
828 #[inline(always)]
829 fn default() -> SdRsp1 {
830 <crate::RegValueT<SdRsp1_SPEC> as RegisterValue<_>>::new(0)
831 }
832}
833
834#[doc(hidden)]
835#[derive(Copy, Clone, Eq, PartialEq)]
836pub struct SdRsp32_SPEC;
837impl crate::sealed::RegSpec for SdRsp32_SPEC {
838 type DataType = u32;
839}
840
841#[doc = "SD Card Response Register 32"]
842pub type SdRsp32 = crate::RegValueT<SdRsp32_SPEC>;
843
844impl NoBitfieldReg<SdRsp32_SPEC> for SdRsp32 {}
845impl ::core::default::Default for SdRsp32 {
846 #[inline(always)]
847 fn default() -> SdRsp32 {
848 <crate::RegValueT<SdRsp32_SPEC> as RegisterValue<_>>::new(0)
849 }
850}
851
852#[doc(hidden)]
853#[derive(Copy, Clone, Eq, PartialEq)]
854pub struct SdRsp3_SPEC;
855impl crate::sealed::RegSpec for SdRsp3_SPEC {
856 type DataType = u32;
857}
858
859#[doc = "SD Card Response Register 3"]
860pub type SdRsp3 = crate::RegValueT<SdRsp3_SPEC>;
861
862impl NoBitfieldReg<SdRsp3_SPEC> for SdRsp3 {}
863impl ::core::default::Default for SdRsp3 {
864 #[inline(always)]
865 fn default() -> SdRsp3 {
866 <crate::RegValueT<SdRsp3_SPEC> as RegisterValue<_>>::new(0)
867 }
868}
869
870#[doc(hidden)]
871#[derive(Copy, Clone, Eq, PartialEq)]
872pub struct SdRsp54_SPEC;
873impl crate::sealed::RegSpec for SdRsp54_SPEC {
874 type DataType = u32;
875}
876
877#[doc = "SD Card Response Register 54"]
878pub type SdRsp54 = crate::RegValueT<SdRsp54_SPEC>;
879
880impl NoBitfieldReg<SdRsp54_SPEC> for SdRsp54 {}
881impl ::core::default::Default for SdRsp54 {
882 #[inline(always)]
883 fn default() -> SdRsp54 {
884 <crate::RegValueT<SdRsp54_SPEC> as RegisterValue<_>>::new(0)
885 }
886}
887
888#[doc(hidden)]
889#[derive(Copy, Clone, Eq, PartialEq)]
890pub struct SdRsp5_SPEC;
891impl crate::sealed::RegSpec for SdRsp5_SPEC {
892 type DataType = u32;
893}
894
895#[doc = "SD Card Response Register 5"]
896pub type SdRsp5 = crate::RegValueT<SdRsp5_SPEC>;
897
898impl NoBitfieldReg<SdRsp5_SPEC> for SdRsp5 {}
899impl ::core::default::Default for SdRsp5 {
900 #[inline(always)]
901 fn default() -> SdRsp5 {
902 <crate::RegValueT<SdRsp5_SPEC> as RegisterValue<_>>::new(0)
903 }
904}
905
906#[doc(hidden)]
907#[derive(Copy, Clone, Eq, PartialEq)]
908pub struct SdRsp76_SPEC;
909impl crate::sealed::RegSpec for SdRsp76_SPEC {
910 type DataType = u32;
911}
912
913#[doc = "SD Card Response Register 76"]
914pub type SdRsp76 = crate::RegValueT<SdRsp76_SPEC>;
915
916impl SdRsp76 {
917 #[doc = "These bits store the response from the SD card/MMC."]
918 #[inline(always)]
919 pub fn sd_rsp76(
920 self,
921 ) -> crate::common::RegisterField<0, 0xffffff, 1, 0, u32, u32, SdRsp76_SPEC, crate::common::R>
922 {
923 crate::common::RegisterField::<0,0xffffff,1,0,u32,u32,SdRsp76_SPEC,crate::common::R>::from_register(self,0)
924 }
925}
926impl ::core::default::Default for SdRsp76 {
927 #[inline(always)]
928 fn default() -> SdRsp76 {
929 <crate::RegValueT<SdRsp76_SPEC> as RegisterValue<_>>::new(0)
930 }
931}
932
933#[doc(hidden)]
934#[derive(Copy, Clone, Eq, PartialEq)]
935pub struct SdRsp7_SPEC;
936impl crate::sealed::RegSpec for SdRsp7_SPEC {
937 type DataType = u32;
938}
939
940#[doc = "SD Card Response Register 7"]
941pub type SdRsp7 = crate::RegValueT<SdRsp7_SPEC>;
942
943impl SdRsp7 {
944 #[doc = "These bits store the response from the SD card/MMC."]
945 #[inline(always)]
946 pub fn sd_rsp7(
947 self,
948 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, SdRsp7_SPEC, crate::common::R> {
949 crate::common::RegisterField::<0,0xff,1,0,u8,u8,SdRsp7_SPEC,crate::common::R>::from_register(self,0)
950 }
951}
952impl ::core::default::Default for SdRsp7 {
953 #[inline(always)]
954 fn default() -> SdRsp7 {
955 <crate::RegValueT<SdRsp7_SPEC> as RegisterValue<_>>::new(0)
956 }
957}
958
959#[doc(hidden)]
960#[derive(Copy, Clone, Eq, PartialEq)]
961pub struct SdInfo1_SPEC;
962impl crate::sealed::RegSpec for SdInfo1_SPEC {
963 type DataType = u32;
964}
965
966#[doc = "SD Card Interrupt Flag Register 1"]
967pub type SdInfo1 = crate::RegValueT<SdInfo1_SPEC>;
968
969impl SdInfo1 {
970 #[doc = "Response End Detection Flag"]
971 #[inline(always)]
972 pub fn rspend(
973 self,
974 ) -> crate::common::RegisterField<
975 0,
976 0x1,
977 1,
978 0,
979 sd_info1::Rspend,
980 sd_info1::Rspend,
981 SdInfo1_SPEC,
982 crate::common::RW,
983 > {
984 crate::common::RegisterField::<
985 0,
986 0x1,
987 1,
988 0,
989 sd_info1::Rspend,
990 sd_info1::Rspend,
991 SdInfo1_SPEC,
992 crate::common::RW,
993 >::from_register(self, 0)
994 }
995
996 #[doc = "Access End Detection Flag"]
997 #[inline(always)]
998 pub fn acend(
999 self,
1000 ) -> crate::common::RegisterField<
1001 2,
1002 0x1,
1003 1,
1004 0,
1005 sd_info1::Acend,
1006 sd_info1::Acend,
1007 SdInfo1_SPEC,
1008 crate::common::RW,
1009 > {
1010 crate::common::RegisterField::<
1011 2,
1012 0x1,
1013 1,
1014 0,
1015 sd_info1::Acend,
1016 sd_info1::Acend,
1017 SdInfo1_SPEC,
1018 crate::common::RW,
1019 >::from_register(self, 0)
1020 }
1021
1022 #[doc = "SDnCD Removal Flag"]
1023 #[inline(always)]
1024 pub fn sdcdrm(
1025 self,
1026 ) -> crate::common::RegisterField<
1027 3,
1028 0x1,
1029 1,
1030 0,
1031 sd_info1::Sdcdrm,
1032 sd_info1::Sdcdrm,
1033 SdInfo1_SPEC,
1034 crate::common::RW,
1035 > {
1036 crate::common::RegisterField::<
1037 3,
1038 0x1,
1039 1,
1040 0,
1041 sd_info1::Sdcdrm,
1042 sd_info1::Sdcdrm,
1043 SdInfo1_SPEC,
1044 crate::common::RW,
1045 >::from_register(self, 0)
1046 }
1047
1048 #[doc = "SDnCD Insertion Flag"]
1049 #[inline(always)]
1050 pub fn sdcdin(
1051 self,
1052 ) -> crate::common::RegisterField<
1053 4,
1054 0x1,
1055 1,
1056 0,
1057 sd_info1::Sdcdin,
1058 sd_info1::Sdcdin,
1059 SdInfo1_SPEC,
1060 crate::common::RW,
1061 > {
1062 crate::common::RegisterField::<
1063 4,
1064 0x1,
1065 1,
1066 0,
1067 sd_info1::Sdcdin,
1068 sd_info1::Sdcdin,
1069 SdInfo1_SPEC,
1070 crate::common::RW,
1071 >::from_register(self, 0)
1072 }
1073
1074 #[doc = "SDnCD Pin Monitor Flag"]
1075 #[inline(always)]
1076 pub fn sdcdmon(
1077 self,
1078 ) -> crate::common::RegisterField<
1079 5,
1080 0x1,
1081 1,
1082 0,
1083 sd_info1::Sdcdmon,
1084 sd_info1::Sdcdmon,
1085 SdInfo1_SPEC,
1086 crate::common::R,
1087 > {
1088 crate::common::RegisterField::<
1089 5,
1090 0x1,
1091 1,
1092 0,
1093 sd_info1::Sdcdmon,
1094 sd_info1::Sdcdmon,
1095 SdInfo1_SPEC,
1096 crate::common::R,
1097 >::from_register(self, 0)
1098 }
1099
1100 #[doc = "SDnWP Pin Monitor Flag"]
1101 #[inline(always)]
1102 pub fn sdwpmon(
1103 self,
1104 ) -> crate::common::RegisterField<
1105 7,
1106 0x1,
1107 1,
1108 0,
1109 sd_info1::Sdwpmon,
1110 sd_info1::Sdwpmon,
1111 SdInfo1_SPEC,
1112 crate::common::R,
1113 > {
1114 crate::common::RegisterField::<
1115 7,
1116 0x1,
1117 1,
1118 0,
1119 sd_info1::Sdwpmon,
1120 sd_info1::Sdwpmon,
1121 SdInfo1_SPEC,
1122 crate::common::R,
1123 >::from_register(self, 0)
1124 }
1125
1126 #[doc = "SDnDAT3 Removal Flag"]
1127 #[inline(always)]
1128 pub fn sdd3rm(
1129 self,
1130 ) -> crate::common::RegisterField<
1131 8,
1132 0x1,
1133 1,
1134 0,
1135 sd_info1::Sdd3Rm,
1136 sd_info1::Sdd3Rm,
1137 SdInfo1_SPEC,
1138 crate::common::RW,
1139 > {
1140 crate::common::RegisterField::<
1141 8,
1142 0x1,
1143 1,
1144 0,
1145 sd_info1::Sdd3Rm,
1146 sd_info1::Sdd3Rm,
1147 SdInfo1_SPEC,
1148 crate::common::RW,
1149 >::from_register(self, 0)
1150 }
1151
1152 #[doc = "SDnDAT3 Insertion Flag"]
1153 #[inline(always)]
1154 pub fn sdd3in(
1155 self,
1156 ) -> crate::common::RegisterField<
1157 9,
1158 0x1,
1159 1,
1160 0,
1161 sd_info1::Sdd3In,
1162 sd_info1::Sdd3In,
1163 SdInfo1_SPEC,
1164 crate::common::RW,
1165 > {
1166 crate::common::RegisterField::<
1167 9,
1168 0x1,
1169 1,
1170 0,
1171 sd_info1::Sdd3In,
1172 sd_info1::Sdd3In,
1173 SdInfo1_SPEC,
1174 crate::common::RW,
1175 >::from_register(self, 0)
1176 }
1177
1178 #[doc = "SDnDAT3 Pin Monitor Flag"]
1179 #[inline(always)]
1180 pub fn sdd3mon(
1181 self,
1182 ) -> crate::common::RegisterField<
1183 10,
1184 0x1,
1185 1,
1186 0,
1187 sd_info1::Sdd3Mon,
1188 sd_info1::Sdd3Mon,
1189 SdInfo1_SPEC,
1190 crate::common::R,
1191 > {
1192 crate::common::RegisterField::<
1193 10,
1194 0x1,
1195 1,
1196 0,
1197 sd_info1::Sdd3Mon,
1198 sd_info1::Sdd3Mon,
1199 SdInfo1_SPEC,
1200 crate::common::R,
1201 >::from_register(self, 0)
1202 }
1203}
1204impl ::core::default::Default for SdInfo1 {
1205 #[inline(always)]
1206 fn default() -> SdInfo1 {
1207 <crate::RegValueT<SdInfo1_SPEC> as RegisterValue<_>>::new(0)
1208 }
1209}
1210pub mod sd_info1 {
1211
1212 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1213 pub struct Rspend_SPEC;
1214 pub type Rspend = crate::EnumBitfieldStruct<u8, Rspend_SPEC>;
1215 impl Rspend {
1216 #[doc = "Response end not detected"]
1217 pub const _0: Self = Self::new(0);
1218
1219 #[doc = "Response end detected"]
1220 pub const _1: Self = Self::new(1);
1221 }
1222 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1223 pub struct Acend_SPEC;
1224 pub type Acend = crate::EnumBitfieldStruct<u8, Acend_SPEC>;
1225 impl Acend {
1226 #[doc = "Access end not detected"]
1227 pub const _0: Self = Self::new(0);
1228
1229 #[doc = "Access end detected"]
1230 pub const _1: Self = Self::new(1);
1231 }
1232 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1233 pub struct Sdcdrm_SPEC;
1234 pub type Sdcdrm = crate::EnumBitfieldStruct<u8, Sdcdrm_SPEC>;
1235 impl Sdcdrm {
1236 #[doc = "SD card/MMC removal not detected by the SDnCD pin"]
1237 pub const _0: Self = Self::new(0);
1238
1239 #[doc = "SD card/MMC removal detected by the SDnCD pin"]
1240 pub const _1: Self = Self::new(1);
1241 }
1242 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1243 pub struct Sdcdin_SPEC;
1244 pub type Sdcdin = crate::EnumBitfieldStruct<u8, Sdcdin_SPEC>;
1245 impl Sdcdin {
1246 #[doc = "SD card/MMC insertion not detected by the SDnCD pin"]
1247 pub const _0: Self = Self::new(0);
1248
1249 #[doc = "SD card/MMC insertion detected by the SDnCD pin"]
1250 pub const _1: Self = Self::new(1);
1251 }
1252 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1253 pub struct Sdcdmon_SPEC;
1254 pub type Sdcdmon = crate::EnumBitfieldStruct<u8, Sdcdmon_SPEC>;
1255 impl Sdcdmon {
1256 #[doc = "SDnCD pin level is high"]
1257 pub const _0: Self = Self::new(0);
1258
1259 #[doc = "SDnCD pin level is low"]
1260 pub const _1: Self = Self::new(1);
1261 }
1262 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1263 pub struct Sdwpmon_SPEC;
1264 pub type Sdwpmon = crate::EnumBitfieldStruct<u8, Sdwpmon_SPEC>;
1265 impl Sdwpmon {
1266 #[doc = "SDnWP pin level is high"]
1267 pub const _0: Self = Self::new(0);
1268
1269 #[doc = "SDnWP pin level is low"]
1270 pub const _1: Self = Self::new(1);
1271 }
1272 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1273 pub struct Sdd3Rm_SPEC;
1274 pub type Sdd3Rm = crate::EnumBitfieldStruct<u8, Sdd3Rm_SPEC>;
1275 impl Sdd3Rm {
1276 #[doc = "SD card/MMC removal not detected by the SDnDAT3 pin"]
1277 pub const _0: Self = Self::new(0);
1278
1279 #[doc = "SD card/MMC removal detected by the SDnDAT3 pin"]
1280 pub const _1: Self = Self::new(1);
1281 }
1282 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1283 pub struct Sdd3In_SPEC;
1284 pub type Sdd3In = crate::EnumBitfieldStruct<u8, Sdd3In_SPEC>;
1285 impl Sdd3In {
1286 #[doc = "SD card/MMC insertion not detected by the SDnDAT3 pin"]
1287 pub const _0: Self = Self::new(0);
1288
1289 #[doc = "SD card/MMC insertion detected by the SDnDAT3 pin"]
1290 pub const _1: Self = Self::new(1);
1291 }
1292 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1293 pub struct Sdd3Mon_SPEC;
1294 pub type Sdd3Mon = crate::EnumBitfieldStruct<u8, Sdd3Mon_SPEC>;
1295 impl Sdd3Mon {
1296 #[doc = "SDnDAT3 pin level is low"]
1297 pub const _0: Self = Self::new(0);
1298
1299 #[doc = "SDnDAT3 pin level is high"]
1300 pub const _1: Self = Self::new(1);
1301 }
1302}
1303#[doc(hidden)]
1304#[derive(Copy, Clone, Eq, PartialEq)]
1305pub struct SdInfo2_SPEC;
1306impl crate::sealed::RegSpec for SdInfo2_SPEC {
1307 type DataType = u32;
1308}
1309
1310#[doc = "SD Card Interrupt Flag Register 2"]
1311pub type SdInfo2 = crate::RegValueT<SdInfo2_SPEC>;
1312
1313impl SdInfo2 {
1314 #[doc = "Command Error Detection Flag"]
1315 #[inline(always)]
1316 pub fn cmde(
1317 self,
1318 ) -> crate::common::RegisterField<
1319 0,
1320 0x1,
1321 1,
1322 0,
1323 sd_info2::Cmde,
1324 sd_info2::Cmde,
1325 SdInfo2_SPEC,
1326 crate::common::RW,
1327 > {
1328 crate::common::RegisterField::<
1329 0,
1330 0x1,
1331 1,
1332 0,
1333 sd_info2::Cmde,
1334 sd_info2::Cmde,
1335 SdInfo2_SPEC,
1336 crate::common::RW,
1337 >::from_register(self, 0)
1338 }
1339
1340 #[doc = "CRC Error Detection Flag"]
1341 #[inline(always)]
1342 pub fn crce(
1343 self,
1344 ) -> crate::common::RegisterField<
1345 1,
1346 0x1,
1347 1,
1348 0,
1349 sd_info2::Crce,
1350 sd_info2::Crce,
1351 SdInfo2_SPEC,
1352 crate::common::RW,
1353 > {
1354 crate::common::RegisterField::<
1355 1,
1356 0x1,
1357 1,
1358 0,
1359 sd_info2::Crce,
1360 sd_info2::Crce,
1361 SdInfo2_SPEC,
1362 crate::common::RW,
1363 >::from_register(self, 0)
1364 }
1365
1366 #[doc = "End Bit Error Detection Flag"]
1367 #[inline(always)]
1368 pub fn ende(
1369 self,
1370 ) -> crate::common::RegisterField<
1371 2,
1372 0x1,
1373 1,
1374 0,
1375 sd_info2::Ende,
1376 sd_info2::Ende,
1377 SdInfo2_SPEC,
1378 crate::common::RW,
1379 > {
1380 crate::common::RegisterField::<
1381 2,
1382 0x1,
1383 1,
1384 0,
1385 sd_info2::Ende,
1386 sd_info2::Ende,
1387 SdInfo2_SPEC,
1388 crate::common::RW,
1389 >::from_register(self, 0)
1390 }
1391
1392 #[doc = "Data Timeout Detection Flag"]
1393 #[inline(always)]
1394 pub fn dto(
1395 self,
1396 ) -> crate::common::RegisterField<
1397 3,
1398 0x1,
1399 1,
1400 0,
1401 sd_info2::Dto,
1402 sd_info2::Dto,
1403 SdInfo2_SPEC,
1404 crate::common::RW,
1405 > {
1406 crate::common::RegisterField::<
1407 3,
1408 0x1,
1409 1,
1410 0,
1411 sd_info2::Dto,
1412 sd_info2::Dto,
1413 SdInfo2_SPEC,
1414 crate::common::RW,
1415 >::from_register(self, 0)
1416 }
1417
1418 #[doc = "SD_BUF0 Illegal Write Access Detection Flag"]
1419 #[inline(always)]
1420 pub fn ilw(
1421 self,
1422 ) -> crate::common::RegisterField<
1423 4,
1424 0x1,
1425 1,
1426 0,
1427 sd_info2::Ilw,
1428 sd_info2::Ilw,
1429 SdInfo2_SPEC,
1430 crate::common::RW,
1431 > {
1432 crate::common::RegisterField::<
1433 4,
1434 0x1,
1435 1,
1436 0,
1437 sd_info2::Ilw,
1438 sd_info2::Ilw,
1439 SdInfo2_SPEC,
1440 crate::common::RW,
1441 >::from_register(self, 0)
1442 }
1443
1444 #[doc = "SD_BUF0 Illegal Read Access Detection Flag"]
1445 #[inline(always)]
1446 pub fn ilr(
1447 self,
1448 ) -> crate::common::RegisterField<
1449 5,
1450 0x1,
1451 1,
1452 0,
1453 sd_info2::Ilr,
1454 sd_info2::Ilr,
1455 SdInfo2_SPEC,
1456 crate::common::RW,
1457 > {
1458 crate::common::RegisterField::<
1459 5,
1460 0x1,
1461 1,
1462 0,
1463 sd_info2::Ilr,
1464 sd_info2::Ilr,
1465 SdInfo2_SPEC,
1466 crate::common::RW,
1467 >::from_register(self, 0)
1468 }
1469
1470 #[doc = "Response Timeout Detection Flag"]
1471 #[inline(always)]
1472 pub fn rspto(
1473 self,
1474 ) -> crate::common::RegisterField<
1475 6,
1476 0x1,
1477 1,
1478 0,
1479 sd_info2::Rspto,
1480 sd_info2::Rspto,
1481 SdInfo2_SPEC,
1482 crate::common::RW,
1483 > {
1484 crate::common::RegisterField::<
1485 6,
1486 0x1,
1487 1,
1488 0,
1489 sd_info2::Rspto,
1490 sd_info2::Rspto,
1491 SdInfo2_SPEC,
1492 crate::common::RW,
1493 >::from_register(self, 0)
1494 }
1495
1496 #[doc = "SDnDAT0 Pin Status Flag"]
1497 #[inline(always)]
1498 pub fn sdd0mon(
1499 self,
1500 ) -> crate::common::RegisterField<
1501 7,
1502 0x1,
1503 1,
1504 0,
1505 sd_info2::Sdd0Mon,
1506 sd_info2::Sdd0Mon,
1507 SdInfo2_SPEC,
1508 crate::common::R,
1509 > {
1510 crate::common::RegisterField::<
1511 7,
1512 0x1,
1513 1,
1514 0,
1515 sd_info2::Sdd0Mon,
1516 sd_info2::Sdd0Mon,
1517 SdInfo2_SPEC,
1518 crate::common::R,
1519 >::from_register(self, 0)
1520 }
1521
1522 #[doc = "SD_BUF0 Read Enable Flag"]
1523 #[inline(always)]
1524 pub fn bre(
1525 self,
1526 ) -> crate::common::RegisterField<
1527 8,
1528 0x1,
1529 1,
1530 0,
1531 sd_info2::Bre,
1532 sd_info2::Bre,
1533 SdInfo2_SPEC,
1534 crate::common::RW,
1535 > {
1536 crate::common::RegisterField::<
1537 8,
1538 0x1,
1539 1,
1540 0,
1541 sd_info2::Bre,
1542 sd_info2::Bre,
1543 SdInfo2_SPEC,
1544 crate::common::RW,
1545 >::from_register(self, 0)
1546 }
1547
1548 #[doc = "SD_BUF0 Write Enable Flag"]
1549 #[inline(always)]
1550 pub fn bwe(
1551 self,
1552 ) -> crate::common::RegisterField<
1553 9,
1554 0x1,
1555 1,
1556 0,
1557 sd_info2::Bwe,
1558 sd_info2::Bwe,
1559 SdInfo2_SPEC,
1560 crate::common::RW,
1561 > {
1562 crate::common::RegisterField::<
1563 9,
1564 0x1,
1565 1,
1566 0,
1567 sd_info2::Bwe,
1568 sd_info2::Bwe,
1569 SdInfo2_SPEC,
1570 crate::common::RW,
1571 >::from_register(self, 0)
1572 }
1573
1574 #[doc = "SD_CLK_CTRL Write Enable Flag"]
1575 #[inline(always)]
1576 pub fn sd_clk_ctrlen(
1577 self,
1578 ) -> crate::common::RegisterField<
1579 13,
1580 0x1,
1581 1,
1582 0,
1583 sd_info2::SdClkCtrlen,
1584 sd_info2::SdClkCtrlen,
1585 SdInfo2_SPEC,
1586 crate::common::R,
1587 > {
1588 crate::common::RegisterField::<
1589 13,
1590 0x1,
1591 1,
1592 0,
1593 sd_info2::SdClkCtrlen,
1594 sd_info2::SdClkCtrlen,
1595 SdInfo2_SPEC,
1596 crate::common::R,
1597 >::from_register(self, 0)
1598 }
1599
1600 #[doc = "Command Sequence Status Flag"]
1601 #[inline(always)]
1602 pub fn cbsy(
1603 self,
1604 ) -> crate::common::RegisterField<
1605 14,
1606 0x1,
1607 1,
1608 0,
1609 sd_info2::Cbsy,
1610 sd_info2::Cbsy,
1611 SdInfo2_SPEC,
1612 crate::common::R,
1613 > {
1614 crate::common::RegisterField::<
1615 14,
1616 0x1,
1617 1,
1618 0,
1619 sd_info2::Cbsy,
1620 sd_info2::Cbsy,
1621 SdInfo2_SPEC,
1622 crate::common::R,
1623 >::from_register(self, 0)
1624 }
1625
1626 #[doc = "Illegal Access Error Detection Flag"]
1627 #[inline(always)]
1628 pub fn ila(
1629 self,
1630 ) -> crate::common::RegisterField<
1631 15,
1632 0x1,
1633 1,
1634 0,
1635 sd_info2::Ila,
1636 sd_info2::Ila,
1637 SdInfo2_SPEC,
1638 crate::common::RW,
1639 > {
1640 crate::common::RegisterField::<
1641 15,
1642 0x1,
1643 1,
1644 0,
1645 sd_info2::Ila,
1646 sd_info2::Ila,
1647 SdInfo2_SPEC,
1648 crate::common::RW,
1649 >::from_register(self, 0)
1650 }
1651}
1652impl ::core::default::Default for SdInfo2 {
1653 #[inline(always)]
1654 fn default() -> SdInfo2 {
1655 <crate::RegValueT<SdInfo2_SPEC> as RegisterValue<_>>::new(8192)
1656 }
1657}
1658pub mod sd_info2 {
1659
1660 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1661 pub struct Cmde_SPEC;
1662 pub type Cmde = crate::EnumBitfieldStruct<u8, Cmde_SPEC>;
1663 impl Cmde {
1664 #[doc = "Command error not detected"]
1665 pub const _0: Self = Self::new(0);
1666
1667 #[doc = "Command error detected"]
1668 pub const _1: Self = Self::new(1);
1669 }
1670 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1671 pub struct Crce_SPEC;
1672 pub type Crce = crate::EnumBitfieldStruct<u8, Crce_SPEC>;
1673 impl Crce {
1674 #[doc = "CRC error not detected"]
1675 pub const _0: Self = Self::new(0);
1676
1677 #[doc = "CRC error detected"]
1678 pub const _1: Self = Self::new(1);
1679 }
1680 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1681 pub struct Ende_SPEC;
1682 pub type Ende = crate::EnumBitfieldStruct<u8, Ende_SPEC>;
1683 impl Ende {
1684 #[doc = "End bit error not detected"]
1685 pub const _0: Self = Self::new(0);
1686
1687 #[doc = "End bit error detected"]
1688 pub const _1: Self = Self::new(1);
1689 }
1690 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1691 pub struct Dto_SPEC;
1692 pub type Dto = crate::EnumBitfieldStruct<u8, Dto_SPEC>;
1693 impl Dto {
1694 #[doc = "Data timeout not detected"]
1695 pub const _0: Self = Self::new(0);
1696
1697 #[doc = "Data timeout detected"]
1698 pub const _1: Self = Self::new(1);
1699 }
1700 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1701 pub struct Ilw_SPEC;
1702 pub type Ilw = crate::EnumBitfieldStruct<u8, Ilw_SPEC>;
1703 impl Ilw {
1704 #[doc = "Illegal write access to the SD_BUF0 register not detected"]
1705 pub const _0: Self = Self::new(0);
1706
1707 #[doc = "Illegal write access to the SD_BUF0 register detected"]
1708 pub const _1: Self = Self::new(1);
1709 }
1710 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1711 pub struct Ilr_SPEC;
1712 pub type Ilr = crate::EnumBitfieldStruct<u8, Ilr_SPEC>;
1713 impl Ilr {
1714 #[doc = "Illegal read access to the SD_BUF0 register not detected"]
1715 pub const _0: Self = Self::new(0);
1716
1717 #[doc = "Illegal read access to the SD_BUF0 register detected"]
1718 pub const _1: Self = Self::new(1);
1719 }
1720 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1721 pub struct Rspto_SPEC;
1722 pub type Rspto = crate::EnumBitfieldStruct<u8, Rspto_SPEC>;
1723 impl Rspto {
1724 #[doc = "Response timeout not detected"]
1725 pub const _0: Self = Self::new(0);
1726
1727 #[doc = "Response timeout detected"]
1728 pub const _1: Self = Self::new(1);
1729 }
1730 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1731 pub struct Sdd0Mon_SPEC;
1732 pub type Sdd0Mon = crate::EnumBitfieldStruct<u8, Sdd0Mon_SPEC>;
1733 impl Sdd0Mon {
1734 #[doc = "SDnDAT0 pin is low"]
1735 pub const _0: Self = Self::new(0);
1736
1737 #[doc = "SDnDAT0 pin is high"]
1738 pub const _1: Self = Self::new(1);
1739 }
1740 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1741 pub struct Bre_SPEC;
1742 pub type Bre = crate::EnumBitfieldStruct<u8, Bre_SPEC>;
1743 impl Bre {
1744 #[doc = "Disable read access to the SD_BUF0 register"]
1745 pub const _0: Self = Self::new(0);
1746
1747 #[doc = "Enable read access to the SD_BUF0 register"]
1748 pub const _1: Self = Self::new(1);
1749 }
1750 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1751 pub struct Bwe_SPEC;
1752 pub type Bwe = crate::EnumBitfieldStruct<u8, Bwe_SPEC>;
1753 impl Bwe {
1754 #[doc = "Disable write access to the SD_BUF0 register"]
1755 pub const _0: Self = Self::new(0);
1756
1757 #[doc = "Enable write access to the SD_BUF0 register"]
1758 pub const _1: Self = Self::new(1);
1759 }
1760 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1761 pub struct SdClkCtrlen_SPEC;
1762 pub type SdClkCtrlen = crate::EnumBitfieldStruct<u8, SdClkCtrlen_SPEC>;
1763 impl SdClkCtrlen {
1764 #[doc = "SD/MMC bus (CMD and DAT lines) is busy, so write access to the SD_CLK_CTRL.CLKEN and CLKSEL\\[7:0\\] bits is disabled"]
1765 pub const _0: Self = Self::new(0);
1766
1767 #[doc = "SD/MMC bus (CMD and DAT lines) is not busy, so write access to the SD_CLK_CTRL.CLKEN and CLKSEL\\[7:0\\] bits is enabled"]
1768 pub const _1: Self = Self::new(1);
1769 }
1770 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1771 pub struct Cbsy_SPEC;
1772 pub type Cbsy = crate::EnumBitfieldStruct<u8, Cbsy_SPEC>;
1773 impl Cbsy {
1774 #[doc = "Command sequence complete"]
1775 pub const _0: Self = Self::new(0);
1776
1777 #[doc = "Command sequence in progress (busy)"]
1778 pub const _1: Self = Self::new(1);
1779 }
1780 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1781 pub struct Ila_SPEC;
1782 pub type Ila = crate::EnumBitfieldStruct<u8, Ila_SPEC>;
1783 impl Ila {
1784 #[doc = "Illegal access error not detected"]
1785 pub const _0: Self = Self::new(0);
1786
1787 #[doc = "Illegal access error detected"]
1788 pub const _1: Self = Self::new(1);
1789 }
1790}
1791#[doc(hidden)]
1792#[derive(Copy, Clone, Eq, PartialEq)]
1793pub struct SdInfo1Mask_SPEC;
1794impl crate::sealed::RegSpec for SdInfo1Mask_SPEC {
1795 type DataType = u32;
1796}
1797
1798#[doc = "SD INFO1 Interrupt Mask Register"]
1799pub type SdInfo1Mask = crate::RegValueT<SdInfo1Mask_SPEC>;
1800
1801impl SdInfo1Mask {
1802 #[doc = "Response End Interrupt Request Mask"]
1803 #[inline(always)]
1804 pub fn rspendm(
1805 self,
1806 ) -> crate::common::RegisterField<
1807 0,
1808 0x1,
1809 1,
1810 0,
1811 sd_info1_mask::Rspendm,
1812 sd_info1_mask::Rspendm,
1813 SdInfo1Mask_SPEC,
1814 crate::common::RW,
1815 > {
1816 crate::common::RegisterField::<
1817 0,
1818 0x1,
1819 1,
1820 0,
1821 sd_info1_mask::Rspendm,
1822 sd_info1_mask::Rspendm,
1823 SdInfo1Mask_SPEC,
1824 crate::common::RW,
1825 >::from_register(self, 0)
1826 }
1827
1828 #[doc = "Access End Interrupt Request Mask"]
1829 #[inline(always)]
1830 pub fn acendm(
1831 self,
1832 ) -> crate::common::RegisterField<
1833 2,
1834 0x1,
1835 1,
1836 0,
1837 sd_info1_mask::Acendm,
1838 sd_info1_mask::Acendm,
1839 SdInfo1Mask_SPEC,
1840 crate::common::RW,
1841 > {
1842 crate::common::RegisterField::<
1843 2,
1844 0x1,
1845 1,
1846 0,
1847 sd_info1_mask::Acendm,
1848 sd_info1_mask::Acendm,
1849 SdInfo1Mask_SPEC,
1850 crate::common::RW,
1851 >::from_register(self, 0)
1852 }
1853
1854 #[doc = "SDnCD Removal Interrupt Request Mask"]
1855 #[inline(always)]
1856 pub fn sdcdrmm(
1857 self,
1858 ) -> crate::common::RegisterField<
1859 3,
1860 0x1,
1861 1,
1862 0,
1863 sd_info1_mask::Sdcdrmm,
1864 sd_info1_mask::Sdcdrmm,
1865 SdInfo1Mask_SPEC,
1866 crate::common::RW,
1867 > {
1868 crate::common::RegisterField::<
1869 3,
1870 0x1,
1871 1,
1872 0,
1873 sd_info1_mask::Sdcdrmm,
1874 sd_info1_mask::Sdcdrmm,
1875 SdInfo1Mask_SPEC,
1876 crate::common::RW,
1877 >::from_register(self, 0)
1878 }
1879
1880 #[doc = "SDnCD Insertion Interrupt Request Mask"]
1881 #[inline(always)]
1882 pub fn sdcdinm(
1883 self,
1884 ) -> crate::common::RegisterField<
1885 4,
1886 0x1,
1887 1,
1888 0,
1889 sd_info1_mask::Sdcdinm,
1890 sd_info1_mask::Sdcdinm,
1891 SdInfo1Mask_SPEC,
1892 crate::common::RW,
1893 > {
1894 crate::common::RegisterField::<
1895 4,
1896 0x1,
1897 1,
1898 0,
1899 sd_info1_mask::Sdcdinm,
1900 sd_info1_mask::Sdcdinm,
1901 SdInfo1Mask_SPEC,
1902 crate::common::RW,
1903 >::from_register(self, 0)
1904 }
1905
1906 #[doc = "SDnDAT3 Removal Interrupt Request Mask"]
1907 #[inline(always)]
1908 pub fn sdd3rmm(
1909 self,
1910 ) -> crate::common::RegisterField<
1911 8,
1912 0x1,
1913 1,
1914 0,
1915 sd_info1_mask::Sdd3Rmm,
1916 sd_info1_mask::Sdd3Rmm,
1917 SdInfo1Mask_SPEC,
1918 crate::common::RW,
1919 > {
1920 crate::common::RegisterField::<
1921 8,
1922 0x1,
1923 1,
1924 0,
1925 sd_info1_mask::Sdd3Rmm,
1926 sd_info1_mask::Sdd3Rmm,
1927 SdInfo1Mask_SPEC,
1928 crate::common::RW,
1929 >::from_register(self, 0)
1930 }
1931
1932 #[doc = "SDnDAT3 Insertion Interrupt Request Mask"]
1933 #[inline(always)]
1934 pub fn sdd3inm(
1935 self,
1936 ) -> crate::common::RegisterField<
1937 9,
1938 0x1,
1939 1,
1940 0,
1941 sd_info1_mask::Sdd3Inm,
1942 sd_info1_mask::Sdd3Inm,
1943 SdInfo1Mask_SPEC,
1944 crate::common::RW,
1945 > {
1946 crate::common::RegisterField::<
1947 9,
1948 0x1,
1949 1,
1950 0,
1951 sd_info1_mask::Sdd3Inm,
1952 sd_info1_mask::Sdd3Inm,
1953 SdInfo1Mask_SPEC,
1954 crate::common::RW,
1955 >::from_register(self, 0)
1956 }
1957}
1958impl ::core::default::Default for SdInfo1Mask {
1959 #[inline(always)]
1960 fn default() -> SdInfo1Mask {
1961 <crate::RegValueT<SdInfo1Mask_SPEC> as RegisterValue<_>>::new(797)
1962 }
1963}
1964pub mod sd_info1_mask {
1965
1966 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1967 pub struct Rspendm_SPEC;
1968 pub type Rspendm = crate::EnumBitfieldStruct<u8, Rspendm_SPEC>;
1969 impl Rspendm {
1970 #[doc = "Do not mask response end interrupt request"]
1971 pub const _0: Self = Self::new(0);
1972
1973 #[doc = "Mask response end interrupt request"]
1974 pub const _1: Self = Self::new(1);
1975 }
1976 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1977 pub struct Acendm_SPEC;
1978 pub type Acendm = crate::EnumBitfieldStruct<u8, Acendm_SPEC>;
1979 impl Acendm {
1980 #[doc = "Do not mask access end interrupt request"]
1981 pub const _0: Self = Self::new(0);
1982
1983 #[doc = "Mask access end interrupt request"]
1984 pub const _1: Self = Self::new(1);
1985 }
1986 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1987 pub struct Sdcdrmm_SPEC;
1988 pub type Sdcdrmm = crate::EnumBitfieldStruct<u8, Sdcdrmm_SPEC>;
1989 impl Sdcdrmm {
1990 #[doc = "Do not mask SD card/MMC removal interrupt request by the SDnCD pin"]
1991 pub const _0: Self = Self::new(0);
1992
1993 #[doc = "Mask SD card/MMC removal interrupt request by the SDnCD pin"]
1994 pub const _1: Self = Self::new(1);
1995 }
1996 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1997 pub struct Sdcdinm_SPEC;
1998 pub type Sdcdinm = crate::EnumBitfieldStruct<u8, Sdcdinm_SPEC>;
1999 impl Sdcdinm {
2000 #[doc = "Do not mask SD card/MMC insertion interrupt request by the SDnCD pin"]
2001 pub const _0: Self = Self::new(0);
2002
2003 #[doc = "Mask SD card/MMC insertion interrupt request by the SDnCD pin"]
2004 pub const _1: Self = Self::new(1);
2005 }
2006 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2007 pub struct Sdd3Rmm_SPEC;
2008 pub type Sdd3Rmm = crate::EnumBitfieldStruct<u8, Sdd3Rmm_SPEC>;
2009 impl Sdd3Rmm {
2010 #[doc = "Do not mask SD card/MMC removal interrupt request by the SDnDAT3 pin"]
2011 pub const _0: Self = Self::new(0);
2012
2013 #[doc = "Mask SD card/MMC removal interrupt request by the SDnDAT3 pin"]
2014 pub const _1: Self = Self::new(1);
2015 }
2016 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2017 pub struct Sdd3Inm_SPEC;
2018 pub type Sdd3Inm = crate::EnumBitfieldStruct<u8, Sdd3Inm_SPEC>;
2019 impl Sdd3Inm {
2020 #[doc = "Do not mask SD card/MMC insertion interrupt request by the SDnDAT3 pin"]
2021 pub const _0: Self = Self::new(0);
2022
2023 #[doc = "Mask SD card/MMC insertion interrupt request by the SDnDAT3 pin"]
2024 pub const _1: Self = Self::new(1);
2025 }
2026}
2027#[doc(hidden)]
2028#[derive(Copy, Clone, Eq, PartialEq)]
2029pub struct SdInfo2Mask_SPEC;
2030impl crate::sealed::RegSpec for SdInfo2Mask_SPEC {
2031 type DataType = u32;
2032}
2033
2034#[doc = "SD INFO2 Interrupt Mask Register"]
2035pub type SdInfo2Mask = crate::RegValueT<SdInfo2Mask_SPEC>;
2036
2037impl SdInfo2Mask {
2038 #[doc = "Command Error Interrupt Request Mask"]
2039 #[inline(always)]
2040 pub fn cmdem(
2041 self,
2042 ) -> crate::common::RegisterField<
2043 0,
2044 0x1,
2045 1,
2046 0,
2047 sd_info2_mask::Cmdem,
2048 sd_info2_mask::Cmdem,
2049 SdInfo2Mask_SPEC,
2050 crate::common::RW,
2051 > {
2052 crate::common::RegisterField::<
2053 0,
2054 0x1,
2055 1,
2056 0,
2057 sd_info2_mask::Cmdem,
2058 sd_info2_mask::Cmdem,
2059 SdInfo2Mask_SPEC,
2060 crate::common::RW,
2061 >::from_register(self, 0)
2062 }
2063
2064 #[doc = "CRC Error Interrupt Request Mask"]
2065 #[inline(always)]
2066 pub fn crcem(
2067 self,
2068 ) -> crate::common::RegisterField<
2069 1,
2070 0x1,
2071 1,
2072 0,
2073 sd_info2_mask::Crcem,
2074 sd_info2_mask::Crcem,
2075 SdInfo2Mask_SPEC,
2076 crate::common::RW,
2077 > {
2078 crate::common::RegisterField::<
2079 1,
2080 0x1,
2081 1,
2082 0,
2083 sd_info2_mask::Crcem,
2084 sd_info2_mask::Crcem,
2085 SdInfo2Mask_SPEC,
2086 crate::common::RW,
2087 >::from_register(self, 0)
2088 }
2089
2090 #[doc = "End Bit Error Interrupt Request Mask"]
2091 #[inline(always)]
2092 pub fn endem(
2093 self,
2094 ) -> crate::common::RegisterField<
2095 2,
2096 0x1,
2097 1,
2098 0,
2099 sd_info2_mask::Endem,
2100 sd_info2_mask::Endem,
2101 SdInfo2Mask_SPEC,
2102 crate::common::RW,
2103 > {
2104 crate::common::RegisterField::<
2105 2,
2106 0x1,
2107 1,
2108 0,
2109 sd_info2_mask::Endem,
2110 sd_info2_mask::Endem,
2111 SdInfo2Mask_SPEC,
2112 crate::common::RW,
2113 >::from_register(self, 0)
2114 }
2115
2116 #[doc = "Data Timeout Interrupt Request Mask"]
2117 #[inline(always)]
2118 pub fn dtom(
2119 self,
2120 ) -> crate::common::RegisterField<
2121 3,
2122 0x1,
2123 1,
2124 0,
2125 sd_info2_mask::Dtom,
2126 sd_info2_mask::Dtom,
2127 SdInfo2Mask_SPEC,
2128 crate::common::RW,
2129 > {
2130 crate::common::RegisterField::<
2131 3,
2132 0x1,
2133 1,
2134 0,
2135 sd_info2_mask::Dtom,
2136 sd_info2_mask::Dtom,
2137 SdInfo2Mask_SPEC,
2138 crate::common::RW,
2139 >::from_register(self, 0)
2140 }
2141
2142 #[doc = "SD_BUF0 Register Illegal Write Interrupt Request Mask"]
2143 #[inline(always)]
2144 pub fn ilwm(
2145 self,
2146 ) -> crate::common::RegisterField<
2147 4,
2148 0x1,
2149 1,
2150 0,
2151 sd_info2_mask::Ilwm,
2152 sd_info2_mask::Ilwm,
2153 SdInfo2Mask_SPEC,
2154 crate::common::RW,
2155 > {
2156 crate::common::RegisterField::<
2157 4,
2158 0x1,
2159 1,
2160 0,
2161 sd_info2_mask::Ilwm,
2162 sd_info2_mask::Ilwm,
2163 SdInfo2Mask_SPEC,
2164 crate::common::RW,
2165 >::from_register(self, 0)
2166 }
2167
2168 #[doc = "SD_BUF0 Register Illegal Read Interrupt Request Mask"]
2169 #[inline(always)]
2170 pub fn ilrm(
2171 self,
2172 ) -> crate::common::RegisterField<
2173 5,
2174 0x1,
2175 1,
2176 0,
2177 sd_info2_mask::Ilrm,
2178 sd_info2_mask::Ilrm,
2179 SdInfo2Mask_SPEC,
2180 crate::common::RW,
2181 > {
2182 crate::common::RegisterField::<
2183 5,
2184 0x1,
2185 1,
2186 0,
2187 sd_info2_mask::Ilrm,
2188 sd_info2_mask::Ilrm,
2189 SdInfo2Mask_SPEC,
2190 crate::common::RW,
2191 >::from_register(self, 0)
2192 }
2193
2194 #[doc = "Response Timeout Interrupt Request Mask"]
2195 #[inline(always)]
2196 pub fn rsptom(
2197 self,
2198 ) -> crate::common::RegisterField<
2199 6,
2200 0x1,
2201 1,
2202 0,
2203 sd_info2_mask::Rsptom,
2204 sd_info2_mask::Rsptom,
2205 SdInfo2Mask_SPEC,
2206 crate::common::RW,
2207 > {
2208 crate::common::RegisterField::<
2209 6,
2210 0x1,
2211 1,
2212 0,
2213 sd_info2_mask::Rsptom,
2214 sd_info2_mask::Rsptom,
2215 SdInfo2Mask_SPEC,
2216 crate::common::RW,
2217 >::from_register(self, 0)
2218 }
2219
2220 #[doc = "BRE Interrupt Request Mask"]
2221 #[inline(always)]
2222 pub fn brem(
2223 self,
2224 ) -> crate::common::RegisterField<
2225 8,
2226 0x1,
2227 1,
2228 0,
2229 sd_info2_mask::Brem,
2230 sd_info2_mask::Brem,
2231 SdInfo2Mask_SPEC,
2232 crate::common::RW,
2233 > {
2234 crate::common::RegisterField::<
2235 8,
2236 0x1,
2237 1,
2238 0,
2239 sd_info2_mask::Brem,
2240 sd_info2_mask::Brem,
2241 SdInfo2Mask_SPEC,
2242 crate::common::RW,
2243 >::from_register(self, 0)
2244 }
2245
2246 #[doc = "BWE Interrupt Request Mask"]
2247 #[inline(always)]
2248 pub fn bwem(
2249 self,
2250 ) -> crate::common::RegisterField<
2251 9,
2252 0x1,
2253 1,
2254 0,
2255 sd_info2_mask::Bwem,
2256 sd_info2_mask::Bwem,
2257 SdInfo2Mask_SPEC,
2258 crate::common::RW,
2259 > {
2260 crate::common::RegisterField::<
2261 9,
2262 0x1,
2263 1,
2264 0,
2265 sd_info2_mask::Bwem,
2266 sd_info2_mask::Bwem,
2267 SdInfo2Mask_SPEC,
2268 crate::common::RW,
2269 >::from_register(self, 0)
2270 }
2271
2272 #[doc = "Illegal Access Error Interrupt Request Mask"]
2273 #[inline(always)]
2274 pub fn ilam(
2275 self,
2276 ) -> crate::common::RegisterField<
2277 15,
2278 0x1,
2279 1,
2280 0,
2281 sd_info2_mask::Ilam,
2282 sd_info2_mask::Ilam,
2283 SdInfo2Mask_SPEC,
2284 crate::common::RW,
2285 > {
2286 crate::common::RegisterField::<
2287 15,
2288 0x1,
2289 1,
2290 0,
2291 sd_info2_mask::Ilam,
2292 sd_info2_mask::Ilam,
2293 SdInfo2Mask_SPEC,
2294 crate::common::RW,
2295 >::from_register(self, 0)
2296 }
2297}
2298impl ::core::default::Default for SdInfo2Mask {
2299 #[inline(always)]
2300 fn default() -> SdInfo2Mask {
2301 <crate::RegValueT<SdInfo2Mask_SPEC> as RegisterValue<_>>::new(35711)
2302 }
2303}
2304pub mod sd_info2_mask {
2305
2306 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2307 pub struct Cmdem_SPEC;
2308 pub type Cmdem = crate::EnumBitfieldStruct<u8, Cmdem_SPEC>;
2309 impl Cmdem {
2310 #[doc = "Do not mask command error interrupt request"]
2311 pub const _0: Self = Self::new(0);
2312
2313 #[doc = "Mask command error interrupt request"]
2314 pub const _1: Self = Self::new(1);
2315 }
2316 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2317 pub struct Crcem_SPEC;
2318 pub type Crcem = crate::EnumBitfieldStruct<u8, Crcem_SPEC>;
2319 impl Crcem {
2320 #[doc = "Do not mask CRC error interrupt request"]
2321 pub const _0: Self = Self::new(0);
2322
2323 #[doc = "Mask CRC error interrupt request"]
2324 pub const _1: Self = Self::new(1);
2325 }
2326 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2327 pub struct Endem_SPEC;
2328 pub type Endem = crate::EnumBitfieldStruct<u8, Endem_SPEC>;
2329 impl Endem {
2330 #[doc = "Do not mask end bit detection error interrupt request"]
2331 pub const _0: Self = Self::new(0);
2332
2333 #[doc = "Mask end bit detection error interrupt request"]
2334 pub const _1: Self = Self::new(1);
2335 }
2336 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2337 pub struct Dtom_SPEC;
2338 pub type Dtom = crate::EnumBitfieldStruct<u8, Dtom_SPEC>;
2339 impl Dtom {
2340 #[doc = "Do not mask data timeout interrupt request"]
2341 pub const _0: Self = Self::new(0);
2342
2343 #[doc = "Mask data timeout interrupt request"]
2344 pub const _1: Self = Self::new(1);
2345 }
2346 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2347 pub struct Ilwm_SPEC;
2348 pub type Ilwm = crate::EnumBitfieldStruct<u8, Ilwm_SPEC>;
2349 impl Ilwm {
2350 #[doc = "Do not mask illegal write detection interrupt request for the SD_BUF0 register"]
2351 pub const _0: Self = Self::new(0);
2352
2353 #[doc = "Mask illegal write detection interrupt request for the SD_BUF0 register"]
2354 pub const _1: Self = Self::new(1);
2355 }
2356 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2357 pub struct Ilrm_SPEC;
2358 pub type Ilrm = crate::EnumBitfieldStruct<u8, Ilrm_SPEC>;
2359 impl Ilrm {
2360 #[doc = "Do not mask illegal read detection interrupt request for the SD_BUF0 register"]
2361 pub const _0: Self = Self::new(0);
2362
2363 #[doc = "Mask illegal read detection interrupt request for the SD_BUF0 register"]
2364 pub const _1: Self = Self::new(1);
2365 }
2366 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2367 pub struct Rsptom_SPEC;
2368 pub type Rsptom = crate::EnumBitfieldStruct<u8, Rsptom_SPEC>;
2369 impl Rsptom {
2370 #[doc = "Do not mask response timeout interrupt request"]
2371 pub const _0: Self = Self::new(0);
2372
2373 #[doc = "Mask response timeout interrupt request"]
2374 pub const _1: Self = Self::new(1);
2375 }
2376 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2377 pub struct Brem_SPEC;
2378 pub type Brem = crate::EnumBitfieldStruct<u8, Brem_SPEC>;
2379 impl Brem {
2380 #[doc = "Do not mask read enable interrupt request for the SD buffer"]
2381 pub const _0: Self = Self::new(0);
2382
2383 #[doc = "Mask read enable interrupt request for the SD buffer"]
2384 pub const _1: Self = Self::new(1);
2385 }
2386 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2387 pub struct Bwem_SPEC;
2388 pub type Bwem = crate::EnumBitfieldStruct<u8, Bwem_SPEC>;
2389 impl Bwem {
2390 #[doc = "Do not mask write enable interrupt request for the SD_BUF0 register"]
2391 pub const _0: Self = Self::new(0);
2392
2393 #[doc = "Mask write enable interrupt request for the SD_BUF0 register"]
2394 pub const _1: Self = Self::new(1);
2395 }
2396 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2397 pub struct Ilam_SPEC;
2398 pub type Ilam = crate::EnumBitfieldStruct<u8, Ilam_SPEC>;
2399 impl Ilam {
2400 #[doc = "Do not mask illegal access error interrupt request"]
2401 pub const _0: Self = Self::new(0);
2402
2403 #[doc = "Mask illegal access error interrupt request"]
2404 pub const _1: Self = Self::new(1);
2405 }
2406}
2407#[doc(hidden)]
2408#[derive(Copy, Clone, Eq, PartialEq)]
2409pub struct SdClkCtrl_SPEC;
2410impl crate::sealed::RegSpec for SdClkCtrl_SPEC {
2411 type DataType = u32;
2412}
2413
2414#[doc = "SD Clock Control Register"]
2415pub type SdClkCtrl = crate::RegValueT<SdClkCtrl_SPEC>;
2416
2417impl SdClkCtrl {
2418 #[doc = "SDHI Clock Frequency Select"]
2419 #[inline(always)]
2420 pub fn clksel(
2421 self,
2422 ) -> crate::common::RegisterField<
2423 0,
2424 0xff,
2425 1,
2426 0,
2427 sd_clk_ctrl::Clksel,
2428 sd_clk_ctrl::Clksel,
2429 SdClkCtrl_SPEC,
2430 crate::common::RW,
2431 > {
2432 crate::common::RegisterField::<
2433 0,
2434 0xff,
2435 1,
2436 0,
2437 sd_clk_ctrl::Clksel,
2438 sd_clk_ctrl::Clksel,
2439 SdClkCtrl_SPEC,
2440 crate::common::RW,
2441 >::from_register(self, 0)
2442 }
2443
2444 #[doc = "SD/MMC Clock Output Control"]
2445 #[inline(always)]
2446 pub fn clken(
2447 self,
2448 ) -> crate::common::RegisterField<
2449 8,
2450 0x1,
2451 1,
2452 0,
2453 sd_clk_ctrl::Clken,
2454 sd_clk_ctrl::Clken,
2455 SdClkCtrl_SPEC,
2456 crate::common::RW,
2457 > {
2458 crate::common::RegisterField::<
2459 8,
2460 0x1,
2461 1,
2462 0,
2463 sd_clk_ctrl::Clken,
2464 sd_clk_ctrl::Clken,
2465 SdClkCtrl_SPEC,
2466 crate::common::RW,
2467 >::from_register(self, 0)
2468 }
2469
2470 #[doc = "SD/MMC Clock Output Automatic Control Select"]
2471 #[inline(always)]
2472 pub fn clkctrlen(
2473 self,
2474 ) -> crate::common::RegisterField<
2475 9,
2476 0x1,
2477 1,
2478 0,
2479 sd_clk_ctrl::Clkctrlen,
2480 sd_clk_ctrl::Clkctrlen,
2481 SdClkCtrl_SPEC,
2482 crate::common::RW,
2483 > {
2484 crate::common::RegisterField::<
2485 9,
2486 0x1,
2487 1,
2488 0,
2489 sd_clk_ctrl::Clkctrlen,
2490 sd_clk_ctrl::Clkctrlen,
2491 SdClkCtrl_SPEC,
2492 crate::common::RW,
2493 >::from_register(self, 0)
2494 }
2495}
2496impl ::core::default::Default for SdClkCtrl {
2497 #[inline(always)]
2498 fn default() -> SdClkCtrl {
2499 <crate::RegValueT<SdClkCtrl_SPEC> as RegisterValue<_>>::new(32)
2500 }
2501}
2502pub mod sd_clk_ctrl {
2503
2504 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2505 pub struct Clksel_SPEC;
2506 pub type Clksel = crate::EnumBitfieldStruct<u8, Clksel_SPEC>;
2507 impl Clksel {
2508 #[doc = "PCLKB"]
2509 pub const _0_X_FF: Self = Self::new(255);
2510
2511 #[doc = "PCLKB/2"]
2512 pub const _0_X_00: Self = Self::new(0);
2513
2514 #[doc = "PCLKB/4"]
2515 pub const _0_X_01: Self = Self::new(1);
2516
2517 #[doc = "PCLKB/8"]
2518 pub const _0_X_02: Self = Self::new(2);
2519
2520 #[doc = "PCLKB/16"]
2521 pub const _0_X_04: Self = Self::new(4);
2522
2523 #[doc = "PCLKB/32"]
2524 pub const _0_X_08: Self = Self::new(8);
2525
2526 #[doc = "PCLKB/64"]
2527 pub const _0_X_10: Self = Self::new(16);
2528
2529 #[doc = "PCLKB/128"]
2530 pub const _0_X_20: Self = Self::new(32);
2531
2532 #[doc = "PCLKB/256"]
2533 pub const _0_X_40: Self = Self::new(64);
2534
2535 #[doc = "PCLKB/512"]
2536 pub const _0_X_80: Self = Self::new(128);
2537 }
2538 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2539 pub struct Clken_SPEC;
2540 pub type Clken = crate::EnumBitfieldStruct<u8, Clken_SPEC>;
2541 impl Clken {
2542 #[doc = "Disable SD/MMC clock output (fix SDnCLK signal low)"]
2543 pub const _0: Self = Self::new(0);
2544
2545 #[doc = "Enable SD/MMC clock output"]
2546 pub const _1: Self = Self::new(1);
2547 }
2548 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2549 pub struct Clkctrlen_SPEC;
2550 pub type Clkctrlen = crate::EnumBitfieldStruct<u8, Clkctrlen_SPEC>;
2551 impl Clkctrlen {
2552 #[doc = "Disable automatic control of SD/MMC clock output"]
2553 pub const _0: Self = Self::new(0);
2554
2555 #[doc = "Enable automatic control of SD/MMC clock output"]
2556 pub const _1: Self = Self::new(1);
2557 }
2558}
2559#[doc(hidden)]
2560#[derive(Copy, Clone, Eq, PartialEq)]
2561pub struct SdSize_SPEC;
2562impl crate::sealed::RegSpec for SdSize_SPEC {
2563 type DataType = u32;
2564}
2565
2566#[doc = "Transfer Data Length Register"]
2567pub type SdSize = crate::RegValueT<SdSize_SPEC>;
2568
2569impl SdSize {
2570 #[doc = "Transfer Data Size Setting"]
2571 #[inline(always)]
2572 pub fn len(
2573 self,
2574 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, SdSize_SPEC, crate::common::RW>
2575 {
2576 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,SdSize_SPEC,crate::common::RW>::from_register(self,0)
2577 }
2578}
2579impl ::core::default::Default for SdSize {
2580 #[inline(always)]
2581 fn default() -> SdSize {
2582 <crate::RegValueT<SdSize_SPEC> as RegisterValue<_>>::new(512)
2583 }
2584}
2585
2586#[doc(hidden)]
2587#[derive(Copy, Clone, Eq, PartialEq)]
2588pub struct SdOption_SPEC;
2589impl crate::sealed::RegSpec for SdOption_SPEC {
2590 type DataType = u32;
2591}
2592
2593#[doc = "SD Card Access Control Option Register"]
2594pub type SdOption = crate::RegValueT<SdOption_SPEC>;
2595
2596impl SdOption {
2597 #[doc = "Card Detection Time Counter"]
2598 #[inline(always)]
2599 pub fn ctop(
2600 self,
2601 ) -> crate::common::RegisterField<
2602 0,
2603 0xf,
2604 1,
2605 0,
2606 sd_option::Ctop,
2607 sd_option::Ctop,
2608 SdOption_SPEC,
2609 crate::common::RW,
2610 > {
2611 crate::common::RegisterField::<
2612 0,
2613 0xf,
2614 1,
2615 0,
2616 sd_option::Ctop,
2617 sd_option::Ctop,
2618 SdOption_SPEC,
2619 crate::common::RW,
2620 >::from_register(self, 0)
2621 }
2622
2623 #[doc = "Timeout Counter"]
2624 #[inline(always)]
2625 pub fn top(
2626 self,
2627 ) -> crate::common::RegisterField<
2628 4,
2629 0xf,
2630 1,
2631 0,
2632 sd_option::Top,
2633 sd_option::Top,
2634 SdOption_SPEC,
2635 crate::common::RW,
2636 > {
2637 crate::common::RegisterField::<
2638 4,
2639 0xf,
2640 1,
2641 0,
2642 sd_option::Top,
2643 sd_option::Top,
2644 SdOption_SPEC,
2645 crate::common::RW,
2646 >::from_register(self, 0)
2647 }
2648
2649 #[doc = "Timeout Mask"]
2650 #[inline(always)]
2651 pub fn toutmask(
2652 self,
2653 ) -> crate::common::RegisterField<
2654 8,
2655 0x1,
2656 1,
2657 0,
2658 sd_option::Toutmask,
2659 sd_option::Toutmask,
2660 SdOption_SPEC,
2661 crate::common::RW,
2662 > {
2663 crate::common::RegisterField::<
2664 8,
2665 0x1,
2666 1,
2667 0,
2668 sd_option::Toutmask,
2669 sd_option::Toutmask,
2670 SdOption_SPEC,
2671 crate::common::RW,
2672 >::from_register(self, 0)
2673 }
2674
2675 #[doc = "Bus Width"]
2676 #[inline(always)]
2677 pub fn width8(
2678 self,
2679 ) -> crate::common::RegisterFieldBool<13, 1, 0, SdOption_SPEC, crate::common::RW> {
2680 crate::common::RegisterFieldBool::<13,1,0,SdOption_SPEC,crate::common::RW>::from_register(self,0)
2681 }
2682
2683 #[doc = "Bus Width"]
2684 #[inline(always)]
2685 pub fn width(
2686 self,
2687 ) -> crate::common::RegisterFieldBool<15, 1, 0, SdOption_SPEC, crate::common::RW> {
2688 crate::common::RegisterFieldBool::<15,1,0,SdOption_SPEC,crate::common::RW>::from_register(self,0)
2689 }
2690}
2691impl ::core::default::Default for SdOption {
2692 #[inline(always)]
2693 fn default() -> SdOption {
2694 <crate::RegValueT<SdOption_SPEC> as RegisterValue<_>>::new(16622)
2695 }
2696}
2697pub mod sd_option {
2698
2699 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2700 pub struct Ctop_SPEC;
2701 pub type Ctop = crate::EnumBitfieldStruct<u8, Ctop_SPEC>;
2702 impl Ctop {
2703 #[doc = "PCLKB × 210"]
2704 pub const _0_X_0: Self = Self::new(0);
2705
2706 #[doc = "PCLKB × 211"]
2707 pub const _0_X_1: Self = Self::new(1);
2708
2709 #[doc = "PCLKB × 212"]
2710 pub const _0_X_2: Self = Self::new(2);
2711
2712 #[doc = "PCLKB × 213"]
2713 pub const _0_X_3: Self = Self::new(3);
2714
2715 #[doc = "PCLKB × 214"]
2716 pub const _0_X_4: Self = Self::new(4);
2717
2718 #[doc = "PCLKB × 215"]
2719 pub const _0_X_5: Self = Self::new(5);
2720
2721 #[doc = "PCLKB × 216"]
2722 pub const _0_X_6: Self = Self::new(6);
2723
2724 #[doc = "PCLKB × 217"]
2725 pub const _0_X_7: Self = Self::new(7);
2726
2727 #[doc = "PCLKB × 218"]
2728 pub const _0_X_8: Self = Self::new(8);
2729
2730 #[doc = "PCLKB × 219"]
2731 pub const _0_X_9: Self = Self::new(9);
2732
2733 #[doc = "PCLKB × 220"]
2734 pub const _0_X_A: Self = Self::new(10);
2735
2736 #[doc = "PCLKB × 221"]
2737 pub const _0_X_B: Self = Self::new(11);
2738
2739 #[doc = "PCLKB × 222"]
2740 pub const _0_X_C: Self = Self::new(12);
2741
2742 #[doc = "PCLKB × 223"]
2743 pub const _0_X_D: Self = Self::new(13);
2744
2745 #[doc = "PCLKB × 224"]
2746 pub const _0_X_E: Self = Self::new(14);
2747
2748 #[doc = "Setting prohibited"]
2749 pub const _0_X_F: Self = Self::new(15);
2750 }
2751 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2752 pub struct Top_SPEC;
2753 pub type Top = crate::EnumBitfieldStruct<u8, Top_SPEC>;
2754 impl Top {
2755 #[doc = "SD/MMC clock × 213"]
2756 pub const _0_X_0: Self = Self::new(0);
2757
2758 #[doc = "SD/MMC clock × 214"]
2759 pub const _0_X_1: Self = Self::new(1);
2760
2761 #[doc = "SD/MMC clock × 215"]
2762 pub const _0_X_2: Self = Self::new(2);
2763
2764 #[doc = "SD/MMC clock × 216"]
2765 pub const _0_X_3: Self = Self::new(3);
2766
2767 #[doc = "SD/MMC clock × 217"]
2768 pub const _0_X_4: Self = Self::new(4);
2769
2770 #[doc = "SD/MMC clock × 218"]
2771 pub const _0_X_5: Self = Self::new(5);
2772
2773 #[doc = "SD/MMC clock × 219"]
2774 pub const _0_X_6: Self = Self::new(6);
2775
2776 #[doc = "SD/MMC clock × 220"]
2777 pub const _0_X_7: Self = Self::new(7);
2778
2779 #[doc = "SD/MMC clock × 221"]
2780 pub const _0_X_8: Self = Self::new(8);
2781
2782 #[doc = "SD/MMC clock × 222"]
2783 pub const _0_X_9: Self = Self::new(9);
2784
2785 #[doc = "SD/MMC clock × 223"]
2786 pub const _0_X_A: Self = Self::new(10);
2787
2788 #[doc = "SD/MMC clock × 224"]
2789 pub const _0_X_B: Self = Self::new(11);
2790
2791 #[doc = "SD/MMC clock × 225"]
2792 pub const _0_X_C: Self = Self::new(12);
2793
2794 #[doc = "SD/MMC clock × 226"]
2795 pub const _0_X_D: Self = Self::new(13);
2796
2797 #[doc = "SD/MMC clock × 227"]
2798 pub const _0_X_E: Self = Self::new(14);
2799
2800 #[doc = "Setting prohibited"]
2801 pub const _0_X_F: Self = Self::new(15);
2802 }
2803 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2804 pub struct Toutmask_SPEC;
2805 pub type Toutmask = crate::EnumBitfieldStruct<u8, Toutmask_SPEC>;
2806 impl Toutmask {
2807 #[doc = "Activate timeout"]
2808 pub const _0: Self = Self::new(0);
2809
2810 #[doc = "Inactivate timeout (do not set RSPTO and DTO bits of SD_INFO2 or CRCBSYTO, CRCTO, RDTO, BSYTO1, BSYTO0, RSPTO1 and RSPTO0 bits of SD_ERR_STS2) When timeout occurs because of an inactivated timeout, execute a software reset to terminate the command sequence."]
2811 pub const _1: Self = Self::new(1);
2812 }
2813}
2814#[doc(hidden)]
2815#[derive(Copy, Clone, Eq, PartialEq)]
2816pub struct SdErrSts1_SPEC;
2817impl crate::sealed::RegSpec for SdErrSts1_SPEC {
2818 type DataType = u32;
2819}
2820
2821#[doc = "SD Error Status Register 1"]
2822pub type SdErrSts1 = crate::RegValueT<SdErrSts1_SPEC>;
2823
2824impl SdErrSts1 {
2825 #[doc = "Command Error Flag 0"]
2826 #[inline(always)]
2827 pub fn cmde0(
2828 self,
2829 ) -> crate::common::RegisterField<
2830 0,
2831 0x1,
2832 1,
2833 0,
2834 sd_err_sts1::Cmde0,
2835 sd_err_sts1::Cmde0,
2836 SdErrSts1_SPEC,
2837 crate::common::R,
2838 > {
2839 crate::common::RegisterField::<
2840 0,
2841 0x1,
2842 1,
2843 0,
2844 sd_err_sts1::Cmde0,
2845 sd_err_sts1::Cmde0,
2846 SdErrSts1_SPEC,
2847 crate::common::R,
2848 >::from_register(self, 0)
2849 }
2850
2851 #[doc = "Command Error Flag 1"]
2852 #[inline(always)]
2853 pub fn cmde1(
2854 self,
2855 ) -> crate::common::RegisterField<
2856 1,
2857 0x1,
2858 1,
2859 0,
2860 sd_err_sts1::Cmde1,
2861 sd_err_sts1::Cmde1,
2862 SdErrSts1_SPEC,
2863 crate::common::R,
2864 > {
2865 crate::common::RegisterField::<
2866 1,
2867 0x1,
2868 1,
2869 0,
2870 sd_err_sts1::Cmde1,
2871 sd_err_sts1::Cmde1,
2872 SdErrSts1_SPEC,
2873 crate::common::R,
2874 >::from_register(self, 0)
2875 }
2876
2877 #[doc = "Response Length Error Flag 0"]
2878 #[inline(always)]
2879 pub fn rsplene0(
2880 self,
2881 ) -> crate::common::RegisterField<
2882 2,
2883 0x1,
2884 1,
2885 0,
2886 sd_err_sts1::Rsplene0,
2887 sd_err_sts1::Rsplene0,
2888 SdErrSts1_SPEC,
2889 crate::common::R,
2890 > {
2891 crate::common::RegisterField::<
2892 2,
2893 0x1,
2894 1,
2895 0,
2896 sd_err_sts1::Rsplene0,
2897 sd_err_sts1::Rsplene0,
2898 SdErrSts1_SPEC,
2899 crate::common::R,
2900 >::from_register(self, 0)
2901 }
2902
2903 #[doc = "Response Length Error Flag 1"]
2904 #[inline(always)]
2905 pub fn rsplene1(
2906 self,
2907 ) -> crate::common::RegisterField<
2908 3,
2909 0x1,
2910 1,
2911 0,
2912 sd_err_sts1::Rsplene1,
2913 sd_err_sts1::Rsplene1,
2914 SdErrSts1_SPEC,
2915 crate::common::R,
2916 > {
2917 crate::common::RegisterField::<
2918 3,
2919 0x1,
2920 1,
2921 0,
2922 sd_err_sts1::Rsplene1,
2923 sd_err_sts1::Rsplene1,
2924 SdErrSts1_SPEC,
2925 crate::common::R,
2926 >::from_register(self, 0)
2927 }
2928
2929 #[doc = "Read Data Length Error Flag"]
2930 #[inline(always)]
2931 pub fn rdlene(
2932 self,
2933 ) -> crate::common::RegisterField<
2934 4,
2935 0x1,
2936 1,
2937 0,
2938 sd_err_sts1::Rdlene,
2939 sd_err_sts1::Rdlene,
2940 SdErrSts1_SPEC,
2941 crate::common::R,
2942 > {
2943 crate::common::RegisterField::<
2944 4,
2945 0x1,
2946 1,
2947 0,
2948 sd_err_sts1::Rdlene,
2949 sd_err_sts1::Rdlene,
2950 SdErrSts1_SPEC,
2951 crate::common::R,
2952 >::from_register(self, 0)
2953 }
2954
2955 #[doc = "CRC Status Token Length Error Flag"]
2956 #[inline(always)]
2957 pub fn crclene(
2958 self,
2959 ) -> crate::common::RegisterField<
2960 5,
2961 0x1,
2962 1,
2963 0,
2964 sd_err_sts1::Crclene,
2965 sd_err_sts1::Crclene,
2966 SdErrSts1_SPEC,
2967 crate::common::R,
2968 > {
2969 crate::common::RegisterField::<
2970 5,
2971 0x1,
2972 1,
2973 0,
2974 sd_err_sts1::Crclene,
2975 sd_err_sts1::Crclene,
2976 SdErrSts1_SPEC,
2977 crate::common::R,
2978 >::from_register(self, 0)
2979 }
2980
2981 #[doc = "Response CRC Error Flag 0"]
2982 #[inline(always)]
2983 pub fn rspcrce0(
2984 self,
2985 ) -> crate::common::RegisterField<
2986 8,
2987 0x1,
2988 1,
2989 0,
2990 sd_err_sts1::Rspcrce0,
2991 sd_err_sts1::Rspcrce0,
2992 SdErrSts1_SPEC,
2993 crate::common::R,
2994 > {
2995 crate::common::RegisterField::<
2996 8,
2997 0x1,
2998 1,
2999 0,
3000 sd_err_sts1::Rspcrce0,
3001 sd_err_sts1::Rspcrce0,
3002 SdErrSts1_SPEC,
3003 crate::common::R,
3004 >::from_register(self, 0)
3005 }
3006
3007 #[doc = "Response CRC Error Flag 1"]
3008 #[inline(always)]
3009 pub fn rspcrce1(
3010 self,
3011 ) -> crate::common::RegisterField<
3012 9,
3013 0x1,
3014 1,
3015 0,
3016 sd_err_sts1::Rspcrce1,
3017 sd_err_sts1::Rspcrce1,
3018 SdErrSts1_SPEC,
3019 crate::common::R,
3020 > {
3021 crate::common::RegisterField::<
3022 9,
3023 0x1,
3024 1,
3025 0,
3026 sd_err_sts1::Rspcrce1,
3027 sd_err_sts1::Rspcrce1,
3028 SdErrSts1_SPEC,
3029 crate::common::R,
3030 >::from_register(self, 0)
3031 }
3032
3033 #[doc = "Read Data CRC Error Flag"]
3034 #[inline(always)]
3035 pub fn rdcrce(
3036 self,
3037 ) -> crate::common::RegisterField<
3038 10,
3039 0x1,
3040 1,
3041 0,
3042 sd_err_sts1::Rdcrce,
3043 sd_err_sts1::Rdcrce,
3044 SdErrSts1_SPEC,
3045 crate::common::R,
3046 > {
3047 crate::common::RegisterField::<
3048 10,
3049 0x1,
3050 1,
3051 0,
3052 sd_err_sts1::Rdcrce,
3053 sd_err_sts1::Rdcrce,
3054 SdErrSts1_SPEC,
3055 crate::common::R,
3056 >::from_register(self, 0)
3057 }
3058
3059 #[doc = "CRC Status Token Error Flag"]
3060 #[inline(always)]
3061 pub fn crctke(
3062 self,
3063 ) -> crate::common::RegisterField<
3064 11,
3065 0x1,
3066 1,
3067 0,
3068 sd_err_sts1::Crctke,
3069 sd_err_sts1::Crctke,
3070 SdErrSts1_SPEC,
3071 crate::common::R,
3072 > {
3073 crate::common::RegisterField::<
3074 11,
3075 0x1,
3076 1,
3077 0,
3078 sd_err_sts1::Crctke,
3079 sd_err_sts1::Crctke,
3080 SdErrSts1_SPEC,
3081 crate::common::R,
3082 >::from_register(self, 0)
3083 }
3084
3085 #[doc = "CRC Status Token"]
3086 #[inline(always)]
3087 pub fn crctk(
3088 self,
3089 ) -> crate::common::RegisterField<12, 0x7, 1, 0, u8, u8, SdErrSts1_SPEC, crate::common::R> {
3090 crate::common::RegisterField::<12,0x7,1,0,u8,u8,SdErrSts1_SPEC,crate::common::R>::from_register(self,0)
3091 }
3092}
3093impl ::core::default::Default for SdErrSts1 {
3094 #[inline(always)]
3095 fn default() -> SdErrSts1 {
3096 <crate::RegValueT<SdErrSts1_SPEC> as RegisterValue<_>>::new(8192)
3097 }
3098}
3099pub mod sd_err_sts1 {
3100
3101 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3102 pub struct Cmde0_SPEC;
3103 pub type Cmde0 = crate::EnumBitfieldStruct<u8, Cmde0_SPEC>;
3104 impl Cmde0 {
3105 #[doc = "No error exists in command index field value of a command response"]
3106 pub const _0: Self = Self::new(0);
3107
3108 #[doc = "Error exists in command index field value of a command response"]
3109 pub const _1: Self = Self::new(1);
3110 }
3111 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3112 pub struct Cmde1_SPEC;
3113 pub type Cmde1 = crate::EnumBitfieldStruct<u8, Cmde1_SPEC>;
3114 impl Cmde1 {
3115 #[doc = "No error exists in command index field value of a command response"]
3116 pub const _0: Self = Self::new(0);
3117
3118 #[doc = "Error exists in command index field value of a command response (with SD_CMD.CMDIDX\\[5:0\\] setting, an error that occurs with CMD12 issue is indicated in the CMDE0 flag)"]
3119 pub const _1: Self = Self::new(1);
3120 }
3121 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3122 pub struct Rsplene0_SPEC;
3123 pub type Rsplene0 = crate::EnumBitfieldStruct<u8, Rsplene0_SPEC>;
3124 impl Rsplene0 {
3125 #[doc = "No error exists in command response length"]
3126 pub const _0: Self = Self::new(0);
3127
3128 #[doc = "Error exists in command response length"]
3129 pub const _1: Self = Self::new(1);
3130 }
3131 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3132 pub struct Rsplene1_SPEC;
3133 pub type Rsplene1 = crate::EnumBitfieldStruct<u8, Rsplene1_SPEC>;
3134 impl Rsplene1 {
3135 #[doc = "No error exists in command response length"]
3136 pub const _0: Self = Self::new(0);
3137
3138 #[doc = "Error exists in command response length (with SD_CMD.CMDIDX\\[5:0\\] setting, an error that occurs with CMD12 issue is indicated in the RSPLENE0 flag)"]
3139 pub const _1: Self = Self::new(1);
3140 }
3141 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3142 pub struct Rdlene_SPEC;
3143 pub type Rdlene = crate::EnumBitfieldStruct<u8, Rdlene_SPEC>;
3144 impl Rdlene {
3145 #[doc = "No read data length error occurred"]
3146 pub const _0: Self = Self::new(0);
3147
3148 #[doc = "Read data length error occurred"]
3149 pub const _1: Self = Self::new(1);
3150 }
3151 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3152 pub struct Crclene_SPEC;
3153 pub type Crclene = crate::EnumBitfieldStruct<u8, Crclene_SPEC>;
3154 impl Crclene {
3155 #[doc = "No CRC status token length error occurred"]
3156 pub const _0: Self = Self::new(0);
3157
3158 #[doc = "CRC status token length error occurred"]
3159 pub const _1: Self = Self::new(1);
3160 }
3161 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3162 pub struct Rspcrce0_SPEC;
3163 pub type Rspcrce0 = crate::EnumBitfieldStruct<u8, Rspcrce0_SPEC>;
3164 impl Rspcrce0 {
3165 #[doc = "No CRC error detected in command response"]
3166 pub const _0: Self = Self::new(0);
3167
3168 #[doc = "CRC error detected in command response"]
3169 pub const _1: Self = Self::new(1);
3170 }
3171 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3172 pub struct Rspcrce1_SPEC;
3173 pub type Rspcrce1 = crate::EnumBitfieldStruct<u8, Rspcrce1_SPEC>;
3174 impl Rspcrce1 {
3175 #[doc = "No CRC error detected in command response (with SD_CMD.CMDIDX\\[5:0\\] setting, an error that occurs with CMD12 issue is indicated in the RSPCRCE0 flag)"]
3176 pub const _0: Self = Self::new(0);
3177
3178 #[doc = "CRC error detected in command response"]
3179 pub const _1: Self = Self::new(1);
3180 }
3181 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3182 pub struct Rdcrce_SPEC;
3183 pub type Rdcrce = crate::EnumBitfieldStruct<u8, Rdcrce_SPEC>;
3184 impl Rdcrce {
3185 #[doc = "No CRC error detected in read data"]
3186 pub const _0: Self = Self::new(0);
3187
3188 #[doc = "CRC error detected in read data"]
3189 pub const _1: Self = Self::new(1);
3190 }
3191 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3192 pub struct Crctke_SPEC;
3193 pub type Crctke = crate::EnumBitfieldStruct<u8, Crctke_SPEC>;
3194 impl Crctke {
3195 #[doc = "No error detected in CRC status token"]
3196 pub const _0: Self = Self::new(0);
3197
3198 #[doc = "Error detected in CRC status token"]
3199 pub const _1: Self = Self::new(1);
3200 }
3201}
3202#[doc(hidden)]
3203#[derive(Copy, Clone, Eq, PartialEq)]
3204pub struct SdErrSts2_SPEC;
3205impl crate::sealed::RegSpec for SdErrSts2_SPEC {
3206 type DataType = u32;
3207}
3208
3209#[doc = "SD Error Status Register 2"]
3210pub type SdErrSts2 = crate::RegValueT<SdErrSts2_SPEC>;
3211
3212impl SdErrSts2 {
3213 #[doc = "Response Timeout Flag 0"]
3214 #[inline(always)]
3215 pub fn rspto0(
3216 self,
3217 ) -> crate::common::RegisterField<
3218 0,
3219 0x1,
3220 1,
3221 0,
3222 sd_err_sts2::Rspto0,
3223 sd_err_sts2::Rspto0,
3224 SdErrSts2_SPEC,
3225 crate::common::R,
3226 > {
3227 crate::common::RegisterField::<
3228 0,
3229 0x1,
3230 1,
3231 0,
3232 sd_err_sts2::Rspto0,
3233 sd_err_sts2::Rspto0,
3234 SdErrSts2_SPEC,
3235 crate::common::R,
3236 >::from_register(self, 0)
3237 }
3238
3239 #[doc = "Response Timeout Flag 1"]
3240 #[inline(always)]
3241 pub fn rspto1(
3242 self,
3243 ) -> crate::common::RegisterField<
3244 1,
3245 0x1,
3246 1,
3247 0,
3248 sd_err_sts2::Rspto1,
3249 sd_err_sts2::Rspto1,
3250 SdErrSts2_SPEC,
3251 crate::common::R,
3252 > {
3253 crate::common::RegisterField::<
3254 1,
3255 0x1,
3256 1,
3257 0,
3258 sd_err_sts2::Rspto1,
3259 sd_err_sts2::Rspto1,
3260 SdErrSts2_SPEC,
3261 crate::common::R,
3262 >::from_register(self, 0)
3263 }
3264
3265 #[doc = "Busy Timeout Flag 0"]
3266 #[inline(always)]
3267 pub fn bsyto0(
3268 self,
3269 ) -> crate::common::RegisterField<
3270 2,
3271 0x1,
3272 1,
3273 0,
3274 sd_err_sts2::Bsyto0,
3275 sd_err_sts2::Bsyto0,
3276 SdErrSts2_SPEC,
3277 crate::common::R,
3278 > {
3279 crate::common::RegisterField::<
3280 2,
3281 0x1,
3282 1,
3283 0,
3284 sd_err_sts2::Bsyto0,
3285 sd_err_sts2::Bsyto0,
3286 SdErrSts2_SPEC,
3287 crate::common::R,
3288 >::from_register(self, 0)
3289 }
3290
3291 #[doc = "Busy Timeout Flag 1"]
3292 #[inline(always)]
3293 pub fn bsyto1(
3294 self,
3295 ) -> crate::common::RegisterField<
3296 3,
3297 0x1,
3298 1,
3299 0,
3300 sd_err_sts2::Bsyto1,
3301 sd_err_sts2::Bsyto1,
3302 SdErrSts2_SPEC,
3303 crate::common::R,
3304 > {
3305 crate::common::RegisterField::<
3306 3,
3307 0x1,
3308 1,
3309 0,
3310 sd_err_sts2::Bsyto1,
3311 sd_err_sts2::Bsyto1,
3312 SdErrSts2_SPEC,
3313 crate::common::R,
3314 >::from_register(self, 0)
3315 }
3316
3317 #[doc = "Read Data Timeout Flag"]
3318 #[inline(always)]
3319 pub fn rdto(
3320 self,
3321 ) -> crate::common::RegisterFieldBool<4, 1, 0, SdErrSts2_SPEC, crate::common::R> {
3322 crate::common::RegisterFieldBool::<4, 1, 0, SdErrSts2_SPEC, crate::common::R>::from_register(
3323 self, 0,
3324 )
3325 }
3326
3327 #[doc = "CRC Status Token Timeout Flag"]
3328 #[inline(always)]
3329 pub fn crcto(
3330 self,
3331 ) -> crate::common::RegisterField<
3332 5,
3333 0x1,
3334 1,
3335 0,
3336 sd_err_sts2::Crcto,
3337 sd_err_sts2::Crcto,
3338 SdErrSts2_SPEC,
3339 crate::common::R,
3340 > {
3341 crate::common::RegisterField::<
3342 5,
3343 0x1,
3344 1,
3345 0,
3346 sd_err_sts2::Crcto,
3347 sd_err_sts2::Crcto,
3348 SdErrSts2_SPEC,
3349 crate::common::R,
3350 >::from_register(self, 0)
3351 }
3352
3353 #[doc = "CRC Status Token Busy Timeout Flag"]
3354 #[inline(always)]
3355 pub fn crcbsyto(
3356 self,
3357 ) -> crate::common::RegisterField<
3358 6,
3359 0x1,
3360 1,
3361 0,
3362 sd_err_sts2::Crcbsyto,
3363 sd_err_sts2::Crcbsyto,
3364 SdErrSts2_SPEC,
3365 crate::common::R,
3366 > {
3367 crate::common::RegisterField::<
3368 6,
3369 0x1,
3370 1,
3371 0,
3372 sd_err_sts2::Crcbsyto,
3373 sd_err_sts2::Crcbsyto,
3374 SdErrSts2_SPEC,
3375 crate::common::R,
3376 >::from_register(self, 0)
3377 }
3378}
3379impl ::core::default::Default for SdErrSts2 {
3380 #[inline(always)]
3381 fn default() -> SdErrSts2 {
3382 <crate::RegValueT<SdErrSts2_SPEC> as RegisterValue<_>>::new(0)
3383 }
3384}
3385pub mod sd_err_sts2 {
3386
3387 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3388 pub struct Rspto0_SPEC;
3389 pub type Rspto0 = crate::EnumBitfieldStruct<u8, Rspto0_SPEC>;
3390 impl Rspto0 {
3391 #[doc = "After command was issued, response was received in less than 640 cycles of the SD/MMC clock"]
3392 pub const _0: Self = Self::new(0);
3393
3394 #[doc = "After command was issued, response was not received in 640 or more cycles of the SD/MMC clock"]
3395 pub const _1: Self = Self::new(1);
3396 }
3397 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3398 pub struct Rspto1_SPEC;
3399 pub type Rspto1 = crate::EnumBitfieldStruct<u8, Rspto1_SPEC>;
3400 impl Rspto1 {
3401 #[doc = "After command was issued, response was received in less than 640 cycles of the SD/MMC clock"]
3402 pub const _0: Self = Self::new(0);
3403
3404 #[doc = "After command was issued, response was not received after 640 or more cycles of the SD/MMC clock (with SD_CMD.CMDIDX\\[5:0\\] setting, an error that occurs with CMD12 issue is indicated in the RSPTO0 flag)"]
3405 pub const _1: Self = Self::new(1);
3406 }
3407 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3408 pub struct Bsyto0_SPEC;
3409 pub type Bsyto0 = crate::EnumBitfieldStruct<u8, Bsyto0_SPEC>;
3410 impl Bsyto0 {
3411 #[doc = "After R1b response was received, SD/MMC was released from the busy state during the specified period"]
3412 pub const _0: Self = Self::new(0);
3413
3414 #[doc = "After R1b response was received, SD/MMC was in the busy state after the specified period elapsed"]
3415 pub const _1: Self = Self::new(1);
3416 }
3417 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3418 pub struct Bsyto1_SPEC;
3419 pub type Bsyto1 = crate::EnumBitfieldStruct<u8, Bsyto1_SPEC>;
3420 impl Bsyto1 {
3421 #[doc = "After CMD12 was automatically issued, SD/MMC was released from the busy state during the specified period"]
3422 pub const _0: Self = Self::new(0);
3423
3424 #[doc = "After CMD12 was automatically issued, SD/MMC was in the busy state after the specified period elapsed (with SD_CMD.CMDIDX\\[5:0\\] setting, an error that occurs with CMD12 issue is indicated in the BSYTO0 flag)"]
3425 pub const _1: Self = Self::new(1);
3426 }
3427 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3428 pub struct Crcto_SPEC;
3429 pub type Crcto = crate::EnumBitfieldStruct<u8, Crcto_SPEC>;
3430 impl Crcto {
3431 #[doc = "After CRC data was written to the SD card/MMC, a CRC status token was received during the specified period"]
3432 pub const _0: Self = Self::new(0);
3433
3434 #[doc = "After CRC data was written to the SD card/MMC, a CRC status token was not received after the specified period elapsed"]
3435 pub const _1: Self = Self::new(1);
3436 }
3437 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3438 pub struct Crcbsyto_SPEC;
3439 pub type Crcbsyto = crate::EnumBitfieldStruct<u8, Crcbsyto_SPEC>;
3440 impl Crcbsyto {
3441 #[doc = "After a CRC status token was received, the SD/MMC was released from the busy state during the specified period"]
3442 pub const _0: Self = Self::new(0);
3443
3444 #[doc = "After a CRC status token was received, the SD/MMC was in the busy state after the specified period elapsed"]
3445 pub const _1: Self = Self::new(1);
3446 }
3447}
3448#[doc(hidden)]
3449#[derive(Copy, Clone, Eq, PartialEq)]
3450pub struct SdBuf0_SPEC;
3451impl crate::sealed::RegSpec for SdBuf0_SPEC {
3452 type DataType = u32;
3453}
3454
3455#[doc = "SD Buffer Register"]
3456pub type SdBuf0 = crate::RegValueT<SdBuf0_SPEC>;
3457
3458impl NoBitfieldReg<SdBuf0_SPEC> for SdBuf0 {}
3459impl ::core::default::Default for SdBuf0 {
3460 #[inline(always)]
3461 fn default() -> SdBuf0 {
3462 <crate::RegValueT<SdBuf0_SPEC> as RegisterValue<_>>::new(0)
3463 }
3464}
3465
3466#[doc(hidden)]
3467#[derive(Copy, Clone, Eq, PartialEq)]
3468pub struct SdioMode_SPEC;
3469impl crate::sealed::RegSpec for SdioMode_SPEC {
3470 type DataType = u32;
3471}
3472
3473#[doc = "SDIO Mode Control Register"]
3474pub type SdioMode = crate::RegValueT<SdioMode_SPEC>;
3475
3476impl SdioMode {
3477 #[doc = "SDIO Interrupt Acceptance Enable"]
3478 #[inline(always)]
3479 pub fn inten(
3480 self,
3481 ) -> crate::common::RegisterField<
3482 0,
3483 0x1,
3484 1,
3485 0,
3486 sdio_mode::Inten,
3487 sdio_mode::Inten,
3488 SdioMode_SPEC,
3489 crate::common::RW,
3490 > {
3491 crate::common::RegisterField::<
3492 0,
3493 0x1,
3494 1,
3495 0,
3496 sdio_mode::Inten,
3497 sdio_mode::Inten,
3498 SdioMode_SPEC,
3499 crate::common::RW,
3500 >::from_register(self, 0)
3501 }
3502
3503 #[doc = "Read Wait Request"]
3504 #[inline(always)]
3505 pub fn rwreq(
3506 self,
3507 ) -> crate::common::RegisterField<
3508 2,
3509 0x1,
3510 1,
3511 0,
3512 sdio_mode::Rwreq,
3513 sdio_mode::Rwreq,
3514 SdioMode_SPEC,
3515 crate::common::RW,
3516 > {
3517 crate::common::RegisterField::<
3518 2,
3519 0x1,
3520 1,
3521 0,
3522 sdio_mode::Rwreq,
3523 sdio_mode::Rwreq,
3524 SdioMode_SPEC,
3525 crate::common::RW,
3526 >::from_register(self, 0)
3527 }
3528
3529 #[doc = "SDIO Abort"]
3530 #[inline(always)]
3531 pub fn ioabt(
3532 self,
3533 ) -> crate::common::RegisterFieldBool<8, 1, 0, SdioMode_SPEC, crate::common::RW> {
3534 crate::common::RegisterFieldBool::<8, 1, 0, SdioMode_SPEC, crate::common::RW>::from_register(
3535 self, 0,
3536 )
3537 }
3538
3539 #[doc = "SDIO None Abort"]
3540 #[inline(always)]
3541 pub fn c52pub(
3542 self,
3543 ) -> crate::common::RegisterFieldBool<9, 1, 0, SdioMode_SPEC, crate::common::RW> {
3544 crate::common::RegisterFieldBool::<9, 1, 0, SdioMode_SPEC, crate::common::RW>::from_register(
3545 self, 0,
3546 )
3547 }
3548}
3549impl ::core::default::Default for SdioMode {
3550 #[inline(always)]
3551 fn default() -> SdioMode {
3552 <crate::RegValueT<SdioMode_SPEC> as RegisterValue<_>>::new(0)
3553 }
3554}
3555pub mod sdio_mode {
3556
3557 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3558 pub struct Inten_SPEC;
3559 pub type Inten = crate::EnumBitfieldStruct<u8, Inten_SPEC>;
3560 impl Inten {
3561 #[doc = "Disable SDIO interrupt acceptance"]
3562 pub const _0: Self = Self::new(0);
3563
3564 #[doc = "Enable SDIO interrupt acceptance"]
3565 pub const _1: Self = Self::new(1);
3566 }
3567 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3568 pub struct Rwreq_SPEC;
3569 pub type Rwreq = crate::EnumBitfieldStruct<u8, Rwreq_SPEC>;
3570 impl Rwreq {
3571 #[doc = "Allow SD/MMC to exit read wait state"]
3572 pub const _0: Self = Self::new(0);
3573
3574 #[doc = "Request for SD/MMC to enter read wait state"]
3575 pub const _1: Self = Self::new(1);
3576 }
3577}
3578#[doc(hidden)]
3579#[derive(Copy, Clone, Eq, PartialEq)]
3580pub struct SdioInfo1_SPEC;
3581impl crate::sealed::RegSpec for SdioInfo1_SPEC {
3582 type DataType = u32;
3583}
3584
3585#[doc = "SDIO Interrupt Flag Register"]
3586pub type SdioInfo1 = crate::RegValueT<SdioInfo1_SPEC>;
3587
3588impl SdioInfo1 {
3589 #[doc = "SDIO Interrupt Status Flag"]
3590 #[inline(always)]
3591 pub fn ioirq(
3592 self,
3593 ) -> crate::common::RegisterField<
3594 0,
3595 0x1,
3596 1,
3597 0,
3598 sdio_info1::Ioirq,
3599 sdio_info1::Ioirq,
3600 SdioInfo1_SPEC,
3601 crate::common::RW,
3602 > {
3603 crate::common::RegisterField::<
3604 0,
3605 0x1,
3606 1,
3607 0,
3608 sdio_info1::Ioirq,
3609 sdio_info1::Ioirq,
3610 SdioInfo1_SPEC,
3611 crate::common::RW,
3612 >::from_register(self, 0)
3613 }
3614
3615 #[doc = "EXPUB52 Status Flag"]
3616 #[inline(always)]
3617 pub fn expub52(
3618 self,
3619 ) -> crate::common::RegisterFieldBool<14, 1, 0, SdioInfo1_SPEC, crate::common::RW> {
3620 crate::common::RegisterFieldBool::<14,1,0,SdioInfo1_SPEC,crate::common::RW>::from_register(self,0)
3621 }
3622
3623 #[doc = "EXWT Status Flag"]
3624 #[inline(always)]
3625 pub fn exwt(
3626 self,
3627 ) -> crate::common::RegisterFieldBool<15, 1, 0, SdioInfo1_SPEC, crate::common::RW> {
3628 crate::common::RegisterFieldBool::<15,1,0,SdioInfo1_SPEC,crate::common::RW>::from_register(self,0)
3629 }
3630}
3631impl ::core::default::Default for SdioInfo1 {
3632 #[inline(always)]
3633 fn default() -> SdioInfo1 {
3634 <crate::RegValueT<SdioInfo1_SPEC> as RegisterValue<_>>::new(0)
3635 }
3636}
3637pub mod sdio_info1 {
3638
3639 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3640 pub struct Ioirq_SPEC;
3641 pub type Ioirq = crate::EnumBitfieldStruct<u8, Ioirq_SPEC>;
3642 impl Ioirq {
3643 #[doc = "No SDIO interrupt detected"]
3644 pub const _0: Self = Self::new(0);
3645
3646 #[doc = "SDIO interrupt detected"]
3647 pub const _1: Self = Self::new(1);
3648 }
3649}
3650#[doc(hidden)]
3651#[derive(Copy, Clone, Eq, PartialEq)]
3652pub struct SdioInfo1Mask_SPEC;
3653impl crate::sealed::RegSpec for SdioInfo1Mask_SPEC {
3654 type DataType = u32;
3655}
3656
3657#[doc = "SDIO INFO1 Interrupt Mask Register"]
3658pub type SdioInfo1Mask = crate::RegValueT<SdioInfo1Mask_SPEC>;
3659
3660impl SdioInfo1Mask {
3661 #[doc = "IOIRQ Interrupt Mask Control"]
3662 #[inline(always)]
3663 pub fn ioirqm(
3664 self,
3665 ) -> crate::common::RegisterField<
3666 0,
3667 0x1,
3668 1,
3669 0,
3670 sdio_info1_mask::Ioirqm,
3671 sdio_info1_mask::Ioirqm,
3672 SdioInfo1Mask_SPEC,
3673 crate::common::RW,
3674 > {
3675 crate::common::RegisterField::<
3676 0,
3677 0x1,
3678 1,
3679 0,
3680 sdio_info1_mask::Ioirqm,
3681 sdio_info1_mask::Ioirqm,
3682 SdioInfo1Mask_SPEC,
3683 crate::common::RW,
3684 >::from_register(self, 0)
3685 }
3686
3687 #[doc = "EXPUB52 Interrupt Request Mask Control"]
3688 #[inline(always)]
3689 pub fn expub52m(
3690 self,
3691 ) -> crate::common::RegisterField<
3692 14,
3693 0x1,
3694 1,
3695 0,
3696 sdio_info1_mask::Expub52M,
3697 sdio_info1_mask::Expub52M,
3698 SdioInfo1Mask_SPEC,
3699 crate::common::RW,
3700 > {
3701 crate::common::RegisterField::<
3702 14,
3703 0x1,
3704 1,
3705 0,
3706 sdio_info1_mask::Expub52M,
3707 sdio_info1_mask::Expub52M,
3708 SdioInfo1Mask_SPEC,
3709 crate::common::RW,
3710 >::from_register(self, 0)
3711 }
3712
3713 #[doc = "EXWT Interrupt Request Mask Control"]
3714 #[inline(always)]
3715 pub fn exwtm(
3716 self,
3717 ) -> crate::common::RegisterField<
3718 15,
3719 0x1,
3720 1,
3721 0,
3722 sdio_info1_mask::Exwtm,
3723 sdio_info1_mask::Exwtm,
3724 SdioInfo1Mask_SPEC,
3725 crate::common::RW,
3726 > {
3727 crate::common::RegisterField::<
3728 15,
3729 0x1,
3730 1,
3731 0,
3732 sdio_info1_mask::Exwtm,
3733 sdio_info1_mask::Exwtm,
3734 SdioInfo1Mask_SPEC,
3735 crate::common::RW,
3736 >::from_register(self, 0)
3737 }
3738}
3739impl ::core::default::Default for SdioInfo1Mask {
3740 #[inline(always)]
3741 fn default() -> SdioInfo1Mask {
3742 <crate::RegValueT<SdioInfo1Mask_SPEC> as RegisterValue<_>>::new(49159)
3743 }
3744}
3745pub mod sdio_info1_mask {
3746
3747 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3748 pub struct Ioirqm_SPEC;
3749 pub type Ioirqm = crate::EnumBitfieldStruct<u8, Ioirqm_SPEC>;
3750 impl Ioirqm {
3751 #[doc = "Do not mask IOIRQ interrupts"]
3752 pub const _0: Self = Self::new(0);
3753
3754 #[doc = "Mask IOIRQ interrupts"]
3755 pub const _1: Self = Self::new(1);
3756 }
3757 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3758 pub struct Expub52M_SPEC;
3759 pub type Expub52M = crate::EnumBitfieldStruct<u8, Expub52M_SPEC>;
3760 impl Expub52M {
3761 #[doc = "Do not mask EXPUB52 interrupt requests"]
3762 pub const _0: Self = Self::new(0);
3763
3764 #[doc = "Mask EXPUB52 interrupt requests"]
3765 pub const _1: Self = Self::new(1);
3766 }
3767 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3768 pub struct Exwtm_SPEC;
3769 pub type Exwtm = crate::EnumBitfieldStruct<u8, Exwtm_SPEC>;
3770 impl Exwtm {
3771 #[doc = "Do not mask EXWT interrupt requests"]
3772 pub const _0: Self = Self::new(0);
3773
3774 #[doc = "Mask EXWT interrupt requests"]
3775 pub const _1: Self = Self::new(1);
3776 }
3777}
3778#[doc(hidden)]
3779#[derive(Copy, Clone, Eq, PartialEq)]
3780pub struct SdDmaen_SPEC;
3781impl crate::sealed::RegSpec for SdDmaen_SPEC {
3782 type DataType = u32;
3783}
3784
3785#[doc = "DMA Mode Enable Register"]
3786pub type SdDmaen = crate::RegValueT<SdDmaen_SPEC>;
3787
3788impl SdDmaen {
3789 #[doc = "DMA Transfer Enable"]
3790 #[inline(always)]
3791 pub fn dmaen(
3792 self,
3793 ) -> crate::common::RegisterField<
3794 1,
3795 0x1,
3796 1,
3797 0,
3798 sd_dmaen::Dmaen,
3799 sd_dmaen::Dmaen,
3800 SdDmaen_SPEC,
3801 crate::common::RW,
3802 > {
3803 crate::common::RegisterField::<
3804 1,
3805 0x1,
3806 1,
3807 0,
3808 sd_dmaen::Dmaen,
3809 sd_dmaen::Dmaen,
3810 SdDmaen_SPEC,
3811 crate::common::RW,
3812 >::from_register(self, 0)
3813 }
3814}
3815impl ::core::default::Default for SdDmaen {
3816 #[inline(always)]
3817 fn default() -> SdDmaen {
3818 <crate::RegValueT<SdDmaen_SPEC> as RegisterValue<_>>::new(4112)
3819 }
3820}
3821pub mod sd_dmaen {
3822
3823 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3824 pub struct Dmaen_SPEC;
3825 pub type Dmaen = crate::EnumBitfieldStruct<u8, Dmaen_SPEC>;
3826 impl Dmaen {
3827 #[doc = "Disable use of DMA transfer to access SD_BUF0 register"]
3828 pub const _0: Self = Self::new(0);
3829
3830 #[doc = "Enable use of DMA transfer to access SD_BUF0 register"]
3831 pub const _1: Self = Self::new(1);
3832 }
3833}
3834#[doc(hidden)]
3835#[derive(Copy, Clone, Eq, PartialEq)]
3836pub struct SoftRst_SPEC;
3837impl crate::sealed::RegSpec for SoftRst_SPEC {
3838 type DataType = u32;
3839}
3840
3841#[doc = "Software Reset Register"]
3842pub type SoftRst = crate::RegValueT<SoftRst_SPEC>;
3843
3844impl SoftRst {
3845 #[doc = "Software Reset Control"]
3846 #[inline(always)]
3847 pub fn sdrst(
3848 self,
3849 ) -> crate::common::RegisterField<
3850 0,
3851 0x1,
3852 1,
3853 0,
3854 soft_rst::Sdrst,
3855 soft_rst::Sdrst,
3856 SoftRst_SPEC,
3857 crate::common::RW,
3858 > {
3859 crate::common::RegisterField::<
3860 0,
3861 0x1,
3862 1,
3863 0,
3864 soft_rst::Sdrst,
3865 soft_rst::Sdrst,
3866 SoftRst_SPEC,
3867 crate::common::RW,
3868 >::from_register(self, 0)
3869 }
3870}
3871impl ::core::default::Default for SoftRst {
3872 #[inline(always)]
3873 fn default() -> SoftRst {
3874 <crate::RegValueT<SoftRst_SPEC> as RegisterValue<_>>::new(7)
3875 }
3876}
3877pub mod soft_rst {
3878
3879 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3880 pub struct Sdrst_SPEC;
3881 pub type Sdrst = crate::EnumBitfieldStruct<u8, Sdrst_SPEC>;
3882 impl Sdrst {
3883 #[doc = "Reset SD/MMC Host Interface software"]
3884 pub const _0: Self = Self::new(0);
3885
3886 #[doc = "Cancel reset of SD/MMC Host Interface software"]
3887 pub const _1: Self = Self::new(1);
3888 }
3889}
3890#[doc(hidden)]
3891#[derive(Copy, Clone, Eq, PartialEq)]
3892pub struct SdifMode_SPEC;
3893impl crate::sealed::RegSpec for SdifMode_SPEC {
3894 type DataType = u32;
3895}
3896
3897#[doc = "SD Interface Mode Setting Register"]
3898pub type SdifMode = crate::RegValueT<SdifMode_SPEC>;
3899
3900impl SdifMode {
3901 #[doc = "CRC Check Mask"]
3902 #[inline(always)]
3903 pub fn nochkcr(
3904 self,
3905 ) -> crate::common::RegisterField<
3906 8,
3907 0x1,
3908 1,
3909 0,
3910 sdif_mode::Nochkcr,
3911 sdif_mode::Nochkcr,
3912 SdifMode_SPEC,
3913 crate::common::RW,
3914 > {
3915 crate::common::RegisterField::<
3916 8,
3917 0x1,
3918 1,
3919 0,
3920 sdif_mode::Nochkcr,
3921 sdif_mode::Nochkcr,
3922 SdifMode_SPEC,
3923 crate::common::RW,
3924 >::from_register(self, 0)
3925 }
3926}
3927impl ::core::default::Default for SdifMode {
3928 #[inline(always)]
3929 fn default() -> SdifMode {
3930 <crate::RegValueT<SdifMode_SPEC> as RegisterValue<_>>::new(0)
3931 }
3932}
3933pub mod sdif_mode {
3934
3935 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3936 pub struct Nochkcr_SPEC;
3937 pub type Nochkcr = crate::EnumBitfieldStruct<u8, Nochkcr_SPEC>;
3938 impl Nochkcr {
3939 #[doc = "Enable CRC check"]
3940 pub const _0: Self = Self::new(0);
3941
3942 #[doc = "Disable CRC Check (ignore CRC16 valued when reading and ignore CRC status value when writing)"]
3943 pub const _1: Self = Self::new(1);
3944 }
3945}
3946#[doc(hidden)]
3947#[derive(Copy, Clone, Eq, PartialEq)]
3948pub struct ExtSwap_SPEC;
3949impl crate::sealed::RegSpec for ExtSwap_SPEC {
3950 type DataType = u32;
3951}
3952
3953#[doc = "Swap Control Register"]
3954pub type ExtSwap = crate::RegValueT<ExtSwap_SPEC>;
3955
3956impl ExtSwap {
3957 #[doc = "SD_BUF0 Swap Write"]
3958 #[inline(always)]
3959 pub fn bwswp(
3960 self,
3961 ) -> crate::common::RegisterField<
3962 6,
3963 0x1,
3964 1,
3965 0,
3966 ext_swap::Bwswp,
3967 ext_swap::Bwswp,
3968 ExtSwap_SPEC,
3969 crate::common::RW,
3970 > {
3971 crate::common::RegisterField::<
3972 6,
3973 0x1,
3974 1,
3975 0,
3976 ext_swap::Bwswp,
3977 ext_swap::Bwswp,
3978 ExtSwap_SPEC,
3979 crate::common::RW,
3980 >::from_register(self, 0)
3981 }
3982
3983 #[doc = "SD_BUF0 Swap Read"]
3984 #[inline(always)]
3985 pub fn brswp(
3986 self,
3987 ) -> crate::common::RegisterField<
3988 7,
3989 0x1,
3990 1,
3991 0,
3992 ext_swap::Brswp,
3993 ext_swap::Brswp,
3994 ExtSwap_SPEC,
3995 crate::common::RW,
3996 > {
3997 crate::common::RegisterField::<
3998 7,
3999 0x1,
4000 1,
4001 0,
4002 ext_swap::Brswp,
4003 ext_swap::Brswp,
4004 ExtSwap_SPEC,
4005 crate::common::RW,
4006 >::from_register(self, 0)
4007 }
4008}
4009impl ::core::default::Default for ExtSwap {
4010 #[inline(always)]
4011 fn default() -> ExtSwap {
4012 <crate::RegValueT<ExtSwap_SPEC> as RegisterValue<_>>::new(0)
4013 }
4014}
4015pub mod ext_swap {
4016
4017 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4018 pub struct Bwswp_SPEC;
4019 pub type Bwswp = crate::EnumBitfieldStruct<u8, Bwswp_SPEC>;
4020 impl Bwswp {
4021 #[doc = "Normal write operation"]
4022 pub const _0: Self = Self::new(0);
4023
4024 #[doc = "Swap the byte endian order before writing to SD_BUF0 register"]
4025 pub const _1: Self = Self::new(1);
4026 }
4027 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4028 pub struct Brswp_SPEC;
4029 pub type Brswp = crate::EnumBitfieldStruct<u8, Brswp_SPEC>;
4030 impl Brswp {
4031 #[doc = "Normal read operation"]
4032 pub const _0: Self = Self::new(0);
4033
4034 #[doc = "Swap the byte endian order before reading SD_BUF0 register"]
4035 pub const _1: Self = Self::new(1);
4036 }
4037}