1#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Arm Cortex-M33 based Microcontroller RA4M2 group"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "adc120")]
31pub mod adc120;
32#[cfg(feature = "agt0")]
33pub mod agt0;
34#[cfg(feature = "bus")]
35pub mod bus;
36#[cfg(feature = "cac")]
37pub mod cac;
38#[cfg(feature = "can0")]
39pub mod can0;
40#[cfg(feature = "cpscu")]
41pub mod cpscu;
42#[cfg(feature = "crc")]
43pub mod crc;
44#[cfg(feature = "ctsu")]
45pub mod ctsu;
46#[cfg(feature = "dac12")]
47pub mod dac12;
48#[cfg(feature = "dbg")]
49pub mod dbg;
50#[cfg(feature = "dma")]
51pub mod dma;
52#[cfg(feature = "dmac0")]
53pub mod dmac0;
54#[cfg(feature = "doc")]
55pub mod doc;
56#[cfg(feature = "dtc")]
57pub mod dtc;
58#[cfg(feature = "elc")]
59pub mod elc;
60#[cfg(feature = "faci")]
61pub mod faci;
62#[cfg(feature = "fcache")]
63pub mod fcache;
64#[cfg(feature = "flad")]
65pub mod flad;
66#[cfg(feature = "gpt164")]
67pub mod gpt164;
68#[cfg(feature = "gpt320")]
69pub mod gpt320;
70#[cfg(feature = "gpt_ops")]
71pub mod gpt_ops;
72#[cfg(feature = "icu")]
73pub mod icu;
74#[cfg(feature = "iic0")]
75pub mod iic0;
76#[cfg(feature = "iic0wu")]
77pub mod iic0wu;
78#[cfg(feature = "iwdt")]
79pub mod iwdt;
80#[cfg(feature = "mstp")]
81pub mod mstp;
82#[cfg(feature = "pfs")]
83pub mod pfs;
84#[cfg(feature = "poeg")]
85pub mod poeg;
86#[cfg(feature = "port0")]
87pub mod port0;
88#[cfg(feature = "port1")]
89pub mod port1;
90#[cfg(feature = "pscu")]
91pub mod pscu;
92#[cfg(feature = "qspi")]
93pub mod qspi;
94#[cfg(feature = "rmpu")]
95pub mod rmpu;
96#[cfg(feature = "rtc")]
97pub mod rtc;
98#[cfg(feature = "sci0")]
99pub mod sci0;
100#[cfg(feature = "sci1")]
101pub mod sci1;
102#[cfg(feature = "sci3")]
103pub mod sci3;
104#[cfg(feature = "sdhi0")]
105pub mod sdhi0;
106#[cfg(feature = "spi0")]
107pub mod spi0;
108#[cfg(feature = "sram")]
109pub mod sram;
110#[cfg(feature = "ssie0")]
111pub mod ssie0;
112#[cfg(feature = "sysc")]
113pub mod sysc;
114#[cfg(feature = "tsd")]
115pub mod tsd;
116#[cfg(feature = "tsn")]
117pub mod tsn;
118#[cfg(feature = "tzf")]
119pub mod tzf;
120#[cfg(feature = "usbfs")]
121pub mod usbfs;
122#[cfg(feature = "wdt")]
123pub mod wdt;
124
125#[cfg(feature = "rmpu")]
126#[derive(Copy, Clone, Eq, PartialEq)]
127pub struct Rmpu {
128 ptr: *mut u8,
129}
130#[cfg(feature = "rmpu")]
131pub const RMPU: self::Rmpu = self::Rmpu {
132 ptr: 0x40000000u32 as _,
133};
134#[cfg(feature = "tzf")]
135#[derive(Copy, Clone, Eq, PartialEq)]
136pub struct Tzf {
137 ptr: *mut u8,
138}
139#[cfg(feature = "tzf")]
140pub const TZF: self::Tzf = self::Tzf {
141 ptr: 0x40000e00u32 as _,
142};
143#[cfg(feature = "sram")]
144#[derive(Copy, Clone, Eq, PartialEq)]
145pub struct Sram {
146 ptr: *mut u8,
147}
148#[cfg(feature = "sram")]
149pub const SRAM: self::Sram = self::Sram {
150 ptr: 0x40002000u32 as _,
151};
152#[cfg(feature = "bus")]
153#[derive(Copy, Clone, Eq, PartialEq)]
154pub struct Bus {
155 ptr: *mut u8,
156}
157#[cfg(feature = "bus")]
158pub const BUS: self::Bus = self::Bus {
159 ptr: 0x40003000u32 as _,
160};
161#[cfg(feature = "dmac0")]
162#[derive(Copy, Clone, Eq, PartialEq)]
163pub struct Dmac0 {
164 ptr: *mut u8,
165}
166#[cfg(feature = "dmac0")]
167pub const DMAC0: self::Dmac0 = self::Dmac0 {
168 ptr: 0x40005000u32 as _,
169};
170#[cfg(feature = "dmac1")]
171pub const DMAC1: self::Dmac0 = self::Dmac0 {
172 ptr: 0x40005040u32 as _,
173};
174#[cfg(feature = "dmac2")]
175pub const DMAC2: self::Dmac0 = self::Dmac0 {
176 ptr: 0x40005080u32 as _,
177};
178#[cfg(feature = "dmac3")]
179pub const DMAC3: self::Dmac0 = self::Dmac0 {
180 ptr: 0x400050c0u32 as _,
181};
182#[cfg(feature = "dmac4")]
183pub const DMAC4: self::Dmac0 = self::Dmac0 {
184 ptr: 0x40005100u32 as _,
185};
186#[cfg(feature = "dmac5")]
187pub const DMAC5: self::Dmac0 = self::Dmac0 {
188 ptr: 0x40005140u32 as _,
189};
190#[cfg(feature = "dmac6")]
191pub const DMAC6: self::Dmac0 = self::Dmac0 {
192 ptr: 0x40005180u32 as _,
193};
194#[cfg(feature = "dmac7")]
195pub const DMAC7: self::Dmac0 = self::Dmac0 {
196 ptr: 0x400051c0u32 as _,
197};
198#[cfg(feature = "dma")]
199#[derive(Copy, Clone, Eq, PartialEq)]
200pub struct Dma {
201 ptr: *mut u8,
202}
203#[cfg(feature = "dma")]
204pub const DMA: self::Dma = self::Dma {
205 ptr: 0x40005200u32 as _,
206};
207#[cfg(feature = "dtc")]
208#[derive(Copy, Clone, Eq, PartialEq)]
209pub struct Dtc {
210 ptr: *mut u8,
211}
212#[cfg(feature = "dtc")]
213pub const DTC: self::Dtc = self::Dtc {
214 ptr: 0x40005400u32 as _,
215};
216#[cfg(feature = "icu")]
217#[derive(Copy, Clone, Eq, PartialEq)]
218pub struct Icu {
219 ptr: *mut u8,
220}
221#[cfg(feature = "icu")]
222pub const ICU: self::Icu = self::Icu {
223 ptr: 0x40006000u32 as _,
224};
225#[cfg(feature = "cpscu")]
226#[derive(Copy, Clone, Eq, PartialEq)]
227pub struct Cpscu {
228 ptr: *mut u8,
229}
230#[cfg(feature = "cpscu")]
231pub const CPSCU: self::Cpscu = self::Cpscu {
232 ptr: 0x40008000u32 as _,
233};
234#[cfg(feature = "dbg")]
235#[derive(Copy, Clone, Eq, PartialEq)]
236pub struct Dbg {
237 ptr: *mut u8,
238}
239#[cfg(feature = "dbg")]
240pub const DBG: self::Dbg = self::Dbg {
241 ptr: 0x4001b000u32 as _,
242};
243#[cfg(feature = "fcache")]
244#[derive(Copy, Clone, Eq, PartialEq)]
245pub struct Fcache {
246 ptr: *mut u8,
247}
248#[cfg(feature = "fcache")]
249pub const FCACHE: self::Fcache = self::Fcache {
250 ptr: 0x4001c100u32 as _,
251};
252#[cfg(feature = "sysc")]
253#[derive(Copy, Clone, Eq, PartialEq)]
254pub struct Sysc {
255 ptr: *mut u8,
256}
257#[cfg(feature = "sysc")]
258pub const SYSC: self::Sysc = self::Sysc {
259 ptr: 0x4001e000u32 as _,
260};
261#[cfg(feature = "port0")]
262#[derive(Copy, Clone, Eq, PartialEq)]
263pub struct Port0 {
264 ptr: *mut u8,
265}
266#[cfg(feature = "port0")]
267pub const PORT0: self::Port0 = self::Port0 {
268 ptr: 0x40080000u32 as _,
269};
270#[cfg(feature = "port1")]
271#[derive(Copy, Clone, Eq, PartialEq)]
272pub struct Port1 {
273 ptr: *mut u8,
274}
275#[cfg(feature = "port1")]
276pub const PORT1: self::Port1 = self::Port1 {
277 ptr: 0x40080020u32 as _,
278};
279#[cfg(feature = "port2")]
280pub const PORT2: self::Port1 = self::Port1 {
281 ptr: 0x40080040u32 as _,
282};
283#[cfg(feature = "port3")]
284pub const PORT3: self::Port1 = self::Port1 {
285 ptr: 0x40080060u32 as _,
286};
287#[cfg(feature = "port4")]
288pub const PORT4: self::Port1 = self::Port1 {
289 ptr: 0x40080080u32 as _,
290};
291#[cfg(feature = "port5")]
292pub const PORT5: self::Port0 = self::Port0 {
293 ptr: 0x400800a0u32 as _,
294};
295#[cfg(feature = "port6")]
296pub const PORT6: self::Port0 = self::Port0 {
297 ptr: 0x400800c0u32 as _,
298};
299#[cfg(feature = "port7")]
300pub const PORT7: self::Port0 = self::Port0 {
301 ptr: 0x400800e0u32 as _,
302};
303#[cfg(feature = "pfs")]
304#[derive(Copy, Clone, Eq, PartialEq)]
305pub struct Pfs {
306 ptr: *mut u8,
307}
308#[cfg(feature = "pfs")]
309pub const PFS: self::Pfs = self::Pfs {
310 ptr: 0x40080800u32 as _,
311};
312#[cfg(feature = "elc")]
313#[derive(Copy, Clone, Eq, PartialEq)]
314pub struct Elc {
315 ptr: *mut u8,
316}
317#[cfg(feature = "elc")]
318pub const ELC: self::Elc = self::Elc {
319 ptr: 0x40082000u32 as _,
320};
321#[cfg(feature = "rtc")]
322#[derive(Copy, Clone, Eq, PartialEq)]
323pub struct Rtc {
324 ptr: *mut u8,
325}
326#[cfg(feature = "rtc")]
327pub const RTC: self::Rtc = self::Rtc {
328 ptr: 0x40083000u32 as _,
329};
330#[cfg(feature = "iwdt")]
331#[derive(Copy, Clone, Eq, PartialEq)]
332pub struct Iwdt {
333 ptr: *mut u8,
334}
335#[cfg(feature = "iwdt")]
336pub const IWDT: self::Iwdt = self::Iwdt {
337 ptr: 0x40083200u32 as _,
338};
339#[cfg(feature = "wdt")]
340#[derive(Copy, Clone, Eq, PartialEq)]
341pub struct Wdt {
342 ptr: *mut u8,
343}
344#[cfg(feature = "wdt")]
345pub const WDT: self::Wdt = self::Wdt {
346 ptr: 0x40083400u32 as _,
347};
348#[cfg(feature = "cac")]
349#[derive(Copy, Clone, Eq, PartialEq)]
350pub struct Cac {
351 ptr: *mut u8,
352}
353#[cfg(feature = "cac")]
354pub const CAC: self::Cac = self::Cac {
355 ptr: 0x40083600u32 as _,
356};
357#[cfg(feature = "mstp")]
358#[derive(Copy, Clone, Eq, PartialEq)]
359pub struct Mstp {
360 ptr: *mut u8,
361}
362#[cfg(feature = "mstp")]
363pub const MSTP: self::Mstp = self::Mstp {
364 ptr: 0x40084000u32 as _,
365};
366#[cfg(feature = "poeg")]
367#[derive(Copy, Clone, Eq, PartialEq)]
368pub struct Poeg {
369 ptr: *mut u8,
370}
371#[cfg(feature = "poeg")]
372pub const POEG: self::Poeg = self::Poeg {
373 ptr: 0x4008a000u32 as _,
374};
375#[cfg(feature = "usbfs")]
376#[derive(Copy, Clone, Eq, PartialEq)]
377pub struct Usbfs {
378 ptr: *mut u8,
379}
380#[cfg(feature = "usbfs")]
381pub const USBFS: self::Usbfs = self::Usbfs {
382 ptr: 0x40090000u32 as _,
383};
384#[cfg(feature = "sdhi0")]
385#[derive(Copy, Clone, Eq, PartialEq)]
386pub struct Sdhi0 {
387 ptr: *mut u8,
388}
389#[cfg(feature = "sdhi0")]
390pub const SDHI0: self::Sdhi0 = self::Sdhi0 {
391 ptr: 0x40092000u32 as _,
392};
393#[cfg(feature = "ssie0")]
394#[derive(Copy, Clone, Eq, PartialEq)]
395pub struct Ssie0 {
396 ptr: *mut u8,
397}
398#[cfg(feature = "ssie0")]
399pub const SSIE0: self::Ssie0 = self::Ssie0 {
400 ptr: 0x4009d000u32 as _,
401};
402#[cfg(feature = "iic0")]
403#[derive(Copy, Clone, Eq, PartialEq)]
404pub struct Iic0 {
405 ptr: *mut u8,
406}
407#[cfg(feature = "iic0")]
408pub const IIC0: self::Iic0 = self::Iic0 {
409 ptr: 0x4009f000u32 as _,
410};
411#[cfg(feature = "iic0wu")]
412#[derive(Copy, Clone, Eq, PartialEq)]
413pub struct Iic0Wu {
414 ptr: *mut u8,
415}
416#[cfg(feature = "iic0wu")]
417pub const IIC0WU: self::Iic0Wu = self::Iic0Wu {
418 ptr: 0x4009f014u32 as _,
419};
420#[cfg(feature = "iic1")]
421pub const IIC1: self::Iic0 = self::Iic0 {
422 ptr: 0x4009f100u32 as _,
423};
424#[cfg(feature = "can0")]
425#[derive(Copy, Clone, Eq, PartialEq)]
426pub struct Can0 {
427 ptr: *mut u8,
428}
429#[cfg(feature = "can0")]
430pub const CAN0: self::Can0 = self::Can0 {
431 ptr: 0x400a8000u32 as _,
432};
433#[cfg(feature = "ctsu")]
434#[derive(Copy, Clone, Eq, PartialEq)]
435pub struct Ctsu {
436 ptr: *mut u8,
437}
438#[cfg(feature = "ctsu")]
439pub const CTSU: self::Ctsu = self::Ctsu {
440 ptr: 0x400d0000u32 as _,
441};
442#[cfg(feature = "pscu")]
443#[derive(Copy, Clone, Eq, PartialEq)]
444pub struct Pscu {
445 ptr: *mut u8,
446}
447#[cfg(feature = "pscu")]
448pub const PSCU: self::Pscu = self::Pscu {
449 ptr: 0x400e0000u32 as _,
450};
451#[cfg(feature = "agt0")]
452#[derive(Copy, Clone, Eq, PartialEq)]
453pub struct Agt0 {
454 ptr: *mut u8,
455}
456#[cfg(feature = "agt0")]
457pub const AGT0: self::Agt0 = self::Agt0 {
458 ptr: 0x400e8000u32 as _,
459};
460#[cfg(feature = "agt1")]
461pub const AGT1: self::Agt0 = self::Agt0 {
462 ptr: 0x400e8100u32 as _,
463};
464#[cfg(feature = "agt2")]
465pub const AGT2: self::Agt0 = self::Agt0 {
466 ptr: 0x400e8200u32 as _,
467};
468#[cfg(feature = "agt3")]
469pub const AGT3: self::Agt0 = self::Agt0 {
470 ptr: 0x400e8300u32 as _,
471};
472#[cfg(feature = "agt4")]
473pub const AGT4: self::Agt0 = self::Agt0 {
474 ptr: 0x400e8400u32 as _,
475};
476#[cfg(feature = "agt5")]
477pub const AGT5: self::Agt0 = self::Agt0 {
478 ptr: 0x400e8500u32 as _,
479};
480#[cfg(feature = "tsn")]
481#[derive(Copy, Clone, Eq, PartialEq)]
482pub struct Tsn {
483 ptr: *mut u8,
484}
485#[cfg(feature = "tsn")]
486pub const TSN: self::Tsn = self::Tsn {
487 ptr: 0x400f3000u32 as _,
488};
489#[cfg(feature = "crc")]
490#[derive(Copy, Clone, Eq, PartialEq)]
491pub struct Crc {
492 ptr: *mut u8,
493}
494#[cfg(feature = "crc")]
495pub const CRC: self::Crc = self::Crc {
496 ptr: 0x40108000u32 as _,
497};
498#[cfg(feature = "doc")]
499#[derive(Copy, Clone, Eq, PartialEq)]
500pub struct Doc {
501 ptr: *mut u8,
502}
503#[cfg(feature = "doc")]
504pub const DOC: self::Doc = self::Doc {
505 ptr: 0x40109000u32 as _,
506};
507#[cfg(feature = "sci0")]
508#[derive(Copy, Clone, Eq, PartialEq)]
509pub struct Sci0 {
510 ptr: *mut u8,
511}
512#[cfg(feature = "sci0")]
513pub const SCI0: self::Sci0 = self::Sci0 {
514 ptr: 0x40118000u32 as _,
515};
516#[cfg(feature = "sci1")]
517#[derive(Copy, Clone, Eq, PartialEq)]
518pub struct Sci1 {
519 ptr: *mut u8,
520}
521#[cfg(feature = "sci1")]
522pub const SCI1: self::Sci1 = self::Sci1 {
523 ptr: 0x40118100u32 as _,
524};
525#[cfg(feature = "sci2")]
526pub const SCI2: self::Sci1 = self::Sci1 {
527 ptr: 0x40118200u32 as _,
528};
529#[cfg(feature = "sci3")]
530#[derive(Copy, Clone, Eq, PartialEq)]
531pub struct Sci3 {
532 ptr: *mut u8,
533}
534#[cfg(feature = "sci3")]
535pub const SCI3: self::Sci3 = self::Sci3 {
536 ptr: 0x40118300u32 as _,
537};
538#[cfg(feature = "sci4")]
539pub const SCI4: self::Sci3 = self::Sci3 {
540 ptr: 0x40118400u32 as _,
541};
542#[cfg(feature = "sci9")]
543pub const SCI9: self::Sci0 = self::Sci0 {
544 ptr: 0x40118900u32 as _,
545};
546#[cfg(feature = "spi0")]
547#[derive(Copy, Clone, Eq, PartialEq)]
548pub struct Spi0 {
549 ptr: *mut u8,
550}
551#[cfg(feature = "spi0")]
552pub const SPI0: self::Spi0 = self::Spi0 {
553 ptr: 0x4011a000u32 as _,
554};
555#[cfg(feature = "gpt320")]
556#[derive(Copy, Clone, Eq, PartialEq)]
557pub struct Gpt320 {
558 ptr: *mut u8,
559}
560#[cfg(feature = "gpt320")]
561pub const GPT320: self::Gpt320 = self::Gpt320 {
562 ptr: 0x40169000u32 as _,
563};
564#[cfg(feature = "gpt321")]
565pub const GPT321: self::Gpt320 = self::Gpt320 {
566 ptr: 0x40169100u32 as _,
567};
568#[cfg(feature = "gpt322")]
569pub const GPT322: self::Gpt320 = self::Gpt320 {
570 ptr: 0x40169200u32 as _,
571};
572#[cfg(feature = "gpt323")]
573pub const GPT323: self::Gpt320 = self::Gpt320 {
574 ptr: 0x40169300u32 as _,
575};
576#[cfg(feature = "gpt164")]
577#[derive(Copy, Clone, Eq, PartialEq)]
578pub struct Gpt164 {
579 ptr: *mut u8,
580}
581#[cfg(feature = "gpt164")]
582pub const GPT164: self::Gpt164 = self::Gpt164 {
583 ptr: 0x40169400u32 as _,
584};
585#[cfg(feature = "gpt165")]
586pub const GPT165: self::Gpt164 = self::Gpt164 {
587 ptr: 0x40169500u32 as _,
588};
589#[cfg(feature = "gpt166")]
590pub const GPT166: self::Gpt164 = self::Gpt164 {
591 ptr: 0x40169600u32 as _,
592};
593#[cfg(feature = "gpt167")]
594pub const GPT167: self::Gpt164 = self::Gpt164 {
595 ptr: 0x40169700u32 as _,
596};
597#[cfg(feature = "gpt_ops")]
598#[derive(Copy, Clone, Eq, PartialEq)]
599pub struct GptOps {
600 ptr: *mut u8,
601}
602#[cfg(feature = "gpt_ops")]
603pub const GPT_OPS: self::GptOps = self::GptOps {
604 ptr: 0x40169a00u32 as _,
605};
606#[cfg(feature = "adc120")]
607#[derive(Copy, Clone, Eq, PartialEq)]
608pub struct Adc120 {
609 ptr: *mut u8,
610}
611#[cfg(feature = "adc120")]
612pub const ADC120: self::Adc120 = self::Adc120 {
613 ptr: 0x40170000u32 as _,
614};
615#[cfg(feature = "dac12")]
616#[derive(Copy, Clone, Eq, PartialEq)]
617pub struct Dac12 {
618 ptr: *mut u8,
619}
620#[cfg(feature = "dac12")]
621pub const DAC12: self::Dac12 = self::Dac12 {
622 ptr: 0x40171000u32 as _,
623};
624#[cfg(feature = "tsd")]
625#[derive(Copy, Clone, Eq, PartialEq)]
626pub struct Tsd {
627 ptr: *mut u8,
628}
629#[cfg(feature = "tsd")]
630pub const TSD: self::Tsd = self::Tsd {
631 ptr: 0x407fb000u32 as _,
632};
633#[cfg(feature = "flad")]
634#[derive(Copy, Clone, Eq, PartialEq)]
635pub struct Flad {
636 ptr: *mut u8,
637}
638#[cfg(feature = "flad")]
639pub const FLAD: self::Flad = self::Flad {
640 ptr: 0x407fc000u32 as _,
641};
642#[cfg(feature = "faci")]
643#[derive(Copy, Clone, Eq, PartialEq)]
644pub struct Faci {
645 ptr: *mut u8,
646}
647#[cfg(feature = "faci")]
648pub const FACI: self::Faci = self::Faci {
649 ptr: 0x407fe000u32 as _,
650};
651#[cfg(feature = "qspi")]
652#[derive(Copy, Clone, Eq, PartialEq)]
653pub struct Qspi {
654 ptr: *mut u8,
655}
656#[cfg(feature = "qspi")]
657pub const QSPI: self::Qspi = self::Qspi {
658 ptr: 0x64000000u32 as _,
659};
660
661pub use cortex_m::peripheral::Peripherals as CorePeripherals;
662pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
663#[doc = "Number available in the NVIC for configuring priority"]
664pub const NVIC_PRIO_BITS: u8 = 4;
665#[doc(hidden)]
666pub union Vector {
667 _handler: unsafe extern "C" fn(),
668 _reserved: u32,
669}
670#[cfg(feature = "rt")]
671pub use self::Interrupt as interrupt;
672#[cfg(feature = "rt")]
673pub use cortex_m_rt::interrupt;
674#[cfg(feature = "rt")]
675pub mod interrupt_handlers {
676 unsafe extern "C" {
677 pub fn IEL0();
678 pub fn IEL1();
679 pub fn IEL2();
680 pub fn IEL3();
681 pub fn IEL4();
682 pub fn IEL5();
683 pub fn IEL6();
684 pub fn IEL7();
685 pub fn IEL8();
686 pub fn IEL9();
687 pub fn IEL10();
688 pub fn IEL11();
689 pub fn IEL12();
690 pub fn IEL13();
691 pub fn IEL14();
692 pub fn IEL15();
693 pub fn IEL16();
694 pub fn IEL17();
695 pub fn IEL18();
696 pub fn IEL19();
697 pub fn IEL20();
698 pub fn IEL21();
699 pub fn IEL22();
700 pub fn IEL23();
701 pub fn IEL24();
702 pub fn IEL25();
703 pub fn IEL26();
704 pub fn IEL27();
705 pub fn IEL28();
706 pub fn IEL29();
707 pub fn IEL30();
708 pub fn IEL31();
709 pub fn IEL32();
710 pub fn IEL33();
711 pub fn IEL34();
712 pub fn IEL35();
713 pub fn IEL36();
714 pub fn IEL37();
715 pub fn IEL38();
716 pub fn IEL39();
717 pub fn IEL40();
718 pub fn IEL41();
719 pub fn IEL42();
720 pub fn IEL43();
721 pub fn IEL44();
722 pub fn IEL45();
723 pub fn IEL46();
724 pub fn IEL47();
725 pub fn IEL48();
726 pub fn IEL49();
727 pub fn IEL50();
728 pub fn IEL51();
729 pub fn IEL52();
730 pub fn IEL53();
731 pub fn IEL54();
732 pub fn IEL55();
733 pub fn IEL56();
734 pub fn IEL57();
735 pub fn IEL58();
736 pub fn IEL59();
737 pub fn IEL60();
738 pub fn IEL61();
739 pub fn IEL62();
740 pub fn IEL63();
741 pub fn IEL64();
742 pub fn IEL65();
743 pub fn IEL66();
744 pub fn IEL67();
745 pub fn IEL68();
746 pub fn IEL69();
747 pub fn IEL70();
748 pub fn IEL71();
749 pub fn IEL72();
750 pub fn IEL73();
751 pub fn IEL74();
752 pub fn IEL75();
753 pub fn IEL76();
754 pub fn IEL77();
755 pub fn IEL78();
756 pub fn IEL79();
757 pub fn IEL80();
758 pub fn IEL81();
759 pub fn IEL82();
760 pub fn IEL83();
761 pub fn IEL84();
762 pub fn IEL85();
763 pub fn IEL86();
764 pub fn IEL87();
765 pub fn IEL88();
766 pub fn IEL89();
767 pub fn IEL90();
768 pub fn IEL91();
769 pub fn IEL92();
770 pub fn IEL93();
771 pub fn IEL94();
772 pub fn IEL95();
773 }
774}
775#[cfg(feature = "rt")]
776#[doc(hidden)]
777#[unsafe(link_section = ".vector_table.interrupts")]
778#[unsafe(no_mangle)]
779pub static __INTERRUPTS: [Vector; 96] = [
780 Vector {
781 _handler: interrupt_handlers::IEL0,
782 },
783 Vector {
784 _handler: interrupt_handlers::IEL1,
785 },
786 Vector {
787 _handler: interrupt_handlers::IEL2,
788 },
789 Vector {
790 _handler: interrupt_handlers::IEL3,
791 },
792 Vector {
793 _handler: interrupt_handlers::IEL4,
794 },
795 Vector {
796 _handler: interrupt_handlers::IEL5,
797 },
798 Vector {
799 _handler: interrupt_handlers::IEL6,
800 },
801 Vector {
802 _handler: interrupt_handlers::IEL7,
803 },
804 Vector {
805 _handler: interrupt_handlers::IEL8,
806 },
807 Vector {
808 _handler: interrupt_handlers::IEL9,
809 },
810 Vector {
811 _handler: interrupt_handlers::IEL10,
812 },
813 Vector {
814 _handler: interrupt_handlers::IEL11,
815 },
816 Vector {
817 _handler: interrupt_handlers::IEL12,
818 },
819 Vector {
820 _handler: interrupt_handlers::IEL13,
821 },
822 Vector {
823 _handler: interrupt_handlers::IEL14,
824 },
825 Vector {
826 _handler: interrupt_handlers::IEL15,
827 },
828 Vector {
829 _handler: interrupt_handlers::IEL16,
830 },
831 Vector {
832 _handler: interrupt_handlers::IEL17,
833 },
834 Vector {
835 _handler: interrupt_handlers::IEL18,
836 },
837 Vector {
838 _handler: interrupt_handlers::IEL19,
839 },
840 Vector {
841 _handler: interrupt_handlers::IEL20,
842 },
843 Vector {
844 _handler: interrupt_handlers::IEL21,
845 },
846 Vector {
847 _handler: interrupt_handlers::IEL22,
848 },
849 Vector {
850 _handler: interrupt_handlers::IEL23,
851 },
852 Vector {
853 _handler: interrupt_handlers::IEL24,
854 },
855 Vector {
856 _handler: interrupt_handlers::IEL25,
857 },
858 Vector {
859 _handler: interrupt_handlers::IEL26,
860 },
861 Vector {
862 _handler: interrupt_handlers::IEL27,
863 },
864 Vector {
865 _handler: interrupt_handlers::IEL28,
866 },
867 Vector {
868 _handler: interrupt_handlers::IEL29,
869 },
870 Vector {
871 _handler: interrupt_handlers::IEL30,
872 },
873 Vector {
874 _handler: interrupt_handlers::IEL31,
875 },
876 Vector {
877 _handler: interrupt_handlers::IEL32,
878 },
879 Vector {
880 _handler: interrupt_handlers::IEL33,
881 },
882 Vector {
883 _handler: interrupt_handlers::IEL34,
884 },
885 Vector {
886 _handler: interrupt_handlers::IEL35,
887 },
888 Vector {
889 _handler: interrupt_handlers::IEL36,
890 },
891 Vector {
892 _handler: interrupt_handlers::IEL37,
893 },
894 Vector {
895 _handler: interrupt_handlers::IEL38,
896 },
897 Vector {
898 _handler: interrupt_handlers::IEL39,
899 },
900 Vector {
901 _handler: interrupt_handlers::IEL40,
902 },
903 Vector {
904 _handler: interrupt_handlers::IEL41,
905 },
906 Vector {
907 _handler: interrupt_handlers::IEL42,
908 },
909 Vector {
910 _handler: interrupt_handlers::IEL43,
911 },
912 Vector {
913 _handler: interrupt_handlers::IEL44,
914 },
915 Vector {
916 _handler: interrupt_handlers::IEL45,
917 },
918 Vector {
919 _handler: interrupt_handlers::IEL46,
920 },
921 Vector {
922 _handler: interrupt_handlers::IEL47,
923 },
924 Vector {
925 _handler: interrupt_handlers::IEL48,
926 },
927 Vector {
928 _handler: interrupt_handlers::IEL49,
929 },
930 Vector {
931 _handler: interrupt_handlers::IEL50,
932 },
933 Vector {
934 _handler: interrupt_handlers::IEL51,
935 },
936 Vector {
937 _handler: interrupt_handlers::IEL52,
938 },
939 Vector {
940 _handler: interrupt_handlers::IEL53,
941 },
942 Vector {
943 _handler: interrupt_handlers::IEL54,
944 },
945 Vector {
946 _handler: interrupt_handlers::IEL55,
947 },
948 Vector {
949 _handler: interrupt_handlers::IEL56,
950 },
951 Vector {
952 _handler: interrupt_handlers::IEL57,
953 },
954 Vector {
955 _handler: interrupt_handlers::IEL58,
956 },
957 Vector {
958 _handler: interrupt_handlers::IEL59,
959 },
960 Vector {
961 _handler: interrupt_handlers::IEL60,
962 },
963 Vector {
964 _handler: interrupt_handlers::IEL61,
965 },
966 Vector {
967 _handler: interrupt_handlers::IEL62,
968 },
969 Vector {
970 _handler: interrupt_handlers::IEL63,
971 },
972 Vector {
973 _handler: interrupt_handlers::IEL64,
974 },
975 Vector {
976 _handler: interrupt_handlers::IEL65,
977 },
978 Vector {
979 _handler: interrupt_handlers::IEL66,
980 },
981 Vector {
982 _handler: interrupt_handlers::IEL67,
983 },
984 Vector {
985 _handler: interrupt_handlers::IEL68,
986 },
987 Vector {
988 _handler: interrupt_handlers::IEL69,
989 },
990 Vector {
991 _handler: interrupt_handlers::IEL70,
992 },
993 Vector {
994 _handler: interrupt_handlers::IEL71,
995 },
996 Vector {
997 _handler: interrupt_handlers::IEL72,
998 },
999 Vector {
1000 _handler: interrupt_handlers::IEL73,
1001 },
1002 Vector {
1003 _handler: interrupt_handlers::IEL74,
1004 },
1005 Vector {
1006 _handler: interrupt_handlers::IEL75,
1007 },
1008 Vector {
1009 _handler: interrupt_handlers::IEL76,
1010 },
1011 Vector {
1012 _handler: interrupt_handlers::IEL77,
1013 },
1014 Vector {
1015 _handler: interrupt_handlers::IEL78,
1016 },
1017 Vector {
1018 _handler: interrupt_handlers::IEL79,
1019 },
1020 Vector {
1021 _handler: interrupt_handlers::IEL80,
1022 },
1023 Vector {
1024 _handler: interrupt_handlers::IEL81,
1025 },
1026 Vector {
1027 _handler: interrupt_handlers::IEL82,
1028 },
1029 Vector {
1030 _handler: interrupt_handlers::IEL83,
1031 },
1032 Vector {
1033 _handler: interrupt_handlers::IEL84,
1034 },
1035 Vector {
1036 _handler: interrupt_handlers::IEL85,
1037 },
1038 Vector {
1039 _handler: interrupt_handlers::IEL86,
1040 },
1041 Vector {
1042 _handler: interrupt_handlers::IEL87,
1043 },
1044 Vector {
1045 _handler: interrupt_handlers::IEL88,
1046 },
1047 Vector {
1048 _handler: interrupt_handlers::IEL89,
1049 },
1050 Vector {
1051 _handler: interrupt_handlers::IEL90,
1052 },
1053 Vector {
1054 _handler: interrupt_handlers::IEL91,
1055 },
1056 Vector {
1057 _handler: interrupt_handlers::IEL92,
1058 },
1059 Vector {
1060 _handler: interrupt_handlers::IEL93,
1061 },
1062 Vector {
1063 _handler: interrupt_handlers::IEL94,
1064 },
1065 Vector {
1066 _handler: interrupt_handlers::IEL95,
1067 },
1068];
1069#[doc = "Enumeration of all the interrupts."]
1070#[derive(Copy, Clone, Debug, PartialEq, Eq)]
1071#[repr(u16)]
1072pub enum Interrupt {
1073 #[doc = "ICU Interrupt 0"]
1074 IEL0 = 0,
1075
1076 #[doc = "ICU Interrupt 1"]
1077 IEL1 = 1,
1078
1079 #[doc = "ICU Interrupt 2"]
1080 IEL2 = 2,
1081
1082 #[doc = "ICU Interrupt 3"]
1083 IEL3 = 3,
1084
1085 #[doc = "ICU Interrupt 4"]
1086 IEL4 = 4,
1087
1088 #[doc = "ICU Interrupt 5"]
1089 IEL5 = 5,
1090
1091 #[doc = "ICU Interrupt 6"]
1092 IEL6 = 6,
1093
1094 #[doc = "ICU Interrupt 7"]
1095 IEL7 = 7,
1096
1097 #[doc = "ICU Interrupt 8"]
1098 IEL8 = 8,
1099
1100 #[doc = "ICU Interrupt 9"]
1101 IEL9 = 9,
1102
1103 #[doc = "ICU Interrupt 10"]
1104 IEL10 = 10,
1105
1106 #[doc = "ICU Interrupt 11"]
1107 IEL11 = 11,
1108
1109 #[doc = "ICU Interrupt 12"]
1110 IEL12 = 12,
1111
1112 #[doc = "ICU Interrupt 13"]
1113 IEL13 = 13,
1114
1115 #[doc = "ICU Interrupt 14"]
1116 IEL14 = 14,
1117
1118 #[doc = "ICU Interrupt 15"]
1119 IEL15 = 15,
1120
1121 #[doc = "ICU Interrupt 16"]
1122 IEL16 = 16,
1123
1124 #[doc = "ICU Interrupt 17"]
1125 IEL17 = 17,
1126
1127 #[doc = "ICU Interrupt 18"]
1128 IEL18 = 18,
1129
1130 #[doc = "ICU Interrupt 19"]
1131 IEL19 = 19,
1132
1133 #[doc = "ICU Interrupt 20"]
1134 IEL20 = 20,
1135
1136 #[doc = "ICU Interrupt 21"]
1137 IEL21 = 21,
1138
1139 #[doc = "ICU Interrupt 22"]
1140 IEL22 = 22,
1141
1142 #[doc = "ICU Interrupt 23"]
1143 IEL23 = 23,
1144
1145 #[doc = "ICU Interrupt 24"]
1146 IEL24 = 24,
1147
1148 #[doc = "ICU Interrupt 25"]
1149 IEL25 = 25,
1150
1151 #[doc = "ICU Interrupt 26"]
1152 IEL26 = 26,
1153
1154 #[doc = "ICU Interrupt 27"]
1155 IEL27 = 27,
1156
1157 #[doc = "ICU Interrupt 28"]
1158 IEL28 = 28,
1159
1160 #[doc = "ICU Interrupt 29"]
1161 IEL29 = 29,
1162
1163 #[doc = "ICU Interrupt 30"]
1164 IEL30 = 30,
1165
1166 #[doc = "ICU Interrupt 31"]
1167 IEL31 = 31,
1168
1169 #[doc = "ICU Interrupt 32"]
1170 IEL32 = 32,
1171
1172 #[doc = "ICU Interrupt 33"]
1173 IEL33 = 33,
1174
1175 #[doc = "ICU Interrupt 34"]
1176 IEL34 = 34,
1177
1178 #[doc = "ICU Interrupt 35"]
1179 IEL35 = 35,
1180
1181 #[doc = "ICU Interrupt 36"]
1182 IEL36 = 36,
1183
1184 #[doc = "ICU Interrupt 37"]
1185 IEL37 = 37,
1186
1187 #[doc = "ICU Interrupt 38"]
1188 IEL38 = 38,
1189
1190 #[doc = "ICU Interrupt 39"]
1191 IEL39 = 39,
1192
1193 #[doc = "ICU Interrupt 40"]
1194 IEL40 = 40,
1195
1196 #[doc = "ICU Interrupt 41"]
1197 IEL41 = 41,
1198
1199 #[doc = "ICU Interrupt 42"]
1200 IEL42 = 42,
1201
1202 #[doc = "ICU Interrupt 43"]
1203 IEL43 = 43,
1204
1205 #[doc = "ICU Interrupt 44"]
1206 IEL44 = 44,
1207
1208 #[doc = "ICU Interrupt 45"]
1209 IEL45 = 45,
1210
1211 #[doc = "ICU Interrupt 46"]
1212 IEL46 = 46,
1213
1214 #[doc = "ICU Interrupt 47"]
1215 IEL47 = 47,
1216
1217 #[doc = "ICU Interrupt 48"]
1218 IEL48 = 48,
1219
1220 #[doc = "ICU Interrupt 49"]
1221 IEL49 = 49,
1222
1223 #[doc = "ICU Interrupt 50"]
1224 IEL50 = 50,
1225
1226 #[doc = "ICU Interrupt 51"]
1227 IEL51 = 51,
1228
1229 #[doc = "ICU Interrupt 52"]
1230 IEL52 = 52,
1231
1232 #[doc = "ICU Interrupt 53"]
1233 IEL53 = 53,
1234
1235 #[doc = "ICU Interrupt 54"]
1236 IEL54 = 54,
1237
1238 #[doc = "ICU Interrupt 55"]
1239 IEL55 = 55,
1240
1241 #[doc = "ICU Interrupt 56"]
1242 IEL56 = 56,
1243
1244 #[doc = "ICU Interrupt 57"]
1245 IEL57 = 57,
1246
1247 #[doc = "ICU Interrupt 58"]
1248 IEL58 = 58,
1249
1250 #[doc = "ICU Interrupt 59"]
1251 IEL59 = 59,
1252
1253 #[doc = "ICU Interrupt 60"]
1254 IEL60 = 60,
1255
1256 #[doc = "ICU Interrupt 61"]
1257 IEL61 = 61,
1258
1259 #[doc = "ICU Interrupt 62"]
1260 IEL62 = 62,
1261
1262 #[doc = "ICU Interrupt 63"]
1263 IEL63 = 63,
1264
1265 #[doc = "ICU Interrupt 64"]
1266 IEL64 = 64,
1267
1268 #[doc = "ICU Interrupt 65"]
1269 IEL65 = 65,
1270
1271 #[doc = "ICU Interrupt 66"]
1272 IEL66 = 66,
1273
1274 #[doc = "ICU Interrupt 67"]
1275 IEL67 = 67,
1276
1277 #[doc = "ICU Interrupt 68"]
1278 IEL68 = 68,
1279
1280 #[doc = "ICU Interrupt 69"]
1281 IEL69 = 69,
1282
1283 #[doc = "ICU Interrupt 70"]
1284 IEL70 = 70,
1285
1286 #[doc = "ICU Interrupt 71"]
1287 IEL71 = 71,
1288
1289 #[doc = "ICU Interrupt 72"]
1290 IEL72 = 72,
1291
1292 #[doc = "ICU Interrupt 73"]
1293 IEL73 = 73,
1294
1295 #[doc = "ICU Interrupt 74"]
1296 IEL74 = 74,
1297
1298 #[doc = "ICU Interrupt 75"]
1299 IEL75 = 75,
1300
1301 #[doc = "ICU Interrupt 76"]
1302 IEL76 = 76,
1303
1304 #[doc = "ICU Interrupt 77"]
1305 IEL77 = 77,
1306
1307 #[doc = "ICU Interrupt 78"]
1308 IEL78 = 78,
1309
1310 #[doc = "ICU Interrupt 79"]
1311 IEL79 = 79,
1312
1313 #[doc = "ICU Interrupt 80"]
1314 IEL80 = 80,
1315
1316 #[doc = "ICU Interrupt 81"]
1317 IEL81 = 81,
1318
1319 #[doc = "ICU Interrupt 82"]
1320 IEL82 = 82,
1321
1322 #[doc = "ICU Interrupt 83"]
1323 IEL83 = 83,
1324
1325 #[doc = "ICU Interrupt 84"]
1326 IEL84 = 84,
1327
1328 #[doc = "ICU Interrupt 85"]
1329 IEL85 = 85,
1330
1331 #[doc = "ICU Interrupt 86"]
1332 IEL86 = 86,
1333
1334 #[doc = "ICU Interrupt 87"]
1335 IEL87 = 87,
1336
1337 #[doc = "ICU Interrupt 88"]
1338 IEL88 = 88,
1339
1340 #[doc = "ICU Interrupt 89"]
1341 IEL89 = 89,
1342
1343 #[doc = "ICU Interrupt 90"]
1344 IEL90 = 90,
1345
1346 #[doc = "ICU Interrupt 91"]
1347 IEL91 = 91,
1348
1349 #[doc = "ICU Interrupt 92"]
1350 IEL92 = 92,
1351
1352 #[doc = "ICU Interrupt 93"]
1353 IEL93 = 93,
1354
1355 #[doc = "ICU Interrupt 94"]
1356 IEL94 = 94,
1357
1358 #[doc = "ICU Interrupt 95"]
1359 IEL95 = 95,
1360}
1361unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
1362 #[inline(always)]
1363 fn number(self) -> u16 {
1364 self as u16
1365 }
1366}
1367#[allow(non_snake_case)]
1368pub struct Peripherals {
1370 #[cfg(feature = "rmpu")]
1371 pub RMPU: self::Rmpu,
1372 #[cfg(feature = "tzf")]
1373 pub TZF: self::Tzf,
1374 #[cfg(feature = "sram")]
1375 pub SRAM: self::Sram,
1376 #[cfg(feature = "bus")]
1377 pub BUS: self::Bus,
1378 #[cfg(feature = "dmac0")]
1379 pub DMAC0: self::Dmac0,
1380 #[cfg(feature = "dmac1")]
1381 pub DMAC1: self::Dmac0,
1382 #[cfg(feature = "dmac2")]
1383 pub DMAC2: self::Dmac0,
1384 #[cfg(feature = "dmac3")]
1385 pub DMAC3: self::Dmac0,
1386 #[cfg(feature = "dmac4")]
1387 pub DMAC4: self::Dmac0,
1388 #[cfg(feature = "dmac5")]
1389 pub DMAC5: self::Dmac0,
1390 #[cfg(feature = "dmac6")]
1391 pub DMAC6: self::Dmac0,
1392 #[cfg(feature = "dmac7")]
1393 pub DMAC7: self::Dmac0,
1394 #[cfg(feature = "dma")]
1395 pub DMA: self::Dma,
1396 #[cfg(feature = "dtc")]
1397 pub DTC: self::Dtc,
1398 #[cfg(feature = "icu")]
1399 pub ICU: self::Icu,
1400 #[cfg(feature = "cpscu")]
1401 pub CPSCU: self::Cpscu,
1402 #[cfg(feature = "dbg")]
1403 pub DBG: self::Dbg,
1404 #[cfg(feature = "fcache")]
1405 pub FCACHE: self::Fcache,
1406 #[cfg(feature = "sysc")]
1407 pub SYSC: self::Sysc,
1408 #[cfg(feature = "port0")]
1409 pub PORT0: self::Port0,
1410 #[cfg(feature = "port1")]
1411 pub PORT1: self::Port1,
1412 #[cfg(feature = "port2")]
1413 pub PORT2: self::Port1,
1414 #[cfg(feature = "port3")]
1415 pub PORT3: self::Port1,
1416 #[cfg(feature = "port4")]
1417 pub PORT4: self::Port1,
1418 #[cfg(feature = "port5")]
1419 pub PORT5: self::Port0,
1420 #[cfg(feature = "port6")]
1421 pub PORT6: self::Port0,
1422 #[cfg(feature = "port7")]
1423 pub PORT7: self::Port0,
1424 #[cfg(feature = "pfs")]
1425 pub PFS: self::Pfs,
1426 #[cfg(feature = "elc")]
1427 pub ELC: self::Elc,
1428 #[cfg(feature = "rtc")]
1429 pub RTC: self::Rtc,
1430 #[cfg(feature = "iwdt")]
1431 pub IWDT: self::Iwdt,
1432 #[cfg(feature = "wdt")]
1433 pub WDT: self::Wdt,
1434 #[cfg(feature = "cac")]
1435 pub CAC: self::Cac,
1436 #[cfg(feature = "mstp")]
1437 pub MSTP: self::Mstp,
1438 #[cfg(feature = "poeg")]
1439 pub POEG: self::Poeg,
1440 #[cfg(feature = "usbfs")]
1441 pub USBFS: self::Usbfs,
1442 #[cfg(feature = "sdhi0")]
1443 pub SDHI0: self::Sdhi0,
1444 #[cfg(feature = "ssie0")]
1445 pub SSIE0: self::Ssie0,
1446 #[cfg(feature = "iic0")]
1447 pub IIC0: self::Iic0,
1448 #[cfg(feature = "iic0wu")]
1449 pub IIC0WU: self::Iic0Wu,
1450 #[cfg(feature = "iic1")]
1451 pub IIC1: self::Iic0,
1452 #[cfg(feature = "can0")]
1453 pub CAN0: self::Can0,
1454 #[cfg(feature = "ctsu")]
1455 pub CTSU: self::Ctsu,
1456 #[cfg(feature = "pscu")]
1457 pub PSCU: self::Pscu,
1458 #[cfg(feature = "agt0")]
1459 pub AGT0: self::Agt0,
1460 #[cfg(feature = "agt1")]
1461 pub AGT1: self::Agt0,
1462 #[cfg(feature = "agt2")]
1463 pub AGT2: self::Agt0,
1464 #[cfg(feature = "agt3")]
1465 pub AGT3: self::Agt0,
1466 #[cfg(feature = "agt4")]
1467 pub AGT4: self::Agt0,
1468 #[cfg(feature = "agt5")]
1469 pub AGT5: self::Agt0,
1470 #[cfg(feature = "tsn")]
1471 pub TSN: self::Tsn,
1472 #[cfg(feature = "crc")]
1473 pub CRC: self::Crc,
1474 #[cfg(feature = "doc")]
1475 pub DOC: self::Doc,
1476 #[cfg(feature = "sci0")]
1477 pub SCI0: self::Sci0,
1478 #[cfg(feature = "sci1")]
1479 pub SCI1: self::Sci1,
1480 #[cfg(feature = "sci2")]
1481 pub SCI2: self::Sci1,
1482 #[cfg(feature = "sci3")]
1483 pub SCI3: self::Sci3,
1484 #[cfg(feature = "sci4")]
1485 pub SCI4: self::Sci3,
1486 #[cfg(feature = "sci9")]
1487 pub SCI9: self::Sci0,
1488 #[cfg(feature = "spi0")]
1489 pub SPI0: self::Spi0,
1490 #[cfg(feature = "gpt320")]
1491 pub GPT320: self::Gpt320,
1492 #[cfg(feature = "gpt321")]
1493 pub GPT321: self::Gpt320,
1494 #[cfg(feature = "gpt322")]
1495 pub GPT322: self::Gpt320,
1496 #[cfg(feature = "gpt323")]
1497 pub GPT323: self::Gpt320,
1498 #[cfg(feature = "gpt164")]
1499 pub GPT164: self::Gpt164,
1500 #[cfg(feature = "gpt165")]
1501 pub GPT165: self::Gpt164,
1502 #[cfg(feature = "gpt166")]
1503 pub GPT166: self::Gpt164,
1504 #[cfg(feature = "gpt167")]
1505 pub GPT167: self::Gpt164,
1506 #[cfg(feature = "gpt_ops")]
1507 pub GPT_OPS: self::GptOps,
1508 #[cfg(feature = "adc120")]
1509 pub ADC120: self::Adc120,
1510 #[cfg(feature = "dac12")]
1511 pub DAC12: self::Dac12,
1512 #[cfg(feature = "tsd")]
1513 pub TSD: self::Tsd,
1514 #[cfg(feature = "flad")]
1515 pub FLAD: self::Flad,
1516 #[cfg(feature = "faci")]
1517 pub FACI: self::Faci,
1518 #[cfg(feature = "qspi")]
1519 pub QSPI: self::Qspi,
1520}
1521
1522impl Peripherals {
1523 #[inline]
1526 pub fn take() -> Option<Self> {
1527 Some(Self::steal())
1528 }
1529
1530 #[inline]
1533 pub fn steal() -> Self {
1534 Peripherals {
1535 #[cfg(feature = "rmpu")]
1536 RMPU: crate::RMPU,
1537 #[cfg(feature = "tzf")]
1538 TZF: crate::TZF,
1539 #[cfg(feature = "sram")]
1540 SRAM: crate::SRAM,
1541 #[cfg(feature = "bus")]
1542 BUS: crate::BUS,
1543 #[cfg(feature = "dmac0")]
1544 DMAC0: crate::DMAC0,
1545 #[cfg(feature = "dmac1")]
1546 DMAC1: crate::DMAC1,
1547 #[cfg(feature = "dmac2")]
1548 DMAC2: crate::DMAC2,
1549 #[cfg(feature = "dmac3")]
1550 DMAC3: crate::DMAC3,
1551 #[cfg(feature = "dmac4")]
1552 DMAC4: crate::DMAC4,
1553 #[cfg(feature = "dmac5")]
1554 DMAC5: crate::DMAC5,
1555 #[cfg(feature = "dmac6")]
1556 DMAC6: crate::DMAC6,
1557 #[cfg(feature = "dmac7")]
1558 DMAC7: crate::DMAC7,
1559 #[cfg(feature = "dma")]
1560 DMA: crate::DMA,
1561 #[cfg(feature = "dtc")]
1562 DTC: crate::DTC,
1563 #[cfg(feature = "icu")]
1564 ICU: crate::ICU,
1565 #[cfg(feature = "cpscu")]
1566 CPSCU: crate::CPSCU,
1567 #[cfg(feature = "dbg")]
1568 DBG: crate::DBG,
1569 #[cfg(feature = "fcache")]
1570 FCACHE: crate::FCACHE,
1571 #[cfg(feature = "sysc")]
1572 SYSC: crate::SYSC,
1573 #[cfg(feature = "port0")]
1574 PORT0: crate::PORT0,
1575 #[cfg(feature = "port1")]
1576 PORT1: crate::PORT1,
1577 #[cfg(feature = "port2")]
1578 PORT2: crate::PORT2,
1579 #[cfg(feature = "port3")]
1580 PORT3: crate::PORT3,
1581 #[cfg(feature = "port4")]
1582 PORT4: crate::PORT4,
1583 #[cfg(feature = "port5")]
1584 PORT5: crate::PORT5,
1585 #[cfg(feature = "port6")]
1586 PORT6: crate::PORT6,
1587 #[cfg(feature = "port7")]
1588 PORT7: crate::PORT7,
1589 #[cfg(feature = "pfs")]
1590 PFS: crate::PFS,
1591 #[cfg(feature = "elc")]
1592 ELC: crate::ELC,
1593 #[cfg(feature = "rtc")]
1594 RTC: crate::RTC,
1595 #[cfg(feature = "iwdt")]
1596 IWDT: crate::IWDT,
1597 #[cfg(feature = "wdt")]
1598 WDT: crate::WDT,
1599 #[cfg(feature = "cac")]
1600 CAC: crate::CAC,
1601 #[cfg(feature = "mstp")]
1602 MSTP: crate::MSTP,
1603 #[cfg(feature = "poeg")]
1604 POEG: crate::POEG,
1605 #[cfg(feature = "usbfs")]
1606 USBFS: crate::USBFS,
1607 #[cfg(feature = "sdhi0")]
1608 SDHI0: crate::SDHI0,
1609 #[cfg(feature = "ssie0")]
1610 SSIE0: crate::SSIE0,
1611 #[cfg(feature = "iic0")]
1612 IIC0: crate::IIC0,
1613 #[cfg(feature = "iic0wu")]
1614 IIC0WU: crate::IIC0WU,
1615 #[cfg(feature = "iic1")]
1616 IIC1: crate::IIC1,
1617 #[cfg(feature = "can0")]
1618 CAN0: crate::CAN0,
1619 #[cfg(feature = "ctsu")]
1620 CTSU: crate::CTSU,
1621 #[cfg(feature = "pscu")]
1622 PSCU: crate::PSCU,
1623 #[cfg(feature = "agt0")]
1624 AGT0: crate::AGT0,
1625 #[cfg(feature = "agt1")]
1626 AGT1: crate::AGT1,
1627 #[cfg(feature = "agt2")]
1628 AGT2: crate::AGT2,
1629 #[cfg(feature = "agt3")]
1630 AGT3: crate::AGT3,
1631 #[cfg(feature = "agt4")]
1632 AGT4: crate::AGT4,
1633 #[cfg(feature = "agt5")]
1634 AGT5: crate::AGT5,
1635 #[cfg(feature = "tsn")]
1636 TSN: crate::TSN,
1637 #[cfg(feature = "crc")]
1638 CRC: crate::CRC,
1639 #[cfg(feature = "doc")]
1640 DOC: crate::DOC,
1641 #[cfg(feature = "sci0")]
1642 SCI0: crate::SCI0,
1643 #[cfg(feature = "sci1")]
1644 SCI1: crate::SCI1,
1645 #[cfg(feature = "sci2")]
1646 SCI2: crate::SCI2,
1647 #[cfg(feature = "sci3")]
1648 SCI3: crate::SCI3,
1649 #[cfg(feature = "sci4")]
1650 SCI4: crate::SCI4,
1651 #[cfg(feature = "sci9")]
1652 SCI9: crate::SCI9,
1653 #[cfg(feature = "spi0")]
1654 SPI0: crate::SPI0,
1655 #[cfg(feature = "gpt320")]
1656 GPT320: crate::GPT320,
1657 #[cfg(feature = "gpt321")]
1658 GPT321: crate::GPT321,
1659 #[cfg(feature = "gpt322")]
1660 GPT322: crate::GPT322,
1661 #[cfg(feature = "gpt323")]
1662 GPT323: crate::GPT323,
1663 #[cfg(feature = "gpt164")]
1664 GPT164: crate::GPT164,
1665 #[cfg(feature = "gpt165")]
1666 GPT165: crate::GPT165,
1667 #[cfg(feature = "gpt166")]
1668 GPT166: crate::GPT166,
1669 #[cfg(feature = "gpt167")]
1670 GPT167: crate::GPT167,
1671 #[cfg(feature = "gpt_ops")]
1672 GPT_OPS: crate::GPT_OPS,
1673 #[cfg(feature = "adc120")]
1674 ADC120: crate::ADC120,
1675 #[cfg(feature = "dac12")]
1676 DAC12: crate::DAC12,
1677 #[cfg(feature = "tsd")]
1678 TSD: crate::TSD,
1679 #[cfg(feature = "flad")]
1680 FLAD: crate::FLAD,
1681 #[cfg(feature = "faci")]
1682 FACI: crate::FACI,
1683 #[cfg(feature = "qspi")]
1684 QSPI: crate::QSPI,
1685 }
1686 }
1687}