ra4m2_pac/
ssie0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:07:12 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Sound Interface Enhanced (SSIE)"]
28unsafe impl ::core::marker::Send for super::Ssie0 {}
29unsafe impl ::core::marker::Sync for super::Ssie0 {}
30impl super::Ssie0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Control Register"]
38    #[inline(always)]
39    pub const fn ssicr(&self) -> &'static crate::common::Reg<self::Ssicr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Ssicr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "Status Register"]
48    #[inline(always)]
49    pub const fn ssisr(&self) -> &'static crate::common::Reg<self::Ssisr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Ssisr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(4usize),
53            )
54        }
55    }
56
57    #[doc = "FIFO Control Register"]
58    #[inline(always)]
59    pub const fn ssifcr(
60        &self,
61    ) -> &'static crate::common::Reg<self::Ssifcr_SPEC, crate::common::RW> {
62        unsafe {
63            crate::common::Reg::<self::Ssifcr_SPEC, crate::common::RW>::from_ptr(
64                self._svd2pac_as_ptr().add(16usize),
65            )
66        }
67    }
68
69    #[doc = "FIFO Status Register"]
70    #[inline(always)]
71    pub const fn ssifsr(
72        &self,
73    ) -> &'static crate::common::Reg<self::Ssifsr_SPEC, crate::common::RW> {
74        unsafe {
75            crate::common::Reg::<self::Ssifsr_SPEC, crate::common::RW>::from_ptr(
76                self._svd2pac_as_ptr().add(20usize),
77            )
78        }
79    }
80
81    #[doc = "Transmit FIFO Data Register"]
82    #[inline(always)]
83    pub const fn ssiftdr(
84        &self,
85    ) -> &'static crate::common::Reg<self::Ssiftdr_SPEC, crate::common::W> {
86        unsafe {
87            crate::common::Reg::<self::Ssiftdr_SPEC, crate::common::W>::from_ptr(
88                self._svd2pac_as_ptr().add(24usize),
89            )
90        }
91    }
92
93    #[doc = "Receive FIFO Data Register"]
94    #[inline(always)]
95    pub const fn ssifrdr(
96        &self,
97    ) -> &'static crate::common::Reg<self::Ssifrdr_SPEC, crate::common::R> {
98        unsafe {
99            crate::common::Reg::<self::Ssifrdr_SPEC, crate::common::R>::from_ptr(
100                self._svd2pac_as_ptr().add(28usize),
101            )
102        }
103    }
104
105    #[doc = "Audio Format Register"]
106    #[inline(always)]
107    pub const fn ssiofr(
108        &self,
109    ) -> &'static crate::common::Reg<self::Ssiofr_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Ssiofr_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(32usize),
113            )
114        }
115    }
116
117    #[doc = "Status Control Register"]
118    #[inline(always)]
119    pub const fn ssiscr(
120        &self,
121    ) -> &'static crate::common::Reg<self::Ssiscr_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Ssiscr_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(36usize),
125            )
126        }
127    }
128}
129#[doc(hidden)]
130#[derive(Copy, Clone, Eq, PartialEq)]
131pub struct Ssicr_SPEC;
132impl crate::sealed::RegSpec for Ssicr_SPEC {
133    type DataType = u32;
134}
135
136#[doc = "Control Register"]
137pub type Ssicr = crate::RegValueT<Ssicr_SPEC>;
138
139impl Ssicr {
140    #[doc = "Reception Enable"]
141    #[inline(always)]
142    pub fn ren(
143        self,
144    ) -> crate::common::RegisterField<
145        0,
146        0x1,
147        1,
148        0,
149        ssicr::Ren,
150        ssicr::Ren,
151        Ssicr_SPEC,
152        crate::common::RW,
153    > {
154        crate::common::RegisterField::<
155            0,
156            0x1,
157            1,
158            0,
159            ssicr::Ren,
160            ssicr::Ren,
161            Ssicr_SPEC,
162            crate::common::RW,
163        >::from_register(self, 0)
164    }
165
166    #[doc = "Transmission Enable"]
167    #[inline(always)]
168    pub fn ten(
169        self,
170    ) -> crate::common::RegisterField<
171        1,
172        0x1,
173        1,
174        0,
175        ssicr::Ten,
176        ssicr::Ten,
177        Ssicr_SPEC,
178        crate::common::RW,
179    > {
180        crate::common::RegisterField::<
181            1,
182            0x1,
183            1,
184            0,
185            ssicr::Ten,
186            ssicr::Ten,
187            Ssicr_SPEC,
188            crate::common::RW,
189        >::from_register(self, 0)
190    }
191
192    #[doc = "Mute Enable"]
193    #[inline(always)]
194    pub fn muen(
195        self,
196    ) -> crate::common::RegisterField<
197        3,
198        0x1,
199        1,
200        0,
201        ssicr::Muen,
202        ssicr::Muen,
203        Ssicr_SPEC,
204        crate::common::RW,
205    > {
206        crate::common::RegisterField::<
207            3,
208            0x1,
209            1,
210            0,
211            ssicr::Muen,
212            ssicr::Muen,
213            Ssicr_SPEC,
214            crate::common::RW,
215        >::from_register(self, 0)
216    }
217
218    #[doc = "Selects Bit Clock Division Ratio"]
219    #[inline(always)]
220    pub fn ckdv(
221        self,
222    ) -> crate::common::RegisterField<
223        4,
224        0xf,
225        1,
226        0,
227        ssicr::Ckdv,
228        ssicr::Ckdv,
229        Ssicr_SPEC,
230        crate::common::RW,
231    > {
232        crate::common::RegisterField::<
233            4,
234            0xf,
235            1,
236            0,
237            ssicr::Ckdv,
238            ssicr::Ckdv,
239            Ssicr_SPEC,
240            crate::common::RW,
241        >::from_register(self, 0)
242    }
243
244    #[doc = "Selects Serial Data Delay"]
245    #[inline(always)]
246    pub fn del(
247        self,
248    ) -> crate::common::RegisterField<
249        8,
250        0x1,
251        1,
252        0,
253        ssicr::Del,
254        ssicr::Del,
255        Ssicr_SPEC,
256        crate::common::RW,
257    > {
258        crate::common::RegisterField::<
259            8,
260            0x1,
261            1,
262            0,
263            ssicr::Del,
264            ssicr::Del,
265            Ssicr_SPEC,
266            crate::common::RW,
267        >::from_register(self, 0)
268    }
269
270    #[doc = "Selects Placement Data Alignment"]
271    #[inline(always)]
272    pub fn pdta(
273        self,
274    ) -> crate::common::RegisterField<
275        9,
276        0x1,
277        1,
278        0,
279        ssicr::Pdta,
280        ssicr::Pdta,
281        Ssicr_SPEC,
282        crate::common::RW,
283    > {
284        crate::common::RegisterField::<
285            9,
286            0x1,
287            1,
288            0,
289            ssicr::Pdta,
290            ssicr::Pdta,
291            Ssicr_SPEC,
292            crate::common::RW,
293        >::from_register(self, 0)
294    }
295
296    #[doc = "Selects Serial Data Alignment"]
297    #[inline(always)]
298    pub fn sdta(
299        self,
300    ) -> crate::common::RegisterField<
301        10,
302        0x1,
303        1,
304        0,
305        ssicr::Sdta,
306        ssicr::Sdta,
307        Ssicr_SPEC,
308        crate::common::RW,
309    > {
310        crate::common::RegisterField::<
311            10,
312            0x1,
313            1,
314            0,
315            ssicr::Sdta,
316            ssicr::Sdta,
317            Ssicr_SPEC,
318            crate::common::RW,
319        >::from_register(self, 0)
320    }
321
322    #[doc = "Selects Serial Padding Polarity"]
323    #[inline(always)]
324    pub fn spdp(
325        self,
326    ) -> crate::common::RegisterField<
327        11,
328        0x1,
329        1,
330        0,
331        ssicr::Spdp,
332        ssicr::Spdp,
333        Ssicr_SPEC,
334        crate::common::RW,
335    > {
336        crate::common::RegisterField::<
337            11,
338            0x1,
339            1,
340            0,
341            ssicr::Spdp,
342            ssicr::Spdp,
343            Ssicr_SPEC,
344            crate::common::RW,
345        >::from_register(self, 0)
346    }
347
348    #[doc = "Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal"]
349    #[inline(always)]
350    pub fn lrckp(
351        self,
352    ) -> crate::common::RegisterField<
353        12,
354        0x1,
355        1,
356        0,
357        ssicr::Lrckp,
358        ssicr::Lrckp,
359        Ssicr_SPEC,
360        crate::common::RW,
361    > {
362        crate::common::RegisterField::<
363            12,
364            0x1,
365            1,
366            0,
367            ssicr::Lrckp,
368            ssicr::Lrckp,
369            Ssicr_SPEC,
370            crate::common::RW,
371        >::from_register(self, 0)
372    }
373
374    #[doc = "Selects Bit Clock Polarity"]
375    #[inline(always)]
376    pub fn bckp(
377        self,
378    ) -> crate::common::RegisterField<
379        13,
380        0x1,
381        1,
382        0,
383        ssicr::Bckp,
384        ssicr::Bckp,
385        Ssicr_SPEC,
386        crate::common::RW,
387    > {
388        crate::common::RegisterField::<
389            13,
390            0x1,
391            1,
392            0,
393            ssicr::Bckp,
394            ssicr::Bckp,
395            Ssicr_SPEC,
396            crate::common::RW,
397        >::from_register(self, 0)
398    }
399
400    #[doc = "Master Enable"]
401    #[inline(always)]
402    pub fn mst(
403        self,
404    ) -> crate::common::RegisterField<
405        14,
406        0x1,
407        1,
408        0,
409        ssicr::Mst,
410        ssicr::Mst,
411        Ssicr_SPEC,
412        crate::common::RW,
413    > {
414        crate::common::RegisterField::<
415            14,
416            0x1,
417            1,
418            0,
419            ssicr::Mst,
420            ssicr::Mst,
421            Ssicr_SPEC,
422            crate::common::RW,
423        >::from_register(self, 0)
424    }
425
426    #[doc = "Selects System Word Length"]
427    #[inline(always)]
428    pub fn swl(
429        self,
430    ) -> crate::common::RegisterField<
431        16,
432        0x7,
433        1,
434        0,
435        ssicr::Swl,
436        ssicr::Swl,
437        Ssicr_SPEC,
438        crate::common::RW,
439    > {
440        crate::common::RegisterField::<
441            16,
442            0x7,
443            1,
444            0,
445            ssicr::Swl,
446            ssicr::Swl,
447            Ssicr_SPEC,
448            crate::common::RW,
449        >::from_register(self, 0)
450    }
451
452    #[doc = "Selects Data Word Length"]
453    #[inline(always)]
454    pub fn dwl(
455        self,
456    ) -> crate::common::RegisterField<
457        19,
458        0x7,
459        1,
460        0,
461        ssicr::Dwl,
462        ssicr::Dwl,
463        Ssicr_SPEC,
464        crate::common::RW,
465    > {
466        crate::common::RegisterField::<
467            19,
468            0x7,
469            1,
470            0,
471            ssicr::Dwl,
472            ssicr::Dwl,
473            Ssicr_SPEC,
474            crate::common::RW,
475        >::from_register(self, 0)
476    }
477
478    #[doc = "Selects Frame Word Number"]
479    #[inline(always)]
480    pub fn frm(
481        self,
482    ) -> crate::common::RegisterField<22, 0x3, 1, 0, u8, u8, Ssicr_SPEC, crate::common::RW> {
483        crate::common::RegisterField::<22,0x3,1,0,u8,u8,Ssicr_SPEC,crate::common::RW>::from_register(self,0)
484    }
485
486    #[doc = "Idle Mode Interrupt Output Enable"]
487    #[inline(always)]
488    pub fn iien(
489        self,
490    ) -> crate::common::RegisterField<
491        25,
492        0x1,
493        1,
494        0,
495        ssicr::Iien,
496        ssicr::Iien,
497        Ssicr_SPEC,
498        crate::common::RW,
499    > {
500        crate::common::RegisterField::<
501            25,
502            0x1,
503            1,
504            0,
505            ssicr::Iien,
506            ssicr::Iien,
507            Ssicr_SPEC,
508            crate::common::RW,
509        >::from_register(self, 0)
510    }
511
512    #[doc = "Receive Overflow Interrupt Output Enable"]
513    #[inline(always)]
514    pub fn roien(
515        self,
516    ) -> crate::common::RegisterField<
517        26,
518        0x1,
519        1,
520        0,
521        ssicr::Roien,
522        ssicr::Roien,
523        Ssicr_SPEC,
524        crate::common::RW,
525    > {
526        crate::common::RegisterField::<
527            26,
528            0x1,
529            1,
530            0,
531            ssicr::Roien,
532            ssicr::Roien,
533            Ssicr_SPEC,
534            crate::common::RW,
535        >::from_register(self, 0)
536    }
537
538    #[doc = "Receive Underflow Interrupt Output Enable"]
539    #[inline(always)]
540    pub fn ruien(
541        self,
542    ) -> crate::common::RegisterField<
543        27,
544        0x1,
545        1,
546        0,
547        ssicr::Ruien,
548        ssicr::Ruien,
549        Ssicr_SPEC,
550        crate::common::RW,
551    > {
552        crate::common::RegisterField::<
553            27,
554            0x1,
555            1,
556            0,
557            ssicr::Ruien,
558            ssicr::Ruien,
559            Ssicr_SPEC,
560            crate::common::RW,
561        >::from_register(self, 0)
562    }
563
564    #[doc = "Transmit Overflow Interrupt Output Enable"]
565    #[inline(always)]
566    pub fn toien(
567        self,
568    ) -> crate::common::RegisterField<
569        28,
570        0x1,
571        1,
572        0,
573        ssicr::Toien,
574        ssicr::Toien,
575        Ssicr_SPEC,
576        crate::common::RW,
577    > {
578        crate::common::RegisterField::<
579            28,
580            0x1,
581            1,
582            0,
583            ssicr::Toien,
584            ssicr::Toien,
585            Ssicr_SPEC,
586            crate::common::RW,
587        >::from_register(self, 0)
588    }
589
590    #[doc = "Transmit Underflow Interrupt Output Enable"]
591    #[inline(always)]
592    pub fn tuien(
593        self,
594    ) -> crate::common::RegisterField<
595        29,
596        0x1,
597        1,
598        0,
599        ssicr::Tuien,
600        ssicr::Tuien,
601        Ssicr_SPEC,
602        crate::common::RW,
603    > {
604        crate::common::RegisterField::<
605            29,
606            0x1,
607            1,
608            0,
609            ssicr::Tuien,
610            ssicr::Tuien,
611            Ssicr_SPEC,
612            crate::common::RW,
613        >::from_register(self, 0)
614    }
615
616    #[doc = "Selects an Audio Clock for Master-mode Communication"]
617    #[inline(always)]
618    pub fn cks(
619        self,
620    ) -> crate::common::RegisterField<
621        30,
622        0x1,
623        1,
624        0,
625        ssicr::Cks,
626        ssicr::Cks,
627        Ssicr_SPEC,
628        crate::common::RW,
629    > {
630        crate::common::RegisterField::<
631            30,
632            0x1,
633            1,
634            0,
635            ssicr::Cks,
636            ssicr::Cks,
637            Ssicr_SPEC,
638            crate::common::RW,
639        >::from_register(self, 0)
640    }
641}
642impl ::core::default::Default for Ssicr {
643    #[inline(always)]
644    fn default() -> Ssicr {
645        <crate::RegValueT<Ssicr_SPEC> as RegisterValue<_>>::new(0)
646    }
647}
648pub mod ssicr {
649
650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
651    pub struct Ren_SPEC;
652    pub type Ren = crate::EnumBitfieldStruct<u8, Ren_SPEC>;
653    impl Ren {
654        #[doc = "Disables reception"]
655        pub const _0: Self = Self::new(0);
656
657        #[doc = "Enables reception (starts reception)"]
658        pub const _1: Self = Self::new(1);
659    }
660    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
661    pub struct Ten_SPEC;
662    pub type Ten = crate::EnumBitfieldStruct<u8, Ten_SPEC>;
663    impl Ten {
664        #[doc = "Disables transmission"]
665        pub const _0: Self = Self::new(0);
666
667        #[doc = "Enables transmission (starts transmission)"]
668        pub const _1: Self = Self::new(1);
669    }
670    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
671    pub struct Muen_SPEC;
672    pub type Muen = crate::EnumBitfieldStruct<u8, Muen_SPEC>;
673    impl Muen {
674        #[doc = "Disables muting on the next frame boundary"]
675        pub const _0: Self = Self::new(0);
676
677        #[doc = "Enables muting on the next frame boundary"]
678        pub const _1: Self = Self::new(1);
679    }
680    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
681    pub struct Ckdv_SPEC;
682    pub type Ckdv = crate::EnumBitfieldStruct<u8, Ckdv_SPEC>;
683    impl Ckdv {
684        #[doc = "AUDIO_MCK"]
685        pub const _0_X_0: Self = Self::new(0);
686
687        #[doc = "AUDIO_MCK/2"]
688        pub const _0_X_1: Self = Self::new(1);
689
690        #[doc = "AUDIO_MCK/4"]
691        pub const _0_X_2: Self = Self::new(2);
692
693        #[doc = "AUDIO_MCK/8"]
694        pub const _0_X_3: Self = Self::new(3);
695
696        #[doc = "AUDIO_MCK/16"]
697        pub const _0_X_4: Self = Self::new(4);
698
699        #[doc = "AUDIO_MCK/32"]
700        pub const _0_X_5: Self = Self::new(5);
701
702        #[doc = "AUDIO_MCK/64"]
703        pub const _0_X_6: Self = Self::new(6);
704
705        #[doc = "AUDIO_MCK/128"]
706        pub const _0_X_7: Self = Self::new(7);
707
708        #[doc = "AUDIO_MCK/6"]
709        pub const _0_X_8: Self = Self::new(8);
710
711        #[doc = "AUDIO_MCK/12"]
712        pub const _0_X_9: Self = Self::new(9);
713
714        #[doc = "AUDIO_MCK/24"]
715        pub const _0_X_A: Self = Self::new(10);
716
717        #[doc = "AUDIO_MCK/48"]
718        pub const _0_X_B: Self = Self::new(11);
719
720        #[doc = "AUDIO_MCK/96"]
721        pub const _0_X_C: Self = Self::new(12);
722    }
723    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
724    pub struct Del_SPEC;
725    pub type Del = crate::EnumBitfieldStruct<u8, Del_SPEC>;
726    impl Del {
727        #[doc = "Delay of 1 cycle of SSIBCK0 between SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0"]
728        pub const _0: Self = Self::new(0);
729
730        #[doc = "No delay between SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0"]
731        pub const _1: Self = Self::new(1);
732    }
733    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
734    pub struct Pdta_SPEC;
735    pub type Pdta = crate::EnumBitfieldStruct<u8, Pdta_SPEC>;
736    impl Pdta {
737        #[doc = "Left-justifies placement data (SSIFTDR, SSIFRDR)"]
738        pub const _0: Self = Self::new(0);
739
740        #[doc = "Right-justifies placement data (SSIFTDR, SSIFRDR)"]
741        pub const _1: Self = Self::new(1);
742    }
743    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
744    pub struct Sdta_SPEC;
745    pub type Sdta = crate::EnumBitfieldStruct<u8, Sdta_SPEC>;
746    impl Sdta {
747        #[doc = "Transmits and receives serial data first and then padding bits"]
748        pub const _0: Self = Self::new(0);
749
750        #[doc = "Transmit and receives padding bits first and then serial data"]
751        pub const _1: Self = Self::new(1);
752    }
753    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
754    pub struct Spdp_SPEC;
755    pub type Spdp = crate::EnumBitfieldStruct<u8, Spdp_SPEC>;
756    impl Spdp {
757        #[doc = "Padding data is at a low level"]
758        pub const _0: Self = Self::new(0);
759
760        #[doc = "Padding data is at a high level"]
761        pub const _1: Self = Self::new(1);
762    }
763    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
764    pub struct Lrckp_SPEC;
765    pub type Lrckp = crate::EnumBitfieldStruct<u8, Lrckp_SPEC>;
766    impl Lrckp {
767        #[doc = "The initial value is at a high level. The start trigger for a frame is synchronized with a falling edge of SSILRCK0/SSIFS0."]
768        pub const _0: Self = Self::new(0);
769
770        #[doc = "The initial value is at a low level. The start trigger for a frame is synchronized with a rising edge of SSILRCK0/SSIFS0."]
771        pub const _1: Self = Self::new(1);
772    }
773    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
774    pub struct Bckp_SPEC;
775    pub type Bckp = crate::EnumBitfieldStruct<u8, Bckp_SPEC>;
776    impl Bckp {
777        #[doc = "SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0 change at a falling edge (SSILRCK0/SSIFS0 and SSIRXD0 are sampled at a rising edge of SSIBCK0)."]
778        pub const _0: Self = Self::new(0);
779
780        #[doc = "SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0 change at a rising edge (SSILRCK0/SSIFS0 and SSIRXD0 are sampled at a falling edge of SSIBCK0)."]
781        pub const _1: Self = Self::new(1);
782    }
783    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
784    pub struct Mst_SPEC;
785    pub type Mst = crate::EnumBitfieldStruct<u8, Mst_SPEC>;
786    impl Mst {
787        #[doc = "Slave-mode communication"]
788        pub const _0: Self = Self::new(0);
789
790        #[doc = "Master-mode communication"]
791        pub const _1: Self = Self::new(1);
792    }
793    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
794    pub struct Swl_SPEC;
795    pub type Swl = crate::EnumBitfieldStruct<u8, Swl_SPEC>;
796    impl Swl {
797        #[doc = "8 bits"]
798        pub const _000: Self = Self::new(0);
799
800        #[doc = "16 bits"]
801        pub const _001: Self = Self::new(1);
802
803        #[doc = "24 bits"]
804        pub const _010: Self = Self::new(2);
805
806        #[doc = "32 bits"]
807        pub const _011: Self = Self::new(3);
808
809        #[doc = "48 bits"]
810        pub const _100: Self = Self::new(4);
811
812        #[doc = "64 bits"]
813        pub const _101: Self = Self::new(5);
814
815        #[doc = "128 bits"]
816        pub const _110: Self = Self::new(6);
817
818        #[doc = "256 bits"]
819        pub const _111: Self = Self::new(7);
820    }
821    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
822    pub struct Dwl_SPEC;
823    pub type Dwl = crate::EnumBitfieldStruct<u8, Dwl_SPEC>;
824    impl Dwl {
825        #[doc = "8 bits"]
826        pub const _000: Self = Self::new(0);
827
828        #[doc = "16 bits"]
829        pub const _001: Self = Self::new(1);
830
831        #[doc = "18 bits"]
832        pub const _010: Self = Self::new(2);
833
834        #[doc = "20 bits"]
835        pub const _011: Self = Self::new(3);
836
837        #[doc = "22 bits"]
838        pub const _100: Self = Self::new(4);
839
840        #[doc = "24 bits"]
841        pub const _101: Self = Self::new(5);
842
843        #[doc = "32 bits"]
844        pub const _110: Self = Self::new(6);
845
846        #[doc = "Setting prohibited"]
847        pub const _111: Self = Self::new(7);
848    }
849    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
850    pub struct Iien_SPEC;
851    pub type Iien = crate::EnumBitfieldStruct<u8, Iien_SPEC>;
852    impl Iien {
853        #[doc = "Disables idle mode interrupt output"]
854        pub const _0: Self = Self::new(0);
855
856        #[doc = "Enables idle mode interrupt output"]
857        pub const _1: Self = Self::new(1);
858    }
859    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
860    pub struct Roien_SPEC;
861    pub type Roien = crate::EnumBitfieldStruct<u8, Roien_SPEC>;
862    impl Roien {
863        #[doc = "Disables receive overflow interrupt output"]
864        pub const _0: Self = Self::new(0);
865
866        #[doc = "Enables receive overflow interrupt output"]
867        pub const _1: Self = Self::new(1);
868    }
869    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
870    pub struct Ruien_SPEC;
871    pub type Ruien = crate::EnumBitfieldStruct<u8, Ruien_SPEC>;
872    impl Ruien {
873        #[doc = "Disables receive underflow interrupt output"]
874        pub const _0: Self = Self::new(0);
875
876        #[doc = "Enables receive underflow interrupt output"]
877        pub const _1: Self = Self::new(1);
878    }
879    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
880    pub struct Toien_SPEC;
881    pub type Toien = crate::EnumBitfieldStruct<u8, Toien_SPEC>;
882    impl Toien {
883        #[doc = "Disables transmit overflow interrupt output"]
884        pub const _0: Self = Self::new(0);
885
886        #[doc = "Enables transmit overflow interrupt output"]
887        pub const _1: Self = Self::new(1);
888    }
889    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
890    pub struct Tuien_SPEC;
891    pub type Tuien = crate::EnumBitfieldStruct<u8, Tuien_SPEC>;
892    impl Tuien {
893        #[doc = "Disables transmit underflow interrupt output"]
894        pub const _0: Self = Self::new(0);
895
896        #[doc = "Enables transmit underflow interrupt output"]
897        pub const _1: Self = Self::new(1);
898    }
899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
900    pub struct Cks_SPEC;
901    pub type Cks = crate::EnumBitfieldStruct<u8, Cks_SPEC>;
902    impl Cks {
903        #[doc = "Selects the AUDIO_CLK input"]
904        pub const _0: Self = Self::new(0);
905
906        #[doc = "Selects the GTIOC2A (GPT output)"]
907        pub const _1: Self = Self::new(1);
908    }
909}
910#[doc(hidden)]
911#[derive(Copy, Clone, Eq, PartialEq)]
912pub struct Ssisr_SPEC;
913impl crate::sealed::RegSpec for Ssisr_SPEC {
914    type DataType = u32;
915}
916
917#[doc = "Status Register"]
918pub type Ssisr = crate::RegValueT<Ssisr_SPEC>;
919
920impl Ssisr {
921    #[doc = "Idle Mode Status Flag"]
922    #[inline(always)]
923    pub fn iirq(
924        self,
925    ) -> crate::common::RegisterField<
926        25,
927        0x1,
928        1,
929        0,
930        ssisr::Iirq,
931        ssisr::Iirq,
932        Ssisr_SPEC,
933        crate::common::R,
934    > {
935        crate::common::RegisterField::<
936            25,
937            0x1,
938            1,
939            0,
940            ssisr::Iirq,
941            ssisr::Iirq,
942            Ssisr_SPEC,
943            crate::common::R,
944        >::from_register(self, 0)
945    }
946
947    #[doc = "Receive Overflow Error Status Flag"]
948    #[inline(always)]
949    pub fn roirq(
950        self,
951    ) -> crate::common::RegisterField<
952        26,
953        0x1,
954        1,
955        0,
956        ssisr::Roirq,
957        ssisr::Roirq,
958        Ssisr_SPEC,
959        crate::common::RW,
960    > {
961        crate::common::RegisterField::<
962            26,
963            0x1,
964            1,
965            0,
966            ssisr::Roirq,
967            ssisr::Roirq,
968            Ssisr_SPEC,
969            crate::common::RW,
970        >::from_register(self, 0)
971    }
972
973    #[doc = "Receive Underflow Error Status Flag"]
974    #[inline(always)]
975    pub fn ruirq(
976        self,
977    ) -> crate::common::RegisterField<
978        27,
979        0x1,
980        1,
981        0,
982        ssisr::Ruirq,
983        ssisr::Ruirq,
984        Ssisr_SPEC,
985        crate::common::RW,
986    > {
987        crate::common::RegisterField::<
988            27,
989            0x1,
990            1,
991            0,
992            ssisr::Ruirq,
993            ssisr::Ruirq,
994            Ssisr_SPEC,
995            crate::common::RW,
996        >::from_register(self, 0)
997    }
998
999    #[doc = "Transmit Overflow Error Status Flag"]
1000    #[inline(always)]
1001    pub fn toirq(
1002        self,
1003    ) -> crate::common::RegisterField<
1004        28,
1005        0x1,
1006        1,
1007        0,
1008        ssisr::Toirq,
1009        ssisr::Toirq,
1010        Ssisr_SPEC,
1011        crate::common::RW,
1012    > {
1013        crate::common::RegisterField::<
1014            28,
1015            0x1,
1016            1,
1017            0,
1018            ssisr::Toirq,
1019            ssisr::Toirq,
1020            Ssisr_SPEC,
1021            crate::common::RW,
1022        >::from_register(self, 0)
1023    }
1024
1025    #[doc = "Transmit Underflow Error Status flag"]
1026    #[inline(always)]
1027    pub fn tuirq(
1028        self,
1029    ) -> crate::common::RegisterField<
1030        29,
1031        0x1,
1032        1,
1033        0,
1034        ssisr::Tuirq,
1035        ssisr::Tuirq,
1036        Ssisr_SPEC,
1037        crate::common::RW,
1038    > {
1039        crate::common::RegisterField::<
1040            29,
1041            0x1,
1042            1,
1043            0,
1044            ssisr::Tuirq,
1045            ssisr::Tuirq,
1046            Ssisr_SPEC,
1047            crate::common::RW,
1048        >::from_register(self, 0)
1049    }
1050}
1051impl ::core::default::Default for Ssisr {
1052    #[inline(always)]
1053    fn default() -> Ssisr {
1054        <crate::RegValueT<Ssisr_SPEC> as RegisterValue<_>>::new(33554432)
1055    }
1056}
1057pub mod ssisr {
1058
1059    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1060    pub struct Iirq_SPEC;
1061    pub type Iirq = crate::EnumBitfieldStruct<u8, Iirq_SPEC>;
1062    impl Iirq {
1063        #[doc = "In the communication state"]
1064        pub const _0: Self = Self::new(0);
1065
1066        #[doc = "In the idle state"]
1067        pub const _1: Self = Self::new(1);
1068    }
1069    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1070    pub struct Roirq_SPEC;
1071    pub type Roirq = crate::EnumBitfieldStruct<u8, Roirq_SPEC>;
1072    impl Roirq {
1073        #[doc = "No receive overflow error is generated."]
1074        pub const _0: Self = Self::new(0);
1075
1076        #[doc = "A receive overflow error is generated."]
1077        pub const _1: Self = Self::new(1);
1078    }
1079    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1080    pub struct Ruirq_SPEC;
1081    pub type Ruirq = crate::EnumBitfieldStruct<u8, Ruirq_SPEC>;
1082    impl Ruirq {
1083        #[doc = "No receive underflow error is generated."]
1084        pub const _0: Self = Self::new(0);
1085
1086        #[doc = "A receive underflow error is generated."]
1087        pub const _1: Self = Self::new(1);
1088    }
1089    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1090    pub struct Toirq_SPEC;
1091    pub type Toirq = crate::EnumBitfieldStruct<u8, Toirq_SPEC>;
1092    impl Toirq {
1093        #[doc = "No transmit overflow error is generated."]
1094        pub const _0: Self = Self::new(0);
1095
1096        #[doc = "A transmit overflow error is generated."]
1097        pub const _1: Self = Self::new(1);
1098    }
1099    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1100    pub struct Tuirq_SPEC;
1101    pub type Tuirq = crate::EnumBitfieldStruct<u8, Tuirq_SPEC>;
1102    impl Tuirq {
1103        #[doc = "No transmit underflow error is generated."]
1104        pub const _0: Self = Self::new(0);
1105
1106        #[doc = "A transmit underflow error is generated."]
1107        pub const _1: Self = Self::new(1);
1108    }
1109}
1110#[doc(hidden)]
1111#[derive(Copy, Clone, Eq, PartialEq)]
1112pub struct Ssifcr_SPEC;
1113impl crate::sealed::RegSpec for Ssifcr_SPEC {
1114    type DataType = u32;
1115}
1116
1117#[doc = "FIFO Control Register"]
1118pub type Ssifcr = crate::RegValueT<Ssifcr_SPEC>;
1119
1120impl Ssifcr {
1121    #[doc = "Receive FIFO Data Register Reset"]
1122    #[inline(always)]
1123    pub fn rfrst(
1124        self,
1125    ) -> crate::common::RegisterField<
1126        0,
1127        0x1,
1128        1,
1129        0,
1130        ssifcr::Rfrst,
1131        ssifcr::Rfrst,
1132        Ssifcr_SPEC,
1133        crate::common::RW,
1134    > {
1135        crate::common::RegisterField::<
1136            0,
1137            0x1,
1138            1,
1139            0,
1140            ssifcr::Rfrst,
1141            ssifcr::Rfrst,
1142            Ssifcr_SPEC,
1143            crate::common::RW,
1144        >::from_register(self, 0)
1145    }
1146
1147    #[doc = "Transmit FIFO Data Register Reset"]
1148    #[inline(always)]
1149    pub fn tfrst(
1150        self,
1151    ) -> crate::common::RegisterField<
1152        1,
1153        0x1,
1154        1,
1155        0,
1156        ssifcr::Tfrst,
1157        ssifcr::Tfrst,
1158        Ssifcr_SPEC,
1159        crate::common::RW,
1160    > {
1161        crate::common::RegisterField::<
1162            1,
1163            0x1,
1164            1,
1165            0,
1166            ssifcr::Tfrst,
1167            ssifcr::Tfrst,
1168            Ssifcr_SPEC,
1169            crate::common::RW,
1170        >::from_register(self, 0)
1171    }
1172
1173    #[doc = "Receive Data Full Interrupt Output Enable"]
1174    #[inline(always)]
1175    pub fn rie(
1176        self,
1177    ) -> crate::common::RegisterField<
1178        2,
1179        0x1,
1180        1,
1181        0,
1182        ssifcr::Rie,
1183        ssifcr::Rie,
1184        Ssifcr_SPEC,
1185        crate::common::RW,
1186    > {
1187        crate::common::RegisterField::<
1188            2,
1189            0x1,
1190            1,
1191            0,
1192            ssifcr::Rie,
1193            ssifcr::Rie,
1194            Ssifcr_SPEC,
1195            crate::common::RW,
1196        >::from_register(self, 0)
1197    }
1198
1199    #[doc = "Transmit Data Empty Interrupt Output Enable"]
1200    #[inline(always)]
1201    pub fn tie(
1202        self,
1203    ) -> crate::common::RegisterField<
1204        3,
1205        0x1,
1206        1,
1207        0,
1208        ssifcr::Tie,
1209        ssifcr::Tie,
1210        Ssifcr_SPEC,
1211        crate::common::RW,
1212    > {
1213        crate::common::RegisterField::<
1214            3,
1215            0x1,
1216            1,
1217            0,
1218            ssifcr::Tie,
1219            ssifcr::Tie,
1220            Ssifcr_SPEC,
1221            crate::common::RW,
1222        >::from_register(self, 0)
1223    }
1224
1225    #[doc = "Byte Swap Enable"]
1226    #[inline(always)]
1227    pub fn bsw(
1228        self,
1229    ) -> crate::common::RegisterField<
1230        11,
1231        0x1,
1232        1,
1233        0,
1234        ssifcr::Bsw,
1235        ssifcr::Bsw,
1236        Ssifcr_SPEC,
1237        crate::common::RW,
1238    > {
1239        crate::common::RegisterField::<
1240            11,
1241            0x1,
1242            1,
1243            0,
1244            ssifcr::Bsw,
1245            ssifcr::Bsw,
1246            Ssifcr_SPEC,
1247            crate::common::RW,
1248        >::from_register(self, 0)
1249    }
1250
1251    #[doc = "Software Reset"]
1252    #[inline(always)]
1253    pub fn ssirst(
1254        self,
1255    ) -> crate::common::RegisterField<
1256        16,
1257        0x1,
1258        1,
1259        0,
1260        ssifcr::Ssirst,
1261        ssifcr::Ssirst,
1262        Ssifcr_SPEC,
1263        crate::common::RW,
1264    > {
1265        crate::common::RegisterField::<
1266            16,
1267            0x1,
1268            1,
1269            0,
1270            ssifcr::Ssirst,
1271            ssifcr::Ssirst,
1272            Ssifcr_SPEC,
1273            crate::common::RW,
1274        >::from_register(self, 0)
1275    }
1276
1277    #[doc = "AUDIO_MCK Enable in Master-mode Communication"]
1278    #[inline(always)]
1279    pub fn aucke(
1280        self,
1281    ) -> crate::common::RegisterField<
1282        31,
1283        0x1,
1284        1,
1285        0,
1286        ssifcr::Aucke,
1287        ssifcr::Aucke,
1288        Ssifcr_SPEC,
1289        crate::common::RW,
1290    > {
1291        crate::common::RegisterField::<
1292            31,
1293            0x1,
1294            1,
1295            0,
1296            ssifcr::Aucke,
1297            ssifcr::Aucke,
1298            Ssifcr_SPEC,
1299            crate::common::RW,
1300        >::from_register(self, 0)
1301    }
1302}
1303impl ::core::default::Default for Ssifcr {
1304    #[inline(always)]
1305    fn default() -> Ssifcr {
1306        <crate::RegValueT<Ssifcr_SPEC> as RegisterValue<_>>::new(0)
1307    }
1308}
1309pub mod ssifcr {
1310
1311    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1312    pub struct Rfrst_SPEC;
1313    pub type Rfrst = crate::EnumBitfieldStruct<u8, Rfrst_SPEC>;
1314    impl Rfrst {
1315        #[doc = "Clears a receive data FIFO reset condition"]
1316        pub const _0: Self = Self::new(0);
1317
1318        #[doc = "Sets a receive data FIFO reset condition"]
1319        pub const _1: Self = Self::new(1);
1320    }
1321    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1322    pub struct Tfrst_SPEC;
1323    pub type Tfrst = crate::EnumBitfieldStruct<u8, Tfrst_SPEC>;
1324    impl Tfrst {
1325        #[doc = "Clears a transmit data FIFO reset condition"]
1326        pub const _0: Self = Self::new(0);
1327
1328        #[doc = "Sets a transmit data FIFO reset condition"]
1329        pub const _1: Self = Self::new(1);
1330    }
1331    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1332    pub struct Rie_SPEC;
1333    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
1334    impl Rie {
1335        #[doc = "Disables receive data full interrupts"]
1336        pub const _0: Self = Self::new(0);
1337
1338        #[doc = "Enables receive data full interrupts"]
1339        pub const _1: Self = Self::new(1);
1340    }
1341    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1342    pub struct Tie_SPEC;
1343    pub type Tie = crate::EnumBitfieldStruct<u8, Tie_SPEC>;
1344    impl Tie {
1345        #[doc = "Disables transmit data empty interrupts"]
1346        pub const _0: Self = Self::new(0);
1347
1348        #[doc = "Enables transmit data empty interrupts"]
1349        pub const _1: Self = Self::new(1);
1350    }
1351    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1352    pub struct Bsw_SPEC;
1353    pub type Bsw = crate::EnumBitfieldStruct<u8, Bsw_SPEC>;
1354    impl Bsw {
1355        #[doc = "Disables byte swap"]
1356        pub const _0: Self = Self::new(0);
1357
1358        #[doc = "Enables byte swap"]
1359        pub const _1: Self = Self::new(1);
1360    }
1361    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1362    pub struct Ssirst_SPEC;
1363    pub type Ssirst = crate::EnumBitfieldStruct<u8, Ssirst_SPEC>;
1364    impl Ssirst {
1365        #[doc = "Clears a software reset condition"]
1366        pub const _0: Self = Self::new(0);
1367
1368        #[doc = "Sets a software reset condition"]
1369        pub const _1: Self = Self::new(1);
1370    }
1371    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1372    pub struct Aucke_SPEC;
1373    pub type Aucke = crate::EnumBitfieldStruct<u8, Aucke_SPEC>;
1374    impl Aucke {
1375        #[doc = "Disables supply of AUDIO_MCK"]
1376        pub const _0: Self = Self::new(0);
1377
1378        #[doc = "Enables supply of AUDIO_MCK"]
1379        pub const _1: Self = Self::new(1);
1380    }
1381}
1382#[doc(hidden)]
1383#[derive(Copy, Clone, Eq, PartialEq)]
1384pub struct Ssifsr_SPEC;
1385impl crate::sealed::RegSpec for Ssifsr_SPEC {
1386    type DataType = u32;
1387}
1388
1389#[doc = "FIFO Status Register"]
1390pub type Ssifsr = crate::RegValueT<Ssifsr_SPEC>;
1391
1392impl Ssifsr {
1393    #[doc = "Receive Data Full Flag"]
1394    #[inline(always)]
1395    pub fn rdf(
1396        self,
1397    ) -> crate::common::RegisterField<
1398        0,
1399        0x1,
1400        1,
1401        0,
1402        ssifsr::Rdf,
1403        ssifsr::Rdf,
1404        Ssifsr_SPEC,
1405        crate::common::RW,
1406    > {
1407        crate::common::RegisterField::<
1408            0,
1409            0x1,
1410            1,
1411            0,
1412            ssifsr::Rdf,
1413            ssifsr::Rdf,
1414            Ssifsr_SPEC,
1415            crate::common::RW,
1416        >::from_register(self, 0)
1417    }
1418
1419    #[doc = "Receive Data Count"]
1420    #[inline(always)]
1421    pub fn rdc(
1422        self,
1423    ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Ssifsr_SPEC, crate::common::R> {
1424        crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Ssifsr_SPEC,crate::common::R>::from_register(self,0)
1425    }
1426
1427    #[doc = "Transmit Data Empty Flag"]
1428    #[inline(always)]
1429    pub fn tde(
1430        self,
1431    ) -> crate::common::RegisterField<
1432        16,
1433        0x1,
1434        1,
1435        0,
1436        ssifsr::Tde,
1437        ssifsr::Tde,
1438        Ssifsr_SPEC,
1439        crate::common::RW,
1440    > {
1441        crate::common::RegisterField::<
1442            16,
1443            0x1,
1444            1,
1445            0,
1446            ssifsr::Tde,
1447            ssifsr::Tde,
1448            Ssifsr_SPEC,
1449            crate::common::RW,
1450        >::from_register(self, 0)
1451    }
1452
1453    #[doc = "Transmit Data Count"]
1454    #[inline(always)]
1455    pub fn tdc(
1456        self,
1457    ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Ssifsr_SPEC, crate::common::R> {
1458        crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Ssifsr_SPEC,crate::common::R>::from_register(self,0)
1459    }
1460}
1461impl ::core::default::Default for Ssifsr {
1462    #[inline(always)]
1463    fn default() -> Ssifsr {
1464        <crate::RegValueT<Ssifsr_SPEC> as RegisterValue<_>>::new(65536)
1465    }
1466}
1467pub mod ssifsr {
1468
1469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1470    pub struct Rdf_SPEC;
1471    pub type Rdf = crate::EnumBitfieldStruct<u8, Rdf_SPEC>;
1472    impl Rdf {
1473        #[doc = "The size of received data in SSIFRDR is not more than the value of SSISCR.RDFS."]
1474        pub const _0: Self = Self::new(0);
1475
1476        #[doc = "The size of received data in SSIFRDR is not less than the value of SSISCR.RDFS plus one."]
1477        pub const _1: Self = Self::new(1);
1478    }
1479    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1480    pub struct Tde_SPEC;
1481    pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
1482    impl Tde {
1483        #[doc = "The free space of SSIFTDR is not more than the value of SSISCR.TDES."]
1484        pub const _0: Self = Self::new(0);
1485
1486        #[doc = "The free space of SSIFTDR is not less than the value of SSISCR.TDES plus one."]
1487        pub const _1: Self = Self::new(1);
1488    }
1489}
1490#[doc(hidden)]
1491#[derive(Copy, Clone, Eq, PartialEq)]
1492pub struct Ssiftdr_SPEC;
1493impl crate::sealed::RegSpec for Ssiftdr_SPEC {
1494    type DataType = u32;
1495}
1496
1497#[doc = "Transmit FIFO Data Register"]
1498pub type Ssiftdr = crate::RegValueT<Ssiftdr_SPEC>;
1499
1500impl Ssiftdr {
1501    #[doc = "Transmit FIFO Data"]
1502    #[inline(always)]
1503    pub fn ssiftdr(
1504        self,
1505    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Ssiftdr_SPEC, crate::common::W>
1506    {
1507        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Ssiftdr_SPEC,crate::common::W>::from_register(self,0)
1508    }
1509}
1510impl ::core::default::Default for Ssiftdr {
1511    #[inline(always)]
1512    fn default() -> Ssiftdr {
1513        <crate::RegValueT<Ssiftdr_SPEC> as RegisterValue<_>>::new(0)
1514    }
1515}
1516
1517#[doc(hidden)]
1518#[derive(Copy, Clone, Eq, PartialEq)]
1519pub struct Ssifrdr_SPEC;
1520impl crate::sealed::RegSpec for Ssifrdr_SPEC {
1521    type DataType = u32;
1522}
1523
1524#[doc = "Receive FIFO Data Register"]
1525pub type Ssifrdr = crate::RegValueT<Ssifrdr_SPEC>;
1526
1527impl Ssifrdr {
1528    #[doc = "Receive FIFO Data"]
1529    #[inline(always)]
1530    pub fn ssifrdr(
1531        self,
1532    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Ssifrdr_SPEC, crate::common::R>
1533    {
1534        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Ssifrdr_SPEC,crate::common::R>::from_register(self,0)
1535    }
1536}
1537impl ::core::default::Default for Ssifrdr {
1538    #[inline(always)]
1539    fn default() -> Ssifrdr {
1540        <crate::RegValueT<Ssifrdr_SPEC> as RegisterValue<_>>::new(0)
1541    }
1542}
1543
1544#[doc(hidden)]
1545#[derive(Copy, Clone, Eq, PartialEq)]
1546pub struct Ssiofr_SPEC;
1547impl crate::sealed::RegSpec for Ssiofr_SPEC {
1548    type DataType = u32;
1549}
1550
1551#[doc = "Audio Format Register"]
1552pub type Ssiofr = crate::RegValueT<Ssiofr_SPEC>;
1553
1554impl Ssiofr {
1555    #[doc = "Audio Format Select"]
1556    #[inline(always)]
1557    pub fn omod(
1558        self,
1559    ) -> crate::common::RegisterField<
1560        0,
1561        0x3,
1562        1,
1563        0,
1564        ssiofr::Omod,
1565        ssiofr::Omod,
1566        Ssiofr_SPEC,
1567        crate::common::RW,
1568    > {
1569        crate::common::RegisterField::<
1570            0,
1571            0x3,
1572            1,
1573            0,
1574            ssiofr::Omod,
1575            ssiofr::Omod,
1576            Ssiofr_SPEC,
1577            crate::common::RW,
1578        >::from_register(self, 0)
1579    }
1580
1581    #[doc = "Whether to Enable LRCK/FS Continuation"]
1582    #[inline(always)]
1583    pub fn lrcont(
1584        self,
1585    ) -> crate::common::RegisterField<
1586        8,
1587        0x1,
1588        1,
1589        0,
1590        ssiofr::Lrcont,
1591        ssiofr::Lrcont,
1592        Ssiofr_SPEC,
1593        crate::common::RW,
1594    > {
1595        crate::common::RegisterField::<
1596            8,
1597            0x1,
1598            1,
1599            0,
1600            ssiofr::Lrcont,
1601            ssiofr::Lrcont,
1602            Ssiofr_SPEC,
1603            crate::common::RW,
1604        >::from_register(self, 0)
1605    }
1606
1607    #[doc = "Whether to Enable Stopping BCK Output When SSIE is in Idle Status"]
1608    #[inline(always)]
1609    pub fn bckastp(
1610        self,
1611    ) -> crate::common::RegisterField<
1612        9,
1613        0x1,
1614        1,
1615        0,
1616        ssiofr::Bckastp,
1617        ssiofr::Bckastp,
1618        Ssiofr_SPEC,
1619        crate::common::RW,
1620    > {
1621        crate::common::RegisterField::<
1622            9,
1623            0x1,
1624            1,
1625            0,
1626            ssiofr::Bckastp,
1627            ssiofr::Bckastp,
1628            Ssiofr_SPEC,
1629            crate::common::RW,
1630        >::from_register(self, 0)
1631    }
1632}
1633impl ::core::default::Default for Ssiofr {
1634    #[inline(always)]
1635    fn default() -> Ssiofr {
1636        <crate::RegValueT<Ssiofr_SPEC> as RegisterValue<_>>::new(0)
1637    }
1638}
1639pub mod ssiofr {
1640
1641    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1642    pub struct Omod_SPEC;
1643    pub type Omod = crate::EnumBitfieldStruct<u8, Omod_SPEC>;
1644    impl Omod {
1645        #[doc = "I2S format"]
1646        pub const _00: Self = Self::new(0);
1647
1648        #[doc = "TDM format"]
1649        pub const _01: Self = Self::new(1);
1650
1651        #[doc = "Monaural format"]
1652        pub const _10: Self = Self::new(2);
1653
1654        #[doc = "Setting prohibited"]
1655        pub const _11: Self = Self::new(3);
1656    }
1657    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1658    pub struct Lrcont_SPEC;
1659    pub type Lrcont = crate::EnumBitfieldStruct<u8, Lrcont_SPEC>;
1660    impl Lrcont {
1661        #[doc = "Disables LRCK/FS continuation"]
1662        pub const _0: Self = Self::new(0);
1663
1664        #[doc = "Enables LRCK/FS continuation"]
1665        pub const _1: Self = Self::new(1);
1666    }
1667    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1668    pub struct Bckastp_SPEC;
1669    pub type Bckastp = crate::EnumBitfieldStruct<u8, Bckastp_SPEC>;
1670    impl Bckastp {
1671        #[doc = "Always outputs BCK to the SSIBCK0 pin"]
1672        pub const _0: Self = Self::new(0);
1673
1674        #[doc = "Automatically controls output of BCK to the SSIBCK0 pin"]
1675        pub const _1: Self = Self::new(1);
1676    }
1677}
1678#[doc(hidden)]
1679#[derive(Copy, Clone, Eq, PartialEq)]
1680pub struct Ssiscr_SPEC;
1681impl crate::sealed::RegSpec for Ssiscr_SPEC {
1682    type DataType = u32;
1683}
1684
1685#[doc = "Status Control Register"]
1686pub type Ssiscr = crate::RegValueT<Ssiscr_SPEC>;
1687
1688impl Ssiscr {
1689    #[doc = "RDF Setting Condition Select"]
1690    #[inline(always)]
1691    pub fn rdfs(
1692        self,
1693    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Ssiscr_SPEC, crate::common::RW> {
1694        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
1695    }
1696
1697    #[doc = "TDE Setting Condition Select"]
1698    #[inline(always)]
1699    pub fn tdes(
1700        self,
1701    ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, Ssiscr_SPEC, crate::common::RW> {
1702        crate::common::RegisterField::<8,0x1f,1,0,u8,u8,Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
1703    }
1704}
1705impl ::core::default::Default for Ssiscr {
1706    #[inline(always)]
1707    fn default() -> Ssiscr {
1708        <crate::RegValueT<Ssiscr_SPEC> as RegisterValue<_>>::new(0)
1709    }
1710}
ra4m2_pac/ssie0.rs

ra4m2_pac/
ssie0.rs
