ra4m1/iic0/
icwur2.rs

1#[doc = "Register `ICWUR2` reader"]
2pub struct R(crate::R<ICWUR2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ICWUR2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ICWUR2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ICWUR2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ICWUR2` writer"]
17pub struct W(crate::W<ICWUR2_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ICWUR2_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ICWUR2_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ICWUR2_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `WUSEN` reader - Wake-up Function Synchronous Enable"]
38pub type WUSEN_R = crate::BitReader<WUSEN_A>;
39#[doc = "Wake-up Function Synchronous Enable\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum WUSEN_A {
42    #[doc = "0: IIC asynchronous circuit enable"]
43    _0 = 0,
44    #[doc = "1: IIC synchronous circuit enable"]
45    _1 = 1,
46}
47impl From<WUSEN_A> for bool {
48    #[inline(always)]
49    fn from(variant: WUSEN_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl WUSEN_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> WUSEN_A {
57        match self.bits {
58            false => WUSEN_A::_0,
59            true => WUSEN_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == WUSEN_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == WUSEN_A::_1
71    }
72}
73#[doc = "Field `WUSEN` writer - Wake-up Function Synchronous Enable"]
74pub type WUSEN_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICWUR2_SPEC, WUSEN_A, O>;
75impl<'a, const O: u8> WUSEN_W<'a, O> {
76    #[doc = "IIC asynchronous circuit enable"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(WUSEN_A::_0)
80    }
81    #[doc = "IIC synchronous circuit enable"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(WUSEN_A::_1)
85    }
86}
87#[doc = "Field `WUASYF` reader - Wake-up Function Asynchronous Operation Status Flag"]
88pub type WUASYF_R = crate::BitReader<WUASYF_A>;
89#[doc = "Wake-up Function Asynchronous Operation Status Flag\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum WUASYF_A {
92    #[doc = "0: IIC synchronous circuit enable condition"]
93    _0 = 0,
94    #[doc = "1: IIC asynchronous circuit enable condition."]
95    _1 = 1,
96}
97impl From<WUASYF_A> for bool {
98    #[inline(always)]
99    fn from(variant: WUASYF_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl WUASYF_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> WUASYF_A {
107        match self.bits {
108            false => WUASYF_A::_0,
109            true => WUASYF_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == WUASYF_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == WUASYF_A::_1
121    }
122}
123#[doc = "Field `WUSYF` reader - Wake-up Function Synchronous Operation Status Flag"]
124pub type WUSYF_R = crate::BitReader<WUSYF_A>;
125#[doc = "Wake-up Function Synchronous Operation Status Flag\n\nValue on reset: 1"]
126#[derive(Clone, Copy, Debug, PartialEq, Eq)]
127pub enum WUSYF_A {
128    #[doc = "0: IIC asynchronous circuit enable condition"]
129    _0 = 0,
130    #[doc = "1: IIC synchronous circuit enable condition."]
131    _1 = 1,
132}
133impl From<WUSYF_A> for bool {
134    #[inline(always)]
135    fn from(variant: WUSYF_A) -> Self {
136        variant as u8 != 0
137    }
138}
139impl WUSYF_R {
140    #[doc = "Get enumerated values variant"]
141    #[inline(always)]
142    pub fn variant(&self) -> WUSYF_A {
143        match self.bits {
144            false => WUSYF_A::_0,
145            true => WUSYF_A::_1,
146        }
147    }
148    #[doc = "Checks if the value of the field is `_0`"]
149    #[inline(always)]
150    pub fn is_0(&self) -> bool {
151        *self == WUSYF_A::_0
152    }
153    #[doc = "Checks if the value of the field is `_1`"]
154    #[inline(always)]
155    pub fn is_1(&self) -> bool {
156        *self == WUSYF_A::_1
157    }
158}
159impl R {
160    #[doc = "Bit 0 - Wake-up Function Synchronous Enable"]
161    #[inline(always)]
162    pub fn wusen(&self) -> WUSEN_R {
163        WUSEN_R::new((self.bits & 1) != 0)
164    }
165    #[doc = "Bit 1 - Wake-up Function Asynchronous Operation Status Flag"]
166    #[inline(always)]
167    pub fn wuasyf(&self) -> WUASYF_R {
168        WUASYF_R::new(((self.bits >> 1) & 1) != 0)
169    }
170    #[doc = "Bit 2 - Wake-up Function Synchronous Operation Status Flag"]
171    #[inline(always)]
172    pub fn wusyf(&self) -> WUSYF_R {
173        WUSYF_R::new(((self.bits >> 2) & 1) != 0)
174    }
175}
176impl W {
177    #[doc = "Bit 0 - Wake-up Function Synchronous Enable"]
178    #[inline(always)]
179    #[must_use]
180    pub fn wusen(&mut self) -> WUSEN_W<0> {
181        WUSEN_W::new(self)
182    }
183    #[doc = "Writes raw bits to the register."]
184    #[inline(always)]
185    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
186        self.0.bits(bits);
187        self
188    }
189}
190#[doc = "I2C Bus Wake up Unit Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icwur2](index.html) module"]
191pub struct ICWUR2_SPEC;
192impl crate::RegisterSpec for ICWUR2_SPEC {
193    type Ux = u8;
194}
195#[doc = "`read()` method returns [icwur2::R](R) reader structure"]
196impl crate::Readable for ICWUR2_SPEC {
197    type Reader = R;
198}
199#[doc = "`write(|w| ..)` method takes [icwur2::W](W) writer structure"]
200impl crate::Writable for ICWUR2_SPEC {
201    type Writer = W;
202    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
203    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
204}
205#[doc = "`reset()` method sets ICWUR2 to value 0xfd"]
206impl crate::Resettable for ICWUR2_SPEC {
207    const RESET_VALUE: Self::Ux = 0xfd;
208}
ra4m1/iic0/icwur2.rs

ra4m1/iic0/
icwur2.rs
