ra4m1_pac/
pmisc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:49:18 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Miscellaneous Port Control Register"]
28unsafe impl ::core::marker::Send for super::Pmisc {}
29unsafe impl ::core::marker::Sync for super::Pmisc {}
30impl super::Pmisc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Write-Protect Register"]
38    #[inline(always)]
39    pub const fn pwpr(&self) -> &'static crate::common::Reg<self::Pwpr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Pwpr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(3usize),
43            )
44        }
45    }
46}
47#[doc(hidden)]
48#[derive(Copy, Clone, Eq, PartialEq)]
49pub struct Pwpr_SPEC;
50impl crate::sealed::RegSpec for Pwpr_SPEC {
51    type DataType = u8;
52}
53
54#[doc = "Write-Protect Register"]
55pub type Pwpr = crate::RegValueT<Pwpr_SPEC>;
56
57impl Pwpr {
58    #[doc = "PFSWE Bit Write Disable"]
59    #[inline(always)]
60    pub fn b0wi(
61        self,
62    ) -> crate::common::RegisterField<
63        7,
64        0x1,
65        1,
66        0,
67        pwpr::B0Wi,
68        pwpr::B0Wi,
69        Pwpr_SPEC,
70        crate::common::RW,
71    > {
72        crate::common::RegisterField::<
73            7,
74            0x1,
75            1,
76            0,
77            pwpr::B0Wi,
78            pwpr::B0Wi,
79            Pwpr_SPEC,
80            crate::common::RW,
81        >::from_register(self, 0)
82    }
83
84    #[doc = "PFS Register Write Enable"]
85    #[inline(always)]
86    pub fn pfswe(
87        self,
88    ) -> crate::common::RegisterField<
89        6,
90        0x1,
91        1,
92        0,
93        pwpr::Pfswe,
94        pwpr::Pfswe,
95        Pwpr_SPEC,
96        crate::common::RW,
97    > {
98        crate::common::RegisterField::<
99            6,
100            0x1,
101            1,
102            0,
103            pwpr::Pfswe,
104            pwpr::Pfswe,
105            Pwpr_SPEC,
106            crate::common::RW,
107        >::from_register(self, 0)
108    }
109
110    #[doc = "These bits are read as 000000. The write value should be 000000."]
111    #[inline(always)]
112    pub fn reserved(
113        self,
114    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Pwpr_SPEC, crate::common::RW> {
115        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Pwpr_SPEC,crate::common::RW>::from_register(self,0)
116    }
117}
118impl ::core::default::Default for Pwpr {
119    #[inline(always)]
120    fn default() -> Pwpr {
121        <crate::RegValueT<Pwpr_SPEC> as RegisterValue<_>>::new(128)
122    }
123}
124pub mod pwpr {
125
126    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
127    pub struct B0Wi_SPEC;
128    pub type B0Wi = crate::EnumBitfieldStruct<u8, B0Wi_SPEC>;
129    impl B0Wi {
130        #[doc = "Writing to the PFSWE bit is enabled"]
131        pub const _0: Self = Self::new(0);
132
133        #[doc = "Writing to the PFSWE bit is disabled"]
134        pub const _1: Self = Self::new(1);
135    }
136    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
137    pub struct Pfswe_SPEC;
138    pub type Pfswe = crate::EnumBitfieldStruct<u8, Pfswe_SPEC>;
139    impl Pfswe {
140        #[doc = "Writing to the PFS register is disabled"]
141        pub const _0: Self = Self::new(0);
142
143        #[doc = "Writing to the PFS register is enabled"]
144        pub const _1: Self = Self::new(1);
145    }
146}
ra4m1_pac/pmisc.rs

ra4m1_pac/
pmisc.rs
