1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SRAM Control"]
28unsafe impl ::core::marker::Send for super::Sram {}
29unsafe impl ::core::marker::Sync for super::Sram {}
30impl super::Sram {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "SRAM Parity Error Operation After Detection Register"]
38 #[inline(always)]
39 pub const fn parioad(
40 &self,
41 ) -> &'static crate::common::Reg<self::Parioad_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Parioad_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "SRAM Protection Register"]
50 #[inline(always)]
51 pub const fn sramprcr(
52 &self,
53 ) -> &'static crate::common::Reg<self::Sramprcr_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Sramprcr_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(4usize),
57 )
58 }
59 }
60
61 #[doc = "SRAM Wait State Control Register"]
62 #[inline(always)]
63 pub const fn sramwtsc(
64 &self,
65 ) -> &'static crate::common::Reg<self::Sramwtsc_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::Sramwtsc_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(8usize),
69 )
70 }
71 }
72
73 #[doc = "SRAM Protection Register 2"]
74 #[inline(always)]
75 pub const fn sramprcr2(
76 &self,
77 ) -> &'static crate::common::Reg<self::Sramprcr2_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::Sramprcr2_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(12usize),
81 )
82 }
83 }
84
85 #[doc = "ECC Operating Mode Control Register"]
86 #[inline(always)]
87 pub const fn eccmode(
88 &self,
89 ) -> &'static crate::common::Reg<self::Eccmode_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Eccmode_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(192usize),
93 )
94 }
95 }
96
97 #[doc = "ECC 2-Bit Error Status Register"]
98 #[inline(always)]
99 pub const fn ecc2sts(
100 &self,
101 ) -> &'static crate::common::Reg<self::Ecc2Sts_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::Ecc2Sts_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(193usize),
105 )
106 }
107 }
108
109 #[doc = "ECC 1-Bit Error Information Update Enable Register"]
110 #[inline(always)]
111 pub const fn ecc1stsen(
112 &self,
113 ) -> &'static crate::common::Reg<self::Ecc1Stsen_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Ecc1Stsen_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(194usize),
117 )
118 }
119 }
120
121 #[doc = "ECC 1-Bit Error Status Register"]
122 #[inline(always)]
123 pub const fn ecc1sts(
124 &self,
125 ) -> &'static crate::common::Reg<self::Ecc1Sts_SPEC, crate::common::RW> {
126 unsafe {
127 crate::common::Reg::<self::Ecc1Sts_SPEC, crate::common::RW>::from_ptr(
128 self._svd2pac_as_ptr().add(195usize),
129 )
130 }
131 }
132
133 #[doc = "ECC Protection Register"]
134 #[inline(always)]
135 pub const fn eccprcr(
136 &self,
137 ) -> &'static crate::common::Reg<self::Eccprcr_SPEC, crate::common::RW> {
138 unsafe {
139 crate::common::Reg::<self::Eccprcr_SPEC, crate::common::RW>::from_ptr(
140 self._svd2pac_as_ptr().add(196usize),
141 )
142 }
143 }
144
145 #[doc = "ECC Protection Register 2"]
146 #[inline(always)]
147 pub const fn eccprcr2(
148 &self,
149 ) -> &'static crate::common::Reg<self::Eccprcr2_SPEC, crate::common::RW> {
150 unsafe {
151 crate::common::Reg::<self::Eccprcr2_SPEC, crate::common::RW>::from_ptr(
152 self._svd2pac_as_ptr().add(208usize),
153 )
154 }
155 }
156
157 #[doc = "ECC Test Control Register"]
158 #[inline(always)]
159 pub const fn eccetst(
160 &self,
161 ) -> &'static crate::common::Reg<self::Eccetst_SPEC, crate::common::RW> {
162 unsafe {
163 crate::common::Reg::<self::Eccetst_SPEC, crate::common::RW>::from_ptr(
164 self._svd2pac_as_ptr().add(212usize),
165 )
166 }
167 }
168
169 #[doc = "SRAM ECC Error Operation After Detection Register"]
170 #[inline(always)]
171 pub const fn eccoad(
172 &self,
173 ) -> &'static crate::common::Reg<self::Eccoad_SPEC, crate::common::RW> {
174 unsafe {
175 crate::common::Reg::<self::Eccoad_SPEC, crate::common::RW>::from_ptr(
176 self._svd2pac_as_ptr().add(216usize),
177 )
178 }
179 }
180}
181#[doc(hidden)]
182#[derive(Copy, Clone, Eq, PartialEq)]
183pub struct Parioad_SPEC;
184impl crate::sealed::RegSpec for Parioad_SPEC {
185 type DataType = u8;
186}
187
188#[doc = "SRAM Parity Error Operation After Detection Register"]
189pub type Parioad = crate::RegValueT<Parioad_SPEC>;
190
191impl Parioad {
192 #[doc = "Operation After Detection"]
193 #[inline(always)]
194 pub fn oad(
195 self,
196 ) -> crate::common::RegisterField<
197 0,
198 0x1,
199 1,
200 0,
201 parioad::Oad,
202 parioad::Oad,
203 Parioad_SPEC,
204 crate::common::RW,
205 > {
206 crate::common::RegisterField::<
207 0,
208 0x1,
209 1,
210 0,
211 parioad::Oad,
212 parioad::Oad,
213 Parioad_SPEC,
214 crate::common::RW,
215 >::from_register(self, 0)
216 }
217}
218impl ::core::default::Default for Parioad {
219 #[inline(always)]
220 fn default() -> Parioad {
221 <crate::RegValueT<Parioad_SPEC> as RegisterValue<_>>::new(0)
222 }
223}
224pub mod parioad {
225
226 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
227 pub struct Oad_SPEC;
228 pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
229 impl Oad {
230 #[doc = "Non-maskable interrupt"]
231 pub const _0: Self = Self::new(0);
232
233 #[doc = "Reset"]
234 pub const _1: Self = Self::new(1);
235 }
236}
237#[doc(hidden)]
238#[derive(Copy, Clone, Eq, PartialEq)]
239pub struct Sramprcr_SPEC;
240impl crate::sealed::RegSpec for Sramprcr_SPEC {
241 type DataType = u8;
242}
243
244#[doc = "SRAM Protection Register"]
245pub type Sramprcr = crate::RegValueT<Sramprcr_SPEC>;
246
247impl Sramprcr {
248 #[doc = "Register Write Control"]
249 #[inline(always)]
250 pub fn sramprcr(
251 self,
252 ) -> crate::common::RegisterField<
253 0,
254 0x1,
255 1,
256 0,
257 sramprcr::Sramprcr,
258 sramprcr::Sramprcr,
259 Sramprcr_SPEC,
260 crate::common::RW,
261 > {
262 crate::common::RegisterField::<
263 0,
264 0x1,
265 1,
266 0,
267 sramprcr::Sramprcr,
268 sramprcr::Sramprcr,
269 Sramprcr_SPEC,
270 crate::common::RW,
271 >::from_register(self, 0)
272 }
273
274 #[doc = "Write Key Code"]
275 #[inline(always)]
276 pub fn kw(
277 self,
278 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Sramprcr_SPEC, crate::common::W> {
279 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Sramprcr_SPEC,crate::common::W>::from_register(self,0)
280 }
281}
282impl ::core::default::Default for Sramprcr {
283 #[inline(always)]
284 fn default() -> Sramprcr {
285 <crate::RegValueT<Sramprcr_SPEC> as RegisterValue<_>>::new(0)
286 }
287}
288pub mod sramprcr {
289
290 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
291 pub struct Sramprcr_SPEC;
292 pub type Sramprcr = crate::EnumBitfieldStruct<u8, Sramprcr_SPEC>;
293 impl Sramprcr {
294 #[doc = "Disable writes to protected registers"]
295 pub const _0: Self = Self::new(0);
296
297 #[doc = "Enable writes to protected registers"]
298 pub const _1: Self = Self::new(1);
299 }
300}
301#[doc(hidden)]
302#[derive(Copy, Clone, Eq, PartialEq)]
303pub struct Sramwtsc_SPEC;
304impl crate::sealed::RegSpec for Sramwtsc_SPEC {
305 type DataType = u8;
306}
307
308#[doc = "SRAM Wait State Control Register"]
309pub type Sramwtsc = crate::RegValueT<Sramwtsc_SPEC>;
310
311impl Sramwtsc {
312 #[doc = "SRAM0 wait enable"]
313 #[inline(always)]
314 pub fn sram0wten(
315 self,
316 ) -> crate::common::RegisterField<
317 0,
318 0x1,
319 1,
320 0,
321 sramwtsc::Sram0Wten,
322 sramwtsc::Sram0Wten,
323 Sramwtsc_SPEC,
324 crate::common::RW,
325 > {
326 crate::common::RegisterField::<
327 0,
328 0x1,
329 1,
330 0,
331 sramwtsc::Sram0Wten,
332 sramwtsc::Sram0Wten,
333 Sramwtsc_SPEC,
334 crate::common::RW,
335 >::from_register(self, 0)
336 }
337}
338impl ::core::default::Default for Sramwtsc {
339 #[inline(always)]
340 fn default() -> Sramwtsc {
341 <crate::RegValueT<Sramwtsc_SPEC> as RegisterValue<_>>::new(1)
342 }
343}
344pub mod sramwtsc {
345
346 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
347 pub struct Sram0Wten_SPEC;
348 pub type Sram0Wten = crate::EnumBitfieldStruct<u8, Sram0Wten_SPEC>;
349 impl Sram0Wten {
350 #[doc = "No wait"]
351 pub const _0: Self = Self::new(0);
352
353 #[doc = "Add wait state in read access cycle to SRAM0"]
354 pub const _1: Self = Self::new(1);
355 }
356}
357#[doc(hidden)]
358#[derive(Copy, Clone, Eq, PartialEq)]
359pub struct Sramprcr2_SPEC;
360impl crate::sealed::RegSpec for Sramprcr2_SPEC {
361 type DataType = u8;
362}
363
364#[doc = "SRAM Protection Register 2"]
365pub type Sramprcr2 = crate::RegValueT<Sramprcr2_SPEC>;
366
367impl Sramprcr2 {
368 #[doc = "Register Write Control"]
369 #[inline(always)]
370 pub fn sramprcr2(
371 self,
372 ) -> crate::common::RegisterField<
373 0,
374 0x1,
375 1,
376 0,
377 sramprcr2::Sramprcr2,
378 sramprcr2::Sramprcr2,
379 Sramprcr2_SPEC,
380 crate::common::RW,
381 > {
382 crate::common::RegisterField::<
383 0,
384 0x1,
385 1,
386 0,
387 sramprcr2::Sramprcr2,
388 sramprcr2::Sramprcr2,
389 Sramprcr2_SPEC,
390 crate::common::RW,
391 >::from_register(self, 0)
392 }
393
394 #[doc = "Write Key Code"]
395 #[inline(always)]
396 pub fn kw(
397 self,
398 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Sramprcr2_SPEC, crate::common::W> {
399 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Sramprcr2_SPEC,crate::common::W>::from_register(self,0)
400 }
401}
402impl ::core::default::Default for Sramprcr2 {
403 #[inline(always)]
404 fn default() -> Sramprcr2 {
405 <crate::RegValueT<Sramprcr2_SPEC> as RegisterValue<_>>::new(0)
406 }
407}
408pub mod sramprcr2 {
409
410 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
411 pub struct Sramprcr2_SPEC;
412 pub type Sramprcr2 = crate::EnumBitfieldStruct<u8, Sramprcr2_SPEC>;
413 impl Sramprcr2 {
414 #[doc = "Disable writes to the protectedregisters"]
415 pub const _0: Self = Self::new(0);
416
417 #[doc = "Enable writes to the protected registers"]
418 pub const _1: Self = Self::new(1);
419 }
420}
421#[doc(hidden)]
422#[derive(Copy, Clone, Eq, PartialEq)]
423pub struct Eccmode_SPEC;
424impl crate::sealed::RegSpec for Eccmode_SPEC {
425 type DataType = u8;
426}
427
428#[doc = "ECC Operating Mode Control Register"]
429pub type Eccmode = crate::RegValueT<Eccmode_SPEC>;
430
431impl Eccmode {
432 #[doc = "ECC Operating Mode Select"]
433 #[inline(always)]
434 pub fn eccmod(
435 self,
436 ) -> crate::common::RegisterField<
437 0,
438 0x3,
439 1,
440 0,
441 eccmode::Eccmod,
442 eccmode::Eccmod,
443 Eccmode_SPEC,
444 crate::common::RW,
445 > {
446 crate::common::RegisterField::<
447 0,
448 0x3,
449 1,
450 0,
451 eccmode::Eccmod,
452 eccmode::Eccmod,
453 Eccmode_SPEC,
454 crate::common::RW,
455 >::from_register(self, 0)
456 }
457}
458impl ::core::default::Default for Eccmode {
459 #[inline(always)]
460 fn default() -> Eccmode {
461 <crate::RegValueT<Eccmode_SPEC> as RegisterValue<_>>::new(0)
462 }
463}
464pub mod eccmode {
465
466 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
467 pub struct Eccmod_SPEC;
468 pub type Eccmod = crate::EnumBitfieldStruct<u8, Eccmod_SPEC>;
469 impl Eccmod {
470 #[doc = "Disable ECC function"]
471 pub const _00: Self = Self::new(0);
472
473 #[doc = "Setting prohibited"]
474 pub const _01: Self = Self::new(1);
475
476 #[doc = "Enable ECC function without error checking"]
477 pub const _10: Self = Self::new(2);
478
479 #[doc = "Enable ECC function with error checking"]
480 pub const _11: Self = Self::new(3);
481 }
482}
483#[doc(hidden)]
484#[derive(Copy, Clone, Eq, PartialEq)]
485pub struct Ecc2Sts_SPEC;
486impl crate::sealed::RegSpec for Ecc2Sts_SPEC {
487 type DataType = u8;
488}
489
490#[doc = "ECC 2-Bit Error Status Register"]
491pub type Ecc2Sts = crate::RegValueT<Ecc2Sts_SPEC>;
492
493impl Ecc2Sts {
494 #[doc = "ECC 2-Bit Error Status"]
495 #[inline(always)]
496 pub fn ecc2err(
497 self,
498 ) -> crate::common::RegisterField<
499 0,
500 0x1,
501 1,
502 0,
503 ecc2sts::Ecc2Err,
504 ecc2sts::Ecc2Err,
505 Ecc2Sts_SPEC,
506 crate::common::RW,
507 > {
508 crate::common::RegisterField::<
509 0,
510 0x1,
511 1,
512 0,
513 ecc2sts::Ecc2Err,
514 ecc2sts::Ecc2Err,
515 Ecc2Sts_SPEC,
516 crate::common::RW,
517 >::from_register(self, 0)
518 }
519}
520impl ::core::default::Default for Ecc2Sts {
521 #[inline(always)]
522 fn default() -> Ecc2Sts {
523 <crate::RegValueT<Ecc2Sts_SPEC> as RegisterValue<_>>::new(0)
524 }
525}
526pub mod ecc2sts {
527
528 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
529 pub struct Ecc2Err_SPEC;
530 pub type Ecc2Err = crate::EnumBitfieldStruct<u8, Ecc2Err_SPEC>;
531 impl Ecc2Err {
532 #[doc = "No 2-bit ECC error occurred"]
533 pub const _0: Self = Self::new(0);
534
535 #[doc = "2-bit ECC error occurred"]
536 pub const _1: Self = Self::new(1);
537 }
538}
539#[doc(hidden)]
540#[derive(Copy, Clone, Eq, PartialEq)]
541pub struct Ecc1Stsen_SPEC;
542impl crate::sealed::RegSpec for Ecc1Stsen_SPEC {
543 type DataType = u8;
544}
545
546#[doc = "ECC 1-Bit Error Information Update Enable Register"]
547pub type Ecc1Stsen = crate::RegValueT<Ecc1Stsen_SPEC>;
548
549impl Ecc1Stsen {
550 #[doc = "ECC 1-Bit Error Information Update Enable"]
551 #[inline(always)]
552 pub fn e1stsen(
553 self,
554 ) -> crate::common::RegisterField<
555 0,
556 0x1,
557 1,
558 0,
559 ecc1stsen::E1Stsen,
560 ecc1stsen::E1Stsen,
561 Ecc1Stsen_SPEC,
562 crate::common::RW,
563 > {
564 crate::common::RegisterField::<
565 0,
566 0x1,
567 1,
568 0,
569 ecc1stsen::E1Stsen,
570 ecc1stsen::E1Stsen,
571 Ecc1Stsen_SPEC,
572 crate::common::RW,
573 >::from_register(self, 0)
574 }
575}
576impl ::core::default::Default for Ecc1Stsen {
577 #[inline(always)]
578 fn default() -> Ecc1Stsen {
579 <crate::RegValueT<Ecc1Stsen_SPEC> as RegisterValue<_>>::new(0)
580 }
581}
582pub mod ecc1stsen {
583
584 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
585 pub struct E1Stsen_SPEC;
586 pub type E1Stsen = crate::EnumBitfieldStruct<u8, E1Stsen_SPEC>;
587 impl E1Stsen {
588 #[doc = "Disable updating of 1-bit ECC error information"]
589 pub const _0: Self = Self::new(0);
590
591 #[doc = "Enable updating of 1-bit ECC error information"]
592 pub const _1: Self = Self::new(1);
593 }
594}
595#[doc(hidden)]
596#[derive(Copy, Clone, Eq, PartialEq)]
597pub struct Ecc1Sts_SPEC;
598impl crate::sealed::RegSpec for Ecc1Sts_SPEC {
599 type DataType = u8;
600}
601
602#[doc = "ECC 1-Bit Error Status Register"]
603pub type Ecc1Sts = crate::RegValueT<Ecc1Sts_SPEC>;
604
605impl Ecc1Sts {
606 #[doc = "ECC 1-Bit Error Status"]
607 #[inline(always)]
608 pub fn ecc1err(
609 self,
610 ) -> crate::common::RegisterField<
611 0,
612 0x1,
613 1,
614 0,
615 ecc1sts::Ecc1Err,
616 ecc1sts::Ecc1Err,
617 Ecc1Sts_SPEC,
618 crate::common::RW,
619 > {
620 crate::common::RegisterField::<
621 0,
622 0x1,
623 1,
624 0,
625 ecc1sts::Ecc1Err,
626 ecc1sts::Ecc1Err,
627 Ecc1Sts_SPEC,
628 crate::common::RW,
629 >::from_register(self, 0)
630 }
631}
632impl ::core::default::Default for Ecc1Sts {
633 #[inline(always)]
634 fn default() -> Ecc1Sts {
635 <crate::RegValueT<Ecc1Sts_SPEC> as RegisterValue<_>>::new(0)
636 }
637}
638pub mod ecc1sts {
639
640 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
641 pub struct Ecc1Err_SPEC;
642 pub type Ecc1Err = crate::EnumBitfieldStruct<u8, Ecc1Err_SPEC>;
643 impl Ecc1Err {
644 #[doc = "No 1-bit ECC error occurred"]
645 pub const _0: Self = Self::new(0);
646
647 #[doc = "1-bit ECC error occurred"]
648 pub const _1: Self = Self::new(1);
649 }
650}
651#[doc(hidden)]
652#[derive(Copy, Clone, Eq, PartialEq)]
653pub struct Eccprcr_SPEC;
654impl crate::sealed::RegSpec for Eccprcr_SPEC {
655 type DataType = u8;
656}
657
658#[doc = "ECC Protection Register"]
659pub type Eccprcr = crate::RegValueT<Eccprcr_SPEC>;
660
661impl Eccprcr {
662 #[doc = "Register Write Control"]
663 #[inline(always)]
664 pub fn eccprcr(
665 self,
666 ) -> crate::common::RegisterField<
667 0,
668 0x1,
669 1,
670 0,
671 eccprcr::Eccprcr,
672 eccprcr::Eccprcr,
673 Eccprcr_SPEC,
674 crate::common::RW,
675 > {
676 crate::common::RegisterField::<
677 0,
678 0x1,
679 1,
680 0,
681 eccprcr::Eccprcr,
682 eccprcr::Eccprcr,
683 Eccprcr_SPEC,
684 crate::common::RW,
685 >::from_register(self, 0)
686 }
687
688 #[doc = "Write Key Code"]
689 #[inline(always)]
690 pub fn kw(
691 self,
692 ) -> crate::common::RegisterField<
693 1,
694 0x7f,
695 1,
696 0,
697 eccprcr::Kw,
698 eccprcr::Kw,
699 Eccprcr_SPEC,
700 crate::common::W,
701 > {
702 crate::common::RegisterField::<
703 1,
704 0x7f,
705 1,
706 0,
707 eccprcr::Kw,
708 eccprcr::Kw,
709 Eccprcr_SPEC,
710 crate::common::W,
711 >::from_register(self, 0)
712 }
713}
714impl ::core::default::Default for Eccprcr {
715 #[inline(always)]
716 fn default() -> Eccprcr {
717 <crate::RegValueT<Eccprcr_SPEC> as RegisterValue<_>>::new(0)
718 }
719}
720pub mod eccprcr {
721
722 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
723 pub struct Eccprcr_SPEC;
724 pub type Eccprcr = crate::EnumBitfieldStruct<u8, Eccprcr_SPEC>;
725 impl Eccprcr {
726 #[doc = "Disable writes to the protected registers"]
727 pub const _0: Self = Self::new(0);
728
729 #[doc = "Enable writes to the protected registers"]
730 pub const _1: Self = Self::new(1);
731 }
732 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
733 pub struct Kw_SPEC;
734 pub type Kw = crate::EnumBitfieldStruct<u8, Kw_SPEC>;
735 impl Kw {
736 #[doc = "Enable write to the ECCPRCR bit"]
737 pub const _0_X_78: Self = Self::new(120);
738
739 #[doc = "Disable write to the ECCPRCR bit"]
740 pub const OTHERS: Self = Self::new(0);
741 }
742}
743#[doc(hidden)]
744#[derive(Copy, Clone, Eq, PartialEq)]
745pub struct Eccprcr2_SPEC;
746impl crate::sealed::RegSpec for Eccprcr2_SPEC {
747 type DataType = u8;
748}
749
750#[doc = "ECC Protection Register 2"]
751pub type Eccprcr2 = crate::RegValueT<Eccprcr2_SPEC>;
752
753impl Eccprcr2 {
754 #[doc = "Register Write Control"]
755 #[inline(always)]
756 pub fn eccprcr2(
757 self,
758 ) -> crate::common::RegisterField<
759 0,
760 0x1,
761 1,
762 0,
763 eccprcr2::Eccprcr2,
764 eccprcr2::Eccprcr2,
765 Eccprcr2_SPEC,
766 crate::common::RW,
767 > {
768 crate::common::RegisterField::<
769 0,
770 0x1,
771 1,
772 0,
773 eccprcr2::Eccprcr2,
774 eccprcr2::Eccprcr2,
775 Eccprcr2_SPEC,
776 crate::common::RW,
777 >::from_register(self, 0)
778 }
779
780 #[doc = "Write Key Code"]
781 #[inline(always)]
782 pub fn kw2(
783 self,
784 ) -> crate::common::RegisterField<
785 1,
786 0x7f,
787 1,
788 0,
789 eccprcr2::Kw2,
790 eccprcr2::Kw2,
791 Eccprcr2_SPEC,
792 crate::common::W,
793 > {
794 crate::common::RegisterField::<
795 1,
796 0x7f,
797 1,
798 0,
799 eccprcr2::Kw2,
800 eccprcr2::Kw2,
801 Eccprcr2_SPEC,
802 crate::common::W,
803 >::from_register(self, 0)
804 }
805}
806impl ::core::default::Default for Eccprcr2 {
807 #[inline(always)]
808 fn default() -> Eccprcr2 {
809 <crate::RegValueT<Eccprcr2_SPEC> as RegisterValue<_>>::new(0)
810 }
811}
812pub mod eccprcr2 {
813
814 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
815 pub struct Eccprcr2_SPEC;
816 pub type Eccprcr2 = crate::EnumBitfieldStruct<u8, Eccprcr2_SPEC>;
817 impl Eccprcr2 {
818 #[doc = "Disable writes to the protected registers"]
819 pub const _0: Self = Self::new(0);
820
821 #[doc = "Enable writes to the protected registers"]
822 pub const _1: Self = Self::new(1);
823 }
824 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
825 pub struct Kw2_SPEC;
826 pub type Kw2 = crate::EnumBitfieldStruct<u8, Kw2_SPEC>;
827 impl Kw2 {
828 #[doc = "Enable write to the ECCPRCR2 bit"]
829 pub const _0_X_78: Self = Self::new(120);
830
831 #[doc = "Disable write to the ECCPRCR2 bit"]
832 pub const OTHERS: Self = Self::new(0);
833 }
834}
835#[doc(hidden)]
836#[derive(Copy, Clone, Eq, PartialEq)]
837pub struct Eccetst_SPEC;
838impl crate::sealed::RegSpec for Eccetst_SPEC {
839 type DataType = u8;
840}
841
842#[doc = "ECC Test Control Register"]
843pub type Eccetst = crate::RegValueT<Eccetst_SPEC>;
844
845impl Eccetst {
846 #[doc = "ECC Bypass Select"]
847 #[inline(always)]
848 pub fn tstbyp(
849 self,
850 ) -> crate::common::RegisterField<
851 0,
852 0x1,
853 1,
854 0,
855 eccetst::Tstbyp,
856 eccetst::Tstbyp,
857 Eccetst_SPEC,
858 crate::common::RW,
859 > {
860 crate::common::RegisterField::<
861 0,
862 0x1,
863 1,
864 0,
865 eccetst::Tstbyp,
866 eccetst::Tstbyp,
867 Eccetst_SPEC,
868 crate::common::RW,
869 >::from_register(self, 0)
870 }
871}
872impl ::core::default::Default for Eccetst {
873 #[inline(always)]
874 fn default() -> Eccetst {
875 <crate::RegValueT<Eccetst_SPEC> as RegisterValue<_>>::new(0)
876 }
877}
878pub mod eccetst {
879
880 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
881 pub struct Tstbyp_SPEC;
882 pub type Tstbyp = crate::EnumBitfieldStruct<u8, Tstbyp_SPEC>;
883 impl Tstbyp {
884 #[doc = "Disable ECC bypass"]
885 pub const _0: Self = Self::new(0);
886
887 #[doc = "Enable ECC bypass"]
888 pub const _1: Self = Self::new(1);
889 }
890}
891#[doc(hidden)]
892#[derive(Copy, Clone, Eq, PartialEq)]
893pub struct Eccoad_SPEC;
894impl crate::sealed::RegSpec for Eccoad_SPEC {
895 type DataType = u8;
896}
897
898#[doc = "SRAM ECC Error Operation After Detection Register"]
899pub type Eccoad = crate::RegValueT<Eccoad_SPEC>;
900
901impl Eccoad {
902 #[doc = "Operation After Detection"]
903 #[inline(always)]
904 pub fn oad(
905 self,
906 ) -> crate::common::RegisterField<
907 0,
908 0x1,
909 1,
910 0,
911 eccoad::Oad,
912 eccoad::Oad,
913 Eccoad_SPEC,
914 crate::common::RW,
915 > {
916 crate::common::RegisterField::<
917 0,
918 0x1,
919 1,
920 0,
921 eccoad::Oad,
922 eccoad::Oad,
923 Eccoad_SPEC,
924 crate::common::RW,
925 >::from_register(self, 0)
926 }
927}
928impl ::core::default::Default for Eccoad {
929 #[inline(always)]
930 fn default() -> Eccoad {
931 <crate::RegValueT<Eccoad_SPEC> as RegisterValue<_>>::new(0)
932 }
933}
934pub mod eccoad {
935
936 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
937 pub struct Oad_SPEC;
938 pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
939 impl Oad {
940 #[doc = "Non-maskable interrupt"]
941 pub const _0: Self = Self::new(0);
942
943 #[doc = "Reset"]
944 pub const _1: Self = Self::new(1);
945 }
946}