1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Renesas Memory Protection Unit"]
28unsafe impl ::core::marker::Send for super::Rmpu {}
29unsafe impl ::core::marker::Sync for super::Rmpu {}
30impl super::Rmpu {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "MMPU Operation After Detection Register"]
38 #[inline(always)]
39 pub const fn mmpuoad(
40 &self,
41 ) -> &'static crate::common::Reg<self::Mmpuoad_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Mmpuoad_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "MMPU Operation After Detection Protect Register"]
50 #[inline(always)]
51 pub const fn mmpuoadpt(
52 &self,
53 ) -> &'static crate::common::Reg<self::Mmpuoadpt_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Mmpuoadpt_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(4usize),
57 )
58 }
59 }
60
61 #[doc = "MMPU Enable Register for DMAC"]
62 #[inline(always)]
63 pub const fn mmpuendmac(
64 &self,
65 ) -> &'static crate::common::Reg<self::Mmpuendmac_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::Mmpuendmac_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(256usize),
69 )
70 }
71 }
72
73 #[doc = "MMPU Enable Protect Register for DMAC"]
74 #[inline(always)]
75 pub const fn mmpuenptdmac(
76 &self,
77 ) -> &'static crate::common::Reg<self::Mmpuenptdmac_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::Mmpuenptdmac_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(260usize),
81 )
82 }
83 }
84
85 #[doc = "MMPU Regions Protect Register for DMAC"]
86 #[inline(always)]
87 pub const fn mmpurptdmac(
88 &self,
89 ) -> &'static crate::common::Reg<self::Mmpurptdmac_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Mmpurptdmac_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(264usize),
93 )
94 }
95 }
96
97 #[doc = "MMPU Regions Protect register for DMAC Secure"]
98 #[inline(always)]
99 pub const fn mmpurptdmac_sec(
100 &self,
101 ) -> &'static crate::common::Reg<self::MmpurptdmacSec_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::MmpurptdmacSec_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(268usize),
105 )
106 }
107 }
108
109 #[doc = "MMPU Access Control Register for DMAC"]
110 #[inline(always)]
111 pub const fn mmpuacdmac(
112 &self,
113 ) -> &'static crate::common::ClusterRegisterArray<
114 crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW>,
115 8,
116 0x10,
117 > {
118 unsafe {
119 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x200usize))
120 }
121 }
122 #[inline(always)]
123 pub const fn mmpuacdmac0(
124 &self,
125 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
126 unsafe {
127 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
128 self._svd2pac_as_ptr().add(0x200usize),
129 )
130 }
131 }
132 #[inline(always)]
133 pub const fn mmpuacdmac1(
134 &self,
135 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
136 unsafe {
137 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
138 self._svd2pac_as_ptr().add(0x210usize),
139 )
140 }
141 }
142 #[inline(always)]
143 pub const fn mmpuacdmac2(
144 &self,
145 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(0x220usize),
149 )
150 }
151 }
152 #[inline(always)]
153 pub const fn mmpuacdmac3(
154 &self,
155 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
156 unsafe {
157 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
158 self._svd2pac_as_ptr().add(0x230usize),
159 )
160 }
161 }
162 #[inline(always)]
163 pub const fn mmpuacdmac4(
164 &self,
165 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(0x240usize),
169 )
170 }
171 }
172 #[inline(always)]
173 pub const fn mmpuacdmac5(
174 &self,
175 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
176 unsafe {
177 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
178 self._svd2pac_as_ptr().add(0x250usize),
179 )
180 }
181 }
182 #[inline(always)]
183 pub const fn mmpuacdmac6(
184 &self,
185 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
186 unsafe {
187 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
188 self._svd2pac_as_ptr().add(0x260usize),
189 )
190 }
191 }
192 #[inline(always)]
193 pub const fn mmpuacdmac7(
194 &self,
195 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
196 unsafe {
197 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
198 self._svd2pac_as_ptr().add(0x270usize),
199 )
200 }
201 }
202
203 #[doc = "MMPU Start Address Register for DMAC"]
204 #[inline(always)]
205 pub const fn mmpusdmac(
206 &self,
207 ) -> &'static crate::common::ClusterRegisterArray<
208 crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW>,
209 8,
210 0x10,
211 > {
212 unsafe {
213 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x204usize))
214 }
215 }
216 #[inline(always)]
217 pub const fn mmpusdmac0(
218 &self,
219 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
220 unsafe {
221 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
222 self._svd2pac_as_ptr().add(0x204usize),
223 )
224 }
225 }
226 #[inline(always)]
227 pub const fn mmpusdmac1(
228 &self,
229 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
230 unsafe {
231 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
232 self._svd2pac_as_ptr().add(0x214usize),
233 )
234 }
235 }
236 #[inline(always)]
237 pub const fn mmpusdmac2(
238 &self,
239 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
240 unsafe {
241 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
242 self._svd2pac_as_ptr().add(0x224usize),
243 )
244 }
245 }
246 #[inline(always)]
247 pub const fn mmpusdmac3(
248 &self,
249 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
250 unsafe {
251 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
252 self._svd2pac_as_ptr().add(0x234usize),
253 )
254 }
255 }
256 #[inline(always)]
257 pub const fn mmpusdmac4(
258 &self,
259 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
260 unsafe {
261 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
262 self._svd2pac_as_ptr().add(0x244usize),
263 )
264 }
265 }
266 #[inline(always)]
267 pub const fn mmpusdmac5(
268 &self,
269 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
270 unsafe {
271 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
272 self._svd2pac_as_ptr().add(0x254usize),
273 )
274 }
275 }
276 #[inline(always)]
277 pub const fn mmpusdmac6(
278 &self,
279 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
280 unsafe {
281 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
282 self._svd2pac_as_ptr().add(0x264usize),
283 )
284 }
285 }
286 #[inline(always)]
287 pub const fn mmpusdmac7(
288 &self,
289 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
290 unsafe {
291 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
292 self._svd2pac_as_ptr().add(0x274usize),
293 )
294 }
295 }
296
297 #[doc = "MMPU End Address Register for DMAC"]
298 #[inline(always)]
299 pub const fn mmpuedmac(
300 &self,
301 ) -> &'static crate::common::ClusterRegisterArray<
302 crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW>,
303 8,
304 0x10,
305 > {
306 unsafe {
307 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x208usize))
308 }
309 }
310 #[inline(always)]
311 pub const fn mmpuedmac0(
312 &self,
313 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
314 unsafe {
315 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
316 self._svd2pac_as_ptr().add(0x208usize),
317 )
318 }
319 }
320 #[inline(always)]
321 pub const fn mmpuedmac1(
322 &self,
323 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
324 unsafe {
325 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
326 self._svd2pac_as_ptr().add(0x218usize),
327 )
328 }
329 }
330 #[inline(always)]
331 pub const fn mmpuedmac2(
332 &self,
333 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
334 unsafe {
335 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
336 self._svd2pac_as_ptr().add(0x228usize),
337 )
338 }
339 }
340 #[inline(always)]
341 pub const fn mmpuedmac3(
342 &self,
343 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
344 unsafe {
345 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
346 self._svd2pac_as_ptr().add(0x238usize),
347 )
348 }
349 }
350 #[inline(always)]
351 pub const fn mmpuedmac4(
352 &self,
353 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
354 unsafe {
355 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
356 self._svd2pac_as_ptr().add(0x248usize),
357 )
358 }
359 }
360 #[inline(always)]
361 pub const fn mmpuedmac5(
362 &self,
363 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
364 unsafe {
365 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
366 self._svd2pac_as_ptr().add(0x258usize),
367 )
368 }
369 }
370 #[inline(always)]
371 pub const fn mmpuedmac6(
372 &self,
373 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
374 unsafe {
375 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
376 self._svd2pac_as_ptr().add(0x268usize),
377 )
378 }
379 }
380 #[inline(always)]
381 pub const fn mmpuedmac7(
382 &self,
383 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
384 unsafe {
385 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
386 self._svd2pac_as_ptr().add(0x278usize),
387 )
388 }
389 }
390}
391#[doc(hidden)]
392#[derive(Copy, Clone, Eq, PartialEq)]
393pub struct Mmpuoad_SPEC;
394impl crate::sealed::RegSpec for Mmpuoad_SPEC {
395 type DataType = u16;
396}
397
398#[doc = "MMPU Operation After Detection Register"]
399pub type Mmpuoad = crate::RegValueT<Mmpuoad_SPEC>;
400
401impl Mmpuoad {
402 #[doc = "Operation after detection"]
403 #[inline(always)]
404 pub fn oad(
405 self,
406 ) -> crate::common::RegisterField<
407 0,
408 0x1,
409 1,
410 0,
411 mmpuoad::Oad,
412 mmpuoad::Oad,
413 Mmpuoad_SPEC,
414 crate::common::RW,
415 > {
416 crate::common::RegisterField::<
417 0,
418 0x1,
419 1,
420 0,
421 mmpuoad::Oad,
422 mmpuoad::Oad,
423 Mmpuoad_SPEC,
424 crate::common::RW,
425 >::from_register(self, 0)
426 }
427
428 #[doc = "This bit enables or disables writes to the OAD bit."]
429 #[inline(always)]
430 pub fn key(
431 self,
432 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuoad_SPEC, crate::common::W> {
433 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuoad_SPEC,crate::common::W>::from_register(self,0)
434 }
435}
436impl ::core::default::Default for Mmpuoad {
437 #[inline(always)]
438 fn default() -> Mmpuoad {
439 <crate::RegValueT<Mmpuoad_SPEC> as RegisterValue<_>>::new(0)
440 }
441}
442pub mod mmpuoad {
443
444 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
445 pub struct Oad_SPEC;
446 pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
447 impl Oad {
448 #[doc = "Non-maskable interrupt"]
449 pub const _0: Self = Self::new(0);
450
451 #[doc = "Reset"]
452 pub const _1: Self = Self::new(1);
453 }
454}
455#[doc(hidden)]
456#[derive(Copy, Clone, Eq, PartialEq)]
457pub struct Mmpuoadpt_SPEC;
458impl crate::sealed::RegSpec for Mmpuoadpt_SPEC {
459 type DataType = u16;
460}
461
462#[doc = "MMPU Operation After Detection Protect Register"]
463pub type Mmpuoadpt = crate::RegValueT<Mmpuoadpt_SPEC>;
464
465impl Mmpuoadpt {
466 #[doc = "Protection of register"]
467 #[inline(always)]
468 pub fn protect(
469 self,
470 ) -> crate::common::RegisterField<
471 0,
472 0x1,
473 1,
474 0,
475 mmpuoadpt::Protect,
476 mmpuoadpt::Protect,
477 Mmpuoadpt_SPEC,
478 crate::common::RW,
479 > {
480 crate::common::RegisterField::<
481 0,
482 0x1,
483 1,
484 0,
485 mmpuoadpt::Protect,
486 mmpuoadpt::Protect,
487 Mmpuoadpt_SPEC,
488 crate::common::RW,
489 >::from_register(self, 0)
490 }
491
492 #[doc = "Key code"]
493 #[inline(always)]
494 pub fn key(
495 self,
496 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuoadpt_SPEC, crate::common::W> {
497 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuoadpt_SPEC,crate::common::W>::from_register(self,0)
498 }
499}
500impl ::core::default::Default for Mmpuoadpt {
501 #[inline(always)]
502 fn default() -> Mmpuoadpt {
503 <crate::RegValueT<Mmpuoadpt_SPEC> as RegisterValue<_>>::new(0)
504 }
505}
506pub mod mmpuoadpt {
507
508 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
509 pub struct Protect_SPEC;
510 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
511 impl Protect {
512 #[doc = "MMPUOAD register writes are possible."]
513 pub const _0: Self = Self::new(0);
514
515 #[doc = "MMPUOAD register writes are protected. Read is possible."]
516 pub const _1: Self = Self::new(1);
517 }
518}
519#[doc(hidden)]
520#[derive(Copy, Clone, Eq, PartialEq)]
521pub struct Mmpuendmac_SPEC;
522impl crate::sealed::RegSpec for Mmpuendmac_SPEC {
523 type DataType = u16;
524}
525
526#[doc = "MMPU Enable Register for DMAC"]
527pub type Mmpuendmac = crate::RegValueT<Mmpuendmac_SPEC>;
528
529impl Mmpuendmac {
530 #[doc = "Bus Master MPU of DMAC enable"]
531 #[inline(always)]
532 pub fn enable(
533 self,
534 ) -> crate::common::RegisterField<
535 0,
536 0x1,
537 1,
538 0,
539 mmpuendmac::Enable,
540 mmpuendmac::Enable,
541 Mmpuendmac_SPEC,
542 crate::common::RW,
543 > {
544 crate::common::RegisterField::<
545 0,
546 0x1,
547 1,
548 0,
549 mmpuendmac::Enable,
550 mmpuendmac::Enable,
551 Mmpuendmac_SPEC,
552 crate::common::RW,
553 >::from_register(self, 0)
554 }
555
556 #[doc = "These bits enable or disable writes to the ENABLE bit."]
557 #[inline(always)]
558 pub fn key(
559 self,
560 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuendmac_SPEC, crate::common::W>
561 {
562 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuendmac_SPEC,crate::common::W>::from_register(self,0)
563 }
564}
565impl ::core::default::Default for Mmpuendmac {
566 #[inline(always)]
567 fn default() -> Mmpuendmac {
568 <crate::RegValueT<Mmpuendmac_SPEC> as RegisterValue<_>>::new(0)
569 }
570}
571pub mod mmpuendmac {
572
573 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
574 pub struct Enable_SPEC;
575 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
576 impl Enable {
577 #[doc = "Bus Master MPU of DMAC is disabled."]
578 pub const _0: Self = Self::new(0);
579
580 #[doc = "Bus Master MPU of DMAC is enabled."]
581 pub const _1: Self = Self::new(1);
582 }
583}
584#[doc(hidden)]
585#[derive(Copy, Clone, Eq, PartialEq)]
586pub struct Mmpuenptdmac_SPEC;
587impl crate::sealed::RegSpec for Mmpuenptdmac_SPEC {
588 type DataType = u16;
589}
590
591#[doc = "MMPU Enable Protect Register for DMAC"]
592pub type Mmpuenptdmac = crate::RegValueT<Mmpuenptdmac_SPEC>;
593
594impl Mmpuenptdmac {
595 #[doc = "Protection of register"]
596 #[inline(always)]
597 pub fn protect(
598 self,
599 ) -> crate::common::RegisterField<
600 0,
601 0x1,
602 1,
603 0,
604 mmpuenptdmac::Protect,
605 mmpuenptdmac::Protect,
606 Mmpuenptdmac_SPEC,
607 crate::common::RW,
608 > {
609 crate::common::RegisterField::<
610 0,
611 0x1,
612 1,
613 0,
614 mmpuenptdmac::Protect,
615 mmpuenptdmac::Protect,
616 Mmpuenptdmac_SPEC,
617 crate::common::RW,
618 >::from_register(self, 0)
619 }
620
621 #[doc = "These bits enable or disable writes to the PROTECT bit."]
622 #[inline(always)]
623 pub fn key(
624 self,
625 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuenptdmac_SPEC, crate::common::W>
626 {
627 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuenptdmac_SPEC,crate::common::W>::from_register(self,0)
628 }
629}
630impl ::core::default::Default for Mmpuenptdmac {
631 #[inline(always)]
632 fn default() -> Mmpuenptdmac {
633 <crate::RegValueT<Mmpuenptdmac_SPEC> as RegisterValue<_>>::new(0)
634 }
635}
636pub mod mmpuenptdmac {
637
638 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
639 pub struct Protect_SPEC;
640 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
641 impl Protect {
642 #[doc = "MMPUENDMAC register writes are possible."]
643 pub const _0: Self = Self::new(0);
644
645 #[doc = "MMPUENDMAC register writes are protected. Read is possible."]
646 pub const _1: Self = Self::new(1);
647 }
648}
649#[doc(hidden)]
650#[derive(Copy, Clone, Eq, PartialEq)]
651pub struct Mmpurptdmac_SPEC;
652impl crate::sealed::RegSpec for Mmpurptdmac_SPEC {
653 type DataType = u16;
654}
655
656#[doc = "MMPU Regions Protect Register for DMAC"]
657pub type Mmpurptdmac = crate::RegValueT<Mmpurptdmac_SPEC>;
658
659impl Mmpurptdmac {
660 #[doc = "Protection of register"]
661 #[inline(always)]
662 pub fn protect(
663 self,
664 ) -> crate::common::RegisterField<
665 0,
666 0x1,
667 1,
668 0,
669 mmpurptdmac::Protect,
670 mmpurptdmac::Protect,
671 Mmpurptdmac_SPEC,
672 crate::common::RW,
673 > {
674 crate::common::RegisterField::<
675 0,
676 0x1,
677 1,
678 0,
679 mmpurptdmac::Protect,
680 mmpurptdmac::Protect,
681 Mmpurptdmac_SPEC,
682 crate::common::RW,
683 >::from_register(self, 0)
684 }
685
686 #[doc = "These bits enable or disable writes to the PROTECT bit."]
687 #[inline(always)]
688 pub fn key(
689 self,
690 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpurptdmac_SPEC, crate::common::W>
691 {
692 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpurptdmac_SPEC,crate::common::W>::from_register(self,0)
693 }
694}
695impl ::core::default::Default for Mmpurptdmac {
696 #[inline(always)]
697 fn default() -> Mmpurptdmac {
698 <crate::RegValueT<Mmpurptdmac_SPEC> as RegisterValue<_>>::new(0)
699 }
700}
701pub mod mmpurptdmac {
702
703 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
704 pub struct Protect_SPEC;
705 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
706 impl Protect {
707 #[doc = "Bus Master MPU register for DMAC writing is possible."]
708 pub const _0: Self = Self::new(0);
709
710 #[doc = "Bus Master MPU register for DMAC writing is protected. Read is possible."]
711 pub const _1: Self = Self::new(1);
712 }
713}
714#[doc(hidden)]
715#[derive(Copy, Clone, Eq, PartialEq)]
716pub struct MmpurptdmacSec_SPEC;
717impl crate::sealed::RegSpec for MmpurptdmacSec_SPEC {
718 type DataType = u16;
719}
720
721#[doc = "MMPU Regions Protect register for DMAC Secure"]
722pub type MmpurptdmacSec = crate::RegValueT<MmpurptdmacSec_SPEC>;
723
724impl MmpurptdmacSec {
725 #[doc = "Protection of register"]
726 #[inline(always)]
727 pub fn protect(
728 self,
729 ) -> crate::common::RegisterField<
730 0,
731 0x1,
732 1,
733 0,
734 mmpurptdmac_sec::Protect,
735 mmpurptdmac_sec::Protect,
736 MmpurptdmacSec_SPEC,
737 crate::common::RW,
738 > {
739 crate::common::RegisterField::<
740 0,
741 0x1,
742 1,
743 0,
744 mmpurptdmac_sec::Protect,
745 mmpurptdmac_sec::Protect,
746 MmpurptdmacSec_SPEC,
747 crate::common::RW,
748 >::from_register(self, 0)
749 }
750
751 #[doc = "These bits enable or disable writes to the PROTECT bit."]
752 #[inline(always)]
753 pub fn key(
754 self,
755 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, MmpurptdmacSec_SPEC, crate::common::W>
756 {
757 crate::common::RegisterField::<8,0xff,1,0,u8,u8,MmpurptdmacSec_SPEC,crate::common::W>::from_register(self,0)
758 }
759}
760impl ::core::default::Default for MmpurptdmacSec {
761 #[inline(always)]
762 fn default() -> MmpurptdmacSec {
763 <crate::RegValueT<MmpurptdmacSec_SPEC> as RegisterValue<_>>::new(0)
764 }
765}
766pub mod mmpurptdmac_sec {
767
768 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
769 pub struct Protect_SPEC;
770 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
771 impl Protect {
772 #[doc = "Bus master MPU register for DMAC secure writes are possible."]
773 pub const _0: Self = Self::new(0);
774
775 #[doc = "Bus master MPU register for DMAC secure writes are protected. Read is possible."]
776 pub const _1: Self = Self::new(1);
777 }
778}
779#[doc(hidden)]
780#[derive(Copy, Clone, Eq, PartialEq)]
781pub struct Mmpuacdmac_SPEC;
782impl crate::sealed::RegSpec for Mmpuacdmac_SPEC {
783 type DataType = u16;
784}
785
786#[doc = "MMPU Access Control Register for DMAC"]
787pub type Mmpuacdmac = crate::RegValueT<Mmpuacdmac_SPEC>;
788
789impl Mmpuacdmac {
790 #[doc = "Region enable"]
791 #[inline(always)]
792 pub fn enable(
793 self,
794 ) -> crate::common::RegisterField<
795 0,
796 0x1,
797 1,
798 0,
799 mmpuacdmac::Enable,
800 mmpuacdmac::Enable,
801 Mmpuacdmac_SPEC,
802 crate::common::RW,
803 > {
804 crate::common::RegisterField::<
805 0,
806 0x1,
807 1,
808 0,
809 mmpuacdmac::Enable,
810 mmpuacdmac::Enable,
811 Mmpuacdmac_SPEC,
812 crate::common::RW,
813 >::from_register(self, 0)
814 }
815
816 #[doc = "Read protection"]
817 #[inline(always)]
818 pub fn rp(
819 self,
820 ) -> crate::common::RegisterField<
821 1,
822 0x1,
823 1,
824 0,
825 mmpuacdmac::Rp,
826 mmpuacdmac::Rp,
827 Mmpuacdmac_SPEC,
828 crate::common::RW,
829 > {
830 crate::common::RegisterField::<
831 1,
832 0x1,
833 1,
834 0,
835 mmpuacdmac::Rp,
836 mmpuacdmac::Rp,
837 Mmpuacdmac_SPEC,
838 crate::common::RW,
839 >::from_register(self, 0)
840 }
841
842 #[doc = "Write protection"]
843 #[inline(always)]
844 pub fn wp(
845 self,
846 ) -> crate::common::RegisterField<
847 2,
848 0x1,
849 1,
850 0,
851 mmpuacdmac::Wp,
852 mmpuacdmac::Wp,
853 Mmpuacdmac_SPEC,
854 crate::common::RW,
855 > {
856 crate::common::RegisterField::<
857 2,
858 0x1,
859 1,
860 0,
861 mmpuacdmac::Wp,
862 mmpuacdmac::Wp,
863 Mmpuacdmac_SPEC,
864 crate::common::RW,
865 >::from_register(self, 0)
866 }
867}
868impl ::core::default::Default for Mmpuacdmac {
869 #[inline(always)]
870 fn default() -> Mmpuacdmac {
871 <crate::RegValueT<Mmpuacdmac_SPEC> as RegisterValue<_>>::new(0)
872 }
873}
874pub mod mmpuacdmac {
875
876 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
877 pub struct Enable_SPEC;
878 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
879 impl Enable {
880 #[doc = "DMAC Region n unit is disabled"]
881 pub const _0: Self = Self::new(0);
882
883 #[doc = "DMAC Region n unit is enabled"]
884 pub const _1: Self = Self::new(1);
885 }
886 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
887 pub struct Rp_SPEC;
888 pub type Rp = crate::EnumBitfieldStruct<u8, Rp_SPEC>;
889 impl Rp {
890 #[doc = "Read permission"]
891 pub const _0: Self = Self::new(0);
892
893 #[doc = "Read protection"]
894 pub const _1: Self = Self::new(1);
895 }
896 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
897 pub struct Wp_SPEC;
898 pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
899 impl Wp {
900 #[doc = "Write permission"]
901 pub const _0: Self = Self::new(0);
902
903 #[doc = "Write protection"]
904 pub const _1: Self = Self::new(1);
905 }
906}
907#[doc(hidden)]
908#[derive(Copy, Clone, Eq, PartialEq)]
909pub struct Mmpusdmac_SPEC;
910impl crate::sealed::RegSpec for Mmpusdmac_SPEC {
911 type DataType = u32;
912}
913
914#[doc = "MMPU Start Address Register for DMAC"]
915pub type Mmpusdmac = crate::RegValueT<Mmpusdmac_SPEC>;
916
917impl Mmpusdmac {
918 #[doc = "Region start address register"]
919 #[inline(always)]
920 pub fn mmpus(
921 self,
922 ) -> crate::common::RegisterField<5, 0x7ffffff, 1, 0, u32, u32, Mmpusdmac_SPEC, crate::common::RW>
923 {
924 crate::common::RegisterField::<
925 5,
926 0x7ffffff,
927 1,
928 0,
929 u32,
930 u32,
931 Mmpusdmac_SPEC,
932 crate::common::RW,
933 >::from_register(self, 0)
934 }
935}
936impl ::core::default::Default for Mmpusdmac {
937 #[inline(always)]
938 fn default() -> Mmpusdmac {
939 <crate::RegValueT<Mmpusdmac_SPEC> as RegisterValue<_>>::new(0)
940 }
941}
942
943#[doc(hidden)]
944#[derive(Copy, Clone, Eq, PartialEq)]
945pub struct Mmpuedmac_SPEC;
946impl crate::sealed::RegSpec for Mmpuedmac_SPEC {
947 type DataType = u32;
948}
949
950#[doc = "MMPU End Address Register for DMAC"]
951pub type Mmpuedmac = crate::RegValueT<Mmpuedmac_SPEC>;
952
953impl Mmpuedmac {
954 #[doc = "Region end address register"]
955 #[inline(always)]
956 pub fn mmpue(
957 self,
958 ) -> crate::common::RegisterField<5, 0x7ffffff, 1, 0, u32, u32, Mmpuedmac_SPEC, crate::common::RW>
959 {
960 crate::common::RegisterField::<
961 5,
962 0x7ffffff,
963 1,
964 0,
965 u32,
966 u32,
967 Mmpuedmac_SPEC,
968 crate::common::RW,
969 >::from_register(self, 0)
970 }
971}
972impl ::core::default::Default for Mmpuedmac {
973 #[inline(always)]
974 fn default() -> Mmpuedmac {
975 <crate::RegValueT<Mmpuedmac_SPEC> as RegisterValue<_>>::new(31)
976 }
977}