1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Flash/CPU Interface"]
28unsafe impl ::core::marker::Send for super::Faci {}
29unsafe impl ::core::marker::Sync for super::Faci {}
30impl super::Faci {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Flash Access Status Register"]
38 #[inline(always)]
39 pub const fn fastat(
40 &self,
41 ) -> &'static crate::common::Reg<self::Fastat_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Fastat_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(16usize),
45 )
46 }
47 }
48
49 #[doc = "Flash Access Error Interrupt Enable Register"]
50 #[inline(always)]
51 pub const fn faeint(
52 &self,
53 ) -> &'static crate::common::Reg<self::Faeint_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Faeint_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(20usize),
57 )
58 }
59 }
60
61 #[doc = "Flash Ready Interrupt Enable Register"]
62 #[inline(always)]
63 pub const fn frdyie(
64 &self,
65 ) -> &'static crate::common::Reg<self::Frdyie_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::Frdyie_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(24usize),
69 )
70 }
71 }
72
73 #[doc = "FACI Command Start Address Register"]
74 #[inline(always)]
75 pub const fn fsaddr(
76 &self,
77 ) -> &'static crate::common::Reg<self::Fsaddr_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::Fsaddr_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(48usize),
81 )
82 }
83 }
84
85 #[doc = "FACI Command End Address Register"]
86 #[inline(always)]
87 pub const fn feaddr(
88 &self,
89 ) -> &'static crate::common::Reg<self::Feaddr_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Feaddr_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(52usize),
93 )
94 }
95 }
96
97 #[doc = "Flash P/E Mode Entry Protection Register"]
98 #[inline(always)]
99 pub const fn fmeprot(
100 &self,
101 ) -> &'static crate::common::Reg<self::Fmeprot_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::Fmeprot_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(68usize),
105 )
106 }
107 }
108
109 #[doc = "Flash Block Protection for Secure Register"]
110 #[inline(always)]
111 pub const fn fbprot1(
112 &self,
113 ) -> &'static crate::common::Reg<self::Fbprot1_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Fbprot1_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(124usize),
117 )
118 }
119 }
120
121 #[doc = "Flash Status Register"]
122 #[inline(always)]
123 pub const fn fstatr(
124 &self,
125 ) -> &'static crate::common::Reg<self::Fstatr_SPEC, crate::common::RW> {
126 unsafe {
127 crate::common::Reg::<self::Fstatr_SPEC, crate::common::RW>::from_ptr(
128 self._svd2pac_as_ptr().add(128usize),
129 )
130 }
131 }
132
133 #[doc = "Flash P/E Mode Entry Register"]
134 #[inline(always)]
135 pub const fn fentryr(
136 &self,
137 ) -> &'static crate::common::Reg<self::Fentryr_SPEC, crate::common::RW> {
138 unsafe {
139 crate::common::Reg::<self::Fentryr_SPEC, crate::common::RW>::from_ptr(
140 self._svd2pac_as_ptr().add(132usize),
141 )
142 }
143 }
144
145 #[doc = "Flash Sequencer Setup Initialization Register"]
146 #[inline(always)]
147 pub const fn fsuinitr(
148 &self,
149 ) -> &'static crate::common::Reg<self::Fsuinitr_SPEC, crate::common::RW> {
150 unsafe {
151 crate::common::Reg::<self::Fsuinitr_SPEC, crate::common::RW>::from_ptr(
152 self._svd2pac_as_ptr().add(140usize),
153 )
154 }
155 }
156
157 #[doc = "FACI Command Register"]
158 #[inline(always)]
159 pub const fn fcmdr(&self) -> &'static crate::common::Reg<self::Fcmdr_SPEC, crate::common::R> {
160 unsafe {
161 crate::common::Reg::<self::Fcmdr_SPEC, crate::common::R>::from_ptr(
162 self._svd2pac_as_ptr().add(160usize),
163 )
164 }
165 }
166
167 #[doc = "Blank Check Control Register"]
168 #[inline(always)]
169 pub const fn fbccnt(
170 &self,
171 ) -> &'static crate::common::Reg<self::Fbccnt_SPEC, crate::common::RW> {
172 unsafe {
173 crate::common::Reg::<self::Fbccnt_SPEC, crate::common::RW>::from_ptr(
174 self._svd2pac_as_ptr().add(208usize),
175 )
176 }
177 }
178
179 #[doc = "Blank Check Status Register"]
180 #[inline(always)]
181 pub const fn fbcstat(
182 &self,
183 ) -> &'static crate::common::Reg<self::Fbcstat_SPEC, crate::common::RW> {
184 unsafe {
185 crate::common::Reg::<self::Fbcstat_SPEC, crate::common::RW>::from_ptr(
186 self._svd2pac_as_ptr().add(212usize),
187 )
188 }
189 }
190
191 #[doc = "Data Flash Programming Start Address Register"]
192 #[inline(always)]
193 pub const fn fpsaddr(
194 &self,
195 ) -> &'static crate::common::Reg<self::Fpsaddr_SPEC, crate::common::RW> {
196 unsafe {
197 crate::common::Reg::<self::Fpsaddr_SPEC, crate::common::RW>::from_ptr(
198 self._svd2pac_as_ptr().add(216usize),
199 )
200 }
201 }
202
203 #[doc = "Flash Startup Area Select Monitor Register"]
204 #[inline(always)]
205 pub const fn fsuasmon(
206 &self,
207 ) -> &'static crate::common::Reg<self::Fsuasmon_SPEC, crate::common::R> {
208 unsafe {
209 crate::common::Reg::<self::Fsuasmon_SPEC, crate::common::R>::from_ptr(
210 self._svd2pac_as_ptr().add(220usize),
211 )
212 }
213 }
214
215 #[doc = "Flash Sequencer Processing Switching Register"]
216 #[inline(always)]
217 pub const fn fcpsr(&self) -> &'static crate::common::Reg<self::Fcpsr_SPEC, crate::common::RW> {
218 unsafe {
219 crate::common::Reg::<self::Fcpsr_SPEC, crate::common::RW>::from_ptr(
220 self._svd2pac_as_ptr().add(224usize),
221 )
222 }
223 }
224
225 #[doc = "Flash Sequencer Processing Clock Notification Register"]
226 #[inline(always)]
227 pub const fn fpckar(
228 &self,
229 ) -> &'static crate::common::Reg<self::Fpckar_SPEC, crate::common::RW> {
230 unsafe {
231 crate::common::Reg::<self::Fpckar_SPEC, crate::common::RW>::from_ptr(
232 self._svd2pac_as_ptr().add(228usize),
233 )
234 }
235 }
236
237 #[doc = "Flash Startup Area Control Register"]
238 #[inline(always)]
239 pub const fn fsuacr(
240 &self,
241 ) -> &'static crate::common::Reg<self::Fsuacr_SPEC, crate::common::RW> {
242 unsafe {
243 crate::common::Reg::<self::Fsuacr_SPEC, crate::common::RW>::from_ptr(
244 self._svd2pac_as_ptr().add(232usize),
245 )
246 }
247 }
248}
249#[doc(hidden)]
250#[derive(Copy, Clone, Eq, PartialEq)]
251pub struct Fastat_SPEC;
252impl crate::sealed::RegSpec for Fastat_SPEC {
253 type DataType = u8;
254}
255
256#[doc = "Flash Access Status Register"]
257pub type Fastat = crate::RegValueT<Fastat_SPEC>;
258
259impl Fastat {
260 #[doc = "Data Flash Memory Access Violation Flag"]
261 #[inline(always)]
262 pub fn dfae(
263 self,
264 ) -> crate::common::RegisterField<
265 3,
266 0x1,
267 1,
268 0,
269 fastat::Dfae,
270 fastat::Dfae,
271 Fastat_SPEC,
272 crate::common::RW,
273 > {
274 crate::common::RegisterField::<
275 3,
276 0x1,
277 1,
278 0,
279 fastat::Dfae,
280 fastat::Dfae,
281 Fastat_SPEC,
282 crate::common::RW,
283 >::from_register(self, 0)
284 }
285
286 #[doc = "Command Lock Flag"]
287 #[inline(always)]
288 pub fn cmdlk(
289 self,
290 ) -> crate::common::RegisterField<
291 4,
292 0x1,
293 1,
294 0,
295 fastat::Cmdlk,
296 fastat::Cmdlk,
297 Fastat_SPEC,
298 crate::common::R,
299 > {
300 crate::common::RegisterField::<
301 4,
302 0x1,
303 1,
304 0,
305 fastat::Cmdlk,
306 fastat::Cmdlk,
307 Fastat_SPEC,
308 crate::common::R,
309 >::from_register(self, 0)
310 }
311
312 #[doc = "Code Flash Memory Access Violation Flag"]
313 #[inline(always)]
314 pub fn cfae(
315 self,
316 ) -> crate::common::RegisterField<
317 7,
318 0x1,
319 1,
320 0,
321 fastat::Cfae,
322 fastat::Cfae,
323 Fastat_SPEC,
324 crate::common::RW,
325 > {
326 crate::common::RegisterField::<
327 7,
328 0x1,
329 1,
330 0,
331 fastat::Cfae,
332 fastat::Cfae,
333 Fastat_SPEC,
334 crate::common::RW,
335 >::from_register(self, 0)
336 }
337}
338impl ::core::default::Default for Fastat {
339 #[inline(always)]
340 fn default() -> Fastat {
341 <crate::RegValueT<Fastat_SPEC> as RegisterValue<_>>::new(0)
342 }
343}
344pub mod fastat {
345
346 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
347 pub struct Dfae_SPEC;
348 pub type Dfae = crate::EnumBitfieldStruct<u8, Dfae_SPEC>;
349 impl Dfae {
350 #[doc = "No data flash memory access violation has occurred"]
351 pub const _0: Self = Self::new(0);
352
353 #[doc = "A data flash memory access violation has occurred."]
354 pub const _1: Self = Self::new(1);
355 }
356 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
357 pub struct Cmdlk_SPEC;
358 pub type Cmdlk = crate::EnumBitfieldStruct<u8, Cmdlk_SPEC>;
359 impl Cmdlk {
360 #[doc = "The flash sequencer is not in the command-locked state"]
361 pub const _0: Self = Self::new(0);
362
363 #[doc = "The flash sequencer is in the command-locked state."]
364 pub const _1: Self = Self::new(1);
365 }
366 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
367 pub struct Cfae_SPEC;
368 pub type Cfae = crate::EnumBitfieldStruct<u8, Cfae_SPEC>;
369 impl Cfae {
370 #[doc = "No code flash memory access violation has occurred"]
371 pub const _0: Self = Self::new(0);
372
373 #[doc = "A code flash memory access violation has occurred."]
374 pub const _1: Self = Self::new(1);
375 }
376}
377#[doc(hidden)]
378#[derive(Copy, Clone, Eq, PartialEq)]
379pub struct Faeint_SPEC;
380impl crate::sealed::RegSpec for Faeint_SPEC {
381 type DataType = u8;
382}
383
384#[doc = "Flash Access Error Interrupt Enable Register"]
385pub type Faeint = crate::RegValueT<Faeint_SPEC>;
386
387impl Faeint {
388 #[doc = "Data Flash Memory Access Violation Interrupt Enable"]
389 #[inline(always)]
390 pub fn dfaeie(
391 self,
392 ) -> crate::common::RegisterField<
393 3,
394 0x1,
395 1,
396 0,
397 faeint::Dfaeie,
398 faeint::Dfaeie,
399 Faeint_SPEC,
400 crate::common::RW,
401 > {
402 crate::common::RegisterField::<
403 3,
404 0x1,
405 1,
406 0,
407 faeint::Dfaeie,
408 faeint::Dfaeie,
409 Faeint_SPEC,
410 crate::common::RW,
411 >::from_register(self, 0)
412 }
413
414 #[doc = "Command Lock Interrupt Enable"]
415 #[inline(always)]
416 pub fn cmdlkie(
417 self,
418 ) -> crate::common::RegisterField<
419 4,
420 0x1,
421 1,
422 0,
423 faeint::Cmdlkie,
424 faeint::Cmdlkie,
425 Faeint_SPEC,
426 crate::common::RW,
427 > {
428 crate::common::RegisterField::<
429 4,
430 0x1,
431 1,
432 0,
433 faeint::Cmdlkie,
434 faeint::Cmdlkie,
435 Faeint_SPEC,
436 crate::common::RW,
437 >::from_register(self, 0)
438 }
439
440 #[doc = "Code Flash Memory Access Violation Interrupt Enable"]
441 #[inline(always)]
442 pub fn cfaeie(
443 self,
444 ) -> crate::common::RegisterField<
445 7,
446 0x1,
447 1,
448 0,
449 faeint::Cfaeie,
450 faeint::Cfaeie,
451 Faeint_SPEC,
452 crate::common::RW,
453 > {
454 crate::common::RegisterField::<
455 7,
456 0x1,
457 1,
458 0,
459 faeint::Cfaeie,
460 faeint::Cfaeie,
461 Faeint_SPEC,
462 crate::common::RW,
463 >::from_register(self, 0)
464 }
465}
466impl ::core::default::Default for Faeint {
467 #[inline(always)]
468 fn default() -> Faeint {
469 <crate::RegValueT<Faeint_SPEC> as RegisterValue<_>>::new(152)
470 }
471}
472pub mod faeint {
473
474 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475 pub struct Dfaeie_SPEC;
476 pub type Dfaeie = crate::EnumBitfieldStruct<u8, Dfaeie_SPEC>;
477 impl Dfaeie {
478 #[doc = "Generation of an FIFERR interrupt request is disabled when FASTAT.DFAE is set to 1"]
479 pub const _0: Self = Self::new(0);
480
481 #[doc = "Generation of an FIFERR interrupt request is enabled when FASTAT.DFAE is set to 1."]
482 pub const _1: Self = Self::new(1);
483 }
484 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
485 pub struct Cmdlkie_SPEC;
486 pub type Cmdlkie = crate::EnumBitfieldStruct<u8, Cmdlkie_SPEC>;
487 impl Cmdlkie {
488 #[doc = "Generation of an FIFERR interrupt request is disabled when FASTAT.CMDLK is set to 1"]
489 pub const _0: Self = Self::new(0);
490
491 #[doc = "Generation of an FIFERR interrupt request is enabled when FASTAT.CMDLK is set to 1."]
492 pub const _1: Self = Self::new(1);
493 }
494 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
495 pub struct Cfaeie_SPEC;
496 pub type Cfaeie = crate::EnumBitfieldStruct<u8, Cfaeie_SPEC>;
497 impl Cfaeie {
498 #[doc = "Generation of an FIFERR interrupt request is disabled when FASTAT.CFAE is set to 1"]
499 pub const _0: Self = Self::new(0);
500
501 #[doc = "Generation of an FIFERR interrupt request is enabled when FASTAT.CFAE is set to 1."]
502 pub const _1: Self = Self::new(1);
503 }
504}
505#[doc(hidden)]
506#[derive(Copy, Clone, Eq, PartialEq)]
507pub struct Frdyie_SPEC;
508impl crate::sealed::RegSpec for Frdyie_SPEC {
509 type DataType = u8;
510}
511
512#[doc = "Flash Ready Interrupt Enable Register"]
513pub type Frdyie = crate::RegValueT<Frdyie_SPEC>;
514
515impl Frdyie {
516 #[doc = "Flash Ready Interrupt Enable"]
517 #[inline(always)]
518 pub fn frdyie(
519 self,
520 ) -> crate::common::RegisterField<
521 0,
522 0x1,
523 1,
524 0,
525 frdyie::Frdyie,
526 frdyie::Frdyie,
527 Frdyie_SPEC,
528 crate::common::RW,
529 > {
530 crate::common::RegisterField::<
531 0,
532 0x1,
533 1,
534 0,
535 frdyie::Frdyie,
536 frdyie::Frdyie,
537 Frdyie_SPEC,
538 crate::common::RW,
539 >::from_register(self, 0)
540 }
541}
542impl ::core::default::Default for Frdyie {
543 #[inline(always)]
544 fn default() -> Frdyie {
545 <crate::RegValueT<Frdyie_SPEC> as RegisterValue<_>>::new(0)
546 }
547}
548pub mod frdyie {
549
550 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
551 pub struct Frdyie_SPEC;
552 pub type Frdyie = crate::EnumBitfieldStruct<u8, Frdyie_SPEC>;
553 impl Frdyie {
554 #[doc = "Generation of an FRDY interrupt request is disabled"]
555 pub const _0: Self = Self::new(0);
556
557 #[doc = "Generation of an FRDY interrupt request is enabled."]
558 pub const _1: Self = Self::new(1);
559 }
560}
561#[doc(hidden)]
562#[derive(Copy, Clone, Eq, PartialEq)]
563pub struct Fsaddr_SPEC;
564impl crate::sealed::RegSpec for Fsaddr_SPEC {
565 type DataType = u32;
566}
567
568#[doc = "FACI Command Start Address Register"]
569pub type Fsaddr = crate::RegValueT<Fsaddr_SPEC>;
570
571impl NoBitfieldReg<Fsaddr_SPEC> for Fsaddr {}
572impl ::core::default::Default for Fsaddr {
573 #[inline(always)]
574 fn default() -> Fsaddr {
575 <crate::RegValueT<Fsaddr_SPEC> as RegisterValue<_>>::new(0)
576 }
577}
578
579#[doc(hidden)]
580#[derive(Copy, Clone, Eq, PartialEq)]
581pub struct Feaddr_SPEC;
582impl crate::sealed::RegSpec for Feaddr_SPEC {
583 type DataType = u32;
584}
585
586#[doc = "FACI Command End Address Register"]
587pub type Feaddr = crate::RegValueT<Feaddr_SPEC>;
588
589impl Feaddr {
590 #[doc = "End Address for FACI Command Processing"]
591 #[inline(always)]
592 pub fn feaddr(
593 self,
594 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Feaddr_SPEC, crate::common::RW>
595 {
596 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Feaddr_SPEC,crate::common::RW>::from_register(self,0)
597 }
598}
599impl ::core::default::Default for Feaddr {
600 #[inline(always)]
601 fn default() -> Feaddr {
602 <crate::RegValueT<Feaddr_SPEC> as RegisterValue<_>>::new(0)
603 }
604}
605
606#[doc(hidden)]
607#[derive(Copy, Clone, Eq, PartialEq)]
608pub struct Fmeprot_SPEC;
609impl crate::sealed::RegSpec for Fmeprot_SPEC {
610 type DataType = u16;
611}
612
613#[doc = "Flash P/E Mode Entry Protection Register"]
614pub type Fmeprot = crate::RegValueT<Fmeprot_SPEC>;
615
616impl Fmeprot {
617 #[doc = "Code Flash P/E Mode Entry Protection"]
618 #[inline(always)]
619 pub fn ceprot(
620 self,
621 ) -> crate::common::RegisterField<
622 0,
623 0x1,
624 1,
625 0,
626 fmeprot::Ceprot,
627 fmeprot::Ceprot,
628 Fmeprot_SPEC,
629 crate::common::RW,
630 > {
631 crate::common::RegisterField::<
632 0,
633 0x1,
634 1,
635 0,
636 fmeprot::Ceprot,
637 fmeprot::Ceprot,
638 Fmeprot_SPEC,
639 crate::common::RW,
640 >::from_register(self, 0)
641 }
642
643 #[doc = "Key Code"]
644 #[inline(always)]
645 pub fn key(
646 self,
647 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fmeprot_SPEC, crate::common::W> {
648 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fmeprot_SPEC,crate::common::W>::from_register(self,0)
649 }
650}
651impl ::core::default::Default for Fmeprot {
652 #[inline(always)]
653 fn default() -> Fmeprot {
654 <crate::RegValueT<Fmeprot_SPEC> as RegisterValue<_>>::new(1)
655 }
656}
657pub mod fmeprot {
658
659 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
660 pub struct Ceprot_SPEC;
661 pub type Ceprot = crate::EnumBitfieldStruct<u8, Ceprot_SPEC>;
662 impl Ceprot {
663 #[doc = "FENTRYC bit is not protected"]
664 pub const _0: Self = Self::new(0);
665
666 #[doc = "FENTRYC bit is protected."]
667 pub const _1: Self = Self::new(1);
668 }
669}
670#[doc(hidden)]
671#[derive(Copy, Clone, Eq, PartialEq)]
672pub struct Fbprot1_SPEC;
673impl crate::sealed::RegSpec for Fbprot1_SPEC {
674 type DataType = u16;
675}
676
677#[doc = "Flash Block Protection for Secure Register"]
678pub type Fbprot1 = crate::RegValueT<Fbprot1_SPEC>;
679
680impl Fbprot1 {
681 #[doc = "Block Protection for Secure Cancel"]
682 #[inline(always)]
683 pub fn bpcn1(
684 self,
685 ) -> crate::common::RegisterField<
686 0,
687 0x1,
688 1,
689 0,
690 fbprot1::Bpcn1,
691 fbprot1::Bpcn1,
692 Fbprot1_SPEC,
693 crate::common::RW,
694 > {
695 crate::common::RegisterField::<
696 0,
697 0x1,
698 1,
699 0,
700 fbprot1::Bpcn1,
701 fbprot1::Bpcn1,
702 Fbprot1_SPEC,
703 crate::common::RW,
704 >::from_register(self, 0)
705 }
706
707 #[doc = "Key Code"]
708 #[inline(always)]
709 pub fn key(
710 self,
711 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fbprot1_SPEC, crate::common::W> {
712 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fbprot1_SPEC,crate::common::W>::from_register(self,0)
713 }
714}
715impl ::core::default::Default for Fbprot1 {
716 #[inline(always)]
717 fn default() -> Fbprot1 {
718 <crate::RegValueT<Fbprot1_SPEC> as RegisterValue<_>>::new(0)
719 }
720}
721pub mod fbprot1 {
722
723 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
724 pub struct Bpcn1_SPEC;
725 pub type Bpcn1 = crate::EnumBitfieldStruct<u8, Bpcn1_SPEC>;
726 impl Bpcn1 {
727 #[doc = "Block protection is enabled"]
728 pub const _0: Self = Self::new(0);
729
730 #[doc = "Block protection is disabled."]
731 pub const _1: Self = Self::new(1);
732 }
733}
734#[doc(hidden)]
735#[derive(Copy, Clone, Eq, PartialEq)]
736pub struct Fstatr_SPEC;
737impl crate::sealed::RegSpec for Fstatr_SPEC {
738 type DataType = u32;
739}
740
741#[doc = "Flash Status Register"]
742pub type Fstatr = crate::RegValueT<Fstatr_SPEC>;
743
744impl Fstatr {
745 #[doc = "Flash Write/Erase Protect Error Flag"]
746 #[inline(always)]
747 pub fn flweerr(
748 self,
749 ) -> crate::common::RegisterField<
750 6,
751 0x1,
752 1,
753 0,
754 fstatr::Flweerr,
755 fstatr::Flweerr,
756 Fstatr_SPEC,
757 crate::common::R,
758 > {
759 crate::common::RegisterField::<
760 6,
761 0x1,
762 1,
763 0,
764 fstatr::Flweerr,
765 fstatr::Flweerr,
766 Fstatr_SPEC,
767 crate::common::R,
768 >::from_register(self, 0)
769 }
770
771 #[doc = "Programming Suspend Status Flag"]
772 #[inline(always)]
773 pub fn prgspd(
774 self,
775 ) -> crate::common::RegisterField<
776 8,
777 0x1,
778 1,
779 0,
780 fstatr::Prgspd,
781 fstatr::Prgspd,
782 Fstatr_SPEC,
783 crate::common::R,
784 > {
785 crate::common::RegisterField::<
786 8,
787 0x1,
788 1,
789 0,
790 fstatr::Prgspd,
791 fstatr::Prgspd,
792 Fstatr_SPEC,
793 crate::common::R,
794 >::from_register(self, 0)
795 }
796
797 #[doc = "Erasure Suspend Status Flag"]
798 #[inline(always)]
799 pub fn ersspd(
800 self,
801 ) -> crate::common::RegisterField<
802 9,
803 0x1,
804 1,
805 0,
806 fstatr::Ersspd,
807 fstatr::Ersspd,
808 Fstatr_SPEC,
809 crate::common::R,
810 > {
811 crate::common::RegisterField::<
812 9,
813 0x1,
814 1,
815 0,
816 fstatr::Ersspd,
817 fstatr::Ersspd,
818 Fstatr_SPEC,
819 crate::common::R,
820 >::from_register(self, 0)
821 }
822
823 #[doc = "Data Buffer Full Flag"]
824 #[inline(always)]
825 pub fn dbfull(
826 self,
827 ) -> crate::common::RegisterField<
828 10,
829 0x1,
830 1,
831 0,
832 fstatr::Dbfull,
833 fstatr::Dbfull,
834 Fstatr_SPEC,
835 crate::common::R,
836 > {
837 crate::common::RegisterField::<
838 10,
839 0x1,
840 1,
841 0,
842 fstatr::Dbfull,
843 fstatr::Dbfull,
844 Fstatr_SPEC,
845 crate::common::R,
846 >::from_register(self, 0)
847 }
848
849 #[doc = "Suspend Ready Flag"]
850 #[inline(always)]
851 pub fn susrdy(
852 self,
853 ) -> crate::common::RegisterField<
854 11,
855 0x1,
856 1,
857 0,
858 fstatr::Susrdy,
859 fstatr::Susrdy,
860 Fstatr_SPEC,
861 crate::common::R,
862 > {
863 crate::common::RegisterField::<
864 11,
865 0x1,
866 1,
867 0,
868 fstatr::Susrdy,
869 fstatr::Susrdy,
870 Fstatr_SPEC,
871 crate::common::R,
872 >::from_register(self, 0)
873 }
874
875 #[doc = "Programming Error Flag"]
876 #[inline(always)]
877 pub fn prgerr(
878 self,
879 ) -> crate::common::RegisterField<
880 12,
881 0x1,
882 1,
883 0,
884 fstatr::Prgerr,
885 fstatr::Prgerr,
886 Fstatr_SPEC,
887 crate::common::R,
888 > {
889 crate::common::RegisterField::<
890 12,
891 0x1,
892 1,
893 0,
894 fstatr::Prgerr,
895 fstatr::Prgerr,
896 Fstatr_SPEC,
897 crate::common::R,
898 >::from_register(self, 0)
899 }
900
901 #[doc = "Erasure Error Flag"]
902 #[inline(always)]
903 pub fn erserr(
904 self,
905 ) -> crate::common::RegisterField<
906 13,
907 0x1,
908 1,
909 0,
910 fstatr::Erserr,
911 fstatr::Erserr,
912 Fstatr_SPEC,
913 crate::common::R,
914 > {
915 crate::common::RegisterField::<
916 13,
917 0x1,
918 1,
919 0,
920 fstatr::Erserr,
921 fstatr::Erserr,
922 Fstatr_SPEC,
923 crate::common::R,
924 >::from_register(self, 0)
925 }
926
927 #[doc = "Illegal Command Error Flag"]
928 #[inline(always)]
929 pub fn ilglerr(
930 self,
931 ) -> crate::common::RegisterField<
932 14,
933 0x1,
934 1,
935 0,
936 fstatr::Ilglerr,
937 fstatr::Ilglerr,
938 Fstatr_SPEC,
939 crate::common::R,
940 > {
941 crate::common::RegisterField::<
942 14,
943 0x1,
944 1,
945 0,
946 fstatr::Ilglerr,
947 fstatr::Ilglerr,
948 Fstatr_SPEC,
949 crate::common::R,
950 >::from_register(self, 0)
951 }
952
953 #[doc = "Flash Ready Flag"]
954 #[inline(always)]
955 pub fn frdy(
956 self,
957 ) -> crate::common::RegisterField<
958 15,
959 0x1,
960 1,
961 0,
962 fstatr::Frdy,
963 fstatr::Frdy,
964 Fstatr_SPEC,
965 crate::common::R,
966 > {
967 crate::common::RegisterField::<
968 15,
969 0x1,
970 1,
971 0,
972 fstatr::Frdy,
973 fstatr::Frdy,
974 Fstatr_SPEC,
975 crate::common::R,
976 >::from_register(self, 0)
977 }
978
979 #[doc = "Other Error"]
980 #[inline(always)]
981 pub fn oterr(
982 self,
983 ) -> crate::common::RegisterField<
984 20,
985 0x1,
986 1,
987 0,
988 fstatr::Oterr,
989 fstatr::Oterr,
990 Fstatr_SPEC,
991 crate::common::R,
992 > {
993 crate::common::RegisterField::<
994 20,
995 0x1,
996 1,
997 0,
998 fstatr::Oterr,
999 fstatr::Oterr,
1000 Fstatr_SPEC,
1001 crate::common::R,
1002 >::from_register(self, 0)
1003 }
1004
1005 #[doc = "Security Error"]
1006 #[inline(always)]
1007 pub fn secerr(
1008 self,
1009 ) -> crate::common::RegisterField<
1010 21,
1011 0x1,
1012 1,
1013 0,
1014 fstatr::Secerr,
1015 fstatr::Secerr,
1016 Fstatr_SPEC,
1017 crate::common::R,
1018 > {
1019 crate::common::RegisterField::<
1020 21,
1021 0x1,
1022 1,
1023 0,
1024 fstatr::Secerr,
1025 fstatr::Secerr,
1026 Fstatr_SPEC,
1027 crate::common::R,
1028 >::from_register(self, 0)
1029 }
1030
1031 #[doc = "FENTRY Setting Error"]
1032 #[inline(always)]
1033 pub fn feseterr(
1034 self,
1035 ) -> crate::common::RegisterField<
1036 22,
1037 0x1,
1038 1,
1039 0,
1040 fstatr::Feseterr,
1041 fstatr::Feseterr,
1042 Fstatr_SPEC,
1043 crate::common::R,
1044 > {
1045 crate::common::RegisterField::<
1046 22,
1047 0x1,
1048 1,
1049 0,
1050 fstatr::Feseterr,
1051 fstatr::Feseterr,
1052 Fstatr_SPEC,
1053 crate::common::R,
1054 >::from_register(self, 0)
1055 }
1056
1057 #[doc = "Illegal Command Error"]
1058 #[inline(always)]
1059 pub fn ilgcomerr(
1060 self,
1061 ) -> crate::common::RegisterField<
1062 23,
1063 0x1,
1064 1,
1065 0,
1066 fstatr::Ilgcomerr,
1067 fstatr::Ilgcomerr,
1068 Fstatr_SPEC,
1069 crate::common::R,
1070 > {
1071 crate::common::RegisterField::<
1072 23,
1073 0x1,
1074 1,
1075 0,
1076 fstatr::Ilgcomerr,
1077 fstatr::Ilgcomerr,
1078 Fstatr_SPEC,
1079 crate::common::R,
1080 >::from_register(self, 0)
1081 }
1082}
1083impl ::core::default::Default for Fstatr {
1084 #[inline(always)]
1085 fn default() -> Fstatr {
1086 <crate::RegValueT<Fstatr_SPEC> as RegisterValue<_>>::new(32768)
1087 }
1088}
1089pub mod fstatr {
1090
1091 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1092 pub struct Flweerr_SPEC;
1093 pub type Flweerr = crate::EnumBitfieldStruct<u8, Flweerr_SPEC>;
1094 impl Flweerr {
1095 #[doc = "An error has not occurred"]
1096 pub const _0: Self = Self::new(0);
1097
1098 #[doc = "An error has occurred."]
1099 pub const _1: Self = Self::new(1);
1100 }
1101 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1102 pub struct Prgspd_SPEC;
1103 pub type Prgspd = crate::EnumBitfieldStruct<u8, Prgspd_SPEC>;
1104 impl Prgspd {
1105 #[doc = "The flash sequencer is not in the programming suspension processing state or programming suspended state"]
1106 pub const _0: Self = Self::new(0);
1107
1108 #[doc = "The flash sequencer is in the programming suspension processing state or programming suspended state."]
1109 pub const _1: Self = Self::new(1);
1110 }
1111 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1112 pub struct Ersspd_SPEC;
1113 pub type Ersspd = crate::EnumBitfieldStruct<u8, Ersspd_SPEC>;
1114 impl Ersspd {
1115 #[doc = "The flash sequencer is not in the erasure suspension processing state or the erasure suspended state"]
1116 pub const _0: Self = Self::new(0);
1117
1118 #[doc = "The flash sequencer is in the erasure suspension processing state or the erasure suspended state."]
1119 pub const _1: Self = Self::new(1);
1120 }
1121 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1122 pub struct Dbfull_SPEC;
1123 pub type Dbfull = crate::EnumBitfieldStruct<u8, Dbfull_SPEC>;
1124 impl Dbfull {
1125 #[doc = "The data buffer is empty"]
1126 pub const _0: Self = Self::new(0);
1127
1128 #[doc = "The data buffer is full."]
1129 pub const _1: Self = Self::new(1);
1130 }
1131 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1132 pub struct Susrdy_SPEC;
1133 pub type Susrdy = crate::EnumBitfieldStruct<u8, Susrdy_SPEC>;
1134 impl Susrdy {
1135 #[doc = "The flash sequencer cannot receive P/E suspend commands"]
1136 pub const _0: Self = Self::new(0);
1137
1138 #[doc = "The flash sequencer can receive P/E suspend commands."]
1139 pub const _1: Self = Self::new(1);
1140 }
1141 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1142 pub struct Prgerr_SPEC;
1143 pub type Prgerr = crate::EnumBitfieldStruct<u8, Prgerr_SPEC>;
1144 impl Prgerr {
1145 #[doc = "Programming has completed successfully"]
1146 pub const _0: Self = Self::new(0);
1147
1148 #[doc = "An error has occurred during programming."]
1149 pub const _1: Self = Self::new(1);
1150 }
1151 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1152 pub struct Erserr_SPEC;
1153 pub type Erserr = crate::EnumBitfieldStruct<u8, Erserr_SPEC>;
1154 impl Erserr {
1155 #[doc = "Erasure has completed successfully"]
1156 pub const _0: Self = Self::new(0);
1157
1158 #[doc = "An error has occurred during erasure."]
1159 pub const _1: Self = Self::new(1);
1160 }
1161 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1162 pub struct Ilglerr_SPEC;
1163 pub type Ilglerr = crate::EnumBitfieldStruct<u8, Ilglerr_SPEC>;
1164 impl Ilglerr {
1165 #[doc = "The flash sequencer has not detected an illegal FACI command or illegal flash memory access"]
1166 pub const _0: Self = Self::new(0);
1167
1168 #[doc = "The flash sequencer has detected an illegal FACI command or illegal flash memory access."]
1169 pub const _1: Self = Self::new(1);
1170 }
1171 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1172 pub struct Frdy_SPEC;
1173 pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
1174 impl Frdy {
1175 #[doc = "Program, Block Erase, Multi Block Erase, P/E suspend, P/E resume, Forced Stop, Blank Check, or Configuration set command processing is in progress"]
1176 pub const _0: Self = Self::new(0);
1177
1178 #[doc = "None of the above is in progress."]
1179 pub const _1: Self = Self::new(1);
1180 }
1181 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1182 pub struct Oterr_SPEC;
1183 pub type Oterr = crate::EnumBitfieldStruct<u8, Oterr_SPEC>;
1184 impl Oterr {
1185 #[doc = "A status clear or forced stop command processing is complete"]
1186 pub const _0: Self = Self::new(0);
1187
1188 #[doc = "An error has occurred."]
1189 pub const _1: Self = Self::new(1);
1190 }
1191 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1192 pub struct Secerr_SPEC;
1193 pub type Secerr = crate::EnumBitfieldStruct<u8, Secerr_SPEC>;
1194 impl Secerr {
1195 #[doc = "A status clear or forced stop command processing is complete"]
1196 pub const _0: Self = Self::new(0);
1197
1198 #[doc = "An error has occurred."]
1199 pub const _1: Self = Self::new(1);
1200 }
1201 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1202 pub struct Feseterr_SPEC;
1203 pub type Feseterr = crate::EnumBitfieldStruct<u8, Feseterr_SPEC>;
1204 impl Feseterr {
1205 #[doc = "A status clear or forced stop command processing is complete"]
1206 pub const _0: Self = Self::new(0);
1207
1208 #[doc = "An error has occurred."]
1209 pub const _1: Self = Self::new(1);
1210 }
1211 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1212 pub struct Ilgcomerr_SPEC;
1213 pub type Ilgcomerr = crate::EnumBitfieldStruct<u8, Ilgcomerr_SPEC>;
1214 impl Ilgcomerr {
1215 #[doc = "A status clear or forced stop command processing is complete"]
1216 pub const _0: Self = Self::new(0);
1217
1218 #[doc = "An error has occurred."]
1219 pub const _1: Self = Self::new(1);
1220 }
1221}
1222#[doc(hidden)]
1223#[derive(Copy, Clone, Eq, PartialEq)]
1224pub struct Fentryr_SPEC;
1225impl crate::sealed::RegSpec for Fentryr_SPEC {
1226 type DataType = u16;
1227}
1228
1229#[doc = "Flash P/E Mode Entry Register"]
1230pub type Fentryr = crate::RegValueT<Fentryr_SPEC>;
1231
1232impl Fentryr {
1233 #[doc = "Code Flash P/E Mode Entry"]
1234 #[inline(always)]
1235 pub fn fentryc(
1236 self,
1237 ) -> crate::common::RegisterField<
1238 0,
1239 0x1,
1240 1,
1241 0,
1242 fentryr::Fentryc,
1243 fentryr::Fentryc,
1244 Fentryr_SPEC,
1245 crate::common::RW,
1246 > {
1247 crate::common::RegisterField::<
1248 0,
1249 0x1,
1250 1,
1251 0,
1252 fentryr::Fentryc,
1253 fentryr::Fentryc,
1254 Fentryr_SPEC,
1255 crate::common::RW,
1256 >::from_register(self, 0)
1257 }
1258
1259 #[doc = "Data Flash P/E Mode Entry"]
1260 #[inline(always)]
1261 pub fn fentryd(
1262 self,
1263 ) -> crate::common::RegisterField<
1264 7,
1265 0x1,
1266 1,
1267 0,
1268 fentryr::Fentryd,
1269 fentryr::Fentryd,
1270 Fentryr_SPEC,
1271 crate::common::RW,
1272 > {
1273 crate::common::RegisterField::<
1274 7,
1275 0x1,
1276 1,
1277 0,
1278 fentryr::Fentryd,
1279 fentryr::Fentryd,
1280 Fentryr_SPEC,
1281 crate::common::RW,
1282 >::from_register(self, 0)
1283 }
1284
1285 #[doc = "Key Code"]
1286 #[inline(always)]
1287 pub fn key(
1288 self,
1289 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fentryr_SPEC, crate::common::W> {
1290 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fentryr_SPEC,crate::common::W>::from_register(self,0)
1291 }
1292}
1293impl ::core::default::Default for Fentryr {
1294 #[inline(always)]
1295 fn default() -> Fentryr {
1296 <crate::RegValueT<Fentryr_SPEC> as RegisterValue<_>>::new(0)
1297 }
1298}
1299pub mod fentryr {
1300
1301 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1302 pub struct Fentryc_SPEC;
1303 pub type Fentryc = crate::EnumBitfieldStruct<u8, Fentryc_SPEC>;
1304 impl Fentryc {
1305 #[doc = "Code flash is in read mode"]
1306 pub const _0: Self = Self::new(0);
1307
1308 #[doc = "Code flash is in P/E mode."]
1309 pub const _1: Self = Self::new(1);
1310 }
1311 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1312 pub struct Fentryd_SPEC;
1313 pub type Fentryd = crate::EnumBitfieldStruct<u8, Fentryd_SPEC>;
1314 impl Fentryd {
1315 #[doc = "Data flash is in read mode"]
1316 pub const _0: Self = Self::new(0);
1317
1318 #[doc = "Data flash is in P/E mode."]
1319 pub const _1: Self = Self::new(1);
1320 }
1321}
1322#[doc(hidden)]
1323#[derive(Copy, Clone, Eq, PartialEq)]
1324pub struct Fsuinitr_SPEC;
1325impl crate::sealed::RegSpec for Fsuinitr_SPEC {
1326 type DataType = u16;
1327}
1328
1329#[doc = "Flash Sequencer Setup Initialization Register"]
1330pub type Fsuinitr = crate::RegValueT<Fsuinitr_SPEC>;
1331
1332impl Fsuinitr {
1333 #[doc = "Set-Up Initialization"]
1334 #[inline(always)]
1335 pub fn suinit(
1336 self,
1337 ) -> crate::common::RegisterField<
1338 0,
1339 0x1,
1340 1,
1341 0,
1342 fsuinitr::Suinit,
1343 fsuinitr::Suinit,
1344 Fsuinitr_SPEC,
1345 crate::common::RW,
1346 > {
1347 crate::common::RegisterField::<
1348 0,
1349 0x1,
1350 1,
1351 0,
1352 fsuinitr::Suinit,
1353 fsuinitr::Suinit,
1354 Fsuinitr_SPEC,
1355 crate::common::RW,
1356 >::from_register(self, 0)
1357 }
1358
1359 #[doc = "Key Code"]
1360 #[inline(always)]
1361 pub fn key(
1362 self,
1363 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fsuinitr_SPEC, crate::common::W> {
1364 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fsuinitr_SPEC,crate::common::W>::from_register(self,0)
1365 }
1366}
1367impl ::core::default::Default for Fsuinitr {
1368 #[inline(always)]
1369 fn default() -> Fsuinitr {
1370 <crate::RegValueT<Fsuinitr_SPEC> as RegisterValue<_>>::new(0)
1371 }
1372}
1373pub mod fsuinitr {
1374
1375 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1376 pub struct Suinit_SPEC;
1377 pub type Suinit = crate::EnumBitfieldStruct<u8, Suinit_SPEC>;
1378 impl Suinit {
1379 #[doc = "The FSADDR, FEADDR, FBPROT1, FENTRYR, FBCCNT, and FCPSR flash sequencer setup registers keep their current values"]
1380 pub const _0: Self = Self::new(0);
1381
1382 #[doc = "The FSADDR, FEADDR, FBRPOT1, FENTRYR, FBCCNT, and FCPSR flash sequencer setup registers are initialized."]
1383 pub const _1: Self = Self::new(1);
1384 }
1385}
1386#[doc(hidden)]
1387#[derive(Copy, Clone, Eq, PartialEq)]
1388pub struct Fcmdr_SPEC;
1389impl crate::sealed::RegSpec for Fcmdr_SPEC {
1390 type DataType = u16;
1391}
1392
1393#[doc = "FACI Command Register"]
1394pub type Fcmdr = crate::RegValueT<Fcmdr_SPEC>;
1395
1396impl Fcmdr {
1397 #[doc = "Pre-command Flag"]
1398 #[inline(always)]
1399 pub fn pcmdr(
1400 self,
1401 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Fcmdr_SPEC, crate::common::R> {
1402 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Fcmdr_SPEC,crate::common::R>::from_register(self,0)
1403 }
1404
1405 #[doc = "Command Flag"]
1406 #[inline(always)]
1407 pub fn cmdr(
1408 self,
1409 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fcmdr_SPEC, crate::common::R> {
1410 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fcmdr_SPEC,crate::common::R>::from_register(self,0)
1411 }
1412}
1413impl ::core::default::Default for Fcmdr {
1414 #[inline(always)]
1415 fn default() -> Fcmdr {
1416 <crate::RegValueT<Fcmdr_SPEC> as RegisterValue<_>>::new(0)
1417 }
1418}
1419
1420#[doc(hidden)]
1421#[derive(Copy, Clone, Eq, PartialEq)]
1422pub struct Fbccnt_SPEC;
1423impl crate::sealed::RegSpec for Fbccnt_SPEC {
1424 type DataType = u8;
1425}
1426
1427#[doc = "Blank Check Control Register"]
1428pub type Fbccnt = crate::RegValueT<Fbccnt_SPEC>;
1429
1430impl Fbccnt {
1431 #[doc = "Blank Check Direction"]
1432 #[inline(always)]
1433 pub fn bcdir(
1434 self,
1435 ) -> crate::common::RegisterField<
1436 0,
1437 0x1,
1438 1,
1439 0,
1440 fbccnt::Bcdir,
1441 fbccnt::Bcdir,
1442 Fbccnt_SPEC,
1443 crate::common::RW,
1444 > {
1445 crate::common::RegisterField::<
1446 0,
1447 0x1,
1448 1,
1449 0,
1450 fbccnt::Bcdir,
1451 fbccnt::Bcdir,
1452 Fbccnt_SPEC,
1453 crate::common::RW,
1454 >::from_register(self, 0)
1455 }
1456}
1457impl ::core::default::Default for Fbccnt {
1458 #[inline(always)]
1459 fn default() -> Fbccnt {
1460 <crate::RegValueT<Fbccnt_SPEC> as RegisterValue<_>>::new(0)
1461 }
1462}
1463pub mod fbccnt {
1464
1465 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1466 pub struct Bcdir_SPEC;
1467 pub type Bcdir = crate::EnumBitfieldStruct<u8, Bcdir_SPEC>;
1468 impl Bcdir {
1469 #[doc = "Blank checking is executed from the lower addresses to the higher addresses (incremental mode)"]
1470 pub const _0: Self = Self::new(0);
1471
1472 #[doc = "Blank checking is executed from the higher addresses to the lower addresses (decremental mode)."]
1473 pub const _1: Self = Self::new(1);
1474 }
1475}
1476#[doc(hidden)]
1477#[derive(Copy, Clone, Eq, PartialEq)]
1478pub struct Fbcstat_SPEC;
1479impl crate::sealed::RegSpec for Fbcstat_SPEC {
1480 type DataType = u8;
1481}
1482
1483#[doc = "Blank Check Status Register"]
1484pub type Fbcstat = crate::RegValueT<Fbcstat_SPEC>;
1485
1486impl Fbcstat {
1487 #[doc = "Blank Check Status Flag"]
1488 #[inline(always)]
1489 pub fn bcst(
1490 self,
1491 ) -> crate::common::RegisterField<
1492 0,
1493 0x1,
1494 1,
1495 0,
1496 fbcstat::Bcst,
1497 fbcstat::Bcst,
1498 Fbcstat_SPEC,
1499 crate::common::R,
1500 > {
1501 crate::common::RegisterField::<
1502 0,
1503 0x1,
1504 1,
1505 0,
1506 fbcstat::Bcst,
1507 fbcstat::Bcst,
1508 Fbcstat_SPEC,
1509 crate::common::R,
1510 >::from_register(self, 0)
1511 }
1512}
1513impl ::core::default::Default for Fbcstat {
1514 #[inline(always)]
1515 fn default() -> Fbcstat {
1516 <crate::RegValueT<Fbcstat_SPEC> as RegisterValue<_>>::new(0)
1517 }
1518}
1519pub mod fbcstat {
1520
1521 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1522 pub struct Bcst_SPEC;
1523 pub type Bcst = crate::EnumBitfieldStruct<u8, Bcst_SPEC>;
1524 impl Bcst {
1525 #[doc = "The target area is in the non-programmed state, that is, the area has been erased but has not yet been reprogrammed"]
1526 pub const _0: Self = Self::new(0);
1527
1528 #[doc = "The target area has been programmed with 0s or 1s."]
1529 pub const _1: Self = Self::new(1);
1530 }
1531}
1532#[doc(hidden)]
1533#[derive(Copy, Clone, Eq, PartialEq)]
1534pub struct Fpsaddr_SPEC;
1535impl crate::sealed::RegSpec for Fpsaddr_SPEC {
1536 type DataType = u32;
1537}
1538
1539#[doc = "Data Flash Programming Start Address Register"]
1540pub type Fpsaddr = crate::RegValueT<Fpsaddr_SPEC>;
1541
1542impl Fpsaddr {
1543 #[doc = "Programmed Area Start Address"]
1544 #[inline(always)]
1545 pub fn psadr(
1546 self,
1547 ) -> crate::common::RegisterField<0, 0x1ffff, 1, 0, u32, u32, Fpsaddr_SPEC, crate::common::R>
1548 {
1549 crate::common::RegisterField::<0,0x1ffff,1,0,u32,u32,Fpsaddr_SPEC,crate::common::R>::from_register(self,0)
1550 }
1551}
1552impl ::core::default::Default for Fpsaddr {
1553 #[inline(always)]
1554 fn default() -> Fpsaddr {
1555 <crate::RegValueT<Fpsaddr_SPEC> as RegisterValue<_>>::new(0)
1556 }
1557}
1558
1559#[doc(hidden)]
1560#[derive(Copy, Clone, Eq, PartialEq)]
1561pub struct Fsuasmon_SPEC;
1562impl crate::sealed::RegSpec for Fsuasmon_SPEC {
1563 type DataType = u32;
1564}
1565
1566#[doc = "Flash Startup Area Select Monitor Register"]
1567pub type Fsuasmon = crate::RegValueT<Fsuasmon_SPEC>;
1568
1569impl Fsuasmon {
1570 #[doc = "Protection Programming Flag to set Boot Flag and Startup Area Control"]
1571 #[inline(always)]
1572 pub fn fspr(
1573 self,
1574 ) -> crate::common::RegisterField<
1575 15,
1576 0x1,
1577 1,
1578 0,
1579 fsuasmon::Fspr,
1580 fsuasmon::Fspr,
1581 Fsuasmon_SPEC,
1582 crate::common::R,
1583 > {
1584 crate::common::RegisterField::<
1585 15,
1586 0x1,
1587 1,
1588 0,
1589 fsuasmon::Fspr,
1590 fsuasmon::Fspr,
1591 Fsuasmon_SPEC,
1592 crate::common::R,
1593 >::from_register(self, 0)
1594 }
1595
1596 #[doc = "Flag of Startup Area Select for Boot Swap"]
1597 #[inline(always)]
1598 pub fn btflg(
1599 self,
1600 ) -> crate::common::RegisterField<
1601 31,
1602 0x1,
1603 1,
1604 0,
1605 fsuasmon::Btflg,
1606 fsuasmon::Btflg,
1607 Fsuasmon_SPEC,
1608 crate::common::R,
1609 > {
1610 crate::common::RegisterField::<
1611 31,
1612 0x1,
1613 1,
1614 0,
1615 fsuasmon::Btflg,
1616 fsuasmon::Btflg,
1617 Fsuasmon_SPEC,
1618 crate::common::R,
1619 >::from_register(self, 0)
1620 }
1621}
1622impl ::core::default::Default for Fsuasmon {
1623 #[inline(always)]
1624 fn default() -> Fsuasmon {
1625 <crate::RegValueT<Fsuasmon_SPEC> as RegisterValue<_>>::new(0)
1626 }
1627}
1628pub mod fsuasmon {
1629
1630 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1631 pub struct Fspr_SPEC;
1632 pub type Fspr = crate::EnumBitfieldStruct<u8, Fspr_SPEC>;
1633 impl Fspr {
1634 #[doc = "Protected state"]
1635 pub const _0: Self = Self::new(0);
1636
1637 #[doc = "Non-protected state."]
1638 pub const _1: Self = Self::new(1);
1639 }
1640 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1641 pub struct Btflg_SPEC;
1642 pub type Btflg = crate::EnumBitfieldStruct<u8, Btflg_SPEC>;
1643 impl Btflg {
1644 #[doc = "The startup area is the alternate block (block 1)"]
1645 pub const _0: Self = Self::new(0);
1646
1647 #[doc = "The startup area is the default block (block 0)."]
1648 pub const _1: Self = Self::new(1);
1649 }
1650}
1651#[doc(hidden)]
1652#[derive(Copy, Clone, Eq, PartialEq)]
1653pub struct Fcpsr_SPEC;
1654impl crate::sealed::RegSpec for Fcpsr_SPEC {
1655 type DataType = u16;
1656}
1657
1658#[doc = "Flash Sequencer Processing Switching Register"]
1659pub type Fcpsr = crate::RegValueT<Fcpsr_SPEC>;
1660
1661impl Fcpsr {
1662 #[doc = "Erasure Suspend Mode"]
1663 #[inline(always)]
1664 pub fn esuspmd(
1665 self,
1666 ) -> crate::common::RegisterField<
1667 0,
1668 0x1,
1669 1,
1670 0,
1671 fcpsr::Esuspmd,
1672 fcpsr::Esuspmd,
1673 Fcpsr_SPEC,
1674 crate::common::RW,
1675 > {
1676 crate::common::RegisterField::<
1677 0,
1678 0x1,
1679 1,
1680 0,
1681 fcpsr::Esuspmd,
1682 fcpsr::Esuspmd,
1683 Fcpsr_SPEC,
1684 crate::common::RW,
1685 >::from_register(self, 0)
1686 }
1687}
1688impl ::core::default::Default for Fcpsr {
1689 #[inline(always)]
1690 fn default() -> Fcpsr {
1691 <crate::RegValueT<Fcpsr_SPEC> as RegisterValue<_>>::new(0)
1692 }
1693}
1694pub mod fcpsr {
1695
1696 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1697 pub struct Esuspmd_SPEC;
1698 pub type Esuspmd = crate::EnumBitfieldStruct<u8, Esuspmd_SPEC>;
1699 impl Esuspmd {
1700 #[doc = "Suspension priority mode"]
1701 pub const _0: Self = Self::new(0);
1702
1703 #[doc = "Erasure priority mode."]
1704 pub const _1: Self = Self::new(1);
1705 }
1706}
1707#[doc(hidden)]
1708#[derive(Copy, Clone, Eq, PartialEq)]
1709pub struct Fpckar_SPEC;
1710impl crate::sealed::RegSpec for Fpckar_SPEC {
1711 type DataType = u16;
1712}
1713
1714#[doc = "Flash Sequencer Processing Clock Notification Register"]
1715pub type Fpckar = crate::RegValueT<Fpckar_SPEC>;
1716
1717impl Fpckar {
1718 #[doc = "Flash Sequencer Operating Clock Notification"]
1719 #[inline(always)]
1720 pub fn pcka(
1721 self,
1722 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Fpckar_SPEC, crate::common::RW> {
1723 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Fpckar_SPEC,crate::common::RW>::from_register(self,0)
1724 }
1725
1726 #[doc = "Key Code"]
1727 #[inline(always)]
1728 pub fn key(
1729 self,
1730 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fpckar_SPEC, crate::common::W> {
1731 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fpckar_SPEC,crate::common::W>::from_register(self,0)
1732 }
1733}
1734impl ::core::default::Default for Fpckar {
1735 #[inline(always)]
1736 fn default() -> Fpckar {
1737 <crate::RegValueT<Fpckar_SPEC> as RegisterValue<_>>::new(50)
1738 }
1739}
1740
1741#[doc(hidden)]
1742#[derive(Copy, Clone, Eq, PartialEq)]
1743pub struct Fsuacr_SPEC;
1744impl crate::sealed::RegSpec for Fsuacr_SPEC {
1745 type DataType = u16;
1746}
1747
1748#[doc = "Flash Startup Area Control Register"]
1749pub type Fsuacr = crate::RegValueT<Fsuacr_SPEC>;
1750
1751impl Fsuacr {
1752 #[doc = "Startup Area Select"]
1753 #[inline(always)]
1754 pub fn sas(
1755 self,
1756 ) -> crate::common::RegisterField<
1757 0,
1758 0x3,
1759 1,
1760 0,
1761 fsuacr::Sas,
1762 fsuacr::Sas,
1763 Fsuacr_SPEC,
1764 crate::common::RW,
1765 > {
1766 crate::common::RegisterField::<
1767 0,
1768 0x3,
1769 1,
1770 0,
1771 fsuacr::Sas,
1772 fsuacr::Sas,
1773 Fsuacr_SPEC,
1774 crate::common::RW,
1775 >::from_register(self, 0)
1776 }
1777
1778 #[doc = "Key Code"]
1779 #[inline(always)]
1780 pub fn key(
1781 self,
1782 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fsuacr_SPEC, crate::common::W> {
1783 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fsuacr_SPEC,crate::common::W>::from_register(self,0)
1784 }
1785}
1786impl ::core::default::Default for Fsuacr {
1787 #[inline(always)]
1788 fn default() -> Fsuacr {
1789 <crate::RegValueT<Fsuacr_SPEC> as RegisterValue<_>>::new(0)
1790 }
1791}
1792pub mod fsuacr {
1793
1794 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1795 pub struct Sas_SPEC;
1796 pub type Sas = crate::EnumBitfieldStruct<u8, Sas_SPEC>;
1797 impl Sas {
1798 #[doc = "Startup area is selected by BTFLG bit"]
1799 pub const _00: Self = Self::new(0);
1800
1801 #[doc = "Startup area is selected by BTFLG bit"]
1802 pub const _01: Self = Self::new(1);
1803
1804 #[doc = "Startup area is temporarily switched to the default area (block 0)"]
1805 pub const _10: Self = Self::new(2);
1806
1807 #[doc = "Startup area is temporarily switched to the alternate area (block 1)."]
1808 pub const _11: Self = Self::new(3);
1809 }
1810}